* [PATCH igt] igt/gem_eio: Exercise set-wedging against request submission
@ 2018-03-16 22:02 ` Chris Wilson
0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2018-03-16 22:02 UTC (permalink / raw)
To: intel-gfx; +Cc: igt-dev
Build up a large stockpile of requests, ~500,000, and feed them into the
system at 20KHz whilst simultaneously triggering set-wedged in order to
try and race i915_gem_set_wedged() against the engine->submit_request()
callback.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
---
tests/gem_eio.c | 108 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 108 insertions(+)
diff --git a/tests/gem_eio.c b/tests/gem_eio.c
index 249f5bff..a4bcee3d 100644
--- a/tests/gem_eio.c
+++ b/tests/gem_eio.c
@@ -34,12 +34,14 @@
#include <fcntl.h>
#include <inttypes.h>
#include <errno.h>
+#include <signal.h>
#include <sys/ioctl.h>
#include <drm.h>
#include "igt.h"
#include "igt_sysfs.h"
+#include "i915/gem_ring.h"
#include "sw_sync.h"
IGT_TEST_DESCRIPTION("Test that specific ioctls report a wedged GPU (EIO).");
@@ -452,6 +454,107 @@ static void test_inflight_internal(int fd)
trigger_reset(fd);
}
+static void notify(union sigval arg)
+{
+ sw_sync_timeline_inc(arg.sival_int, 1);
+}
+
+static void test_set_wedged(int fd)
+{
+#define NCTX 4096
+ const uint32_t bbe = MI_BATCH_BUFFER_END;
+ const unsigned int ring_size = gem_measure_ring_inflight(fd, 0, 0) - 1;
+ struct drm_i915_gem_execbuffer2 execbuf;
+ struct drm_i915_gem_exec_object2 obj;
+ int dir = igt_debugfs_dir(fd);
+ struct itimerspec its;
+ struct sigevent sev;
+ uint32_t *contexts;
+ timer_t timer;
+ int timeline;
+ int syncpt;
+
+ contexts = calloc(NCTX, sizeof(*contexts));
+ igt_assert(contexts);
+
+ for (int n = 0; n < NCTX; n++)
+ contexts[n] = context_create_safe(fd);
+
+ memset(&obj, 0, sizeof(obj));
+ obj.handle = gem_create(fd, 4096);
+ gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
+
+ memset(&execbuf, 0, sizeof(execbuf));
+ execbuf.buffers_ptr = to_user_pointer(&obj);
+ execbuf.buffer_count = 1;
+ execbuf.flags = I915_EXEC_FENCE_IN;
+
+ for (unsigned int nctx = 1; nctx <= NCTX; nctx <<= 1) {
+ unsigned int nrq = ring_size;
+ if (!gem_has_execlists(fd)) {
+ nrq = (ring_size + nctx - 1) / nctx + 1;
+ nctx = ring_size / nrq;
+ }
+ igt_assert(nrq);
+ igt_assert(nctx);
+
+ timeline = sw_sync_timeline_create();
+
+ /* Build up a large orderly queue of requests */
+ syncpt = 1;
+ for (int m = 0; m < nrq; m++) {
+ for (int n = 0; n < nctx; n++) {
+ execbuf.rsvd1 = contexts[n];
+ execbuf.rsvd2 =
+ sw_sync_timeline_create_fence(timeline, syncpt);
+ gem_execbuf(fd, &execbuf);
+ close(execbuf.rsvd2);
+
+ syncpt++;
+ }
+ }
+ igt_debug("Queued %d requests over %d contexts\n",
+ syncpt, nctx);
+
+ igt_require(i915_reset_control(false));
+
+ /* Feed each request in at 20KHz */
+ memset(&sev, 0, sizeof(sev));
+ sev.sigev_notify = SIGEV_THREAD;
+ sev.sigev_value.sival_int = timeline;
+ sev.sigev_notify_function = notify;
+ igt_assert(timer_create(CLOCK_MONOTONIC, &sev, &timer) == 0);
+
+ memset(&its, 0, sizeof(its));
+ its.it_interval.tv_sec = 0;
+ its.it_interval.tv_nsec = 5000;
+ its.it_value = its.it_interval;
+ igt_assert(timer_settime(timer, 0, &its, NULL) == 0);
+ usleep(10);
+
+ igt_debug("Triggering wedge\n");
+ igt_sysfs_set(dir, "i915_wedged", "-1");
+
+ igt_debug("Disabling timer\n");
+ timer_delete(timer);
+ usleep(1000); /* timer_delete() doesn't flush pending signals */
+
+ igt_debug("Cleaning up\n");
+ close(timeline);
+
+ igt_assert(!gem_bo_busy(fd, obj.handle));
+
+ igt_assert(i915_reset_control(true));
+ trigger_reset(fd);
+ }
+
+ gem_close(fd, obj.handle);
+ for (int n = 0; n < NCTX; n++)
+ gem_context_destroy(fd, contexts[n]);
+ free(contexts);
+ close(dir);
+}
+
static int fd = -1;
static void
@@ -509,4 +612,9 @@ igt_main
igt_subtest("in-flight-suspend")
test_inflight_suspend(fd);
+
+ igt_subtest("set-wedged-racing") {
+ igt_require_sw_sync();
+ test_set_wedged(fd);
+ }
}
--
2.16.2
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [igt-dev] [PATCH igt] igt/gem_eio: Exercise set-wedging against request submission
@ 2018-03-16 22:02 ` Chris Wilson
0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2018-03-16 22:02 UTC (permalink / raw)
To: intel-gfx; +Cc: igt-dev, Mika Kuoppala
Build up a large stockpile of requests, ~500,000, and feed them into the
system at 20KHz whilst simultaneously triggering set-wedged in order to
try and race i915_gem_set_wedged() against the engine->submit_request()
callback.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
---
tests/gem_eio.c | 108 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 108 insertions(+)
diff --git a/tests/gem_eio.c b/tests/gem_eio.c
index 249f5bff..a4bcee3d 100644
--- a/tests/gem_eio.c
+++ b/tests/gem_eio.c
@@ -34,12 +34,14 @@
#include <fcntl.h>
#include <inttypes.h>
#include <errno.h>
+#include <signal.h>
#include <sys/ioctl.h>
#include <drm.h>
#include "igt.h"
#include "igt_sysfs.h"
+#include "i915/gem_ring.h"
#include "sw_sync.h"
IGT_TEST_DESCRIPTION("Test that specific ioctls report a wedged GPU (EIO).");
@@ -452,6 +454,107 @@ static void test_inflight_internal(int fd)
trigger_reset(fd);
}
+static void notify(union sigval arg)
+{
+ sw_sync_timeline_inc(arg.sival_int, 1);
+}
+
+static void test_set_wedged(int fd)
+{
+#define NCTX 4096
+ const uint32_t bbe = MI_BATCH_BUFFER_END;
+ const unsigned int ring_size = gem_measure_ring_inflight(fd, 0, 0) - 1;
+ struct drm_i915_gem_execbuffer2 execbuf;
+ struct drm_i915_gem_exec_object2 obj;
+ int dir = igt_debugfs_dir(fd);
+ struct itimerspec its;
+ struct sigevent sev;
+ uint32_t *contexts;
+ timer_t timer;
+ int timeline;
+ int syncpt;
+
+ contexts = calloc(NCTX, sizeof(*contexts));
+ igt_assert(contexts);
+
+ for (int n = 0; n < NCTX; n++)
+ contexts[n] = context_create_safe(fd);
+
+ memset(&obj, 0, sizeof(obj));
+ obj.handle = gem_create(fd, 4096);
+ gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
+
+ memset(&execbuf, 0, sizeof(execbuf));
+ execbuf.buffers_ptr = to_user_pointer(&obj);
+ execbuf.buffer_count = 1;
+ execbuf.flags = I915_EXEC_FENCE_IN;
+
+ for (unsigned int nctx = 1; nctx <= NCTX; nctx <<= 1) {
+ unsigned int nrq = ring_size;
+ if (!gem_has_execlists(fd)) {
+ nrq = (ring_size + nctx - 1) / nctx + 1;
+ nctx = ring_size / nrq;
+ }
+ igt_assert(nrq);
+ igt_assert(nctx);
+
+ timeline = sw_sync_timeline_create();
+
+ /* Build up a large orderly queue of requests */
+ syncpt = 1;
+ for (int m = 0; m < nrq; m++) {
+ for (int n = 0; n < nctx; n++) {
+ execbuf.rsvd1 = contexts[n];
+ execbuf.rsvd2 =
+ sw_sync_timeline_create_fence(timeline, syncpt);
+ gem_execbuf(fd, &execbuf);
+ close(execbuf.rsvd2);
+
+ syncpt++;
+ }
+ }
+ igt_debug("Queued %d requests over %d contexts\n",
+ syncpt, nctx);
+
+ igt_require(i915_reset_control(false));
+
+ /* Feed each request in at 20KHz */
+ memset(&sev, 0, sizeof(sev));
+ sev.sigev_notify = SIGEV_THREAD;
+ sev.sigev_value.sival_int = timeline;
+ sev.sigev_notify_function = notify;
+ igt_assert(timer_create(CLOCK_MONOTONIC, &sev, &timer) == 0);
+
+ memset(&its, 0, sizeof(its));
+ its.it_interval.tv_sec = 0;
+ its.it_interval.tv_nsec = 5000;
+ its.it_value = its.it_interval;
+ igt_assert(timer_settime(timer, 0, &its, NULL) == 0);
+ usleep(10);
+
+ igt_debug("Triggering wedge\n");
+ igt_sysfs_set(dir, "i915_wedged", "-1");
+
+ igt_debug("Disabling timer\n");
+ timer_delete(timer);
+ usleep(1000); /* timer_delete() doesn't flush pending signals */
+
+ igt_debug("Cleaning up\n");
+ close(timeline);
+
+ igt_assert(!gem_bo_busy(fd, obj.handle));
+
+ igt_assert(i915_reset_control(true));
+ trigger_reset(fd);
+ }
+
+ gem_close(fd, obj.handle);
+ for (int n = 0; n < NCTX; n++)
+ gem_context_destroy(fd, contexts[n]);
+ free(contexts);
+ close(dir);
+}
+
static int fd = -1;
static void
@@ -509,4 +612,9 @@ igt_main
igt_subtest("in-flight-suspend")
test_inflight_suspend(fd);
+
+ igt_subtest("set-wedged-racing") {
+ igt_require_sw_sync();
+ test_set_wedged(fd);
+ }
}
--
2.16.2
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for igt/gem_eio: Exercise set-wedging against request submission (rev2)
2018-03-16 22:02 ` [igt-dev] " Chris Wilson
(?)
@ 2018-03-16 23:19 ` Patchwork
-1 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2018-03-16 23:19 UTC (permalink / raw)
To: Chris Wilson; +Cc: igt-dev
== Series Details ==
Series: igt/gem_eio: Exercise set-wedging against request submission (rev2)
URL : https://patchwork.freedesktop.org/series/39598/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
98f7614bd725afaae48f7b70d18329149075661b lib: Parse plane IN_FORMATS blobifiers into a nicer form
with latest DRM-Tip kernel build CI_DRM_3943
fa73baa35269 drm-tip: 2018y-03m-16d-19h-43m-50s UTC integration manifest
Testlist changes:
+igt@gem_eio@set-wedged-racing
---- Known issues:
Test gem_mmap_gtt:
Subgroup basic-small-bo-tiledx:
pass -> FAIL (fi-gdg-551) fdo#102575
Test prime_vgem:
Subgroup basic-fence-flip:
pass -> FAIL (fi-ilk-650) fdo#104008
fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
fi-bdw-5557u total:285 pass:264 dwarn:0 dfail:0 fail:0 skip:21 time:437s
fi-bdw-gvtdvm total:285 pass:261 dwarn:0 dfail:0 fail:0 skip:24 time:442s
fi-blb-e6850 total:285 pass:220 dwarn:1 dfail:0 fail:0 skip:64 time:388s
fi-bsw-n3050 total:285 pass:239 dwarn:0 dfail:0 fail:0 skip:46 time:538s
fi-bwr-2160 total:285 pass:180 dwarn:0 dfail:0 fail:0 skip:105 time:297s
fi-bxt-dsi total:285 pass:255 dwarn:0 dfail:0 fail:0 skip:30 time:518s
fi-bxt-j4205 total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:517s
fi-byt-j1900 total:285 pass:250 dwarn:0 dfail:0 fail:0 skip:35 time:520s
fi-byt-n2820 total:285 pass:246 dwarn:0 dfail:0 fail:0 skip:39 time:507s
fi-cfl-8700k total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:410s
fi-cfl-s2 total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:585s
fi-cfl-u total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:518s
fi-cnl-drrs total:285 pass:254 dwarn:3 dfail:0 fail:0 skip:28 time:540s
fi-cnl-y3 total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:587s
fi-elk-e7500 total:285 pass:225 dwarn:1 dfail:0 fail:0 skip:59 time:423s
fi-gdg-551 total:285 pass:176 dwarn:0 dfail:0 fail:1 skip:108 time:317s
fi-glk-1 total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:539s
fi-hsw-4770 total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:406s
fi-ilk-650 total:285 pass:224 dwarn:0 dfail:0 fail:1 skip:60 time:420s
fi-ivb-3520m total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:478s
fi-ivb-3770 total:285 pass:252 dwarn:0 dfail:0 fail:0 skip:33 time:430s
fi-kbl-7500u total:285 pass:260 dwarn:1 dfail:0 fail:0 skip:24 time:474s
fi-kbl-7567u total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:473s
fi-kbl-r total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:516s
fi-pnv-d510 total:285 pass:219 dwarn:1 dfail:0 fail:0 skip:65 time:664s
fi-skl-6260u total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:442s
fi-skl-6600u total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:537s
fi-skl-6700hq total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:540s
fi-skl-6700k2 total:285 pass:261 dwarn:0 dfail:0 fail:0 skip:24 time:500s
fi-skl-6770hq total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:503s
fi-skl-guc total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:429s
fi-skl-gvtdvm total:285 pass:262 dwarn:0 dfail:0 fail:0 skip:23 time:445s
fi-snb-2520m total:285 pass:245 dwarn:0 dfail:0 fail:0 skip:40 time:569s
fi-snb-2600 total:285 pass:245 dwarn:0 dfail:0 fail:0 skip:40 time:406s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1156/issues.html
_______________________________________________
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igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 6+ messages in thread
* [igt-dev] ✗ Fi.CI.IGT: warning for igt/gem_eio: Exercise set-wedging against request submission (rev2)
2018-03-16 22:02 ` [igt-dev] " Chris Wilson
(?)
(?)
@ 2018-03-17 5:17 ` Patchwork
-1 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2018-03-17 5:17 UTC (permalink / raw)
To: Chris Wilson; +Cc: igt-dev
== Series Details ==
Series: igt/gem_eio: Exercise set-wedging against request submission (rev2)
URL : https://patchwork.freedesktop.org/series/39598/
State : warning
== Summary ==
---- Possible new issues:
Test pm_rc6_residency:
Subgroup rc6-accuracy:
pass -> SKIP (shard-snb)
---- Known issues:
Test drv_suspend:
Subgroup debugfs-reader:
pass -> SKIP (shard-snb) fdo#102365
Test kms_chv_cursor_fail:
Subgroup pipe-a-64x64-right-edge:
pass -> SKIP (shard-snb) fdo#105185 +1
Test kms_flip:
Subgroup 2x-flip-vs-expired-vblank:
pass -> FAIL (shard-hsw) fdo#102887
Subgroup 2x-plain-flip-ts-check-interruptible:
fail -> PASS (shard-hsw) fdo#100368
Test kms_pipe_crc_basic:
Subgroup hang-read-crc-pipe-c:
fail -> PASS (shard-apl) fdo#103191
Test kms_rotation_crc:
Subgroup primary-rotation-180:
pass -> FAIL (shard-snb) fdo#103925
fdo#102365 https://bugs.freedesktop.org/show_bug.cgi?id=102365
fdo#105185 https://bugs.freedesktop.org/show_bug.cgi?id=105185
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
shard-apl total:3443 pass:1813 dwarn:1 dfail:0 fail:9 skip:1619 time:13019s
shard-hsw total:3443 pass:1767 dwarn:1 dfail:0 fail:3 skip:1671 time:11904s
shard-snb total:3443 pass:1355 dwarn:1 dfail:0 fail:4 skip:2083 time:7197s
Blacklisted hosts:
shard-kbl total:3388 pass:1890 dwarn:22 dfail:0 fail:8 skip:1467 time:9502s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1156/shards.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH igt] igt/gem_eio: Exercise set-wedging against request submission
2018-03-16 22:02 ` [igt-dev] " Chris Wilson
@ 2018-03-17 9:09 ` Chris Wilson
-1 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2018-03-17 9:09 UTC (permalink / raw)
To: intel-gfx; +Cc: igt-dev
Build up a large stockpile of requests, ~500,000, and feed them into the
system at 20KHz whilst simultaneously triggering set-wedged in order to
try and race i915_gem_set_wedged() against the engine->submit_request()
callback.
v2: Tweak sleep for flushing timer signals.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
---
tests/gem_eio.c | 110 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 110 insertions(+)
diff --git a/tests/gem_eio.c b/tests/gem_eio.c
index 249f5bff..ff3df7b6 100644
--- a/tests/gem_eio.c
+++ b/tests/gem_eio.c
@@ -34,12 +34,15 @@
#include <fcntl.h>
#include <inttypes.h>
#include <errno.h>
+#include <sched.h>
+#include <signal.h>
#include <sys/ioctl.h>
#include <drm.h>
#include "igt.h"
#include "igt_sysfs.h"
+#include "i915/gem_ring.h"
#include "sw_sync.h"
IGT_TEST_DESCRIPTION("Test that specific ioctls report a wedged GPU (EIO).");
@@ -452,6 +455,108 @@ static void test_inflight_internal(int fd)
trigger_reset(fd);
}
+static void notify(union sigval arg)
+{
+ sw_sync_timeline_inc(arg.sival_int, 1);
+}
+
+static void test_set_wedged(int fd)
+{
+#define NCTX 4096
+ const uint32_t bbe = MI_BATCH_BUFFER_END;
+ const unsigned int ring_size = gem_measure_ring_inflight(fd, 0, 0) - 1;
+ struct drm_i915_gem_execbuffer2 execbuf;
+ struct drm_i915_gem_exec_object2 obj;
+ int dir = igt_debugfs_dir(fd);
+ struct itimerspec its;
+ struct sigevent sev;
+ uint32_t *contexts;
+ timer_t timer;
+ int timeline;
+ int syncpt;
+
+ contexts = calloc(NCTX, sizeof(*contexts));
+ igt_assert(contexts);
+
+ for (int n = 0; n < NCTX; n++)
+ contexts[n] = context_create_safe(fd);
+
+ memset(&obj, 0, sizeof(obj));
+ obj.handle = gem_create(fd, 4096);
+ gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
+
+ memset(&execbuf, 0, sizeof(execbuf));
+ execbuf.buffers_ptr = to_user_pointer(&obj);
+ execbuf.buffer_count = 1;
+ execbuf.flags = I915_EXEC_FENCE_IN;
+
+ for (unsigned int nctx = 1; nctx <= NCTX; nctx <<= 1) {
+ unsigned int nrq = ring_size;
+ if (!gem_has_execlists(fd)) {
+ nrq = (ring_size + nctx - 1) / nctx + 1;
+ nctx = ring_size / nrq + 1;
+ }
+ igt_assert(nrq);
+ igt_assert(nctx);
+
+ timeline = sw_sync_timeline_create();
+
+ /* Build up a large orderly queue of requests */
+ syncpt = 1;
+ for (int m = 0; m < nrq; m++) {
+ for (int n = 0; n < nctx; n++) {
+ execbuf.rsvd1 = contexts[n];
+ execbuf.rsvd2 =
+ sw_sync_timeline_create_fence(timeline, syncpt);
+ gem_execbuf(fd, &execbuf);
+ close(execbuf.rsvd2);
+
+ syncpt++;
+ }
+ }
+ igt_debug("Queued %d requests over %d contexts\n",
+ syncpt, nctx);
+
+ igt_require(i915_reset_control(false));
+
+ /* Feed each request in at 20KHz */
+ memset(&sev, 0, sizeof(sev));
+ sev.sigev_notify = SIGEV_THREAD;
+ sev.sigev_value.sival_int = timeline;
+ sev.sigev_notify_function = notify;
+ igt_assert(timer_create(CLOCK_MONOTONIC, &sev, &timer) == 0);
+
+ memset(&its, 0, sizeof(its));
+ its.it_interval.tv_sec = 0;
+ its.it_interval.tv_nsec = 5000;
+ its.it_value = its.it_interval;
+ igt_assert(timer_settime(timer, 0, &its, NULL) == 0);
+ usleep(10);
+
+ igt_debug("Triggering wedge\n");
+ igt_sysfs_set(dir, "i915_wedged", "-1");
+
+ igt_debug("Disabling timer\n");
+ timer_delete(timer);
+ usleep(10000);/* timer_delete() doesn't flush pending signals */
+
+ igt_debug("Cleaning up\n");
+ close(timeline);
+
+ sched_yield();
+ igt_assert(!gem_bo_busy(fd, obj.handle));
+
+ igt_assert(i915_reset_control(true));
+ trigger_reset(fd);
+ }
+
+ gem_close(fd, obj.handle);
+ for (int n = 0; n < NCTX; n++)
+ gem_context_destroy(fd, contexts[n]);
+ free(contexts);
+ close(dir);
+}
+
static int fd = -1;
static void
@@ -509,4 +614,9 @@ igt_main
igt_subtest("in-flight-suspend")
test_inflight_suspend(fd);
+
+ igt_subtest("set-wedged-racing") {
+ igt_require_sw_sync();
+ test_set_wedged(fd);
+ }
}
--
2.16.2
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^ permalink raw reply related [flat|nested] 6+ messages in thread
* [igt-dev] [PATCH igt] igt/gem_eio: Exercise set-wedging against request submission
@ 2018-03-17 9:09 ` Chris Wilson
0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2018-03-17 9:09 UTC (permalink / raw)
To: intel-gfx; +Cc: igt-dev, Mika Kuoppala
Build up a large stockpile of requests, ~500,000, and feed them into the
system at 20KHz whilst simultaneously triggering set-wedged in order to
try and race i915_gem_set_wedged() against the engine->submit_request()
callback.
v2: Tweak sleep for flushing timer signals.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
---
tests/gem_eio.c | 110 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 110 insertions(+)
diff --git a/tests/gem_eio.c b/tests/gem_eio.c
index 249f5bff..ff3df7b6 100644
--- a/tests/gem_eio.c
+++ b/tests/gem_eio.c
@@ -34,12 +34,15 @@
#include <fcntl.h>
#include <inttypes.h>
#include <errno.h>
+#include <sched.h>
+#include <signal.h>
#include <sys/ioctl.h>
#include <drm.h>
#include "igt.h"
#include "igt_sysfs.h"
+#include "i915/gem_ring.h"
#include "sw_sync.h"
IGT_TEST_DESCRIPTION("Test that specific ioctls report a wedged GPU (EIO).");
@@ -452,6 +455,108 @@ static void test_inflight_internal(int fd)
trigger_reset(fd);
}
+static void notify(union sigval arg)
+{
+ sw_sync_timeline_inc(arg.sival_int, 1);
+}
+
+static void test_set_wedged(int fd)
+{
+#define NCTX 4096
+ const uint32_t bbe = MI_BATCH_BUFFER_END;
+ const unsigned int ring_size = gem_measure_ring_inflight(fd, 0, 0) - 1;
+ struct drm_i915_gem_execbuffer2 execbuf;
+ struct drm_i915_gem_exec_object2 obj;
+ int dir = igt_debugfs_dir(fd);
+ struct itimerspec its;
+ struct sigevent sev;
+ uint32_t *contexts;
+ timer_t timer;
+ int timeline;
+ int syncpt;
+
+ contexts = calloc(NCTX, sizeof(*contexts));
+ igt_assert(contexts);
+
+ for (int n = 0; n < NCTX; n++)
+ contexts[n] = context_create_safe(fd);
+
+ memset(&obj, 0, sizeof(obj));
+ obj.handle = gem_create(fd, 4096);
+ gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
+
+ memset(&execbuf, 0, sizeof(execbuf));
+ execbuf.buffers_ptr = to_user_pointer(&obj);
+ execbuf.buffer_count = 1;
+ execbuf.flags = I915_EXEC_FENCE_IN;
+
+ for (unsigned int nctx = 1; nctx <= NCTX; nctx <<= 1) {
+ unsigned int nrq = ring_size;
+ if (!gem_has_execlists(fd)) {
+ nrq = (ring_size + nctx - 1) / nctx + 1;
+ nctx = ring_size / nrq + 1;
+ }
+ igt_assert(nrq);
+ igt_assert(nctx);
+
+ timeline = sw_sync_timeline_create();
+
+ /* Build up a large orderly queue of requests */
+ syncpt = 1;
+ for (int m = 0; m < nrq; m++) {
+ for (int n = 0; n < nctx; n++) {
+ execbuf.rsvd1 = contexts[n];
+ execbuf.rsvd2 =
+ sw_sync_timeline_create_fence(timeline, syncpt);
+ gem_execbuf(fd, &execbuf);
+ close(execbuf.rsvd2);
+
+ syncpt++;
+ }
+ }
+ igt_debug("Queued %d requests over %d contexts\n",
+ syncpt, nctx);
+
+ igt_require(i915_reset_control(false));
+
+ /* Feed each request in at 20KHz */
+ memset(&sev, 0, sizeof(sev));
+ sev.sigev_notify = SIGEV_THREAD;
+ sev.sigev_value.sival_int = timeline;
+ sev.sigev_notify_function = notify;
+ igt_assert(timer_create(CLOCK_MONOTONIC, &sev, &timer) == 0);
+
+ memset(&its, 0, sizeof(its));
+ its.it_interval.tv_sec = 0;
+ its.it_interval.tv_nsec = 5000;
+ its.it_value = its.it_interval;
+ igt_assert(timer_settime(timer, 0, &its, NULL) == 0);
+ usleep(10);
+
+ igt_debug("Triggering wedge\n");
+ igt_sysfs_set(dir, "i915_wedged", "-1");
+
+ igt_debug("Disabling timer\n");
+ timer_delete(timer);
+ usleep(10000);/* timer_delete() doesn't flush pending signals */
+
+ igt_debug("Cleaning up\n");
+ close(timeline);
+
+ sched_yield();
+ igt_assert(!gem_bo_busy(fd, obj.handle));
+
+ igt_assert(i915_reset_control(true));
+ trigger_reset(fd);
+ }
+
+ gem_close(fd, obj.handle);
+ for (int n = 0; n < NCTX; n++)
+ gem_context_destroy(fd, contexts[n]);
+ free(contexts);
+ close(dir);
+}
+
static int fd = -1;
static void
@@ -509,4 +614,9 @@ igt_main
igt_subtest("in-flight-suspend")
test_inflight_suspend(fd);
+
+ igt_subtest("set-wedged-racing") {
+ igt_require_sw_sync();
+ test_set_wedged(fd);
+ }
}
--
2.16.2
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^ permalink raw reply related [flat|nested] 6+ messages in thread
end of thread, other threads:[~2018-03-17 9:09 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-03-16 22:02 [PATCH igt] igt/gem_eio: Exercise set-wedging against request submission Chris Wilson
2018-03-16 22:02 ` [igt-dev] " Chris Wilson
2018-03-16 23:19 ` [igt-dev] ✓ Fi.CI.BAT: success for igt/gem_eio: Exercise set-wedging against request submission (rev2) Patchwork
2018-03-17 5:17 ` [igt-dev] ✗ Fi.CI.IGT: warning " Patchwork
2018-03-17 9:09 ` [PATCH igt] igt/gem_eio: Exercise set-wedging against request submission Chris Wilson
2018-03-17 9:09 ` [igt-dev] " Chris Wilson
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