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* [radeon-alex:drm-next-4.17-wip 83/87] drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu8_hwmgr.c:333:36: sparse: cast to restricted __le32
@ 2018-03-16 17:53 kbuild test robot
  0 siblings, 0 replies; only message in thread
From: kbuild test robot @ 2018-03-16 17:53 UTC (permalink / raw)
  To: Rex Zhu; +Cc: Alex Deucher, Evan Quan, kbuild-all, dri-devel

tree:   git://people.freedesktop.org/~agd5f/linux.git drm-next-4.17-wip
head:   61deb7d0dddd941d1e3ffee0d799396ac93b0e90
commit: 34e40f6338c730572874bc3d6fe330c7f2b63013 [83/87] drm/amd/pp: Rename file name cz_* to smu8_*
reproduce:
        # apt-get install sparse
        git checkout 34e40f6338c730572874bc3d6fe330c7f2b63013
        make ARCH=x86_64 allmodconfig
        make C=1 CF=-D__CHECK_ENDIAN__


sparse warnings: (new ones prefixed by >>)

>> drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu8_hwmgr.c:333:36: sparse: cast to restricted __le32
   drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu8_hwmgr.c:336:33: sparse: cast to restricted __le32
   drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu8_hwmgr.c:339:36: sparse: cast to restricted __le32
   drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu8_hwmgr.c:342:38: sparse: cast to restricted __le32
>> drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu8_hwmgr.c:345:35: sparse: cast to restricted __le16
   drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu8_hwmgr.c:361:34: sparse: cast to restricted __le32
   drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu8_hwmgr.c:366:27: sparse: cast to restricted __le32
   drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu8_hwmgr.c:369:29: sparse: cast to restricted __le32
   drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu8_hwmgr.c:374:41: sparse: cast to restricted __le32
   drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu8_hwmgr.c:380:30: sparse: cast to restricted __le16
   drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu8_hwmgr.c:396:13: sparse: cast to restricted __le32
   drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu8_hwmgr.c:1840:5: sparse: symbol 'smu8_dpm_update_uvd_dpm' was not declared. Should it be static?
   drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu8_hwmgr.c:1986:5: sparse: symbol 'smu8_init_function_pointers' was not declared. Should it be static?

vim +333 drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu8_hwmgr.c

bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  307  
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  308  static int smu8_get_system_info_data(struct pp_hwmgr *hwmgr)
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  309  {
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  310  	struct smu8_hwmgr *data = hwmgr->backend;
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  311  	ATOM_INTEGRATED_SYSTEM_INFO_V1_9 *info = NULL;
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  312  	uint32_t i;
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  313  	int result = 0;
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  314  	uint8_t frev, crev;
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  315  	uint16_t size;
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  316  
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  317  	info = (ATOM_INTEGRATED_SYSTEM_INFO_V1_9 *) cgs_atom_get_data_table(
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  318  			hwmgr->device,
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  319  			GetIndexIntoMasterTable(DATA, IntegratedSystemInfo),
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  320  			&size, &frev, &crev);
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  321  
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  322  	if (crev != 9) {
b5c11b8e drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Huang Rui  2016-12-26  323  		pr_err("Unsupported IGP table: %d %d\n", frev, crev);
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  324  		return -EINVAL;
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  325  	}
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  326  
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  327  	if (info == NULL) {
b5c11b8e drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Huang Rui  2016-12-26  328  		pr_err("Could not retrieve the Integrated System Info Table!\n");
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  329  		return -EINVAL;
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  330  	}
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  331  
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  332  	data->sys_info.bootup_uma_clock =
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22 @333  				   le32_to_cpu(info->ulBootUpUMAClock);
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  334  
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  335  	data->sys_info.bootup_engine_clock =
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  336  				le32_to_cpu(info->ulBootUpEngineClock);
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  337  
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  338  	data->sys_info.dentist_vco_freq =
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  339  				   le32_to_cpu(info->ulDentistVCOFreq);
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  340  
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  341  	data->sys_info.system_config =
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  342  				     le32_to_cpu(info->ulSystemConfig);
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  343  
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  344  	data->sys_info.bootup_nb_voltage_index =
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22 @345  				  le16_to_cpu(info->usBootUpNBVoltage);
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  346  
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  347  	data->sys_info.htc_hyst_lmt =
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  348  			(info->ucHtcHystLmt == 0) ? 5 : info->ucHtcHystLmt;
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  349  
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  350  	data->sys_info.htc_tmp_lmt =
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  351  			(info->ucHtcTmpLmt == 0) ? 203 : info->ucHtcTmpLmt;
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  352  
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  353  	if (data->sys_info.htc_tmp_lmt <=
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  354  			data->sys_info.htc_hyst_lmt) {
b5c11b8e drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Huang Rui  2016-12-26  355  		pr_err("The htcTmpLmt should be larger than htcHystLmt.\n");
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  356  		return -EINVAL;
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  357  	}
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  358  
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  359  	data->sys_info.nb_dpm_enable =
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  360  				data->enable_nb_ps_policy &&
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  361  				(le32_to_cpu(info->ulSystemConfig) >> 3 & 0x1);
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  362  
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  363  	for (i = 0; i < SMU8_NUM_NBPSTATES; i++) {
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  364  		if (i < SMU8_NUM_NBPMEMORYCLOCK) {
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  365  			data->sys_info.nbp_memory_clock[i] =
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  366  			  le32_to_cpu(info->ulNbpStateMemclkFreq[i]);
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  367  		}
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  368  		data->sys_info.nbp_n_clock[i] =
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  369  			    le32_to_cpu(info->ulNbpStateNClkFreq[i]);
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  370  	}
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  371  
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  372  	for (i = 0; i < MAX_DISPLAY_CLOCK_LEVEL; i++) {
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  373  		data->sys_info.display_clock[i] =
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  374  					le32_to_cpu(info->sDispClkVoltageMapping[i].ulMaximumSupportedCLK);
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  375  	}
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  376  
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  377  	/* Here use 4 levels, make sure not exceed */
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  378  	for (i = 0; i < SMU8_NUM_NBPSTATES; i++) {
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  379  		data->sys_info.nbp_voltage_index[i] =
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  380  			     le16_to_cpu(info->usNBPStateVoltage[i]);
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  381  	}
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  382  
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  383  	if (!data->sys_info.nb_dpm_enable) {
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  384  		for (i = 1; i < SMU8_NUM_NBPSTATES; i++) {
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  385  			if (i < SMU8_NUM_NBPMEMORYCLOCK) {
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  386  				data->sys_info.nbp_memory_clock[i] =
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  387  				    data->sys_info.nbp_memory_clock[0];
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  388  			}
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  389  			data->sys_info.nbp_n_clock[i] =
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  390  				    data->sys_info.nbp_n_clock[0];
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  391  			data->sys_info.nbp_voltage_index[i] =
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  392  				    data->sys_info.nbp_voltage_index[0];
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  393  		}
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  394  	}
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  395  
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  396  	if (le32_to_cpu(info->ulGPUCapInfo) &
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  397  		SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS) {
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  398  		phm_cap_set(hwmgr->platform_descriptor.platformCaps,
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  399  				    PHM_PlatformCaps_EnableDFSBypass);
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  400  	}
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  401  
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  402  	data->sys_info.uma_channel_number = info->ucUMAChannelNumber;
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  403  
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  404  	smu8_construct_max_power_limits_table (hwmgr,
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  405  				    &hwmgr->dyn_state.max_clock_voltage_on_ac);
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  406  
47ce4a9f drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Rex Zhu    2018-03-14  407  	smu8_init_dynamic_state_adjustment_rule_settings(hwmgr,
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  408  				    &info->sDISPCLK_Voltage[0]);
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  409  
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  410  	return result;
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  411  }
bdecc20a drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c Jammy Zhou 2015-07-22  412  

:::::: The code at line 333 was first introduced by commit
:::::: bdecc20a986bbe527cea0775f265d1927083410e drm/amd/powerplay: add Carrizo dpm support

:::::: TO: Jammy Zhou <Jammy.Zhou@amd.com>
:::::: CC: Alex Deucher <alexander.deucher@amd.com>

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation
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2018-03-16 17:53 [radeon-alex:drm-next-4.17-wip 83/87] drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu8_hwmgr.c:333:36: sparse: cast to restricted __le32 kbuild test robot

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