From: Vinod Koul <vinod.koul@intel.com>
To: Maxime Jayat <maxime.jayat@mobile-devices.fr>
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>,
Nicolas Ferre <nicolas.ferre@microchip.com>,
Dan Williams <dan.j.williams@intel.com>,
dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org,
stable@vger.kernel.org
Subject: dmaengine: at_xdmac: fix rare residue corruption
Date: Tue, 27 Mar 2018 17:34:23 +0530 [thread overview]
Message-ID: <20180327120422.GJ15443@localhost> (raw)
On Thu, Feb 22, 2018 at 12:39:55PM +0100, Maxime Jayat wrote:
> Despite the efforts made to correctly read the NDA and CUBC registers,
> the order in which the registers are read could sometimes lead to an
> inconsistent state.
>
> Re-using the timeline from the comments, this following timing of
> registers reads could lead to reading NDA with value "@desc2" and
> CUBC with value "MAX desc1":
>
> INITD -------- ------------
> |____________________|
> _______________________ _______________
> NDA @desc2 \/ @desc3
> _______________________/\_______________
> __________ ___________ _______________
> CUBC 0 \/ MAX desc1 \/ MAX desc2
> __________/\___________/\_______________
> | | | |
> Events:(1)(2) (3)(4)
>
> (1) check_nda = @desc2
> (2) initd = 1
> (3) cur_ubc = MAX desc1
> (4) cur_nda = @desc2
>
> This is allowed by the condition ((check_nda == cur_nda) && initd),
> despite cur_ubc and cur_nda being in the precise state we don't want.
>
> This error leads to incorrect residue computation.
>
> Fix it by inversing the order in which CUBC and INITD are read. This
> makes sure that NDA and CUBC are always read together either _before_
> INITD goes to 0 or _after_ it is back at 1.
> The case where NDA is read before INITD is at 0 and CUBC is read after
> INITD is back at 1 will be rejected by check_nda and cur_nda being
> different.
Applied, thanks
WARNING: multiple messages have this Message-ID (diff)
From: Vinod Koul <vinod.koul@intel.com>
To: Maxime Jayat <maxime.jayat@mobile-devices.fr>
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>,
Nicolas Ferre <nicolas.ferre@microchip.com>,
Dan Williams <dan.j.williams@intel.com>,
dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org,
stable@vger.kernel.org
Subject: Re: [PATCH] dmaengine: at_xdmac: fix rare residue corruption
Date: Tue, 27 Mar 2018 17:34:23 +0530 [thread overview]
Message-ID: <20180327120422.GJ15443@localhost> (raw)
In-Reply-To: <20180222113955.4043-1-maxime.jayat@mobile-devices.fr>
On Thu, Feb 22, 2018 at 12:39:55PM +0100, Maxime Jayat wrote:
> Despite the efforts made to correctly read the NDA and CUBC registers,
> the order in which the registers are read could sometimes lead to an
> inconsistent state.
>
> Re-using the timeline from the comments, this following timing of
> registers reads could lead to reading NDA with value "@desc2" and
> CUBC with value "MAX desc1":
>
> INITD -------- ------------
> |____________________|
> _______________________ _______________
> NDA @desc2 \/ @desc3
> _______________________/\_______________
> __________ ___________ _______________
> CUBC 0 \/ MAX desc1 \/ MAX desc2
> __________/\___________/\_______________
> | | | |
> Events:(1)(2) (3)(4)
>
> (1) check_nda = @desc2
> (2) initd = 1
> (3) cur_ubc = MAX desc1
> (4) cur_nda = @desc2
>
> This is allowed by the condition ((check_nda == cur_nda) && initd),
> despite cur_ubc and cur_nda being in the precise state we don't want.
>
> This error leads to incorrect residue computation.
>
> Fix it by inversing the order in which CUBC and INITD are read. This
> makes sure that NDA and CUBC are always read together either _before_
> INITD goes to 0 or _after_ it is back at 1.
> The case where NDA is read before INITD is at 0 and CUBC is read after
> INITD is back at 1 will be rejected by check_nda and cur_nda being
> different.
Applied, thanks
--
~Vinod
next reply other threads:[~2018-03-27 12:04 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-27 12:04 Vinod Koul [this message]
2018-03-27 12:04 ` [PATCH] dmaengine: at_xdmac: fix rare residue corruption Vinod Koul
-- strict thread matches above, loose matches on Subject: below --
2018-03-19 7:59 Ludovic Desroches
2018-03-19 7:59 ` [PATCH] " Ludovic Desroches
2018-03-19 7:56 Vinod Koul
2018-03-19 7:56 ` [PATCH] " Vinod Koul
2018-03-01 8:25 Ludovic Desroches
2018-03-01 8:25 ` [PATCH] " Ludovic Desroches
2018-02-22 11:39 Maxime Jayat
2018-02-22 11:39 ` [PATCH] " Maxime Jayat
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