* [PATCH 1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper
@ 2018-03-27 21:56 matthew.s.atwood
2018-03-27 21:56 ` [PATCH 2/2] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4 matthew.s.atwood
` (4 more replies)
0 siblings, 5 replies; 6+ messages in thread
From: matthew.s.atwood @ 2018-03-27 21:56 UTC (permalink / raw)
To: intel-gfx, dri-devel; +Cc: alexander.deucher, Matt Atwood
From: Matt Atwood <matthew.s.atwood@intel.com>
As more differentation occurs between DP spec. Its useful to have these
as macros in a drm_dp_helper.
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
---
drivers/gpu/drm/amd/display/include/dpcd_defs.h | 8 --------
include/drm/drm_dp_helper.h | 5 +++++
2 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/include/dpcd_defs.h b/drivers/gpu/drm/amd/display/include/dpcd_defs.h
index d8e52e3..d13e0f4 100644
--- a/drivers/gpu/drm/amd/display/include/dpcd_defs.h
+++ b/drivers/gpu/drm/amd/display/include/dpcd_defs.h
@@ -28,14 +28,6 @@
#include <drm/drm_dp_helper.h>
-enum dpcd_revision {
- DPCD_REV_10 = 0x10,
- DPCD_REV_11 = 0x11,
- DPCD_REV_12 = 0x12,
- DPCD_REV_13 = 0x13,
- DPCD_REV_14 = 0x14
-};
-
/* these are the types stored at DOWNSTREAMPORT_PRESENT */
enum dpcd_downstream_port_type {
DOWNSTREAM_DP = 0,
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 4de97e9..f77746e 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -64,6 +64,11 @@
/* AUX CH addresses */
/* DPCD */
#define DP_DPCD_REV 0x000
+# define DPCD_REV_10 0x10
+# define DPCD_REV_11 0x11
+# define DPCD_REV_12 0x12
+# define DPCD_REV_13 0x13
+# define DPCD_REV_14 0x14
#define DP_MAX_LINK_RATE 0x001
--
2.7.4
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/2] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4
2018-03-27 21:56 [PATCH 1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper matthew.s.atwood
@ 2018-03-27 21:56 ` matthew.s.atwood
2018-03-27 23:19 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper Patchwork
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: matthew.s.atwood @ 2018-03-27 21:56 UTC (permalink / raw)
To: intel-gfx, dri-devel; +Cc: alexander.deucher, harry.wentland
From: Matt Atwood <matthew.s.atwood@intel.com>
DP_TRAINING_AUX_RD_INTERVAL with DP 1.3 spec changed bit scheeme from 8
bits to 7 in DPCD 0x000e. The 8th bit is used to identify extended
receiver capabilities. For panels that use this new feature wait interval
would be increased by 512 ms, when spec is max 16 ms. This behavior is
described in table 2-158 of DP 1.4 spec address 0000eh.
With the introduction of DP 1.4 spec main link clock recovery was
standardized to 100 us regardless of TRAINING_AUX_RD_INTERVAL value.
To avoid breaking panels that are not spec compiant we now warn on
invalid values.
V2: commit title/message, masking all 7 bits, warn on out of spec values.
V3: commit message, make link train clock recovery follow DP 1.4 spec.
V4: style changes
V5: typo
V6: print statement revisions, DP_REV to DPCD_REV, comment correction
V7: typo
V8: Style
V9: Strip out DPCD_REV_XX into seperate patch
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/drm_dp_helper.c | 22 ++++++++++++++++++----
include/drm/drm_dp_helper.h | 1 +
2 files changed, 19 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index ffe14ec..f9a8bf9 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -119,18 +119,32 @@ u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SI
EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis);
void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
- if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
+ int rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
+ DP_TRAINING_AUX_RD_MASK;
+
+ if (rd_interval > 4)
+ DRM_DEBUG_KMS("AUX interval %d, out of range (max 4)\n",
+ rd_interval);
+
+ if (rd_interval == 0 || dpcd[DP_DPCD_REV] >= DPCD_REV_14)
udelay(100);
else
- mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
+ mdelay(rd_interval * 4);
}
EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay);
void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
- if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
+ int rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
+ DP_TRAINING_AUX_RD_MASK;
+
+ if (rd_interval > 4)
+ DRM_DEBUG_KMS("AUX interval %d, out of range (max 4)\n",
+ rd_interval);
+
+ if (rd_interval == 0)
udelay(400);
else
- mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
+ mdelay(rd_interval * 4);
}
EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay);
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index f77746e..c1ba415 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -124,6 +124,7 @@
# define DP_DPCD_DISPLAY_CONTROL_CAPABLE (1 << 3) /* edp v1.2 or higher */
#define DP_TRAINING_AUX_RD_INTERVAL 0x00e /* XXX 1.2? */
+# define DP_TRAINING_AUX_RD_MASK 0x7F /* XXX 1.2? */
#define DP_ADAPTER_CAP 0x00f /* 1.2 */
# define DP_FORCE_LOAD_SENSE_CAP (1 << 0)
--
2.7.4
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper
2018-03-27 21:56 [PATCH 1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper matthew.s.atwood
2018-03-27 21:56 ` [PATCH 2/2] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4 matthew.s.atwood
@ 2018-03-27 23:19 ` Patchwork
2018-03-27 23:34 ` ✓ Fi.CI.BAT: success " Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2018-03-27 23:19 UTC (permalink / raw)
To: matthew.s.atwood; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper
URL : https://patchwork.freedesktop.org/series/40768/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d10b9c355a96 drm/dp: Move DPCD_REV_XX to drm_dp_helper
553565ba74e0 drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4
-:26: WARNING:TYPO_SPELLING: 'seperate' may be misspelled - perhaps 'separate'?
#26:
V9: Strip out DPCD_REV_XX into seperate patch
total: 0 errors, 1 warnings, 0 checks, 43 lines checked
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper
2018-03-27 21:56 [PATCH 1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper matthew.s.atwood
2018-03-27 21:56 ` [PATCH 2/2] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4 matthew.s.atwood
2018-03-27 23:19 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper Patchwork
@ 2018-03-27 23:34 ` Patchwork
2018-03-28 6:06 ` [PATCH 1/2] " Jani Nikula
2018-03-28 9:02 ` ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2018-03-27 23:34 UTC (permalink / raw)
To: matthew.s.atwood; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper
URL : https://patchwork.freedesktop.org/series/40768/
State : success
== Summary ==
Series 40768v1 series starting with [1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper
https://patchwork.freedesktop.org/api/1.0/series/40768/revisions/1/mbox/
---- Known issues:
Test debugfs_test:
Subgroup read_all_entries:
pass -> INCOMPLETE (fi-snb-2520m) fdo#103713
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fi-bdw-5557u total:285 pass:264 dwarn:0 dfail:0 fail:0 skip:21 time:434s
fi-bdw-gvtdvm total:285 pass:261 dwarn:0 dfail:0 fail:0 skip:24 time:444s
fi-blb-e6850 total:285 pass:220 dwarn:1 dfail:0 fail:0 skip:64 time:382s
fi-bsw-n3050 total:285 pass:239 dwarn:0 dfail:0 fail:0 skip:46 time:542s
fi-bwr-2160 total:285 pass:180 dwarn:0 dfail:0 fail:0 skip:105 time:298s
fi-bxt-j4205 total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:519s
fi-byt-j1900 total:285 pass:250 dwarn:0 dfail:0 fail:0 skip:35 time:529s
fi-byt-n2820 total:285 pass:246 dwarn:0 dfail:0 fail:0 skip:39 time:514s
fi-cfl-8700k total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:413s
fi-cfl-s3 total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:567s
fi-cfl-u total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:514s
fi-cnl-y3 total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:591s
fi-elk-e7500 total:285 pass:225 dwarn:1 dfail:0 fail:0 skip:59 time:423s
fi-gdg-551 total:285 pass:176 dwarn:0 dfail:0 fail:1 skip:108 time:326s
fi-glk-1 total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:536s
fi-hsw-4770 total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:405s
fi-ilk-650 total:285 pass:225 dwarn:0 dfail:0 fail:0 skip:60 time:421s
fi-ivb-3520m total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:467s
fi-ivb-3770 total:285 pass:252 dwarn:0 dfail:0 fail:0 skip:33 time:431s
fi-kbl-7500u total:285 pass:260 dwarn:1 dfail:0 fail:0 skip:24 time:475s
fi-kbl-7567u total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:469s
fi-kbl-r total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:517s
fi-pnv-d510 total:285 pass:219 dwarn:1 dfail:0 fail:0 skip:65 time:668s
fi-skl-6260u total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:441s
fi-skl-6600u total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:543s
fi-skl-6700k2 total:285 pass:261 dwarn:0 dfail:0 fail:0 skip:24 time:505s
fi-skl-6770hq total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:495s
fi-skl-guc total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:431s
fi-skl-gvtdvm total:285 pass:262 dwarn:0 dfail:0 fail:0 skip:23 time:445s
fi-snb-2520m total:3 pass:2 dwarn:0 dfail:0 fail:0 skip:0
Blacklisted hosts:
fi-cnl-psr total:285 pass:256 dwarn:3 dfail:0 fail:0 skip:26 time:520s
fi-glk-j4005 total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:485s
0539b52e05cd0abe697d45f2a2373ec42af7ebcb drm-tip: 2018y-03m-27d-18h-45m-40s UTC integration manifest
553565ba74e0 drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4
d10b9c355a96 drm/dp: Move DPCD_REV_XX to drm_dp_helper
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8511/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper
2018-03-27 21:56 [PATCH 1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper matthew.s.atwood
` (2 preceding siblings ...)
2018-03-27 23:34 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2018-03-28 6:06 ` Jani Nikula
2018-03-28 9:02 ` ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork
4 siblings, 0 replies; 6+ messages in thread
From: Jani Nikula @ 2018-03-28 6:06 UTC (permalink / raw)
To: intel-gfx, dri-devel; +Cc: alexander.deucher, Matt Atwood
On Tue, 27 Mar 2018, matthew.s.atwood@intel.com wrote:
> From: Matt Atwood <matthew.s.atwood@intel.com>
>
> As more differentation occurs between DP spec. Its useful to have these
> as macros in a drm_dp_helper.
>
> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> ---
> drivers/gpu/drm/amd/display/include/dpcd_defs.h | 8 --------
> include/drm/drm_dp_helper.h | 5 +++++
> 2 files changed, 5 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/include/dpcd_defs.h b/drivers/gpu/drm/amd/display/include/dpcd_defs.h
> index d8e52e3..d13e0f4 100644
> --- a/drivers/gpu/drm/amd/display/include/dpcd_defs.h
> +++ b/drivers/gpu/drm/amd/display/include/dpcd_defs.h
> @@ -28,14 +28,6 @@
>
> #include <drm/drm_dp_helper.h>
>
> -enum dpcd_revision {
> - DPCD_REV_10 = 0x10,
> - DPCD_REV_11 = 0x11,
> - DPCD_REV_12 = 0x12,
> - DPCD_REV_13 = 0x13,
> - DPCD_REV_14 = 0x14
> -};
> -
> /* these are the types stored at DOWNSTREAMPORT_PRESENT */
> enum dpcd_downstream_port_type {
> DOWNSTREAM_DP = 0,
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 4de97e9..f77746e 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -64,6 +64,11 @@
> /* AUX CH addresses */
> /* DPCD */
> #define DP_DPCD_REV 0x000
> +# define DPCD_REV_10 0x10
> +# define DPCD_REV_11 0x11
> +# define DPCD_REV_12 0x12
> +# define DPCD_REV_13 0x13
> +# define DPCD_REV_14 0x14
I'm not really sure what these buy us... but no harm done I
guess. Please prefix with DP_ though.
BR,
Jani.
>
> #define DP_MAX_LINK_RATE 0x001
--
Jani Nikula, Intel Open Source Technology Center
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 6+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper
2018-03-27 21:56 [PATCH 1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper matthew.s.atwood
` (3 preceding siblings ...)
2018-03-28 6:06 ` [PATCH 1/2] " Jani Nikula
@ 2018-03-28 9:02 ` Patchwork
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2018-03-28 9:02 UTC (permalink / raw)
To: matthew.s.atwood; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper
URL : https://patchwork.freedesktop.org/series/40768/
State : success
== Summary ==
---- Known issues:
Test kms_cursor_crc:
Subgroup cursor-128x128-suspend:
dmesg-warn -> PASS (shard-snb) fdo#102365
Test kms_flip:
Subgroup flip-vs-expired-vblank:
fail -> PASS (shard-hsw) fdo#102887 +1
Test kms_frontbuffer_tracking:
Subgroup fbc-rgb565-draw-render:
skip -> FAIL (shard-apl) fdo#103167
Test kms_plane_multiple:
Subgroup atomic-pipe-a-tiling-x:
pass -> FAIL (shard-snb) fdo#103166
Test kms_setmode:
Subgroup basic:
fail -> PASS (shard-apl) fdo#99912
Test perf:
Subgroup polling:
fail -> PASS (shard-hsw) fdo#102252
fdo#102365 https://bugs.freedesktop.org/show_bug.cgi?id=102365
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
shard-apl total:3495 pass:1832 dwarn:1 dfail:0 fail:7 skip:1654 time:12948s
shard-hsw total:3495 pass:1782 dwarn:1 dfail:0 fail:2 skip:1709 time:11646s
shard-snb total:3495 pass:1373 dwarn:1 dfail:0 fail:4 skip:2117 time:7004s
Blacklisted hosts:
shard-kbl total:3495 pass:1955 dwarn:1 dfail:1 fail:10 skip:1528 time:9646s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8511/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2018-03-28 9:02 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-03-27 21:56 [PATCH 1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper matthew.s.atwood
2018-03-27 21:56 ` [PATCH 2/2] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4 matthew.s.atwood
2018-03-27 23:19 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/dp: Move DPCD_REV_XX to drm_dp_helper Patchwork
2018-03-27 23:34 ` ✓ Fi.CI.BAT: success " Patchwork
2018-03-28 6:06 ` [PATCH 1/2] " Jani Nikula
2018-03-28 9:02 ` ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork
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