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From: Marc Zyngier <marc.zyngier@arm.com>
To: "Paolo Bonzini" <pbonzini@redhat.com>,
	"Radim Krčmář" <rkrcmar@redhat.com>,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org
Cc: Christoffer Dall <cdall@cs.columbia.edu>,
	Christoffer Dall <christoffer.dall@linaro.org>,
	Shunyong Yang <shunyong.yang@hxt-semitech.com>,
	Julien Thierry <julien.thierry@arm.com>,
	Andre Przywara <andre.przywara@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	Shih-Wei Li <shihwei@cs.columbia.edu>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Dave Martin <Dave.Martin@arm.com>
Subject: [PATCH 01/85] KVM: arm/arm64: Fix arch timers with userspace irqchips
Date: Wed, 28 Mar 2018 13:51:30 +0100	[thread overview]
Message-ID: <20180328125254.31380-2-marc.zyngier@arm.com> (raw)
In-Reply-To: <20180328125254.31380-1-marc.zyngier@arm.com>

From: Christoffer Dall <christoffer.dall@linaro.org>

When introducing support for irqchip in userspace we needed a way to
mask the timer signal to prevent the guest continuously exiting due to a
screaming timer.

We did this by disabling the corresponding percpu interrupt on the
host interrupt controller, because we cannot rely on the host system
having a GIC, and therefore cannot make any assumptions about having an
active state to hide the timer signal.

Unfortunately, when introducing this feature, it became entirely
possible that a VCPU which belongs to a VM that has a userspace irqchip
can disable the vtimer irq on the host on some physical CPU, and then go
away without ever enabling the vtimer irq on that physical CPU again.

This means that using irqchips in userspace on a system that also
supports running VMs with an in-kernel GIC can prevent forward progress
from in-kernel GIC VMs.

Later on, when we started taking virtual timer interrupts in the arch
timer code, we would also leave this timer state active for userspace
irqchip VMs, because we leave it up to a VGIC-enabled guest to
deactivate the hardware IRQ using the HW bit in the LR.

Both issues are solved by only using the enable/disable trick on systems
that do not have a host GIC which supports the active state, because all
VMs on such systems must use irqchips in userspace.  Systems that have a
working GIC with support for an active state use the active state to
mask the timer signal for both userspace and in-kernel irqchips.

Cc: Alexander Graf <agraf@suse.de>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: <stable@vger.kernel.org> # v4.12+
Fixes: d9e139778376 ("KVM: arm/arm64: Support arch timers with a userspace gic")
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
---
 virt/kvm/arm/arch_timer.c | 116 +++++++++++++++++++++++++---------------------
 1 file changed, 64 insertions(+), 52 deletions(-)

diff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/arch_timer.c
index 70268c0bec79..70f4c30918eb 100644
--- a/virt/kvm/arm/arch_timer.c
+++ b/virt/kvm/arm/arch_timer.c
@@ -36,6 +36,8 @@ static struct timecounter *timecounter;
 static unsigned int host_vtimer_irq;
 static u32 host_vtimer_irq_flags;
 
+static DEFINE_STATIC_KEY_FALSE(has_gic_active_state);
+
 static const struct kvm_irq_level default_ptimer_irq = {
 	.irq	= 30,
 	.level	= 1,
@@ -56,6 +58,12 @@ u64 kvm_phys_timer_read(void)
 	return timecounter->cc->read(timecounter->cc);
 }
 
+static inline bool userspace_irqchip(struct kvm *kvm)
+{
+	return static_branch_unlikely(&userspace_irqchip_in_use) &&
+		unlikely(!irqchip_in_kernel(kvm));
+}
+
 static void soft_timer_start(struct hrtimer *hrt, u64 ns)
 {
 	hrtimer_start(hrt, ktime_add_ns(ktime_get(), ns),
@@ -69,25 +77,6 @@ static void soft_timer_cancel(struct hrtimer *hrt, struct work_struct *work)
 		cancel_work_sync(work);
 }
 
-static void kvm_vtimer_update_mask_user(struct kvm_vcpu *vcpu)
-{
-	struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
-
-	/*
-	 * When using a userspace irqchip with the architected timers, we must
-	 * prevent continuously exiting from the guest, and therefore mask the
-	 * physical interrupt by disabling it on the host interrupt controller
-	 * when the virtual level is high, such that the guest can make
-	 * forward progress.  Once we detect the output level being
-	 * de-asserted, we unmask the interrupt again so that we exit from the
-	 * guest when the timer fires.
-	 */
-	if (vtimer->irq.level)
-		disable_percpu_irq(host_vtimer_irq);
-	else
-		enable_percpu_irq(host_vtimer_irq, 0);
-}
-
 static irqreturn_t kvm_arch_timer_handler(int irq, void *dev_id)
 {
 	struct kvm_vcpu *vcpu = *(struct kvm_vcpu **)dev_id;
@@ -106,9 +95,9 @@ static irqreturn_t kvm_arch_timer_handler(int irq, void *dev_id)
 	if (kvm_timer_should_fire(vtimer))
 		kvm_timer_update_irq(vcpu, true, vtimer);
 
-	if (static_branch_unlikely(&userspace_irqchip_in_use) &&
-	    unlikely(!irqchip_in_kernel(vcpu->kvm)))
-		kvm_vtimer_update_mask_user(vcpu);
+	if (userspace_irqchip(vcpu->kvm) &&
+	    !static_branch_unlikely(&has_gic_active_state))
+		disable_percpu_irq(host_vtimer_irq);
 
 	return IRQ_HANDLED;
 }
@@ -290,8 +279,7 @@ static void kvm_timer_update_irq(struct kvm_vcpu *vcpu, bool new_level,
 	trace_kvm_timer_update_irq(vcpu->vcpu_id, timer_ctx->irq.irq,
 				   timer_ctx->irq.level);
 
-	if (!static_branch_unlikely(&userspace_irqchip_in_use) ||
-	    likely(irqchip_in_kernel(vcpu->kvm))) {
+	if (!userspace_irqchip(vcpu->kvm)) {
 		ret = kvm_vgic_inject_irq(vcpu->kvm, vcpu->vcpu_id,
 					  timer_ctx->irq.irq,
 					  timer_ctx->irq.level,
@@ -350,12 +338,6 @@ static void kvm_timer_update_state(struct kvm_vcpu *vcpu)
 	phys_timer_emulate(vcpu);
 }
 
-static void __timer_snapshot_state(struct arch_timer_context *timer)
-{
-	timer->cnt_ctl = read_sysreg_el0(cntv_ctl);
-	timer->cnt_cval = read_sysreg_el0(cntv_cval);
-}
-
 static void vtimer_save_state(struct kvm_vcpu *vcpu)
 {
 	struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
@@ -367,8 +349,10 @@ static void vtimer_save_state(struct kvm_vcpu *vcpu)
 	if (!vtimer->loaded)
 		goto out;
 
-	if (timer->enabled)
-		__timer_snapshot_state(vtimer);
+	if (timer->enabled) {
+		vtimer->cnt_ctl = read_sysreg_el0(cntv_ctl);
+		vtimer->cnt_cval = read_sysreg_el0(cntv_cval);
+	}
 
 	/* Disable the virtual timer */
 	write_sysreg_el0(0, cntv_ctl);
@@ -460,23 +444,43 @@ static void set_cntvoff(u64 cntvoff)
 	kvm_call_hyp(__kvm_timer_set_cntvoff, low, high);
 }
 
-static void kvm_timer_vcpu_load_vgic(struct kvm_vcpu *vcpu)
+static inline void set_vtimer_irq_phys_active(struct kvm_vcpu *vcpu, bool active)
+{
+	int r;
+	r = irq_set_irqchip_state(host_vtimer_irq, IRQCHIP_STATE_ACTIVE, active);
+	WARN_ON(r);
+}
+
+static void kvm_timer_vcpu_load_gic(struct kvm_vcpu *vcpu)
 {
 	struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
 	bool phys_active;
-	int ret;
 
-	phys_active = kvm_vgic_map_is_active(vcpu, vtimer->irq.irq);
-
-	ret = irq_set_irqchip_state(host_vtimer_irq,
-				    IRQCHIP_STATE_ACTIVE,
-				    phys_active);
-	WARN_ON(ret);
+	if (irqchip_in_kernel(vcpu->kvm))
+		phys_active = kvm_vgic_map_is_active(vcpu, vtimer->irq.irq);
+	else
+		phys_active = vtimer->irq.level;
+	set_vtimer_irq_phys_active(vcpu, phys_active);
 }
 
-static void kvm_timer_vcpu_load_user(struct kvm_vcpu *vcpu)
+static void kvm_timer_vcpu_load_nogic(struct kvm_vcpu *vcpu)
 {
-	kvm_vtimer_update_mask_user(vcpu);
+	struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
+
+	/*
+	 * When using a userspace irqchip with the architected timers and a
+	 * host interrupt controller that doesn't support an active state, we
+	 * must still prevent continuously exiting from the guest, and
+	 * therefore mask the physical interrupt by disabling it on the host
+	 * interrupt controller when the virtual level is high, such that the
+	 * guest can make forward progress.  Once we detect the output level
+	 * being de-asserted, we unmask the interrupt again so that we exit
+	 * from the guest when the timer fires.
+	 */
+	if (vtimer->irq.level)
+		disable_percpu_irq(host_vtimer_irq);
+	else
+		enable_percpu_irq(host_vtimer_irq, host_vtimer_irq_flags);
 }
 
 void kvm_timer_vcpu_load(struct kvm_vcpu *vcpu)
@@ -487,10 +491,10 @@ void kvm_timer_vcpu_load(struct kvm_vcpu *vcpu)
 	if (unlikely(!timer->enabled))
 		return;
 
-	if (unlikely(!irqchip_in_kernel(vcpu->kvm)))
-		kvm_timer_vcpu_load_user(vcpu);
+	if (static_branch_likely(&has_gic_active_state))
+		kvm_timer_vcpu_load_gic(vcpu);
 	else
-		kvm_timer_vcpu_load_vgic(vcpu);
+		kvm_timer_vcpu_load_nogic(vcpu);
 
 	set_cntvoff(vtimer->cntvoff);
 
@@ -555,18 +559,24 @@ static void unmask_vtimer_irq_user(struct kvm_vcpu *vcpu)
 {
 	struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
 
-	if (unlikely(!irqchip_in_kernel(vcpu->kvm))) {
-		__timer_snapshot_state(vtimer);
-		if (!kvm_timer_should_fire(vtimer)) {
-			kvm_timer_update_irq(vcpu, false, vtimer);
-			kvm_vtimer_update_mask_user(vcpu);
-		}
+	if (!kvm_timer_should_fire(vtimer)) {
+		kvm_timer_update_irq(vcpu, false, vtimer);
+		if (static_branch_likely(&has_gic_active_state))
+			set_vtimer_irq_phys_active(vcpu, false);
+		else
+			enable_percpu_irq(host_vtimer_irq, host_vtimer_irq_flags);
 	}
 }
 
 void kvm_timer_sync_hwstate(struct kvm_vcpu *vcpu)
 {
-	unmask_vtimer_irq_user(vcpu);
+	struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
+
+	if (unlikely(!timer->enabled))
+		return;
+
+	if (unlikely(!irqchip_in_kernel(vcpu->kvm)))
+		unmask_vtimer_irq_user(vcpu);
 }
 
 int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu)
@@ -753,6 +763,8 @@ int kvm_timer_hyp_init(bool has_gic)
 			kvm_err("kvm_arch_timer: error setting vcpu affinity\n");
 			goto out_free_irq;
 		}
+
+		static_branch_enable(&has_gic_active_state);
 	}
 
 	kvm_info("virtual timer IRQ%d\n", host_vtimer_irq);
-- 
2.14.2

WARNING: multiple messages have this Message-ID (diff)
From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 01/85] KVM: arm/arm64: Fix arch timers with userspace irqchips
Date: Wed, 28 Mar 2018 13:51:30 +0100	[thread overview]
Message-ID: <20180328125254.31380-2-marc.zyngier@arm.com> (raw)
In-Reply-To: <20180328125254.31380-1-marc.zyngier@arm.com>

From: Christoffer Dall <christoffer.dall@linaro.org>

When introducing support for irqchip in userspace we needed a way to
mask the timer signal to prevent the guest continuously exiting due to a
screaming timer.

We did this by disabling the corresponding percpu interrupt on the
host interrupt controller, because we cannot rely on the host system
having a GIC, and therefore cannot make any assumptions about having an
active state to hide the timer signal.

Unfortunately, when introducing this feature, it became entirely
possible that a VCPU which belongs to a VM that has a userspace irqchip
can disable the vtimer irq on the host on some physical CPU, and then go
away without ever enabling the vtimer irq on that physical CPU again.

This means that using irqchips in userspace on a system that also
supports running VMs with an in-kernel GIC can prevent forward progress
from in-kernel GIC VMs.

Later on, when we started taking virtual timer interrupts in the arch
timer code, we would also leave this timer state active for userspace
irqchip VMs, because we leave it up to a VGIC-enabled guest to
deactivate the hardware IRQ using the HW bit in the LR.

Both issues are solved by only using the enable/disable trick on systems
that do not have a host GIC which supports the active state, because all
VMs on such systems must use irqchips in userspace.  Systems that have a
working GIC with support for an active state use the active state to
mask the timer signal for both userspace and in-kernel irqchips.

Cc: Alexander Graf <agraf@suse.de>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: <stable@vger.kernel.org> # v4.12+
Fixes: d9e139778376 ("KVM: arm/arm64: Support arch timers with a userspace gic")
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
---
 virt/kvm/arm/arch_timer.c | 116 +++++++++++++++++++++++++---------------------
 1 file changed, 64 insertions(+), 52 deletions(-)

diff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/arch_timer.c
index 70268c0bec79..70f4c30918eb 100644
--- a/virt/kvm/arm/arch_timer.c
+++ b/virt/kvm/arm/arch_timer.c
@@ -36,6 +36,8 @@ static struct timecounter *timecounter;
 static unsigned int host_vtimer_irq;
 static u32 host_vtimer_irq_flags;
 
+static DEFINE_STATIC_KEY_FALSE(has_gic_active_state);
+
 static const struct kvm_irq_level default_ptimer_irq = {
 	.irq	= 30,
 	.level	= 1,
@@ -56,6 +58,12 @@ u64 kvm_phys_timer_read(void)
 	return timecounter->cc->read(timecounter->cc);
 }
 
+static inline bool userspace_irqchip(struct kvm *kvm)
+{
+	return static_branch_unlikely(&userspace_irqchip_in_use) &&
+		unlikely(!irqchip_in_kernel(kvm));
+}
+
 static void soft_timer_start(struct hrtimer *hrt, u64 ns)
 {
 	hrtimer_start(hrt, ktime_add_ns(ktime_get(), ns),
@@ -69,25 +77,6 @@ static void soft_timer_cancel(struct hrtimer *hrt, struct work_struct *work)
 		cancel_work_sync(work);
 }
 
-static void kvm_vtimer_update_mask_user(struct kvm_vcpu *vcpu)
-{
-	struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
-
-	/*
-	 * When using a userspace irqchip with the architected timers, we must
-	 * prevent continuously exiting from the guest, and therefore mask the
-	 * physical interrupt by disabling it on the host interrupt controller
-	 * when the virtual level is high, such that the guest can make
-	 * forward progress.  Once we detect the output level being
-	 * de-asserted, we unmask the interrupt again so that we exit from the
-	 * guest when the timer fires.
-	 */
-	if (vtimer->irq.level)
-		disable_percpu_irq(host_vtimer_irq);
-	else
-		enable_percpu_irq(host_vtimer_irq, 0);
-}
-
 static irqreturn_t kvm_arch_timer_handler(int irq, void *dev_id)
 {
 	struct kvm_vcpu *vcpu = *(struct kvm_vcpu **)dev_id;
@@ -106,9 +95,9 @@ static irqreturn_t kvm_arch_timer_handler(int irq, void *dev_id)
 	if (kvm_timer_should_fire(vtimer))
 		kvm_timer_update_irq(vcpu, true, vtimer);
 
-	if (static_branch_unlikely(&userspace_irqchip_in_use) &&
-	    unlikely(!irqchip_in_kernel(vcpu->kvm)))
-		kvm_vtimer_update_mask_user(vcpu);
+	if (userspace_irqchip(vcpu->kvm) &&
+	    !static_branch_unlikely(&has_gic_active_state))
+		disable_percpu_irq(host_vtimer_irq);
 
 	return IRQ_HANDLED;
 }
@@ -290,8 +279,7 @@ static void kvm_timer_update_irq(struct kvm_vcpu *vcpu, bool new_level,
 	trace_kvm_timer_update_irq(vcpu->vcpu_id, timer_ctx->irq.irq,
 				   timer_ctx->irq.level);
 
-	if (!static_branch_unlikely(&userspace_irqchip_in_use) ||
-	    likely(irqchip_in_kernel(vcpu->kvm))) {
+	if (!userspace_irqchip(vcpu->kvm)) {
 		ret = kvm_vgic_inject_irq(vcpu->kvm, vcpu->vcpu_id,
 					  timer_ctx->irq.irq,
 					  timer_ctx->irq.level,
@@ -350,12 +338,6 @@ static void kvm_timer_update_state(struct kvm_vcpu *vcpu)
 	phys_timer_emulate(vcpu);
 }
 
-static void __timer_snapshot_state(struct arch_timer_context *timer)
-{
-	timer->cnt_ctl = read_sysreg_el0(cntv_ctl);
-	timer->cnt_cval = read_sysreg_el0(cntv_cval);
-}
-
 static void vtimer_save_state(struct kvm_vcpu *vcpu)
 {
 	struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
@@ -367,8 +349,10 @@ static void vtimer_save_state(struct kvm_vcpu *vcpu)
 	if (!vtimer->loaded)
 		goto out;
 
-	if (timer->enabled)
-		__timer_snapshot_state(vtimer);
+	if (timer->enabled) {
+		vtimer->cnt_ctl = read_sysreg_el0(cntv_ctl);
+		vtimer->cnt_cval = read_sysreg_el0(cntv_cval);
+	}
 
 	/* Disable the virtual timer */
 	write_sysreg_el0(0, cntv_ctl);
@@ -460,23 +444,43 @@ static void set_cntvoff(u64 cntvoff)
 	kvm_call_hyp(__kvm_timer_set_cntvoff, low, high);
 }
 
-static void kvm_timer_vcpu_load_vgic(struct kvm_vcpu *vcpu)
+static inline void set_vtimer_irq_phys_active(struct kvm_vcpu *vcpu, bool active)
+{
+	int r;
+	r = irq_set_irqchip_state(host_vtimer_irq, IRQCHIP_STATE_ACTIVE, active);
+	WARN_ON(r);
+}
+
+static void kvm_timer_vcpu_load_gic(struct kvm_vcpu *vcpu)
 {
 	struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
 	bool phys_active;
-	int ret;
 
-	phys_active = kvm_vgic_map_is_active(vcpu, vtimer->irq.irq);
-
-	ret = irq_set_irqchip_state(host_vtimer_irq,
-				    IRQCHIP_STATE_ACTIVE,
-				    phys_active);
-	WARN_ON(ret);
+	if (irqchip_in_kernel(vcpu->kvm))
+		phys_active = kvm_vgic_map_is_active(vcpu, vtimer->irq.irq);
+	else
+		phys_active = vtimer->irq.level;
+	set_vtimer_irq_phys_active(vcpu, phys_active);
 }
 
-static void kvm_timer_vcpu_load_user(struct kvm_vcpu *vcpu)
+static void kvm_timer_vcpu_load_nogic(struct kvm_vcpu *vcpu)
 {
-	kvm_vtimer_update_mask_user(vcpu);
+	struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
+
+	/*
+	 * When using a userspace irqchip with the architected timers and a
+	 * host interrupt controller that doesn't support an active state, we
+	 * must still prevent continuously exiting from the guest, and
+	 * therefore mask the physical interrupt by disabling it on the host
+	 * interrupt controller when the virtual level is high, such that the
+	 * guest can make forward progress.  Once we detect the output level
+	 * being de-asserted, we unmask the interrupt again so that we exit
+	 * from the guest when the timer fires.
+	 */
+	if (vtimer->irq.level)
+		disable_percpu_irq(host_vtimer_irq);
+	else
+		enable_percpu_irq(host_vtimer_irq, host_vtimer_irq_flags);
 }
 
 void kvm_timer_vcpu_load(struct kvm_vcpu *vcpu)
@@ -487,10 +491,10 @@ void kvm_timer_vcpu_load(struct kvm_vcpu *vcpu)
 	if (unlikely(!timer->enabled))
 		return;
 
-	if (unlikely(!irqchip_in_kernel(vcpu->kvm)))
-		kvm_timer_vcpu_load_user(vcpu);
+	if (static_branch_likely(&has_gic_active_state))
+		kvm_timer_vcpu_load_gic(vcpu);
 	else
-		kvm_timer_vcpu_load_vgic(vcpu);
+		kvm_timer_vcpu_load_nogic(vcpu);
 
 	set_cntvoff(vtimer->cntvoff);
 
@@ -555,18 +559,24 @@ static void unmask_vtimer_irq_user(struct kvm_vcpu *vcpu)
 {
 	struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
 
-	if (unlikely(!irqchip_in_kernel(vcpu->kvm))) {
-		__timer_snapshot_state(vtimer);
-		if (!kvm_timer_should_fire(vtimer)) {
-			kvm_timer_update_irq(vcpu, false, vtimer);
-			kvm_vtimer_update_mask_user(vcpu);
-		}
+	if (!kvm_timer_should_fire(vtimer)) {
+		kvm_timer_update_irq(vcpu, false, vtimer);
+		if (static_branch_likely(&has_gic_active_state))
+			set_vtimer_irq_phys_active(vcpu, false);
+		else
+			enable_percpu_irq(host_vtimer_irq, host_vtimer_irq_flags);
 	}
 }
 
 void kvm_timer_sync_hwstate(struct kvm_vcpu *vcpu)
 {
-	unmask_vtimer_irq_user(vcpu);
+	struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
+
+	if (unlikely(!timer->enabled))
+		return;
+
+	if (unlikely(!irqchip_in_kernel(vcpu->kvm)))
+		unmask_vtimer_irq_user(vcpu);
 }
 
 int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu)
@@ -753,6 +763,8 @@ int kvm_timer_hyp_init(bool has_gic)
 			kvm_err("kvm_arch_timer: error setting vcpu affinity\n");
 			goto out_free_irq;
 		}
+
+		static_branch_enable(&has_gic_active_state);
 	}
 
 	kvm_info("virtual timer IRQ%d\n", host_vtimer_irq);
-- 
2.14.2

  reply	other threads:[~2018-03-28 12:51 UTC|newest]

Thread overview: 174+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-28 12:51 [GIT PULL] KVM/ARM updates for v4.17 Marc Zyngier
2018-03-28 12:51 ` Marc Zyngier
2018-03-28 12:51 ` Marc Zyngier [this message]
2018-03-28 12:51   ` [PATCH 01/85] KVM: arm/arm64: Fix arch timers with userspace irqchips Marc Zyngier
2018-03-28 12:51 ` [PATCH 02/85] ARM: kvm: fix building with gcc-8 Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 03/85] arm64/kvm: Prohibit guest LOR accesses Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 04/85] arm64: KVM: Move CPU ID reg trap setup off the world switch path Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 05/85] KVM: arm64: Enable the EL1 physical timer for AArch32 guests Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 06/85] KVM: arm: Enable emulation of the physical timer Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 07/85] KVM: arm/arm64: No need to zero CNTVOFF in kvm_timer_vcpu_put() for VHE Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 08/85] KVM: arm/arm64: vgic: Add missing irq_lock to vgic_mmio_read_pending Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 09/85] KVM: arm/arm64: Avoid vcpu_load for other vcpu ioctls than KVM_RUN Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 10/85] KVM: arm/arm64: Reset mapped IRQs on VM reset Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 11/85] KVM: arm/arm64: Reduce verbosity of KVM init log Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 12/85] KVM: arm/arm64: vgic: Don't populate multiple LRs with the same vintid Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 13/85] kvm: arm/arm64: vgic-v3: Tighten synchronization for guests using v2 on v3 Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 14/85] KVM: arm/arm64: Avoid vcpu_load for other vcpu ioctls than KVM_RUN Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 15/85] KVM: arm/arm64: Move vcpu_load call after kvm_vcpu_first_run_init Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 16/85] KVM: arm64: Avoid storing the vcpu pointer on the stack Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 17/85] KVM: arm64: Rework hyp_panic for VHE and non-VHE Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 18/85] KVM: arm64: Move HCR_INT_OVERRIDE to default HCR_EL2 guest flag Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 19/85] KVM: arm/arm64: Get rid of vcpu->arch.irq_lines Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 20/85] KVM: arm/arm64: Add kvm_vcpu_load_sysregs and kvm_vcpu_put_sysregs Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 21/85] KVM: arm/arm64: Introduce vcpu_el1_is_32bit Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 22/85] KVM: arm64: Move debug dirty flag calculation out of world switch Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 23/85] KVM: arm64: Slightly improve debug save/restore functions Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 24/85] KVM: arm64: Improve debug register save/restore flow Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 25/85] KVM: arm64: Factor out fault info population and gic workarounds Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 26/85] KVM: arm64: Introduce VHE-specific kvm_vcpu_run Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 27/85] KVM: arm64: Remove kern_hyp_va() use in VHE switch function Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 28/85] KVM: arm64: Don't deactivate VM on VHE systems Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 29/85] KVM: arm64: Remove noop calls to timer save/restore from VHE switch Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:51 ` [PATCH 30/85] KVM: arm64: Move userspace system registers into separate function Marc Zyngier
2018-03-28 12:51   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 31/85] KVM: arm64: Rewrite sysreg alternatives to static keys Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 32/85] KVM: arm64: Introduce separate VHE/non-VHE sysreg save/restore functions Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 33/85] KVM: arm/arm64: Remove leftover comment from kvm_vcpu_run_vhe Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 34/85] KVM: arm64: Unify non-VHE host/guest sysreg save and restore functions Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 35/85] KVM: arm64: Don't save the host ELR_EL2 and SPSR_EL2 on VHE systems Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 36/85] KVM: arm64: Change 32-bit handling of VM system registers Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 37/85] KVM: arm64: Rewrite system register accessors to read/write functions Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 38/85] KVM: arm64: Introduce framework for accessing deferred sysregs Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 39/85] KVM: arm/arm64: Prepare to handle deferred save/restore of SPSR_EL1 Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 40/85] KVM: arm64: Prepare to handle deferred save/restore of ELR_EL1 Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 41/85] KVM: arm64: Defer saving/restoring 64-bit sysregs to vcpu load/put on VHE Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 42/85] KVM: arm64: Prepare to handle deferred save/restore of 32-bit registers Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 43/85] KVM: arm64: Defer saving/restoring 32-bit sysregs to vcpu load/put Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 44/85] KVM: arm64: Move common VHE/non-VHE trap config in separate functions Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 45/85] KVM: arm64: Directly call VHE and non-VHE FPSIMD enabled functions Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 46/85] KVM: arm64: Configure c15, PMU, and debug register traps on cpu load/put for VHE Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 47/85] KVM: arm64: Cleanup __activate_traps and __deactive_traps for VHE and non-VHE Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 48/85] KVM: arm/arm64: Get rid of vgic_elrsr Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 49/85] KVM: arm/arm64: Handle VGICv2 save/restore from the main VGIC code Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 50/85] KVM: arm/arm64: Move arm64-only vgic-v2-sr.c file to arm64 Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 51/85] KVM: arm/arm64: Handle VGICv3 save/restore from the main VGIC code on VHE Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 52/85] KVM: arm/arm64: Move VGIC APR save/restore to vgic put/load Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 53/85] KVM: arm/arm64: Avoid VGICv3 save/restore on VHE with no IRQs Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 54/85] arm64: alternatives: Add dynamic patching feature Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 55/85] arm64: insn: Add N immediate encoding Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 56/85] arm64: insn: Add encoder for bitwise operations using literals Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 57/85] arm64: KVM: Dynamically patch the kernel/hyp VA mask Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 58/85] arm64: cpufeatures: Drop the ARM64_HYP_OFFSET_LOW feature flag Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 59/85] KVM: arm/arm64: Do not use kern_hyp_va() with kvm_vgic_global_state Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 60/85] KVM: arm/arm64: Demote HYP VA range display to being a debug feature Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 61/85] KVM: arm/arm64: Move ioremap calls to create_hyp_io_mappings Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 62/85] KVM: arm/arm64: Keep GICv2 HYP VAs in kvm_vgic_global_state Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 63/85] KVM: arm/arm64: Fix idmap size and alignment Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 64/85] KVM: arm64: Fix HYP idmap unmap when using 52bit PA Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 65/85] KVM: arm/arm64: Move HYP IO VAs to the "idmap" range Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 66/85] arm64; insn: Add encoder for the EXTR instruction Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 67/85] arm64: insn: Allow ADD/SUB (immediate) with LSL #12 Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 68/85] arm64: KVM: Dynamically compute the HYP VA mask Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 69/85] arm64: KVM: Introduce EL2 VA randomisation Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 70/85] arm64: Update the KVM memory map documentation Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 71/85] arm64: KVM: Move vector offsetting from hyp-init.S to kvm_get_hyp_vector Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 72/85] arm64: KVM: Move stashing of x0/x1 into the vector code itself Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 73/85] arm64: KVM: Move BP hardening vectors into .hyp.text section Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 74/85] arm64: KVM: Reserve 4 additional instructions in the BPI template Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 75/85] arm64: KVM: Allow far branches from vector slots to the main vectors Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 76/85] arm/arm64: KVM: Introduce EL2-specific executable mappings Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 77/85] arm64: Make BP hardening slot counter available Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 78/85] arm64: KVM: Allow mapping of vectors outside of the RAM region Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 79/85] arm64: Enable ARM64_HARDEN_EL2_VECTORS on Cortex-A57 and A72 Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 80/85] KVM: arm: Reserve bit in KVM_REG_ARM encoding for secure/nonsecure Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 81/85] arm64: KVM: Use SMCCC_ARCH_WORKAROUND_1 for Falkor BP hardening Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 82/85] KVM: arm/arm64: vgic: Disallow Active+Pending for level interrupts Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 83/85] KVM: arm/arm64: vgic-its: Fix potential overrun in vgic_copy_lpi_list Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 84/85] Revert "arm64: KVM: Use SMCCC_ARCH_WORKAROUND_1 for Falkor BP hardening" Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 12:52 ` [PATCH 85/85] arm64: Add temporary ERRATA_MIDR_ALL_VERSIONS compatibility macro Marc Zyngier
2018-03-28 12:52   ` Marc Zyngier
2018-03-28 20:00 ` [GIT PULL] KVM/ARM updates for v4.17 Radim Krčmář
2018-03-28 20:00   ` Radim Krčmář

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