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* [PATCH] drm/i915/psr: vbt change for psr
@ 2018-04-06 17:28 vathsala nagaraju
  2018-04-06 17:41 ` Rodrigo Vivi
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: vathsala nagaraju @ 2018-04-06 17:28 UTC (permalink / raw)
  To: rodrigo.vivi, intel-gfx; +Cc: Puthikorn Voravootivat, Maulik V Vaghela

From: Vathsala Nagaraju <vathsala.nagaraju@intel.com>

For psr block #9, the vbt description has moved to options [0-3] for
TP1,TP2,TP3 Wakeup time from decimal value without any change to vbt
structure. Since spec does not  mention from which VBT version this
change was added to vbt.bsf file, we cannot depend on bdb->version check
to change for all the platforms.

There is RCR inplace for GOP team to  provide the version number
to make generic change. Since Kabylake with bdb version 209 is having this
change, limiting this change to kbl and version 209+ to unblock google.

bspec 20131

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
CC: Puthikorn Voravootivat <puthik@chromium.org>

Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Signed-off-by: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h   |  1 +
 drivers/gpu/drm/i915/intel_bios.c |  2 +-
 drivers/gpu/drm/i915/intel_psr.c  | 84 ++++++++++++++++++++++++++-------------
 3 files changed, 59 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5373b17..a47be19b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1075,6 +1075,7 @@ struct intel_vbt_data {
 		enum psr_lines_to_wait lines_to_wait;
 		int tp1_wakeup_time;
 		int tp2_tp3_wakeup_time;
+		int bdb_version;
 	} psr;
 
 	struct {
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index c5c7530..cfefd32 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -658,7 +658,7 @@ static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
 		DRM_DEBUG_KMS("No PSR BDB found.\n");
 		return;
 	}
-
+	dev_priv->vbt.psr.bdb_version = bdb->version;
 	psr_table = &psr->psr_table[panel_type];
 
 	dev_priv->vbt.psr.full_link = psr_table->full_link;
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 2d53f73..e470d5e 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -353,24 +353,45 @@ static void hsw_activate_psr1(struct intel_dp *intel_dp)
 	if (dev_priv->psr.link_standby)
 		val |= EDP_PSR_LINK_STANDBY;
 
-	if (dev_priv->vbt.psr.tp1_wakeup_time > 5)
-		val |= EDP_PSR_TP1_TIME_2500us;
-	else if (dev_priv->vbt.psr.tp1_wakeup_time > 1)
-		val |= EDP_PSR_TP1_TIME_500us;
-	else if (dev_priv->vbt.psr.tp1_wakeup_time > 0)
-		val |= EDP_PSR_TP1_TIME_100us;
-	else
-		val |= EDP_PSR_TP1_TIME_0us;
-
-	if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 5)
-		val |= EDP_PSR_TP2_TP3_TIME_2500us;
-	else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 1)
-		val |= EDP_PSR_TP2_TP3_TIME_500us;
-	else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 0)
-		val |= EDP_PSR_TP2_TP3_TIME_100us;
-	else
-		val |= EDP_PSR_TP2_TP3_TIME_0us;
+	if (dev_priv->vbt.psr.bdb_version >= 209 && IS_KABYLAKE(dev_priv)) {
+		if (dev_priv->vbt.psr.tp1_wakeup_time == 0)
+			val |= EDP_PSR_TP1_TIME_500us;
+		else if (dev_priv->vbt.psr.tp1_wakeup_time == 1)
+			val |= EDP_PSR_TP1_TIME_100us;
+		else if (dev_priv->vbt.psr.tp1_wakeup_time == 2)
+			val |= EDP_PSR_TP1_TIME_2500us;
+		else
+			val |= EDP_PSR_TP1_TIME_0us;
+	} else {
+		if (dev_priv->vbt.psr.tp1_wakeup_time > 5)
+			val |= EDP_PSR_TP1_TIME_2500us;
+		else if (dev_priv->vbt.psr.tp1_wakeup_time > 1)
+			val |= EDP_PSR_TP1_TIME_500us;
+		else if (dev_priv->vbt.psr.tp1_wakeup_time > 0)
+			val |= EDP_PSR_TP1_TIME_100us;
+		else
+			val |= EDP_PSR_TP1_TIME_0us;
+	}
 
+	if (dev_priv->vbt.psr.bdb_version >= 209 && IS_KABYLAKE(dev_priv)) {
+		if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 0)
+			val |=  EDP_PSR_TP2_TP3_TIME_500us;
+		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 1)
+			val |= EDP_PSR_TP2_TP3_TIME_100us;
+		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 2)
+			val |= EDP_PSR_TP2_TP3_TIME_2500us;
+		else
+			val |= EDP_PSR_TP2_TP3_TIME_0us;
+	} else {
+		if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 5)
+			val |= EDP_PSR_TP2_TP3_TIME_2500us;
+		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 1)
+			val |= EDP_PSR_TP2_TP3_TIME_500us;
+		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 0)
+			val |= EDP_PSR_TP2_TP3_TIME_100us;
+		else
+			val |= EDP_PSR_TP2_TP3_TIME_0us;
+	}
 	if (intel_dp_source_supports_hbr2(intel_dp) &&
 	    drm_dp_tps3_supported(intel_dp->dpcd))
 		val |= EDP_PSR_TP1_TP3_SEL;
@@ -405,16 +426,25 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
 	}
 
 	val |= EDP_PSR2_FRAME_BEFORE_SU(dev_priv->psr.sink_sync_latency + 1);
-
-	if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 5)
-		val |= EDP_PSR2_TP2_TIME_2500;
-	else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 1)
-		val |= EDP_PSR2_TP2_TIME_500;
-	else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 0)
-		val |= EDP_PSR2_TP2_TIME_100;
-	else
-		val |= EDP_PSR2_TP2_TIME_50;
-
+	if (dev_priv->vbt.psr.bdb_version >= 209 && IS_KABYLAKE(dev_priv)) {
+		if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 0)
+			val |= EDP_PSR2_TP2_TIME_500;
+		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 1)
+			val |= EDP_PSR2_TP2_TIME_100;
+		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 2)
+			val |= EDP_PSR2_TP2_TIME_2500;
+		else
+			val |= EDP_PSR2_TP2_TIME_50;
+	} else {
+		if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 5)
+			val |= EDP_PSR2_TP2_TIME_2500;
+		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 1)
+			val |= EDP_PSR2_TP2_TIME_500;
+		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 0)
+			val |= EDP_PSR2_TP2_TIME_100;
+		else
+			val |= EDP_PSR2_TP2_TIME_50;
+	}
 	I915_WRITE(EDP_PSR2_CTL, val);
 }
 
-- 
1.9.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915/psr: vbt change for psr
  2018-04-06 17:28 [PATCH] drm/i915/psr: vbt change for psr vathsala nagaraju
@ 2018-04-06 17:41 ` Rodrigo Vivi
  2018-04-09 13:57   ` Jani Nikula
  2018-04-06 18:01 ` ✓ Fi.CI.BAT: success for " Patchwork
  2018-04-06 21:55 ` ✗ Fi.CI.IGT: failure " Patchwork
  2 siblings, 1 reply; 5+ messages in thread
From: Rodrigo Vivi @ 2018-04-06 17:41 UTC (permalink / raw)
  To: vathsala nagaraju; +Cc: Puthikorn Voravootivat, intel-gfx, Maulik V Vaghela

On Fri, Apr 06, 2018 at 10:58:51PM +0530, vathsala nagaraju wrote:
> From: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
> 
> For psr block #9, the vbt description has moved to options [0-3] for
> TP1,TP2,TP3 Wakeup time from decimal value without any change to vbt
> structure. Since spec does not  mention from which VBT version this
> change was added to vbt.bsf file, we cannot depend on bdb->version check
> to change for all the platforms.
> 
> There is RCR inplace for GOP team to  provide the version number
> to make generic change. Since Kabylake with bdb version 209 is having this
> change, limiting this change to kbl and version 209+ to unblock google.
> 
> bspec 20131
> 
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> CC: Puthikorn Voravootivat <puthik@chromium.org>
> 
> Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
> Signed-off-by: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h   |  1 +
>  drivers/gpu/drm/i915/intel_bios.c |  2 +-
>  drivers/gpu/drm/i915/intel_psr.c  | 84 ++++++++++++++++++++++++++-------------
>  3 files changed, 59 insertions(+), 28 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 5373b17..a47be19b 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1075,6 +1075,7 @@ struct intel_vbt_data {
>  		enum psr_lines_to_wait lines_to_wait;
>  		int tp1_wakeup_time;
>  		int tp2_tp3_wakeup_time;
> +		int bdb_version;

please keep the vbt stuff inside intel_bios.c

so there at intel_bios.c you parse the vbt and based on the vbt version
you export in a standard way to intel_psr.c

>  	} psr;
>  
>  	struct {
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index c5c7530..cfefd32 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -658,7 +658,7 @@ static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
>  		DRM_DEBUG_KMS("No PSR BDB found.\n");
>  		return;
>  	}
> -
> +	dev_priv->vbt.psr.bdb_version = bdb->version;
>  	psr_table = &psr->psr_table[panel_type];
>  
>  	dev_priv->vbt.psr.full_link = psr_table->full_link;
> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> index 2d53f73..e470d5e 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -353,24 +353,45 @@ static void hsw_activate_psr1(struct intel_dp *intel_dp)
>  	if (dev_priv->psr.link_standby)
>  		val |= EDP_PSR_LINK_STANDBY;
>  
> -	if (dev_priv->vbt.psr.tp1_wakeup_time > 5)
> -		val |= EDP_PSR_TP1_TIME_2500us;
> -	else if (dev_priv->vbt.psr.tp1_wakeup_time > 1)
> -		val |= EDP_PSR_TP1_TIME_500us;
> -	else if (dev_priv->vbt.psr.tp1_wakeup_time > 0)
> -		val |= EDP_PSR_TP1_TIME_100us;
> -	else
> -		val |= EDP_PSR_TP1_TIME_0us;
> -
> -	if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 5)
> -		val |= EDP_PSR_TP2_TP3_TIME_2500us;
> -	else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 1)
> -		val |= EDP_PSR_TP2_TP3_TIME_500us;
> -	else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 0)
> -		val |= EDP_PSR_TP2_TP3_TIME_100us;
> -	else
> -		val |= EDP_PSR_TP2_TP3_TIME_0us;
> +	if (dev_priv->vbt.psr.bdb_version >= 209 && IS_KABYLAKE(dev_priv)) {
> +		if (dev_priv->vbt.psr.tp1_wakeup_time == 0)
> +			val |= EDP_PSR_TP1_TIME_500us;
> +		else if (dev_priv->vbt.psr.tp1_wakeup_time == 1)
> +			val |= EDP_PSR_TP1_TIME_100us;
> +		else if (dev_priv->vbt.psr.tp1_wakeup_time == 2)
> +			val |= EDP_PSR_TP1_TIME_2500us;
> +		else
> +			val |= EDP_PSR_TP1_TIME_0us;
> +	} else {
> +		if (dev_priv->vbt.psr.tp1_wakeup_time > 5)
> +			val |= EDP_PSR_TP1_TIME_2500us;
> +		else if (dev_priv->vbt.psr.tp1_wakeup_time > 1)
> +			val |= EDP_PSR_TP1_TIME_500us;
> +		else if (dev_priv->vbt.psr.tp1_wakeup_time > 0)
> +			val |= EDP_PSR_TP1_TIME_100us;
> +		else
> +			val |= EDP_PSR_TP1_TIME_0us;
> +	}
>  
> +	if (dev_priv->vbt.psr.bdb_version >= 209 && IS_KABYLAKE(dev_priv)) {
> +		if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 0)
> +			val |=  EDP_PSR_TP2_TP3_TIME_500us;
> +		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 1)
> +			val |= EDP_PSR_TP2_TP3_TIME_100us;
> +		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 2)
> +			val |= EDP_PSR_TP2_TP3_TIME_2500us;
> +		else
> +			val |= EDP_PSR_TP2_TP3_TIME_0us;
> +	} else {
> +		if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 5)
> +			val |= EDP_PSR_TP2_TP3_TIME_2500us;
> +		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 1)
> +			val |= EDP_PSR_TP2_TP3_TIME_500us;
> +		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 0)
> +			val |= EDP_PSR_TP2_TP3_TIME_100us;
> +		else
> +			val |= EDP_PSR_TP2_TP3_TIME_0us;
> +	}
>  	if (intel_dp_source_supports_hbr2(intel_dp) &&
>  	    drm_dp_tps3_supported(intel_dp->dpcd))
>  		val |= EDP_PSR_TP1_TP3_SEL;
> @@ -405,16 +426,25 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
>  	}
>  
>  	val |= EDP_PSR2_FRAME_BEFORE_SU(dev_priv->psr.sink_sync_latency + 1);
> -
> -	if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 5)
> -		val |= EDP_PSR2_TP2_TIME_2500;
> -	else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 1)
> -		val |= EDP_PSR2_TP2_TIME_500;
> -	else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 0)
> -		val |= EDP_PSR2_TP2_TIME_100;
> -	else
> -		val |= EDP_PSR2_TP2_TIME_50;
> -
> +	if (dev_priv->vbt.psr.bdb_version >= 209 && IS_KABYLAKE(dev_priv)) {
> +		if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 0)
> +			val |= EDP_PSR2_TP2_TIME_500;
> +		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 1)
> +			val |= EDP_PSR2_TP2_TIME_100;
> +		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 2)
> +			val |= EDP_PSR2_TP2_TIME_2500;
> +		else
> +			val |= EDP_PSR2_TP2_TIME_50;
> +	} else {
> +		if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 5)
> +			val |= EDP_PSR2_TP2_TIME_2500;
> +		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 1)
> +			val |= EDP_PSR2_TP2_TIME_500;
> +		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 0)
> +			val |= EDP_PSR2_TP2_TIME_100;
> +		else
> +			val |= EDP_PSR2_TP2_TIME_50;
> +	}
>  	I915_WRITE(EDP_PSR2_CTL, val);
>  }
>  
> -- 
> 1.9.1
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/psr: vbt change for psr
  2018-04-06 17:28 [PATCH] drm/i915/psr: vbt change for psr vathsala nagaraju
  2018-04-06 17:41 ` Rodrigo Vivi
@ 2018-04-06 18:01 ` Patchwork
  2018-04-06 21:55 ` ✗ Fi.CI.IGT: failure " Patchwork
  2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2018-04-06 18:01 UTC (permalink / raw)
  To: vathsala nagaraju; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/psr: vbt change for psr
URL   : https://patchwork.freedesktop.org/series/41289/
State : success

== Summary ==

Series 41289v1 drm/i915/psr: vbt change for psr
https://patchwork.freedesktop.org/api/1.0/series/41289/revisions/1/mbox/

---- Possible new issues:

Test drv_module_reload:
        Subgroup basic-no-display:
                incomplete -> PASS       (fi-elk-e7500)

---- Known issues:

Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-b:
                pass       -> DMESG-WARN (fi-cnl-y3) fdo#104951
        Subgroup suspend-read-crc-pipe-c:
                incomplete -> PASS       (fi-bxt-dsi) fdo#103927

fdo#104951 https://bugs.freedesktop.org/show_bug.cgi?id=104951
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927

fi-bdw-5557u     total:285  pass:264  dwarn:0   dfail:0   fail:0   skip:21  time:428s
fi-bdw-gvtdvm    total:285  pass:261  dwarn:0   dfail:0   fail:0   skip:24  time:442s
fi-blb-e6850     total:285  pass:220  dwarn:1   dfail:0   fail:0   skip:64  time:380s
fi-bsw-n3050     total:285  pass:239  dwarn:0   dfail:0   fail:0   skip:46  time:536s
fi-bwr-2160      total:285  pass:180  dwarn:0   dfail:0   fail:0   skip:105 time:299s
fi-bxt-dsi       total:285  pass:255  dwarn:0   dfail:0   fail:0   skip:30  time:514s
fi-bxt-j4205     total:285  pass:256  dwarn:0   dfail:0   fail:0   skip:29  time:513s
fi-byt-j1900     total:285  pass:250  dwarn:0   dfail:0   fail:0   skip:35  time:522s
fi-byt-n2820     total:285  pass:246  dwarn:0   dfail:0   fail:0   skip:39  time:509s
fi-cfl-8700k     total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:410s
fi-cfl-s3        total:285  pass:259  dwarn:0   dfail:0   fail:0   skip:26  time:561s
fi-cfl-u         total:285  pass:259  dwarn:0   dfail:0   fail:0   skip:26  time:513s
fi-cnl-y3        total:285  pass:258  dwarn:1   dfail:0   fail:0   skip:26  time:594s
fi-elk-e7500     total:285  pass:226  dwarn:0   dfail:0   fail:0   skip:59  time:426s
fi-gdg-551       total:285  pass:176  dwarn:0   dfail:0   fail:1   skip:108 time:317s
fi-glk-1         total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:544s
fi-glk-j4005     total:285  pass:256  dwarn:0   dfail:0   fail:0   skip:29  time:485s
fi-hsw-4770      total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:402s
fi-ilk-650       total:285  pass:225  dwarn:0   dfail:0   fail:0   skip:60  time:423s
fi-ivb-3520m     total:285  pass:256  dwarn:0   dfail:0   fail:0   skip:29  time:468s
fi-ivb-3770      total:285  pass:252  dwarn:0   dfail:0   fail:0   skip:33  time:434s
fi-kbl-7500u     total:285  pass:260  dwarn:1   dfail:0   fail:0   skip:24  time:474s
fi-kbl-7567u     total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:463s
fi-kbl-r         total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:519s
fi-pnv-d510      total:285  pass:220  dwarn:1   dfail:0   fail:0   skip:64  time:659s
fi-skl-6260u     total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:445s
fi-skl-6600u     total:285  pass:258  dwarn:0   dfail:0   fail:0   skip:27  time:533s
fi-skl-6700k2    total:285  pass:261  dwarn:0   dfail:0   fail:0   skip:24  time:508s
fi-skl-6770hq    total:285  pass:265  dwarn:0   dfail:0   fail:0   skip:20  time:504s
fi-skl-guc       total:285  pass:257  dwarn:0   dfail:0   fail:0   skip:28  time:429s
fi-skl-gvtdvm    total:285  pass:262  dwarn:0   dfail:0   fail:0   skip:23  time:450s
fi-snb-2520m     total:285  pass:245  dwarn:0   dfail:0   fail:0   skip:40  time:569s
fi-snb-2600      total:285  pass:245  dwarn:0   dfail:0   fail:0   skip:40  time:405s

3cbdbfb1ecc8769c8db88e95b1d6ea55c5e87dbf drm-tip: 2018y-04m-06d-15h-15m-21s UTC integration manifest
1630bdc52cc9 drm/i915/psr: vbt change for psr

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8626/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread
* ✗ Fi.CI.IGT: failure for drm/i915/psr: vbt change for psr
  2018-04-06 17:28 [PATCH] drm/i915/psr: vbt change for psr vathsala nagaraju
  2018-04-06 17:41 ` Rodrigo Vivi
  2018-04-06 18:01 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2018-04-06 21:55 ` Patchwork
  2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2018-04-06 21:55 UTC (permalink / raw)
  To: vathsala nagaraju; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/psr: vbt change for psr
URL   : https://patchwork.freedesktop.org/series/41289/
State : failure

== Summary ==

---- Possible new issues:

Test drm_read:
        Subgroup invalid-buffer:
                pass       -> FAIL       (shard-snb)
Test gem_mmap_gtt:
        Subgroup forked-medium-copy-odd:
                dmesg-warn -> PASS       (shard-hsw)
Test kms_busy:
        Subgroup extended-modeset-hang-oldfb-with-reset-render-a:
                pass       -> FAIL       (shard-snb)
Test kms_cursor_crc:
        Subgroup cursor-256x85-random:
                pass       -> DMESG-WARN (shard-hsw)
Test kms_frontbuffer_tracking:
        Subgroup fbc-2p-pri-indfb-multidraw:
                dmesg-fail -> PASS       (shard-hsw)
        Subgroup fbc-2p-primscrn-pri-indfb-draw-pwrite:
                skip       -> FAIL       (shard-snb)
        Subgroup fbcpsr-1p-primscrn-cur-indfb-move:
                skip       -> FAIL       (shard-snb)
        Subgroup fbcpsr-2p-scndscrn-indfb-msflip-blt:
                skip       -> FAIL       (shard-snb)
        Subgroup psr-1p-primscrn-shrfb-msflip-blt:
                skip       -> FAIL       (shard-snb)
        Subgroup psr-2p-primscrn-spr-indfb-fullscreen:
                skip       -> FAIL       (shard-snb)
        Subgroup psr-2p-rte:
                skip       -> FAIL       (shard-snb)
Test kms_vblank:
        Subgroup pipe-a-query-forked-busy-hang:
                pass       -> FAIL       (shard-snb)

---- Known issues:

Test kms_cursor_legacy:
        Subgroup 2x-long-flip-vs-cursor-legacy:
                fail       -> PASS       (shard-hsw) fdo#104873
Test kms_flip:
        Subgroup 2x-flip-vs-expired-vblank:
                fail       -> PASS       (shard-hsw) fdo#102887
Test kms_frontbuffer_tracking:
        Subgroup fbc-1p-primscrn-pri-shrfb-draw-mmap-cpu:
                pass       -> FAIL       (shard-snb) fdo#103167 +1
Test kms_rotation_crc:
        Subgroup primary-rotation-180:
                pass       -> FAIL       (shard-snb) fdo#103925
Test kms_sysfs_edid_timing:
                warn       -> PASS       (shard-apl) fdo#100047

fdo#104873 https://bugs.freedesktop.org/show_bug.cgi?id=104873
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047

shard-apl        total:2680 pass:1836 dwarn:1   dfail:0   fail:7   skip:836 time:12652s
shard-hsw        total:2680 pass:1785 dwarn:2   dfail:0   fail:1   skip:891 time:11288s
shard-snb        total:2680 pass:1372 dwarn:1   dfail:0   fail:14  skip:1293 time:6821s
Blacklisted hosts:
shard-kbl        total:2680 pass:1963 dwarn:1   dfail:0   fail:6   skip:710 time:9181s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8626/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915/psr: vbt change for psr
  2018-04-06 17:41 ` Rodrigo Vivi
@ 2018-04-09 13:57   ` Jani Nikula
  0 siblings, 0 replies; 5+ messages in thread
From: Jani Nikula @ 2018-04-09 13:57 UTC (permalink / raw)
  To: Rodrigo Vivi, vathsala nagaraju
  Cc: Puthikorn Voravootivat, intel-gfx, Maulik V Vaghela

On Fri, 06 Apr 2018, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> On Fri, Apr 06, 2018 at 10:58:51PM +0530, vathsala nagaraju wrote:
>> From: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
>> 
>> For psr block #9, the vbt description has moved to options [0-3] for
>> TP1,TP2,TP3 Wakeup time from decimal value without any change to vbt
>> structure. Since spec does not  mention from which VBT version this
>> change was added to vbt.bsf file, we cannot depend on bdb->version check
>> to change for all the platforms.
>> 
>> There is RCR inplace for GOP team to  provide the version number
>> to make generic change. Since Kabylake with bdb version 209 is having this
>> change, limiting this change to kbl and version 209+ to unblock google.
>> 
>> bspec 20131
>> 
>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> CC: Puthikorn Voravootivat <puthik@chromium.org>
>> 
>> Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
>> Signed-off-by: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
>> ---
>>  drivers/gpu/drm/i915/i915_drv.h   |  1 +
>>  drivers/gpu/drm/i915/intel_bios.c |  2 +-
>>  drivers/gpu/drm/i915/intel_psr.c  | 84 ++++++++++++++++++++++++++-------------
>>  3 files changed, 59 insertions(+), 28 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index 5373b17..a47be19b 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -1075,6 +1075,7 @@ struct intel_vbt_data {
>>  		enum psr_lines_to_wait lines_to_wait;
>>  		int tp1_wakeup_time;
>>  		int tp2_tp3_wakeup_time;
>> +		int bdb_version;
>
> please keep the vbt stuff inside intel_bios.c
>
> so there at intel_bios.c you parse the vbt and based on the vbt version
> you export in a standard way to intel_psr.c

Exactly! struct intel_vbt_data is supposed to be an abstraction.

BR,
Jani.

>
>>  	} psr;
>>  
>>  	struct {
>> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
>> index c5c7530..cfefd32 100644
>> --- a/drivers/gpu/drm/i915/intel_bios.c
>> +++ b/drivers/gpu/drm/i915/intel_bios.c
>> @@ -658,7 +658,7 @@ static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
>>  		DRM_DEBUG_KMS("No PSR BDB found.\n");
>>  		return;
>>  	}
>> -
>> +	dev_priv->vbt.psr.bdb_version = bdb->version;
>>  	psr_table = &psr->psr_table[panel_type];
>>  
>>  	dev_priv->vbt.psr.full_link = psr_table->full_link;
>> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
>> index 2d53f73..e470d5e 100644
>> --- a/drivers/gpu/drm/i915/intel_psr.c
>> +++ b/drivers/gpu/drm/i915/intel_psr.c
>> @@ -353,24 +353,45 @@ static void hsw_activate_psr1(struct intel_dp *intel_dp)
>>  	if (dev_priv->psr.link_standby)
>>  		val |= EDP_PSR_LINK_STANDBY;
>>  
>> -	if (dev_priv->vbt.psr.tp1_wakeup_time > 5)
>> -		val |= EDP_PSR_TP1_TIME_2500us;
>> -	else if (dev_priv->vbt.psr.tp1_wakeup_time > 1)
>> -		val |= EDP_PSR_TP1_TIME_500us;
>> -	else if (dev_priv->vbt.psr.tp1_wakeup_time > 0)
>> -		val |= EDP_PSR_TP1_TIME_100us;
>> -	else
>> -		val |= EDP_PSR_TP1_TIME_0us;
>> -
>> -	if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 5)
>> -		val |= EDP_PSR_TP2_TP3_TIME_2500us;
>> -	else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 1)
>> -		val |= EDP_PSR_TP2_TP3_TIME_500us;
>> -	else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 0)
>> -		val |= EDP_PSR_TP2_TP3_TIME_100us;
>> -	else
>> -		val |= EDP_PSR_TP2_TP3_TIME_0us;
>> +	if (dev_priv->vbt.psr.bdb_version >= 209 && IS_KABYLAKE(dev_priv)) {
>> +		if (dev_priv->vbt.psr.tp1_wakeup_time == 0)
>> +			val |= EDP_PSR_TP1_TIME_500us;
>> +		else if (dev_priv->vbt.psr.tp1_wakeup_time == 1)
>> +			val |= EDP_PSR_TP1_TIME_100us;
>> +		else if (dev_priv->vbt.psr.tp1_wakeup_time == 2)
>> +			val |= EDP_PSR_TP1_TIME_2500us;
>> +		else
>> +			val |= EDP_PSR_TP1_TIME_0us;
>> +	} else {
>> +		if (dev_priv->vbt.psr.tp1_wakeup_time > 5)
>> +			val |= EDP_PSR_TP1_TIME_2500us;
>> +		else if (dev_priv->vbt.psr.tp1_wakeup_time > 1)
>> +			val |= EDP_PSR_TP1_TIME_500us;
>> +		else if (dev_priv->vbt.psr.tp1_wakeup_time > 0)
>> +			val |= EDP_PSR_TP1_TIME_100us;
>> +		else
>> +			val |= EDP_PSR_TP1_TIME_0us;
>> +	}
>>  
>> +	if (dev_priv->vbt.psr.bdb_version >= 209 && IS_KABYLAKE(dev_priv)) {
>> +		if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 0)
>> +			val |=  EDP_PSR_TP2_TP3_TIME_500us;
>> +		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 1)
>> +			val |= EDP_PSR_TP2_TP3_TIME_100us;
>> +		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 2)
>> +			val |= EDP_PSR_TP2_TP3_TIME_2500us;
>> +		else
>> +			val |= EDP_PSR_TP2_TP3_TIME_0us;
>> +	} else {
>> +		if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 5)
>> +			val |= EDP_PSR_TP2_TP3_TIME_2500us;
>> +		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 1)
>> +			val |= EDP_PSR_TP2_TP3_TIME_500us;
>> +		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 0)
>> +			val |= EDP_PSR_TP2_TP3_TIME_100us;
>> +		else
>> +			val |= EDP_PSR_TP2_TP3_TIME_0us;
>> +	}
>>  	if (intel_dp_source_supports_hbr2(intel_dp) &&
>>  	    drm_dp_tps3_supported(intel_dp->dpcd))
>>  		val |= EDP_PSR_TP1_TP3_SEL;
>> @@ -405,16 +426,25 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
>>  	}
>>  
>>  	val |= EDP_PSR2_FRAME_BEFORE_SU(dev_priv->psr.sink_sync_latency + 1);
>> -
>> -	if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 5)
>> -		val |= EDP_PSR2_TP2_TIME_2500;
>> -	else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 1)
>> -		val |= EDP_PSR2_TP2_TIME_500;
>> -	else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 0)
>> -		val |= EDP_PSR2_TP2_TIME_100;
>> -	else
>> -		val |= EDP_PSR2_TP2_TIME_50;
>> -
>> +	if (dev_priv->vbt.psr.bdb_version >= 209 && IS_KABYLAKE(dev_priv)) {
>> +		if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 0)
>> +			val |= EDP_PSR2_TP2_TIME_500;
>> +		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 1)
>> +			val |= EDP_PSR2_TP2_TIME_100;
>> +		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 2)
>> +			val |= EDP_PSR2_TP2_TIME_2500;
>> +		else
>> +			val |= EDP_PSR2_TP2_TIME_50;
>> +	} else {
>> +		if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 5)
>> +			val |= EDP_PSR2_TP2_TIME_2500;
>> +		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 1)
>> +			val |= EDP_PSR2_TP2_TIME_500;
>> +		else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 0)
>> +			val |= EDP_PSR2_TP2_TIME_100;
>> +		else
>> +			val |= EDP_PSR2_TP2_TIME_50;
>> +	}
>>  	I915_WRITE(EDP_PSR2_CTL, val);
>>  }
>>  
>> -- 
>> 1.9.1
>> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread
end of thread, other threads:[~2018-04-09 13:56 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-04-06 17:28 [PATCH] drm/i915/psr: vbt change for psr vathsala nagaraju
2018-04-06 17:41 ` Rodrigo Vivi
2018-04-09 13:57   ` Jani Nikula
2018-04-06 18:01 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-04-06 21:55 ` ✗ Fi.CI.IGT: failure " Patchwork

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