* [Qemu-devel] [PATCH for-2.12] fpu: Fix rounding mode for floatN_to_uintM_round_to_zero
@ 2018-04-10 5:59 Richard Henderson
2018-04-10 7:40 ` Peter Maydell
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Richard Henderson @ 2018-04-10 5:59 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee, peter.maydell
We incorrectly passed in the current rounding mode
instead of float_round_to_zero.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
Found while runnning SVE RISU tests; it should be visible with the
right set of inputs to AdvSIMD RISU tests.
r~
---
fpu/softfloat.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 6e16284e66..b46dccc63e 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -1486,8 +1486,8 @@ uint ## isz ## _t float ## fsz ## _to_uint ## isz ## _round_to_zero \
(float ## fsz a, float_status *s) \
{ \
FloatParts p = float ## fsz ## _unpack_canonical(a, s); \
- return round_to_uint_and_pack(p, s->float_rounding_mode, \
- UINT ## isz ## _MAX, s); \
+ return round_to_uint_and_pack(p, float_round_to_zero, \
+ UINT ## isz ## _MAX, s); \
}
FLOAT_TO_UINT(16, 16)
--
2.14.3
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [Qemu-devel] [PATCH for-2.12] fpu: Fix rounding mode for floatN_to_uintM_round_to_zero
2018-04-10 5:59 [Qemu-devel] [PATCH for-2.12] fpu: Fix rounding mode for floatN_to_uintM_round_to_zero Richard Henderson
@ 2018-04-10 7:40 ` Peter Maydell
2018-04-10 10:16 ` Richard Henderson
2018-04-10 10:58 ` Peter Maydell
2018-04-10 13:05 ` Alex Bennée
2 siblings, 1 reply; 5+ messages in thread
From: Peter Maydell @ 2018-04-10 7:40 UTC (permalink / raw)
To: Richard Henderson; +Cc: QEMU Developers, Alex Bennée
On 10 April 2018 at 06:59, Richard Henderson
<richard.henderson@linaro.org> wrote:
> We incorrectly passed in the current rounding mode
> instead of float_round_to_zero.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>
> Found while runnning SVE RISU tests; it should be visible with the
> right set of inputs to AdvSIMD RISU tests.
>
>
> r~
>
> ---
> fpu/softfloat.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index 6e16284e66..b46dccc63e 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -1486,8 +1486,8 @@ uint ## isz ## _t float ## fsz ## _to_uint ## isz ## _round_to_zero \
> (float ## fsz a, float_status *s) \
> { \
> FloatParts p = float ## fsz ## _unpack_canonical(a, s); \
> - return round_to_uint_and_pack(p, s->float_rounding_mode, \
> - UINT ## isz ## _MAX, s); \
> + return round_to_uint_and_pack(p, float_round_to_zero, \
> + UINT ## isz ## _MAX, s); \
> }
>
> FLOAT_TO_UINT(16, 16)
> --
> 2.14.3
Would this be likely the fix for
https://bugs.launchpad.net/qemu/+bug/1761401
?
thanks
-- PMM
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [Qemu-devel] [PATCH for-2.12] fpu: Fix rounding mode for floatN_to_uintM_round_to_zero
2018-04-10 5:59 [Qemu-devel] [PATCH for-2.12] fpu: Fix rounding mode for floatN_to_uintM_round_to_zero Richard Henderson
2018-04-10 7:40 ` Peter Maydell
@ 2018-04-10 10:58 ` Peter Maydell
2018-04-10 13:05 ` Alex Bennée
2 siblings, 0 replies; 5+ messages in thread
From: Peter Maydell @ 2018-04-10 10:58 UTC (permalink / raw)
To: Richard Henderson; +Cc: QEMU Developers, Alex Bennée
On 10 April 2018 at 06:59, Richard Henderson
<richard.henderson@linaro.org> wrote:
> We incorrectly passed in the current rounding mode
> instead of float_round_to_zero.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>
> Found while runnning SVE RISU tests; it should be visible with the
> right set of inputs to AdvSIMD RISU tests.
Applied to target-arm.next, thanks.
-- PMM
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] [PATCH for-2.12] fpu: Fix rounding mode for floatN_to_uintM_round_to_zero
2018-04-10 5:59 [Qemu-devel] [PATCH for-2.12] fpu: Fix rounding mode for floatN_to_uintM_round_to_zero Richard Henderson
2018-04-10 7:40 ` Peter Maydell
2018-04-10 10:58 ` Peter Maydell
@ 2018-04-10 13:05 ` Alex Bennée
2 siblings, 0 replies; 5+ messages in thread
From: Alex Bennée @ 2018-04-10 13:05 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel, peter.maydell
Richard Henderson <richard.henderson@linaro.org> writes:
> We incorrectly passed in the current rounding mode
> instead of float_round_to_zero.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Oops,
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
>
> Found while runnning SVE RISU tests; it should be visible with the
> right set of inputs to AdvSIMD RISU tests.
>
>
> r~
>
> ---
> fpu/softfloat.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index 6e16284e66..b46dccc63e 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -1486,8 +1486,8 @@ uint ## isz ## _t float ## fsz ## _to_uint ## isz ## _round_to_zero \
> (float ## fsz a, float_status *s) \
> { \
> FloatParts p = float ## fsz ## _unpack_canonical(a, s); \
> - return round_to_uint_and_pack(p, s->float_rounding_mode, \
> - UINT ## isz ## _MAX, s); \
> + return round_to_uint_and_pack(p, float_round_to_zero, \
> + UINT ## isz ## _MAX, s); \
> }
>
> FLOAT_TO_UINT(16, 16)
--
Alex Bennée
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2018-04-10 13:05 UTC | newest]
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2018-04-10 5:59 [Qemu-devel] [PATCH for-2.12] fpu: Fix rounding mode for floatN_to_uintM_round_to_zero Richard Henderson
2018-04-10 7:40 ` Peter Maydell
2018-04-10 10:16 ` Richard Henderson
2018-04-10 10:58 ` Peter Maydell
2018-04-10 13:05 ` Alex Bennée
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