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From: Icenowy Zheng <icenowy@aosc.io>
To: Ulf Hansson <ulf.hansson@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Maxime Ripard <maxime.ripard@bootlin.com>,
	Chen-Yu Tsai <wens@csie.org>
Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com,
	Icenowy Zheng <icenowy@aosc.io>
Subject: [PATCH 2/3] arm64: allwinner: h6: add device tree nodes for MMC controllers
Date: Thu, 26 Apr 2018 22:07:27 +0800	[thread overview]
Message-ID: <20180426140728.43155-3-icenowy@aosc.io> (raw)
In-Reply-To: <20180426140728.43155-1-icenowy@aosc.io>

The Allwinner H6 SoC have 3 MMC controllers.

Add device tree nodes for them.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 56 ++++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 4debc3962830..3cbfc035c979 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -124,12 +124,68 @@
 			interrupt-controller;
 			#interrupt-cells = <3>;
 
+			mmc0_pins: mmc0-pins {
+				pins = "PF0", "PF1", "PF2", "PF3",
+				       "PF4", "PF5";
+				function = "mmc0";
+				drive-strength = <30>;
+				bias-pull-up;
+			};
+
+			mmc2_pins: mmc2-pins {
+				pins = "PC1", "PC4", "PC5", "PC6",
+				       "PC7", "PC8", "PC9", "PC10",
+				       "PC11", "PC12", "PC13", "PC14";
+				function = "mmc2";
+				drive-strength = <30>;
+				bias-pull-up;
+			};
+
 			uart0_ph_pins: uart0-ph {
 				pins = "PH0", "PH1";
 				function = "uart0";
 			};
 		};
 
+		mmc0: mmc@4020000 {
+			compatible = "allwinner,sun50i-h6-mmc";
+			reg = <0x04020000 0x1000>;
+			clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
+			clock-names = "ahb", "mmc";
+			resets = <&ccu RST_BUS_MMC0>;
+			reset-names = "ahb";
+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mmc1: mmc@4021000 {
+			compatible = "allwinner,sun50i-h6-mmc";
+			reg = <0x04021000 0x1000>;
+			clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
+			clock-names = "ahb", "mmc";
+			resets = <&ccu RST_BUS_MMC1>;
+			reset-names = "ahb";
+			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mmc2: mmc@4022000 {
+			compatible = "allwinner,sun50i-h6-emmc";
+			reg = <0x04022000 0x1000>;
+			clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
+			clock-names = "ahb", "mmc";
+			resets = <&ccu RST_BUS_MMC2>;
+			reset-names = "ahb";
+			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
 		uart0: serial@5000000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0x05000000 0x400>;
-- 
2.15.1

WARNING: multiple messages have this Message-ID (diff)
From: Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
To: Ulf Hansson <ulf.hansson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Maxime Ripard
	<maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>,
	Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Cc: linux-mmc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
	Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
Subject: [PATCH 2/3] arm64: allwinner: h6: add device tree nodes for MMC controllers
Date: Thu, 26 Apr 2018 22:07:27 +0800	[thread overview]
Message-ID: <20180426140728.43155-3-icenowy@aosc.io> (raw)
In-Reply-To: <20180426140728.43155-1-icenowy-h8G6r0blFSE@public.gmane.org>

The Allwinner H6 SoC have 3 MMC controllers.

Add device tree nodes for them.

Signed-off-by: Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
---
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 56 ++++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 4debc3962830..3cbfc035c979 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -124,12 +124,68 @@
 			interrupt-controller;
 			#interrupt-cells = <3>;
 
+			mmc0_pins: mmc0-pins {
+				pins = "PF0", "PF1", "PF2", "PF3",
+				       "PF4", "PF5";
+				function = "mmc0";
+				drive-strength = <30>;
+				bias-pull-up;
+			};
+
+			mmc2_pins: mmc2-pins {
+				pins = "PC1", "PC4", "PC5", "PC6",
+				       "PC7", "PC8", "PC9", "PC10",
+				       "PC11", "PC12", "PC13", "PC14";
+				function = "mmc2";
+				drive-strength = <30>;
+				bias-pull-up;
+			};
+
 			uart0_ph_pins: uart0-ph {
 				pins = "PH0", "PH1";
 				function = "uart0";
 			};
 		};
 
+		mmc0: mmc@4020000 {
+			compatible = "allwinner,sun50i-h6-mmc";
+			reg = <0x04020000 0x1000>;
+			clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
+			clock-names = "ahb", "mmc";
+			resets = <&ccu RST_BUS_MMC0>;
+			reset-names = "ahb";
+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mmc1: mmc@4021000 {
+			compatible = "allwinner,sun50i-h6-mmc";
+			reg = <0x04021000 0x1000>;
+			clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
+			clock-names = "ahb", "mmc";
+			resets = <&ccu RST_BUS_MMC1>;
+			reset-names = "ahb";
+			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mmc2: mmc@4022000 {
+			compatible = "allwinner,sun50i-h6-emmc";
+			reg = <0x04022000 0x1000>;
+			clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
+			clock-names = "ahb", "mmc";
+			resets = <&ccu RST_BUS_MMC2>;
+			reset-names = "ahb";
+			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
 		uart0: serial@5000000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0x05000000 0x400>;
-- 
2.15.1

WARNING: multiple messages have this Message-ID (diff)
From: icenowy@aosc.io (Icenowy Zheng)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] arm64: allwinner: h6: add device tree nodes for MMC controllers
Date: Thu, 26 Apr 2018 22:07:27 +0800	[thread overview]
Message-ID: <20180426140728.43155-3-icenowy@aosc.io> (raw)
In-Reply-To: <20180426140728.43155-1-icenowy@aosc.io>

The Allwinner H6 SoC have 3 MMC controllers.

Add device tree nodes for them.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 56 ++++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 4debc3962830..3cbfc035c979 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -124,12 +124,68 @@
 			interrupt-controller;
 			#interrupt-cells = <3>;
 
+			mmc0_pins: mmc0-pins {
+				pins = "PF0", "PF1", "PF2", "PF3",
+				       "PF4", "PF5";
+				function = "mmc0";
+				drive-strength = <30>;
+				bias-pull-up;
+			};
+
+			mmc2_pins: mmc2-pins {
+				pins = "PC1", "PC4", "PC5", "PC6",
+				       "PC7", "PC8", "PC9", "PC10",
+				       "PC11", "PC12", "PC13", "PC14";
+				function = "mmc2";
+				drive-strength = <30>;
+				bias-pull-up;
+			};
+
 			uart0_ph_pins: uart0-ph {
 				pins = "PH0", "PH1";
 				function = "uart0";
 			};
 		};
 
+		mmc0: mmc at 4020000 {
+			compatible = "allwinner,sun50i-h6-mmc";
+			reg = <0x04020000 0x1000>;
+			clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
+			clock-names = "ahb", "mmc";
+			resets = <&ccu RST_BUS_MMC0>;
+			reset-names = "ahb";
+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mmc1: mmc at 4021000 {
+			compatible = "allwinner,sun50i-h6-mmc";
+			reg = <0x04021000 0x1000>;
+			clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
+			clock-names = "ahb", "mmc";
+			resets = <&ccu RST_BUS_MMC1>;
+			reset-names = "ahb";
+			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mmc2: mmc at 4022000 {
+			compatible = "allwinner,sun50i-h6-emmc";
+			reg = <0x04022000 0x1000>;
+			clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
+			clock-names = "ahb", "mmc";
+			resets = <&ccu RST_BUS_MMC2>;
+			reset-names = "ahb";
+			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
 		uart0: serial at 5000000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0x05000000 0x400>;
-- 
2.15.1

  parent reply	other threads:[~2018-04-26 14:09 UTC|newest]

Thread overview: 76+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-26 14:07 [PATCH 0/3] Enable basic MMC support on Allwinner H6 Icenowy Zheng
2018-04-26 14:07 ` Icenowy Zheng
2018-04-26 14:07 ` Icenowy Zheng
2018-04-26 14:07 ` [PATCH 1/3] mmc: sunxi: add support for the MMC controller on H6 Icenowy Zheng
2018-04-26 14:07   ` Icenowy Zheng
2018-04-26 14:07   ` Icenowy Zheng
2018-04-26 16:45   ` [linux-sunxi] " Andre Przywara
2018-04-26 16:45     ` Andre Przywara
2018-04-26 16:45     ` Andre Przywara
2018-04-27  8:38     ` [linux-sunxi] " Icenowy Zheng
2018-04-27  8:38       ` Icenowy Zheng
2018-04-27  8:38       ` Icenowy Zheng
2018-04-27  9:23       ` [linux-sunxi] " Andre Przywara
2018-04-27  9:23         ` Andre Przywara
2018-04-27  9:23         ` Andre Przywara
2018-05-02 12:54   ` Ulf Hansson
2018-05-02 12:54     ` Ulf Hansson
2018-05-02 12:54     ` Ulf Hansson
2018-04-26 14:07 ` Icenowy Zheng [this message]
2018-04-26 14:07   ` [PATCH 2/3] arm64: allwinner: h6: add device tree nodes for MMC controllers Icenowy Zheng
2018-04-26 14:07   ` Icenowy Zheng
2018-04-26 16:45   ` [linux-sunxi] " Andre Przywara
2018-04-26 16:45     ` Andre Przywara
2018-04-26 16:45     ` Andre Przywara
2018-04-27  8:36     ` [linux-sunxi] " Icenowy Zheng
2018-04-27  8:36       ` Icenowy Zheng
2018-04-27  8:36       ` Icenowy Zheng
2018-04-27  9:18       ` [linux-sunxi] " Andre Przywara
2018-04-27  9:18         ` Andre Przywara
2018-04-27  9:18         ` Andre Przywara
2018-04-27  9:23         ` [linux-sunxi] " Icenowy Zheng
2018-04-27  9:23           ` Icenowy Zheng
2018-04-27  9:23           ` Icenowy Zheng
2018-04-27 21:25           ` [linux-sunxi] " André Przywara
2018-04-27 21:25             ` André Przywara
2018-04-27 21:25             ` André Przywara
2018-06-26  0:28             ` [linux-sunxi] " Icenowy Zheng
2018-06-26  0:28               ` Icenowy Zheng
2018-06-26  0:28               ` Icenowy Zheng
2018-04-26 14:07 ` [PATCH 3/3] arm64: allwinner: h6: enable MMC0/2 on Pine H64 Icenowy Zheng
2018-04-26 14:07   ` Icenowy Zheng
2018-04-26 14:07   ` Icenowy Zheng
2018-04-26 16:46   ` [linux-sunxi] " Andre Przywara
2018-04-26 16:46     ` Andre Przywara
2018-04-26 16:46     ` Andre Przywara
2018-04-27  7:12     ` [linux-sunxi] " Icenowy Zheng
2018-04-27  7:12       ` Icenowy Zheng
2018-04-30  9:47       ` Andre Przywara
2018-04-30  9:47         ` Andre Przywara
2018-04-30  9:47         ` Andre Przywara
2018-04-30  9:51         ` [linux-sunxi] " Icenowy Zheng
2018-04-30  9:51           ` Icenowy Zheng
2018-04-30  9:51           ` Icenowy Zheng
2018-04-30 10:44           ` Andre Przywara
2018-04-30 10:44             ` Andre Przywara
2018-04-30 10:44             ` Andre Przywara
2018-05-01 15:52             ` [linux-sunxi] " Chen-Yu Tsai
2018-05-01 15:52               ` Chen-Yu Tsai
2018-05-02 11:01               ` Andre Przywara
2018-05-02 11:01                 ` Andre Przywara
2018-05-02 11:01                 ` Andre Przywara
2018-05-04  2:44                 ` [linux-sunxi] " Chen-Yu Tsai
2018-05-04  2:44                   ` Chen-Yu Tsai
2018-05-04  2:44                   ` Chen-Yu Tsai
2018-05-01 15:48         ` [linux-sunxi] " Chen-Yu Tsai
2018-05-01 15:48           ` Chen-Yu Tsai
2018-05-01 15:48           ` Chen-Yu Tsai
2018-05-02  9:36         ` [linux-sunxi] " Maxime Ripard
2018-05-02  9:36           ` Maxime Ripard
2018-05-02  9:36           ` Maxime Ripard
2018-05-02 11:01           ` [linux-sunxi] " Andre Przywara
2018-05-02 11:01             ` Andre Przywara
2018-05-02 11:01             ` Andre Przywara
2018-05-03 18:05             ` [linux-sunxi] " Maxime Ripard
2018-05-03 18:05               ` Maxime Ripard
2018-05-03 18:05               ` Maxime Ripard

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