[U-Boot] [PATCH v2 1/2] ARM: dts: sun8i: Sync r40 dtsi from Linux

[U-Boot] [PATCH v2 1/2] ARM: dts: sun8i: Sync r40 dtsi from Linux

[Jagan Teki]

Sync sun8i-r40.dtsi changes from Linux with

Merge: a406778618d0 088345fc3553
Author: Stephen Rothwell <sfr@canb.auug.org.au>
Date:   Tue Apr 24 14:15:02 2018 +1000

    Merge branch 'akpm/master'

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
Changes for v2:
- none

 arch/arm/dts/sun8i-r40.dtsi               |  43 +++++++
 include/dt-bindings/clock/sun8i-r40-ccu.h | 187 ++++++++++++++++++++++++++++++
 include/dt-bindings/reset/sun8i-r40-ccu.h | 130 +++++++++++++++++++++
 3 files changed, 360 insertions(+)
 create mode 100644 include/dt-bindings/clock/sun8i-r40-ccu.h
 create mode 100644 include/dt-bindings/reset/sun8i-r40-ccu.h

diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi
index 48ec2e855a..0aa76a2f10 100644
--- a/arch/arm/dts/sun8i-r40.dtsi
+++ b/arch/arm/dts/sun8i-r40.dtsi
@@ -43,6 +43,8 @@
  */
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/sun8i-r40-ccu.h>
+#include <dt-bindings/reset/sun8i-r40-ccu.h>
 
 / {
 	#address-cells = <1>;
@@ -114,6 +116,39 @@
 		#size-cells = <1>;
 		ranges;
 
+		nmi_intc: interrupt-controller at 1c00030 {
+			compatible = "allwinner,sun7i-a20-sc-nmi";
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			reg = <0x01c00030 0x0c>;
+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
+		mmc0: mmc at 1c0f000 {
+			compatible = "allwinner,sun8i-r40-mmc",
+				     "allwinner,sun50i-a64-mmc";
+			reg = <0x01c0f000 0x1000>;
+			clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
+			clock-names = "ahb", "mmc";
+			resets = <&ccu RST_BUS_MMC0>;
+			reset-names = "ahb";
+			pinctrl-0 = <&mmc0_pins>;
+			pinctrl-names = "default";
+			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		ccu: clock at 1c20000 {
+			compatible = "allwinner,sun8i-r40-ccu";
+			reg = <0x01c20000 0x400>;
+			clocks = <&osc24M>, <&osc32k>;
+			clock-names = "hosc", "losc";
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+		};
+
 		pio: pinctrl at 1c20800 {
 			compatible = "allwinner,sun8i-r40-pinctrl";
 			reg = <0x01c20800 0x400>;
@@ -132,6 +167,14 @@
 				bias-pull-up;
 			};
 
+			mmc0_pins: mmc0-pins {
+				pins = "PF0", "PF1", "PF2",
+				       "PF3", "PF4", "PF5";
+				function = "mmc0";
+				drive-strength = <30>;
+				bias-pull-up;
+			};
+
 			uart0_pb_pins: uart0_pb_pins {
 				pins = "PB22", "PB23";
 				function = "uart0";
diff --git a/include/dt-bindings/clock/sun8i-r40-ccu.h b/include/dt-bindings/clock/sun8i-r40-ccu.h
new file mode 100644
index 0000000000..4fa5f69fc2
--- /dev/null
+++ b/include/dt-bindings/clock/sun8i-r40-ccu.h
@@ -0,0 +1,187 @@
+/*
+ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _DT_BINDINGS_CLK_SUN8I_R40_H_
+#define _DT_BINDINGS_CLK_SUN8I_R40_H_
+
+#define CLK_CPU			24
+
+#define CLK_BUS_MIPI_DSI	29
+#define CLK_BUS_CE		30
+#define CLK_BUS_DMA		31
+#define CLK_BUS_MMC0		32
+#define CLK_BUS_MMC1		33
+#define CLK_BUS_MMC2		34
+#define CLK_BUS_MMC3		35
+#define CLK_BUS_NAND		36
+#define CLK_BUS_DRAM		37
+#define CLK_BUS_EMAC		38
+#define CLK_BUS_TS		39
+#define CLK_BUS_HSTIMER		40
+#define CLK_BUS_SPI0		41
+#define CLK_BUS_SPI1		42
+#define CLK_BUS_SPI2		43
+#define CLK_BUS_SPI3		44
+#define CLK_BUS_SATA		45
+#define CLK_BUS_OTG		46
+#define CLK_BUS_EHCI0		47
+#define CLK_BUS_EHCI1		48
+#define CLK_BUS_EHCI2		49
+#define CLK_BUS_OHCI0		50
+#define CLK_BUS_OHCI1		51
+#define CLK_BUS_OHCI2		52
+#define CLK_BUS_VE		53
+#define CLK_BUS_MP		54
+#define CLK_BUS_DEINTERLACE	55
+#define CLK_BUS_CSI0		56
+#define CLK_BUS_CSI1		57
+#define CLK_BUS_HDMI1		58
+#define CLK_BUS_HDMI0		59
+#define CLK_BUS_DE		60
+#define CLK_BUS_TVE0		61
+#define CLK_BUS_TVE1		62
+#define CLK_BUS_TVE_TOP		63
+#define CLK_BUS_GMAC		64
+#define CLK_BUS_GPU		65
+#define CLK_BUS_TVD0		66
+#define CLK_BUS_TVD1		67
+#define CLK_BUS_TVD2		68
+#define CLK_BUS_TVD3		69
+#define CLK_BUS_TVD_TOP		70
+#define CLK_BUS_TCON_LCD0	71
+#define CLK_BUS_TCON_LCD1	72
+#define CLK_BUS_TCON_TV0	73
+#define CLK_BUS_TCON_TV1	74
+#define CLK_BUS_TCON_TOP	75
+#define CLK_BUS_CODEC		76
+#define CLK_BUS_SPDIF		77
+#define CLK_BUS_AC97		78
+#define CLK_BUS_PIO		79
+#define CLK_BUS_IR0		80
+#define CLK_BUS_IR1		81
+#define CLK_BUS_THS		82
+#define CLK_BUS_KEYPAD		83
+#define CLK_BUS_I2S0		84
+#define CLK_BUS_I2S1		85
+#define CLK_BUS_I2S2		86
+#define CLK_BUS_I2C0		87
+#define CLK_BUS_I2C1		88
+#define CLK_BUS_I2C2		89
+#define CLK_BUS_I2C3		90
+#define CLK_BUS_CAN		91
+#define CLK_BUS_SCR		92
+#define CLK_BUS_PS20		93
+#define CLK_BUS_PS21		94
+#define CLK_BUS_I2C4		95
+#define CLK_BUS_UART0		96
+#define CLK_BUS_UART1		97
+#define CLK_BUS_UART2		98
+#define CLK_BUS_UART3		99
+#define CLK_BUS_UART4		100
+#define CLK_BUS_UART5		101
+#define CLK_BUS_UART6		102
+#define CLK_BUS_UART7		103
+#define CLK_BUS_DBG		104
+
+#define CLK_THS			105
+#define CLK_NAND		106
+#define CLK_MMC0		107
+#define CLK_MMC1		108
+#define CLK_MMC2		109
+#define CLK_MMC3		110
+#define CLK_TS			111
+#define CLK_CE			112
+#define CLK_SPI0		113
+#define CLK_SPI1		114
+#define CLK_SPI2		115
+#define CLK_SPI3		116
+#define CLK_I2S0		117
+#define CLK_I2S1		118
+#define CLK_I2S2		119
+#define CLK_AC97		120
+#define CLK_SPDIF		121
+#define CLK_KEYPAD		122
+#define CLK_SATA		123
+#define CLK_USB_PHY0		124
+#define CLK_USB_PHY1		125
+#define CLK_USB_PHY2		126
+#define CLK_USB_OHCI0		127
+#define CLK_USB_OHCI1		128
+#define CLK_USB_OHCI2		129
+#define CLK_IR0			130
+#define CLK_IR1			131
+
+#define CLK_DRAM_VE		133
+#define CLK_DRAM_CSI0		134
+#define CLK_DRAM_CSI1		135
+#define CLK_DRAM_TS		136
+#define CLK_DRAM_TVD		137
+#define CLK_DRAM_MP		138
+#define CLK_DRAM_DEINTERLACE	139
+#define CLK_DE			140
+#define CLK_MP			141
+#define CLK_TCON_LCD0		142
+#define CLK_TCON_LCD1		143
+#define CLK_TCON_TV0		144
+#define CLK_TCON_TV1		145
+#define CLK_DEINTERLACE		146
+#define CLK_CSI1_MCLK		147
+#define CLK_CSI_SCLK		148
+#define CLK_CSI0_MCLK		149
+#define CLK_VE			150
+#define CLK_CODEC		151
+#define CLK_AVS			152
+#define CLK_HDMI		153
+#define CLK_HDMI_SLOW		154
+
+#define CLK_DSI_DPHY		156
+#define CLK_TVE0		157
+#define CLK_TVE1		158
+#define CLK_TVD0		159
+#define CLK_TVD1		160
+#define CLK_TVD2		161
+#define CLK_TVD3		162
+#define CLK_GPU			163
+#define CLK_OUTA		164
+#define CLK_OUTB		165
+
+#endif /* _DT_BINDINGS_CLK_SUN8I_R40_H_ */
diff --git a/include/dt-bindings/reset/sun8i-r40-ccu.h b/include/dt-bindings/reset/sun8i-r40-ccu.h
new file mode 100644
index 0000000000..c5ebcf6672
--- /dev/null
+++ b/include/dt-bindings/reset/sun8i-r40-ccu.h
@@ -0,0 +1,130 @@
+/*
+ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _DT_BINDINGS_RST_SUN8I_R40_H_
+#define _DT_BINDINGS_RST_SUN8I_R40_H_
+
+#define RST_USB_PHY0		0
+#define RST_USB_PHY1		1
+#define RST_USB_PHY2		2
+
+#define RST_DRAM		3
+#define RST_MBUS		4
+
+#define RST_BUS_MIPI_DSI	5
+#define RST_BUS_CE		6
+#define RST_BUS_DMA		7
+#define RST_BUS_MMC0		8
+#define RST_BUS_MMC1		9
+#define RST_BUS_MMC2		10
+#define RST_BUS_MMC3		11
+#define RST_BUS_NAND		12
+#define RST_BUS_DRAM		13
+#define RST_BUS_EMAC		14
+#define RST_BUS_TS		15
+#define RST_BUS_HSTIMER		16
+#define RST_BUS_SPI0		17
+#define RST_BUS_SPI1		18
+#define RST_BUS_SPI2		19
+#define RST_BUS_SPI3		20
+#define RST_BUS_SATA		21
+#define RST_BUS_OTG		22
+#define RST_BUS_EHCI0		23
+#define RST_BUS_EHCI1		24
+#define RST_BUS_EHCI2		25
+#define RST_BUS_OHCI0		26
+#define RST_BUS_OHCI1		27
+#define RST_BUS_OHCI2		28
+#define RST_BUS_VE		29
+#define RST_BUS_MP		30
+#define RST_BUS_DEINTERLACE	31
+#define RST_BUS_CSI0		32
+#define RST_BUS_CSI1		33
+#define RST_BUS_HDMI0		34
+#define RST_BUS_HDMI1		35
+#define RST_BUS_DE		36
+#define RST_BUS_TVE0		37
+#define RST_BUS_TVE1		38
+#define RST_BUS_TVE_TOP		39
+#define RST_BUS_GMAC		40
+#define RST_BUS_GPU		41
+#define RST_BUS_TVD0		42
+#define RST_BUS_TVD1		43
+#define RST_BUS_TVD2		44
+#define RST_BUS_TVD3		45
+#define RST_BUS_TVD_TOP		46
+#define RST_BUS_TCON_LCD0	47
+#define RST_BUS_TCON_LCD1	48
+#define RST_BUS_TCON_TV0	49
+#define RST_BUS_TCON_TV1	50
+#define RST_BUS_TCON_TOP	51
+#define RST_BUS_DBG		52
+#define RST_BUS_LVDS		53
+#define RST_BUS_CODEC		54
+#define RST_BUS_SPDIF		55
+#define RST_BUS_AC97		56
+#define RST_BUS_IR0		57
+#define RST_BUS_IR1		58
+#define RST_BUS_THS		59
+#define RST_BUS_KEYPAD		60
+#define RST_BUS_I2S0		61
+#define RST_BUS_I2S1		62
+#define RST_BUS_I2S2		63
+#define RST_BUS_I2C0		64
+#define RST_BUS_I2C1		65
+#define RST_BUS_I2C2		66
+#define RST_BUS_I2C3		67
+#define RST_BUS_CAN		68
+#define RST_BUS_SCR		69
+#define RST_BUS_PS20		70
+#define RST_BUS_PS21		71
+#define RST_BUS_I2C4		72
+#define RST_BUS_UART0		73
+#define RST_BUS_UART1		74
+#define RST_BUS_UART2		75
+#define RST_BUS_UART3		76
+#define RST_BUS_UART4		77
+#define RST_BUS_UART5		78
+#define RST_BUS_UART6		79
+#define RST_BUS_UART7		80
+
+#endif /* _DT_BINDINGS_RST_SUN8I_R40_H_ */
-- 
2.14.3

[U-Boot] [PATCH v2 2/2] board: sunxi: sun8i-v4: Add Bananapi M2 Berry support

[Jagan Teki]

Banana Pi BPI-M2 Berry is a quad-core mini single board computer
built with Allwinner V40 SoC. It features
- Quad Core ARM Cortex A7 CPU V40
- 1GB of RAM .
- microSD/SATA port..
- onboard WiFi and BT
- 4 USB A 2.0 ports
- 1 USB OTG port
- 1 HDMI port
- 1 audio jack
- DC power port

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
Changes for v2:
- Reused R40 configs for V40 SOC

 arch/arm/dts/Makefile                        |   3 +-
 arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts | 132 +++++++++++++++++++++++++++
 board/sunxi/MAINTAINERS                      |   5 +
 configs/bananapi_m2_berry_defconfig          |  14 +++
 4 files changed, 153 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
 create mode 100644 configs/bananapi_m2_berry_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index ac7667b1e8..ab0b2568ea 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -366,7 +366,8 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
 	sun8i-h3-nanopi-neo.dtb \
 	sun8i-h3-nanopi-neo-air.dtb
 dtb-$(CONFIG_MACH_SUN8I_R40) += \
-	sun8i-r40-bananapi-m2-ultra.dtb
+	sun8i-r40-bananapi-m2-ultra.dtb \
+	sun8i-v40-bananapi-m2-berry.dtb
 dtb-$(CONFIG_MACH_SUN8I_V3S) += \
 	sun8i-v3s-licheepi-zero.dtb
 dtb-$(CONFIG_MACH_SUN50I_H5) += \
diff --git a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
new file mode 100644
index 0000000000..193d9b29ec
--- /dev/null
+++ b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
@@ -0,0 +1,132 @@
+/*
+ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-r40.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	model = "Banana Pi M2 Berry";
+	compatible = "sinovoip,bpi-m2-berry", "allwinner,sun8i-r40";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&i2c0 {
+	status = "okay";
+
+	axp22x: pmic at 68 {
+		compatible = "x-powers,axp221";
+		reg = <0x34>;
+		interrupt-parent = <&nmi_intc>;
+		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+	};
+};
+
+#include "axp22x.dtsi"
+
+&reg_aldo3 {
+	regulator-always-on;
+	regulator-min-microvolt = <2700000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-name = "avcc";
+};
+
+&reg_dcdc1 {
+	regulator-always-on;
+	regulator-min-microvolt = <3000000>;
+	regulator-max-microvolt = <3000000>;
+	regulator-name = "vcc-3v0";
+};
+
+&reg_dcdc2 {
+	regulator-always-on;
+	regulator-min-microvolt = <1000000>;
+	regulator-max-microvolt = <1300000>;
+	regulator-name = "vdd-cpu";
+};
+
+&reg_dcdc3 {
+	regulator-always-on;
+	regulator-min-microvolt = <1000000>;
+	regulator-max-microvolt = <1300000>;
+	regulator-name = "vdd-sys";
+};
+
+&reg_dcdc5 {
+	regulator-always-on;
+	regulator-min-microvolt = <1500000>;
+	regulator-max-microvolt = <1500000>;
+	regulator-name = "vcc-dram";
+};
+
+&reg_dldo1 {
+	regulator-min-microvolt = <1800000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-name = "vcc-wifi-io";
+};
+
+&reg_dldo2 {
+	regulator-min-microvolt = <3300000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-name = "vcc-wifi";
+};
+
+&mmc0 {
+	vmmc-supply = <&reg_dcdc1>;
+	bus-width = <4>;
+	cd-gpios = <&pio 7 13 GPIO_ACTIVE_LOW>; /* PH13 */
+	status = "okay";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pb_pins>;
+	status = "okay";
+};
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index 6dd48c0265..5d31bcbdcd 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -126,6 +126,11 @@ M:	Jagan Teki <jagan@amarulasolutions.com>
 S:	Maintained
 F:	configs/bananapi_m1_plus_defconfig
 
+BANANAPI M2 BERRY
+M:	Jagan Teki <jagan@amarulasolutions.com>
+S:	Maintained
+F:	configs/bananapi_m2_berry_defconfig
+
 BANANAPI M2 ULTRA BOARD
 M:	Chen-Yu Tsai <wens@csie.org>
 S:	Maintained
diff --git a/configs/bananapi_m2_berry_defconfig b/configs/bananapi_m2_berry_defconfig
new file mode 100644
index 0000000000..9d75108d04
--- /dev/null
+++ b/configs/bananapi_m2_berry_defconfig
@@ -0,0 +1,14 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_SPL=y
+CONFIG_MACH_SUN8I_R40=y
+CONFIG_DRAM_CLK=576
+CONFIG_DRAM_ZQ=3881979
+CONFIG_DRAM_ODT_EN=y
+CONFIG_MMC0_CD_PIN="PH13"
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-v40-bananapi-m2-berry"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL_I2C_SUPPORT=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_AXP_DLDO4_VOLT=2500
+CONFIG_AXP_ELDO3_VOLT=1200
-- 
2.14.3

[U-Boot] [PATCH v2 2/2] board: sunxi: sun8i-v4: Add Bananapi M2 Berry support

[Maxime Ripard]

On Fri, Apr 27, 2018 at 05:33:42PM +0530, Jagan Teki wrote:
> Banana Pi BPI-M2 Berry is a quad-core mini single board computer
> built with Allwinner V40 SoC. It features
> - Quad Core ARM Cortex A7 CPU V40
> - 1GB of RAM .
> - microSD/SATA port..
> - onboard WiFi and BT
> - 4 USB A 2.0 ports
> - 1 USB OTG port
> - 1 HDMI port
> - 1 audio jack
> - DC power port
> 
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

There's a typo in your commit title, it should be v40 and not
v4. Otherwise it looks good,
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

for both patches, thanks!
Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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[U-Boot] [PATCH v2 2/2] board: sunxi: sun8i-v4: Add Bananapi M2 Berry support

[Jagan Teki]

On Wed, May 2, 2018 at 2:46 PM, Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> On Fri, Apr 27, 2018 at 05:33:42PM +0530, Jagan Teki wrote:
>> Banana Pi BPI-M2 Berry is a quad-core mini single board computer
>> built with Allwinner V40 SoC. It features
>> - Quad Core ARM Cortex A7 CPU V40
>> - 1GB of RAM .
>> - microSD/SATA port..
>> - onboard WiFi and BT
>> - 4 USB A 2.0 ports
>> - 1 USB OTG port
>> - 1 HDMI port
>> - 1 audio jack
>> - DC power port
>>
>> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
>
> There's a typo in your commit title, it should be v40 and not
> v4. Otherwise it looks good,
> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

Fixed and Applied to u-boot-sunxi/master

[U-Boot] [PATCH v2 1/2] ARM: dts: sun8i: Sync r40 dtsi from Linux

[Jagan Teki]

On Fri, Apr 27, 2018 at 5:33 PM, Jagan Teki <jagan@amarulasolutions.com> wrote:
> Sync sun8i-r40.dtsi changes from Linux with
>
> Merge: a406778618d0 088345fc3553
> Author: Stephen Rothwell <sfr@canb.auug.org.au>
> Date:   Tue Apr 24 14:15:02 2018 +1000
>
>     Merge branch 'akpm/master'
>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---

Applied to u-boot-sunxi/master

[U-Boot] [PATCH v2 2/2] board: sunxi: sun8i-v40: Add Bananapi M2 Berry support

[Alan Beard]

Hi Maxine and team,

I want to run Fedora linux, from here:
https://dl.fedoraproject.org/pub/fedora/linux/development/rawhide/Spins/armhfp
/images/

on the Banana Pi BPI-M2 Berry. (works fine on a Banana Pi original)

I've waited six months for the patches to filter through to the Fedora team 
but, so far nothing.

I've downloaded the code from the denx.de website but I cannot see a way to
just generate the u-boot-sunxi-with-spl.bin file for the Berry.
There is a u-boot-sunxi-with-spl.bin file in the Fedora distribution for
the Berry but it doesn't work.
This also doesn't work:
https://github.com/BPI-SINOVOIP/BPI-Mainline-uboot.git
I suspect they check the chip-id and barf if it's not 0x1701 the R40.

I chose the Banana Pi BPI-M2 Berry over the Ultra because I didn't need
the extra ram or other bells and whistles. I want to embed a BPi Berry in
an amateur radio project where I need a board with a SATA port for an SSD.

Keep up the good work.

Alan

On Wed, 2 May 2018 11:16:30 +0200, Maxime Ripard wrote
> On Fri, Apr 27, 2018 at 05:33:42PM +0530, Jagan Teki wrote:
> > Banana Pi BPI-M2 Berry is a quad-core mini single board computer
> > built with Allwinner V40 SoC. It features
> > - Quad Core ARM Cortex A7 CPU V40
> > - 1GB of RAM .
> > - microSD/SATA port..
> > - onboard WiFi and BT
> > - 4 USB A 2.0 ports
> > - 1 USB OTG port
> > - 1 HDMI port
> > - 1 audio jack
> > - DC power port
> > 
> > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> 
> There's a typo in your commit title, it should be v40 and not
> v4. Otherwise it looks good,
> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
> 
> for both patches, thanks!
> Maxime
> 
> -- 
> Maxime Ripard, Bootlin (formerly Free Electrons)
> Embedded Linux and Kernel engineering
> https://bootlin.com


Alan

Evil flourishes when good men do nothing.
Consider the Christmas child.
---------------------------------------------------------------------------
Alan Beard               Unix Support Technician from 1984 to today
70 Wedmore Rd.           Sun Solaris, AIX, HP/UX, Linux, SCO, MIPS
Emu Heights N.S.W. 2750  Routers, terminal servers, printers, terminals etc..
+61 2 47353013 (h)       Support Programming, shell scripting, "C", assembler
0414 353013 (mobile)     After uni, electronics tech

[U-Boot] [PATCH v2 2/2] board: sunxi: sun8i-v40: Add Bananapi M2 Berry support

[Jagan Teki]

On Wed, Aug 15, 2018 at 3:22 AM, Alan Beard <beardal@unixservice.com.au> wrote:
> Hi Maxine and team,
>
> I want to run Fedora linux, from here:
> https://dl.fedoraproject.org/pub/fedora/linux/development/rawhide/Spins/armhfp
> /images/
>
> on the Banana Pi BPI-M2 Berry. (works fine on a Banana Pi original)
>
> I've waited six months for the patches to filter through to the Fedora team
> but, so far nothing.
>
> I've downloaded the code from the denx.de website but I cannot see a way to
> just generate the u-boot-sunxi-with-spl.bin file for the Berry.
> There is a u-boot-sunxi-with-spl.bin file in the Fedora distribution for
> the Berry but it doesn't work.
> This also doesn't work:
> https://github.com/BPI-SINOVOIP/BPI-Mainline-uboot.git
> I suspect they check the chip-id and barf if it's not 0x1701 the R40.
>
> I chose the Banana Pi BPI-M2 Berry over the Ultra because I didn't need
> the extra ram or other bells and whistles. I want to embed a BPi Berry in
> an amateur radio project where I need a board with a SATA port for an SSD.

I'm not clear what exactly you are asking?

u-boot-sunxi-with-spl.bin is by default created with u-boot build and
SATA support is enabled recently on commit:
dddc4b4af3a444ef78d1a3d983aae71179a0d92c