[PATCH] drm/i915: configure the transcoder clocks before touching pipeconf on HSW+

[PATCH] drm/i915: configure the transcoder clocks before touching pipeconf on HSW+

[Paulo Zanoni]

For all platforms that run haswell_crtc_enable, our spec tells us to
configure the transcoder clocks before it tells us to set pipeconf and
the other pipe/transcoder/plane registers.

For some reason we've been able to get away with doing what we were
doing until now, but starting from Icelake, we get machine hangs if we
try to touch the pipe/transcoder registers without having the clocks
configured.

So this patch changes all the relevant platforms to call
intel_ddi_enable_pipe_clock at the point we're supposed to, according
to the spec.

It seems there is a way to work around this problem on ICL with some
chicken bit, but I still couldn't find which one it is, and it's
better if we just do the right thing here.

Cc: Arthur J Runyan <arthur.j.runyan@intel.com>
Cc: James Ausmus <james.ausmus@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Luckily our CI system should be in a spot where it is able to tell us
whether this patch is good with high confidence. I haven't tested it
on every affected platform.

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 48576ea2d36c..c93aed2ec16d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5578,8 +5578,11 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
 				     &intel_crtc->config->fdi_m_n, NULL);
 	}
 
-	if (!transcoder_is_dsi(cpu_transcoder))
+	if (!transcoder_is_dsi(cpu_transcoder)) {
+		intel_ddi_enable_pipe_clock(pipe_config);
+
 		haswell_set_pipeconf(crtc);
+	}
 
 	haswell_set_pipemisc(crtc);
 
@@ -5589,9 +5592,6 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
 
 	intel_encoders_pre_enable(crtc, pipe_config, old_state);
 
-	if (!transcoder_is_dsi(cpu_transcoder))
-		intel_ddi_enable_pipe_clock(pipe_config);
-
 	/* Display WA #1180: WaDisableScalarClockGating: glk, cnl */
 	psl_clkgate_wa = (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) &&
 			 intel_crtc->config->pch_pfit.enabled;
-- 
2.14.3

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.BAT: success for drm/i915: configure the transcoder clocks before touching pipeconf on HSW+

[Patchwork]

== Series Details ==

Series: drm/i915: configure the transcoder clocks before touching pipeconf on HSW+
URL   : https://patchwork.freedesktop.org/series/42436/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4112 -> Patchwork_8840 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/42436/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_8840 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
      fi-ivb-3520m:       PASS -> DMESG-WARN (fdo#106084)

    
  fdo#106084 https://bugs.freedesktop.org/show_bug.cgi?id=106084


== Participating hosts (39 -> 22) ==

  Missing    (17): fi-hsw-4770r fi-kbl-7567u fi-ilk-m540 fi-bdw-5557u fi-skl-gvtdvm fi-skl-6770hq fi-bdw-gvtdvm fi-skl-guc fi-cnl-y3 fi-skl-6260u fi-cfl-8700k fi-kbl-7500u fi-ctg-p8600 fi-hsw-4770 fi-cfl-s3 fi-skl-6700hq fi-skl-6700k2 


== Build changes ==

    * Linux: CI_DRM_4112 -> Patchwork_8840

  CI_DRM_4112: 423a00794c9d9610a71d8a02cd3bc17c6fe5fae1 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4452: 29ae12bd764e3b1876356e7628a32192b4ec9066 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_8840: 87aad90c198c1fd70a6582f5fd839a276da0ddff @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4452: 04a2952c5b3782eb03cb136bb16d89daaf243f14 @ git://anongit.freedesktop.org/piglit


== Linux commits ==

87aad90c198c drm/i915: configure the transcoder clocks before touching pipeconf on HSW+

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8840/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.BAT: success for drm/i915: configure the transcoder clocks before touching pipeconf on HSW+

[Patchwork]

== Series Details ==

Series: drm/i915: configure the transcoder clocks before touching pipeconf on HSW+
URL   : https://patchwork.freedesktop.org/series/42436/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4112 -> Patchwork_8842 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/42436/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_8842 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
      fi-ivb-3520m:       PASS -> DMESG-WARN (fdo#106084)
      fi-cnl-psr:         PASS -> DMESG-WARN (fdo#104951)

    
  fdo#104951 https://bugs.freedesktop.org/show_bug.cgi?id=104951
  fdo#106084 https://bugs.freedesktop.org/show_bug.cgi?id=106084


== Participating hosts (39 -> 22) ==

  Missing    (17): fi-hsw-4770r fi-kbl-7567u fi-ilk-m540 fi-bdw-5557u fi-skl-gvtdvm fi-skl-6770hq fi-bdw-gvtdvm fi-skl-guc fi-cnl-y3 fi-skl-6260u fi-cfl-8700k fi-kbl-7500u fi-ctg-p8600 fi-hsw-4770 fi-cfl-s3 fi-skl-6700hq fi-skl-6700k2 


== Build changes ==

    * Linux: CI_DRM_4112 -> Patchwork_8842

  CI_DRM_4112: 423a00794c9d9610a71d8a02cd3bc17c6fe5fae1 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4452: 29ae12bd764e3b1876356e7628a32192b4ec9066 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_8842: 96dd83b16e1d41740c95f80905d941799befd6c8 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4452: 04a2952c5b3782eb03cb136bb16d89daaf243f14 @ git://anongit.freedesktop.org/piglit


== Linux commits ==

96dd83b16e1d drm/i915: configure the transcoder clocks before touching pipeconf on HSW+

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8842/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.BAT: success for drm/i915: configure the transcoder clocks before touching pipeconf on HSW+

[Patchwork]

== Series Details ==

Series: drm/i915: configure the transcoder clocks before touching pipeconf on HSW+
URL   : https://patchwork.freedesktop.org/series/42436/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4112 -> Patchwork_8843 =

== Summary - WARNING ==

  Minor unknown changes coming with Patchwork_8843 need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_8843, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/42436/revisions/1/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_8843:

  === IGT changes ===

    ==== Warnings ====

    igt@gem_exec_gttfill@basic:
      fi-pnv-d510:        PASS -> SKIP

    
== Known issues ==

  Here are the changes found in Patchwork_8843 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
      fi-ivb-3520m:       PASS -> DMESG-WARN (fdo#106084)

    
    ==== Possible fixes ====

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      fi-ivb-3520m:       DMESG-WARN (fdo#106084) -> PASS

    
  fdo#106084 https://bugs.freedesktop.org/show_bug.cgi?id=106084


== Participating hosts (39 -> 22) ==

  Missing    (17): fi-hsw-4770r fi-kbl-7567u fi-ilk-m540 fi-bdw-5557u fi-skl-gvtdvm fi-skl-6770hq fi-bdw-gvtdvm fi-skl-guc fi-cnl-y3 fi-skl-6260u fi-cfl-8700k fi-kbl-7500u fi-ctg-p8600 fi-hsw-4770 fi-cfl-s3 fi-skl-6700hq fi-skl-6700k2 


== Build changes ==

    * Linux: CI_DRM_4112 -> Patchwork_8843

  CI_DRM_4112: 423a00794c9d9610a71d8a02cd3bc17c6fe5fae1 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4452: 29ae12bd764e3b1876356e7628a32192b4ec9066 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_8843: d2ffa705b37a7cd5dd34563dc5f0cf81198ce33d @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4452: 04a2952c5b3782eb03cb136bb16d89daaf243f14 @ git://anongit.freedesktop.org/piglit


== Linux commits ==

d2ffa705b37a drm/i915: configure the transcoder clocks before touching pipeconf on HSW+

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8843/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.IGT: success for drm/i915: configure the transcoder clocks before touching pipeconf on HSW+

[Patchwork]

== Series Details ==

Series: drm/i915: configure the transcoder clocks before touching pipeconf on HSW+
URL   : https://patchwork.freedesktop.org/series/42436/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4112_full -> Patchwork_8840_full =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/42436/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_8840_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_flip@absolute-wf_vblank-interruptible:
      shard-glk:          PASS -> FAIL (fdo#106087)

    igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible:
      shard-glk:          PASS -> FAIL (fdo#100368)

    igt@prime_vgem@basic-fence-flip:
      shard-glk:          PASS -> FAIL (fdo#104008)

    
    ==== Possible fixes ====

    igt@kms_flip@flip-vs-expired-vblank:
      shard-glk:          FAIL (fdo#105707) -> PASS

    igt@kms_flip@flip-vs-expired-vblank-interruptible:
      shard-glk:          FAIL (fdo#105363, fdo#102887) -> PASS

    igt@kms_flip@plain-flip-fb-recreate-interruptible:
      shard-glk:          FAIL (fdo#100368) -> PASS

    
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
  fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
  fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
  fdo#105707 https://bugs.freedesktop.org/show_bug.cgi?id=105707
  fdo#106087 https://bugs.freedesktop.org/show_bug.cgi?id=106087


== Participating hosts (9 -> 6) ==

  Missing    (3): shard-glkb shard-hsw shard-kbl 


== Build changes ==

    * Linux: CI_DRM_4112 -> Patchwork_8840

  CI_DRM_4112: 423a00794c9d9610a71d8a02cd3bc17c6fe5fae1 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4452: 29ae12bd764e3b1876356e7628a32192b4ec9066 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_8840: 87aad90c198c1fd70a6582f5fd839a276da0ddff @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4452: 04a2952c5b3782eb03cb136bb16d89daaf243f14 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8840/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.IGT: success for drm/i915: configure the transcoder clocks before touching pipeconf on HSW+

[Patchwork]

== Series Details ==

Series: drm/i915: configure the transcoder clocks before touching pipeconf on HSW+
URL   : https://patchwork.freedesktop.org/series/42436/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4112_full -> Patchwork_8842_full =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/42436/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_8842_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_cursor_crc@cursor-128x128-dpms:
      shard-apl:          PASS -> FAIL (fdo#104645, fdo#103232)

    igt@kms_flip@absolute-wf_vblank-interruptible:
      shard-glk:          PASS -> FAIL (fdo#106087)

    igt@kms_flip@plain-flip-fb-recreate:
      shard-glk:          PASS -> FAIL (fdo#100368) +1

    igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-cpu:
      shard-apl:          PASS -> FAIL (fdo#103167)

    igt@perf_pmu@busy-check-all-vcs0:
      shard-snb:          PASS -> FAIL (fdo#105106)

    
    ==== Possible fixes ====

    igt@kms_flip@flip-vs-expired-vblank:
      shard-glk:          FAIL (fdo#105707) -> PASS

    igt@kms_flip@flip-vs-expired-vblank-interruptible:
      shard-glk:          FAIL (fdo#102887, fdo#105363) -> PASS

    igt@kms_flip@plain-flip-fb-recreate-interruptible:
      shard-glk:          FAIL (fdo#100368) -> PASS +2

    
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
  fdo#104645 https://bugs.freedesktop.org/show_bug.cgi?id=104645
  fdo#105106 https://bugs.freedesktop.org/show_bug.cgi?id=105106
  fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
  fdo#105707 https://bugs.freedesktop.org/show_bug.cgi?id=105707
  fdo#106087 https://bugs.freedesktop.org/show_bug.cgi?id=106087


== Participating hosts (9 -> 5) ==

  Missing    (4): shard-glkb pig-glk-j4005 shard-hsw shard-kbl 


== Build changes ==

    * Linux: CI_DRM_4112 -> Patchwork_8842

  CI_DRM_4112: 423a00794c9d9610a71d8a02cd3bc17c6fe5fae1 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4452: 29ae12bd764e3b1876356e7628a32192b4ec9066 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_8842: 96dd83b16e1d41740c95f80905d941799befd6c8 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4452: 04a2952c5b3782eb03cb136bb16d89daaf243f14 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8842/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.IGT: success for drm/i915: configure the transcoder clocks before touching pipeconf on HSW+

[Patchwork]

== Series Details ==

Series: drm/i915: configure the transcoder clocks before touching pipeconf on HSW+
URL   : https://patchwork.freedesktop.org/series/42436/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4112_full -> Patchwork_8843_full =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/42436/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_8843_full that come from known issues:

  === IGT changes ===

    ==== Possible fixes ====

    igt@kms_flip@flip-vs-expired-vblank:
      shard-glk:          FAIL (fdo#105707) -> PASS

    igt@kms_flip@flip-vs-expired-vblank-interruptible:
      shard-glk:          FAIL (fdo#105363, fdo#102887) -> PASS

    igt@kms_flip@plain-flip-fb-recreate-interruptible:
      shard-glk:          FAIL (fdo#100368) -> PASS +1

    igt@kms_setmode@basic:
      shard-glk:          FAIL (fdo#99912) -> PASS

    igt@kms_sysfs_edid_timing:
      shard-apl:          WARN (fdo#100047) -> PASS

    
  fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
  fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
  fdo#105707 https://bugs.freedesktop.org/show_bug.cgi?id=105707
  fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912


== Participating hosts (9 -> 6) ==

  Missing    (3): shard-glkb shard-hsw shard-kbl 


== Build changes ==

    * Linux: CI_DRM_4112 -> Patchwork_8843

  CI_DRM_4112: 423a00794c9d9610a71d8a02cd3bc17c6fe5fae1 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4452: 29ae12bd764e3b1876356e7628a32192b4ec9066 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_8843: d2ffa705b37a7cd5dd34563dc5f0cf81198ce33d @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4452: 04a2952c5b3782eb03cb136bb16d89daaf243f14 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8843/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: configure the transcoder clocks before touching pipeconf on HSW+

[Ville Syrjälä]

On Fri, Apr 27, 2018 at 04:12:08PM -0700, Paulo Zanoni wrote:
> For all platforms that run haswell_crtc_enable, our spec tells us to
> configure the transcoder clocks before it tells us to set pipeconf and
> the other pipe/transcoder/plane registers.
> 
> For some reason we've been able to get away with doing what we were
> doing until now, but starting from Icelake, we get machine hangs if we
> try to touch the pipe/transcoder registers without having the clocks
> configured.
> 
> So this patch changes all the relevant platforms to call
> intel_ddi_enable_pipe_clock at the point we're supposed to, according
> to the spec.

I don't think this really matches the spec. You're now enabling the
clock before configuring the port stuff and link training. So AFAICS
intel_ddi_enable_pipe_clock() seems to be in the correct place, but
we're just configuring all the pipe/transcoder/etc. stuff way too
early.

> 
> It seems there is a way to work around this problem on ICL with some
> chicken bit, but I still couldn't find which one it is, and it's
> better if we just do the right thing here.
> 
> Cc: Arthur J Runyan <arthur.j.runyan@intel.com>
> Cc: James Ausmus <james.ausmus@intel.com>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> Luckily our CI system should be in a spot where it is able to tell us
> whether this patch is good with high confidence. I haven't tested it
> on every affected platform.
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 48576ea2d36c..c93aed2ec16d 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5578,8 +5578,11 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
>  				     &intel_crtc->config->fdi_m_n, NULL);
>  	}
>  
> -	if (!transcoder_is_dsi(cpu_transcoder))
> +	if (!transcoder_is_dsi(cpu_transcoder)) {
> +		intel_ddi_enable_pipe_clock(pipe_config);
> +
>  		haswell_set_pipeconf(crtc);
> +	}
>  
>  	haswell_set_pipemisc(crtc);
>  
> @@ -5589,9 +5592,6 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
>  
>  	intel_encoders_pre_enable(crtc, pipe_config, old_state);
>  
> -	if (!transcoder_is_dsi(cpu_transcoder))
> -		intel_ddi_enable_pipe_clock(pipe_config);
> -
>  	/* Display WA #1180: WaDisableScalarClockGating: glk, cnl */
>  	psl_clkgate_wa = (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) &&
>  			 intel_crtc->config->pch_pfit.enabled;
> -- 
> 2.14.3
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: configure the transcoder clocks before touching pipeconf on HSW+

[Paulo Zanoni]

Em Seg, 2018-04-30 às 21:12 +0300, Ville Syrjälä escreveu:
> On Fri, Apr 27, 2018 at 04:12:08PM -0700, Paulo Zanoni wrote:
> > For all platforms that run haswell_crtc_enable, our spec tells us
> > to
> > configure the transcoder clocks before it tells us to set pipeconf
> > and
> > the other pipe/transcoder/plane registers.
> > 
> > For some reason we've been able to get away with doing what we were
> > doing until now, but starting from Icelake, we get machine hangs if
> > we
> > try to touch the pipe/transcoder registers without having the
> > clocks
> > configured.
> > 
> > So this patch changes all the relevant platforms to call
> > intel_ddi_enable_pipe_clock at the point we're supposed to,
> > according
> > to the spec.
> 
> I don't think this really matches the spec. You're now enabling the
> clock before configuring the port stuff and link training. So AFAICS
> intel_ddi_enable_pipe_clock() seems to be in the correct place, but
> we're just configuring all the pipe/transcoder/etc. stuff way too
> early.

You're right, I missed the link training part, it needs to come before.

But anyway, moving enable_pipe_clock() + link_training ()up is the same
as moving all the pipe/transcoder/etc stuff down, the only difference
being when we set intel_crtc->active. I'll write a second version.

> 
> > 
> > It seems there is a way to work around this problem on ICL with
> > some
> > chicken bit, but I still couldn't find which one it is, and it's
> > better if we just do the right thing here.

We got the info we wanted and now know how to work around the problem,
but I still think we should go for the solution where we program the
hardware in the order it expects to be programmed.

Or we could do both: program correctly *and* enable the chicken bits.

Thanks,
Paulo

> > 
> > Cc: Arthur J Runyan <arthur.j.runyan@intel.com>
> > Cc: James Ausmus <james.ausmus@intel.com>
> > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_display.c | 8 ++++----
> >  1 file changed, 4 insertions(+), 4 deletions(-)
> > 
> > Luckily our CI system should be in a spot where it is able to tell
> > us
> > whether this patch is good with high confidence. I haven't tested
> > it
> > on every affected platform.
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c
> > index 48576ea2d36c..c93aed2ec16d 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -5578,8 +5578,11 @@ static void haswell_crtc_enable(struct
> > intel_crtc_state *pipe_config,
> >  				     &intel_crtc->config->fdi_m_n, 
> > NULL);
> >  	}
> >  
> > -	if (!transcoder_is_dsi(cpu_transcoder))
> > +	if (!transcoder_is_dsi(cpu_transcoder)) {
> > +		intel_ddi_enable_pipe_clock(pipe_config);
> > +
> >  		haswell_set_pipeconf(crtc);
> > +	}
> >  
> >  	haswell_set_pipemisc(crtc);
> >  
> > @@ -5589,9 +5592,6 @@ static void haswell_crtc_enable(struct
> > intel_crtc_state *pipe_config,
> >  
> >  	intel_encoders_pre_enable(crtc, pipe_config, old_state);
> >  
> > -	if (!transcoder_is_dsi(cpu_transcoder))
> > -		intel_ddi_enable_pipe_clock(pipe_config);
> > -
> >  	/* Display WA #1180: WaDisableScalarClockGating: glk, cnl
> > */
> >  	psl_clkgate_wa = (IS_GEMINILAKE(dev_priv) ||
> > IS_CANNONLAKE(dev_priv)) &&
> >  			 intel_crtc->config->pch_pfit.enabled;
> > -- 
> > 2.14.3
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH] drm/i915: enable the pipe/transcoder/planes later on HSW+

[Paulo Zanoni]

For all platforms that run haswell_crtc_enable, our spec tells us to
configure the transcoder clocks and do link training before it tells
us to set pipeconf and the other pipe/transcoder/plane registers.

Starting from Icelake, we get machine hangs if we try to touch the
pipe/transcoder registers without having the clocks configured and not
having some chicken bits set. So this patch changes
haswell_crtc_enable() to issue the calls at the appropriate order
mandated by the spec.

While setting the appropriate chicken bits would also work here, it's
better if we actually program the hardware the way it is intended to
be programmed. And the chicken bit also has some theoretical downsides
that may or may not affect us. Also, correctly programming the
hardware does not prevent us from setting the chicken bits in a later
patch in case we decide to.

v2: Don't forget link training (Ville).

Cc: Arthur J Runyan <arthur.j.runyan@intel.com>
Cc: James Ausmus <james.ausmus@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

Again, I didn't test this patch on every affected platform. Let's see
what the CI system says about it.

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 1087358f6364..f566c9e56cf6 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5559,6 +5559,11 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
 	if (intel_crtc->config->shared_dpll)
 		intel_enable_shared_dpll(intel_crtc);
 
+	intel_encoders_pre_enable(crtc, pipe_config, old_state);
+
+	if (!transcoder_is_dsi(cpu_transcoder))
+		intel_ddi_enable_pipe_clock(pipe_config);
+
 	if (intel_crtc_has_dp_encoder(intel_crtc->config))
 		intel_dp_set_m_n(intel_crtc, M1_N1);
 
@@ -5587,11 +5592,6 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
 
 	intel_crtc->active = true;
 
-	intel_encoders_pre_enable(crtc, pipe_config, old_state);
-
-	if (!transcoder_is_dsi(cpu_transcoder))
-		intel_ddi_enable_pipe_clock(pipe_config);
-
 	/* Display WA #1180: WaDisableScalarClockGating: glk, cnl */
 	psl_clkgate_wa = (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) &&
 			 intel_crtc->config->pch_pfit.enabled;
-- 
2.14.3

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: enable the pipe/transcoder/planes later on HSW+

[Rodrigo Vivi]

On Wed, May 02, 2018 at 02:58:51PM -0700, Paulo Zanoni wrote:
> For all platforms that run haswell_crtc_enable, our spec tells us to
> configure the transcoder clocks and do link training before it tells
> us to set pipeconf and the other pipe/transcoder/plane registers.

oh! I remember this order years ago when trying to figure out where
to enable PSR... but I never noticed we weren't fully respecting it.

> 
> Starting from Icelake, we get machine hangs if we try to touch the
> pipe/transcoder registers without having the clocks configured and not
> having some chicken bits set. So this patch changes
> haswell_crtc_enable() to issue the calls at the appropriate order
> mandated by the spec.
> 
> While setting the appropriate chicken bits would also work here, it's
> better if we actually program the hardware the way it is intended to
> be programmed. And the chicken bit also has some theoretical downsides
> that may or may not affect us. Also, correctly programming the
> hardware does not prevent us from setting the chicken bits in a later
> patch in case we decide to.
> 
> v2: Don't forget link training (Ville).
> 
> Cc: Arthur J Runyan <arthur.j.runyan@intel.com>
> Cc: James Ausmus <james.ausmus@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

makes sense for me.... let's now just see CI is happy as well! ;)

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_display.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> Again, I didn't test this patch on every affected platform. Let's see
> what the CI system says about it.
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 1087358f6364..f566c9e56cf6 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5559,6 +5559,11 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
>  	if (intel_crtc->config->shared_dpll)
>  		intel_enable_shared_dpll(intel_crtc);
>  
> +	intel_encoders_pre_enable(crtc, pipe_config, old_state);
> +
> +	if (!transcoder_is_dsi(cpu_transcoder))
> +		intel_ddi_enable_pipe_clock(pipe_config);
> +
>  	if (intel_crtc_has_dp_encoder(intel_crtc->config))
>  		intel_dp_set_m_n(intel_crtc, M1_N1);
>  
> @@ -5587,11 +5592,6 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
>  
>  	intel_crtc->active = true;
>  
> -	intel_encoders_pre_enable(crtc, pipe_config, old_state);
> -
> -	if (!transcoder_is_dsi(cpu_transcoder))
> -		intel_ddi_enable_pipe_clock(pipe_config);
> -
>  	/* Display WA #1180: WaDisableScalarClockGating: glk, cnl */
>  	psl_clkgate_wa = (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) &&
>  			 intel_crtc->config->pch_pfit.enabled;
> -- 
> 2.14.3
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH] drm/i915: enable the pipe/transcoder/planes later on HSW+

[Manasi Navare]

On Wed, May 02, 2018 at 02:58:51PM -0700, Paulo Zanoni wrote:
> For all platforms that run haswell_crtc_enable, our spec tells us to
> configure the transcoder clocks and do link training before it tells
> us to set pipeconf and the other pipe/transcoder/plane registers.
> 
> Starting from Icelake, we get machine hangs if we try to touch the
> pipe/transcoder registers without having the clocks configured and not
> having some chicken bits set. So this patch changes
> haswell_crtc_enable() to issue the calls at the appropriate order
> mandated by the spec.
> 
> While setting the appropriate chicken bits would also work here, it's
> better if we actually program the hardware the way it is intended to
> be programmed. And the chicken bit also has some theoretical downsides
> that may or may not affect us. Also, correctly programming the
> hardware does not prevent us from setting the chicken bits in a later
> patch in case we decide to.
> 
> v2: Don't forget link training (Ville).
> 
> Cc: Arthur J Runyan <arthur.j.runyan@intel.com>
> Cc: James Ausmus <james.ausmus@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

yes I verified this against the display modset sequence mentioned
in the spec and this is correct order.

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_display.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> Again, I didn't test this patch on every affected platform. Let's see
> what the CI system says about it.
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 1087358f6364..f566c9e56cf6 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5559,6 +5559,11 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
>  	if (intel_crtc->config->shared_dpll)
>  		intel_enable_shared_dpll(intel_crtc);
>  
> +	intel_encoders_pre_enable(crtc, pipe_config, old_state);
> +
> +	if (!transcoder_is_dsi(cpu_transcoder))
> +		intel_ddi_enable_pipe_clock(pipe_config);
> +
>  	if (intel_crtc_has_dp_encoder(intel_crtc->config))
>  		intel_dp_set_m_n(intel_crtc, M1_N1);
>  
> @@ -5587,11 +5592,6 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
>  
>  	intel_crtc->active = true;
>  
> -	intel_encoders_pre_enable(crtc, pipe_config, old_state);
> -
> -	if (!transcoder_is_dsi(cpu_transcoder))
> -		intel_ddi_enable_pipe_clock(pipe_config);
> -
>  	/* Display WA #1180: WaDisableScalarClockGating: glk, cnl */
>  	psl_clkgate_wa = (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) &&
>  			 intel_crtc->config->pch_pfit.enabled;
> -- 
> 2.14.3
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.BAT: failure for drm/i915: configure the transcoder clocks before touching pipeconf on HSW+ (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: configure the transcoder clocks before touching pipeconf on HSW+ (rev2)
URL   : https://patchwork.freedesktop.org/series/42436/
State : failure

== Summary ==

= CI Bug Log - changes from CI_DRM_4125 -> Patchwork_8884 =

== Summary - FAILURE ==

  Serious unknown changes coming with Patchwork_8884 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_8884, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/42436/revisions/2/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_8884:

  === IGT changes ===

    ==== Possible regressions ====

    igt@kms_frontbuffer_tracking@basic:
      fi-hsw-peppy:       PASS -> DMESG-FAIL

    
== Known issues ==

  Here are the changes found in Patchwork_8884 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@gem_mmap_gtt@basic-small-bo-tiledx:
      fi-gdg-551:         PASS -> FAIL (fdo#102575)

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
      fi-bxt-dsi:         PASS -> INCOMPLETE (fdo#103927)

    
    ==== Possible fixes ====

    igt@kms_flip@basic-flip-vs-wf_vblank:
      fi-hsw-4200u:       FAIL (fdo#100368) -> PASS

    igt@kms_frontbuffer_tracking@basic:
      fi-hsw-4200u:       DMESG-FAIL (fdo#106103, fdo#102614) -> PASS

    igt@kms_pipe_crc_basic@hang-read-crc-pipe-b:
      fi-skl-6700k2:      FAIL (fdo#103191) -> PASS

    
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
  fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
  fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
  fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
  fdo#106103 https://bugs.freedesktop.org/show_bug.cgi?id=106103


== Participating hosts (39 -> 37) ==

  Additional (1): fi-byt-j1900 
  Missing    (3): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq 


== Build changes ==

    * Linux: CI_DRM_4125 -> Patchwork_8884

  CI_DRM_4125: c862a73270499cdd3d7c04c889e43303ae5f928e @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4456: 43761534c6482dc67b9c3d8eeecd425ef40b3c4c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_8884: 4a5b649073070534c7a0f7a1b828b2c3f7acd690 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4456: 30b992bdc047073e1fe99b1ac622f026618a8081 @ git://anongit.freedesktop.org/piglit


== Linux commits ==

4a5b64907307 drm/i915: enable the pipe/transcoder/planes later on HSW+

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8884/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.BAT: failure for drm/i915: configure the transcoder clocks before touching pipeconf on HSW+ (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: configure the transcoder clocks before touching pipeconf on HSW+ (rev2)
URL   : https://patchwork.freedesktop.org/series/42436/
State : failure

== Summary ==

= CI Bug Log - changes from CI_DRM_4126 -> Patchwork_8887 =

== Summary - FAILURE ==

  Serious unknown changes coming with Patchwork_8887 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_8887, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/42436/revisions/2/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_8887:

  === IGT changes ===

    ==== Possible regressions ====

    igt@drv_module_reload@basic-reload-inject:
      fi-bsw-n3050:       PASS -> DMESG-FAIL

    
    ==== Warnings ====

    igt@gem_exec_gttfill@basic:
      fi-pnv-d510:        PASS -> SKIP

    
== Known issues ==

  Here are the changes found in Patchwork_8887 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@gem_exec_suspend@basic-s3:
      fi-skl-guc:         PASS -> FAIL (fdo#104699)

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      fi-cnl-y3:          PASS -> DMESG-WARN (fdo#104951)

    
    ==== Possible fixes ====

    igt@debugfs_test@read_all_entries:
      fi-snb-2520m:       INCOMPLETE (fdo#103713) -> PASS

    igt@gem_mmap_gtt@basic-small-bo-tiledx:
      fi-gdg-551:         FAIL (fdo#102575) -> PASS

    igt@kms_frontbuffer_tracking@basic:
      fi-hsw-peppy:       DMESG-FAIL -> PASS

    
  fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
  fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
  fdo#104699 https://bugs.freedesktop.org/show_bug.cgi?id=104699
  fdo#104951 https://bugs.freedesktop.org/show_bug.cgi?id=104951


== Participating hosts (40 -> 37) ==

  Missing    (3): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq 


== Build changes ==

    * Linux: CI_DRM_4126 -> Patchwork_8887

  CI_DRM_4126: c49cbe0d1eb8d4c0ad477b8c7fdc5fbd82617674 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4457: 43761534c6482dc67b9c3d8eeecd425ef40b3c4c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_8887: e176465502803411e8e7bef4a7d8adf1e4206849 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4457: 69a0d9192f52570211df74a12265c5d2b0721542 @ git://anongit.freedesktop.org/piglit


== Linux commits ==

e17646550280 drm/i915: enable the pipe/transcoder/planes later on HSW+

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8887/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: ✗ Fi.CI.BAT: failure for drm/i915: configure the transcoder clocks before touching pipeconf on HSW+ (rev2)

[Paulo Zanoni]

Em Qua, 2018-05-02 às 22:23 +0000, Patchwork escreveu:
> == Series Details ==
> 
> Series: drm/i915: configure the transcoder clocks before touching
> pipeconf on HSW+ (rev2)
> URL   : https://patchwork.freedesktop.org/series/42436/
> State : failure
> 
> == Summary ==
> 
> = CI Bug Log - changes from CI_DRM_4125 -> Patchwork_8884 =
> 
> == Summary - FAILURE ==
> 
>   Serious unknown changes coming with Patchwork_8884 absolutely need
> to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the
> changes
>   introduced in Patchwork_8884, please notify your bug team

Can't the bot just give me the emails to cc?


>  to allow them
>   to document this new failure mode, which will reduce false
> positives in CI.

There were 2 runs for this series, both with different failures.

The FBC one is caused by a FIFO underrun (which looks like we never
properly fixed, and FBC is disabled on HSW anyway).

In the other email there's a possible PNV regresison which definitely
has nothing to do with this series. The other is a wedged GPU on module
reload, which also doesn't seem to be caused by us.

> 
>   External URL: https://patchwork.freedesktop.org/api/1.0/series/4243
> 6/revisions/2/mbox/
> 
> == Possible new issues ==
> 
>   Here are the unknown changes that may have been introduced in
> Patchwork_8884:
> 
>   === IGT changes ===
> 
>     ==== Possible regressions ====
> 
>     igt@kms_frontbuffer_tracking@basic:
>       fi-hsw-peppy:       PASS -> DMESG-FAIL
> 
>     
> == Known issues ==
> 
>   Here are the changes found in Patchwork_8884 that come from known
> issues:
> 
>   === IGT changes ===
> 
>     ==== Issues hit ====
> 
>     igt@gem_mmap_gtt@basic-small-bo-tiledx:
>       fi-gdg-551:         PASS -> FAIL (fdo#102575)
> 
>     igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
>       fi-bxt-dsi:         PASS -> INCOMPLETE (fdo#103927)
> 
>     
>     ==== Possible fixes ====
> 
>     igt@kms_flip@basic-flip-vs-wf_vblank:
>       fi-hsw-4200u:       FAIL (fdo#100368) -> PASS
> 
>     igt@kms_frontbuffer_tracking@basic:
>       fi-hsw-4200u:       DMESG-FAIL (fdo#106103, fdo#102614) -> PASS
> 
>     igt@kms_pipe_crc_basic@hang-read-crc-pipe-b:
>       fi-skl-6700k2:      FAIL (fdo#103191) -> PASS
> 
>     
>   fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
>   fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
>   fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
>   fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
>   fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
>   fdo#106103 https://bugs.freedesktop.org/show_bug.cgi?id=106103
> 
> 
> == Participating hosts (39 -> 37) ==
> 
>   Additional (1): fi-byt-j1900 
>   Missing    (3): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq 
> 
> 
> == Build changes ==
> 
>     * Linux: CI_DRM_4125 -> Patchwork_8884
> 
>   CI_DRM_4125: c862a73270499cdd3d7c04c889e43303ae5f928e @
> git://anongit.freedesktop.org/gfx-ci/linux
>   IGT_4456: 43761534c6482dc67b9c3d8eeecd425ef40b3c4c @
> git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
>   Patchwork_8884: 4a5b649073070534c7a0f7a1b828b2c3f7acd690 @
> git://anongit.freedesktop.org/gfx-ci/linux
>   piglit_4456: 30b992bdc047073e1fe99b1ac622f026618a8081 @
> git://anongit.freedesktop.org/piglit
> 
> 
> == Linux commits ==
> 
> 4a5b64907307 drm/i915: enable the pipe/transcoder/planes later on
> HSW+
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchw
> ork_8884/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.BAT: success for drm/i915: configure the transcoder clocks before touching pipeconf on HSW+ (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: configure the transcoder clocks before touching pipeconf on HSW+ (rev2)
URL   : https://patchwork.freedesktop.org/series/42436/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4151 -> Patchwork_8929 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/42436/revisions/2/mbox/

== Known issues ==

  Here are the changes found in Patchwork_8929 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@drv_module_reload@basic-reload:
      fi-bsw-n3050:       PASS -> DMESG-FAIL (fdo#106373)

    igt@gem_exec_suspend@basic-s4-devices:
      fi-skl-guc:         PASS -> FAIL (fdo#105900, fdo#104699) +1

    igt@kms_flip@basic-flip-vs-wf_vblank:
      fi-cnl-psr:         PASS -> FAIL (fdo#100368)

    igt@kms_frontbuffer_tracking@basic:
      fi-hsw-4200u:       PASS -> DMESG-FAIL (fdo#102614, fdo#106103)

    
    ==== Possible fixes ====

    igt@drv_module_reload@basic-no-display:
      fi-bsw-n3050:       DMESG-FAIL (fdo#106373) -> PASS

    igt@kms_chamelium@hdmi-hpd-fast:
      fi-kbl-7500u:       FAIL (fdo#103841, fdo#102672) -> SKIP

    igt@kms_flip@basic-flip-vs-wf_vblank:
      fi-elk-e7500:       INCOMPLETE (fdo#103989) -> PASS

    igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
      fi-cnl-psr:         FAIL (fdo#103481) -> PASS

    igt@prime_vgem@basic-fence-flip:
      fi-ilk-650:         FAIL (fdo#104008) -> PASS

    
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
  fdo#102672 https://bugs.freedesktop.org/show_bug.cgi?id=102672
  fdo#103481 https://bugs.freedesktop.org/show_bug.cgi?id=103481
  fdo#103841 https://bugs.freedesktop.org/show_bug.cgi?id=103841
  fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989
  fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
  fdo#104699 https://bugs.freedesktop.org/show_bug.cgi?id=104699
  fdo#105900 https://bugs.freedesktop.org/show_bug.cgi?id=105900
  fdo#106103 https://bugs.freedesktop.org/show_bug.cgi?id=106103
  fdo#106373 https://bugs.freedesktop.org/show_bug.cgi?id=106373


== Participating hosts (41 -> 35) ==

  Missing    (6): fi-ilk-m540 fi-byt-j1900 fi-byt-squawks fi-ctg-p8600 fi-glk-j4005 fi-skl-6700hq 


== Build changes ==

    * Linux: CI_DRM_4151 -> Patchwork_8929

  CI_DRM_4151: 176975baca37c5cdb1632b9aa2ba0170c9ab53df @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4464: 1bb318b32db003a377da14715c7b80675a712b6b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_8929: 3ed9e5ed8acae24777f512cd36516a2815ccf907 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4464: 33e58d5583eb7ed3966a1b905f875a1dfa959f6b @ git://anongit.freedesktop.org/piglit


== Linux commits ==

3ed9e5ed8aca drm/i915: enable the pipe/transcoder/planes later on HSW+

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8929/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.IGT: failure for drm/i915: configure the transcoder clocks before touching pipeconf on HSW+ (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: configure the transcoder clocks before touching pipeconf on HSW+ (rev2)
URL   : https://patchwork.freedesktop.org/series/42436/
State : failure

== Summary ==

= CI Bug Log - changes from CI_DRM_4151_full -> Patchwork_8929_full =

== Summary - FAILURE ==

  Serious unknown changes coming with Patchwork_8929_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_8929_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/42436/revisions/2/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_8929_full:

  === IGT changes ===

    ==== Possible regressions ====

    igt@perf_pmu@interrupts-sync:
      shard-hsw:          PASS -> FAIL

    
    ==== Warnings ====

    igt@gem_mocs_settings@mocs-rc6-blt:
      shard-kbl:          PASS -> SKIP

    igt@pm_rc6_residency@rc6-accuracy:
      shard-kbl:          SKIP -> PASS

    
== Known issues ==

  Here are the changes found in Patchwork_8929_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_flip@modeset-vs-vblank-race-interruptible:
      shard-hsw:          PASS -> FAIL (fdo#103060) +1

    igt@kms_flip@wf_vblank-ts-check-interruptible:
      shard-glk:          PASS -> FAIL (fdo#100368)

    igt@kms_rotation_crc@primary-rotation-180:
      shard-apl:          PASS -> FAIL (fdo#103925, fdo#104724)

    igt@kms_setmode@basic:
      shard-glk:          PASS -> FAIL (fdo#99912)

    
    ==== Possible fixes ====

    igt@drv_selftest@live_contexts:
      shard-kbl:          INCOMPLETE (fdo#103665) -> PASS

    igt@drv_selftest@live_gtt:
      shard-apl:          INCOMPLETE (fdo#103927) -> PASS

    igt@kms_flip@flip-vs-expired-vblank-interruptible:
      shard-glk:          FAIL (fdo#102887) -> PASS

    igt@kms_flip@modeset-vs-vblank-race-interruptible:
      shard-glk:          FAIL (fdo#103060) -> PASS

    igt@kms_flip@plain-flip-ts-check:
      shard-hsw:          FAIL (fdo#100368) -> PASS +1

    igt@kms_pwrite_crc:
      shard-kbl:          DMESG-WARN (fdo#105602, fdo#103313, fdo#103558) -> PASS +6

    igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
      shard-apl:          FAIL (fdo#103925, fdo#104724) -> PASS +1

    igt@pm_rpm@debugfs-read:
      shard-kbl:          DMESG-WARN (fdo#103313, fdo#103558) -> PASS

    igt@pm_rpm@i2c:
      shard-kbl:          DMESG-FAIL (fdo#103313, fdo#103558) -> PASS

    
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
  fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
  fdo#103313 https://bugs.freedesktop.org/show_bug.cgi?id=103313
  fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
  fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
  fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724
  fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602
  fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912


== Participating hosts (6 -> 6) ==

  No changes in participating hosts


== Build changes ==

    * Linux: CI_DRM_4151 -> Patchwork_8929

  CI_DRM_4151: 176975baca37c5cdb1632b9aa2ba0170c9ab53df @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4464: 1bb318b32db003a377da14715c7b80675a712b6b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_8929: 3ed9e5ed8acae24777f512cd36516a2815ccf907 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4464: 33e58d5583eb7ed3966a1b905f875a1dfa959f6b @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8929/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx