[PATCH 0/5] Enable HuC authentication in Icelake

[PATCH 0/5] Enable HuC authentication in Icelake

[Oscar Mateo]

Bare minimum number of patches to get the GuC to authenticate the
HuC correctly (i915.enable_guc=2).

Oscar Mateo (5):
  drm/i915/icl/guc: Do not allow GuC submission on Icelake for now
  drm/i915/icl/guc: Pass the bare minimum GuC init parameters for
    Icelake
  drm/i915/icl/guc: Define the GuC firmware version for Icelake
  drm/i915/icl/huc: Correctly authenticate the HuC for Icelake
  drm/i915/icl/huc: Define the HuC firmware version for Icelake

 drivers/gpu/drm/i915/intel_guc.c      | 10 ++++++++--
 drivers/gpu/drm/i915/intel_guc_fw.c   |  9 +++++++++
 drivers/gpu/drm/i915/intel_guc_fwif.h |  1 +
 drivers/gpu/drm/i915/intel_guc_reg.h  |  3 +++
 drivers/gpu/drm/i915/intel_huc.c      | 23 +++++++++++++++++++----
 drivers/gpu/drm/i915/intel_huc_fw.c   | 11 +++++++++++
 drivers/gpu/drm/i915/intel_uc.c       | 10 ++++++++++
 7 files changed, 61 insertions(+), 6 deletions(-)

-- 
1.9.1

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[PATCH 1/5] drm/i915/icl/guc: Do not allow GuC submission on Icelake for now

[Oscar Mateo]

Sanitize the enable_guc option so that we can enable HuC authentication,
but nothing else. The firmware interface has changed quite dramatically
in Gen11, so it will take a while before we can submit workloads to the
GuC with guarantees.

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Spotswood <john.a.spotswood@intel.com>
Cc: Tony Ye <tony.ye@intel.com>
---
 drivers/gpu/drm/i915/intel_uc.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 1cffaf7..d2a935c 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -63,6 +63,8 @@ static int __get_platform_enable_guc(struct drm_i915_private *dev_priv)
 		enable_guc |= ENABLE_GUC_LOAD_HUC;
 
 	/* Any platform specific fine-tuning can be done here */
+	if (INTEL_GEN(dev_priv) >= 11)
+		enable_guc &= ~ENABLE_GUC_SUBMISSION;
 
 	return enable_guc;
 }
@@ -115,6 +117,14 @@ static void sanitize_options_early(struct drm_i915_private *dev_priv)
 			 yesno(intel_uc_is_using_guc_submission()),
 			 yesno(intel_uc_is_using_huc()));
 
+	/* Verify GuC submission support */
+	if (intel_uc_is_using_guc_submission() && INTEL_GEN(dev_priv) >= 11) {
+		DRM_WARN("Incompatible option detected: %s=%d, %s!\n",
+			 "enable_guc", i915_modparams.enable_guc,
+			 "submission not supported");
+		i915_modparams.enable_guc &= ~ENABLE_GUC_SUBMISSION;
+	}
+
 	/* Verify GuC firmware availability */
 	if (intel_uc_is_using_guc() && !intel_uc_fw_is_selected(guc_fw)) {
 		DRM_WARN("Incompatible option detected: %s=%d, %s!\n",
-- 
1.9.1

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[PATCH 2/5] drm/i915/icl/guc: Pass the bare minimum GuC init parameters for Icelake

[Oscar Mateo]

Only enough to achieve HuC authentication. No GuC submission
or any other feature for the time being.

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Spotswood <john.a.spotswood@intel.com>
Cc: Tony Ye <tony.ye@intel.com>
---
 drivers/gpu/drm/i915/intel_guc.c      | 10 ++++++++--
 drivers/gpu/drm/i915/intel_guc_fwif.h |  1 +
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index 116f4cc..133747c 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -245,8 +245,12 @@ void intel_guc_init_params(struct intel_guc *guc)
 
 	params[GUC_CTL_WA] |= GUC_CTL_WA_UK_BY_DRIVER;
 
-	params[GUC_CTL_FEATURE] |= GUC_CTL_DISABLE_SCHEDULER |
-			GUC_CTL_VCS2_ENABLED;
+	if (INTEL_GEN(dev_priv) >= 11) {
+		params[GUC_CTL_FEATURE] |= GEN11_GUC_CTL_DISABLE_SCHEDULER;
+	 } else {
+		params[GUC_CTL_FEATURE] |= GUC_CTL_DISABLE_SCHEDULER;
+		params[GUC_CTL_FEATURE] |= GUC_CTL_VCS2_ENABLED;
+	}
 
 	params[GUC_CTL_LOG_PARAMS] = guc->log.flags;
 
@@ -259,6 +263,8 @@ void intel_guc_init_params(struct intel_guc *guc)
 		u32 pgs = intel_guc_ggtt_offset(guc, guc->stage_desc_pool);
 		u32 ctx_in_16 = GUC_MAX_STAGE_DESCRIPTORS / 16;
 
+		GEM_BUG_ON(INTEL_GEN(dev_priv) >= 11);
+
 		params[GUC_CTL_DEBUG] |= ads << GUC_ADS_ADDR_SHIFT;
 		params[GUC_CTL_DEBUG] |= GUC_ADS_ENABLED;
 
diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h b/drivers/gpu/drm/i915/intel_guc_fwif.h
index 0867ba7..781c0c0 100644
--- a/drivers/gpu/drm/i915/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
@@ -106,6 +106,7 @@
 #define   GUC_CTL_PREEMPTION_LOG	(1 << 5)
 #define   GUC_CTL_ENABLE_SLPC		(1 << 7)
 #define   GUC_CTL_RESET_ON_PREMPT_FAILURE	(1 << 8)
+#define   GEN11_GUC_CTL_DISABLE_SCHEDULER	(1 << 14)
 
 #define GUC_CTL_DEBUG			8
 #define   GUC_LOG_VERBOSITY_SHIFT	0
-- 
1.9.1

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[PATCH 3/5] drm/i915/icl/guc: Define the GuC firmware version for Icelake

[Oscar Mateo]

A GuC firmware for Icelake is now available. Let's use it.

v2: Split out the Cannonlake stuff in a separate patch (Michal)

v3: Rebased

v4:
  - Rebased
  - Split out MODULE_FIRMWARE so we don't accidentally push it
    before linux-firmware (Joonas)

v5: Use the latest firmware (v23.120)
v6: Use the latest firmware (v26.171)
v7: Rebased (remove guc-core-family)
v8: Use the latest firmware (v27.182)

Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Spotswood <john.a.spotswood@intel.com>
Cc: Tony Ye <tony.ye@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
---
 drivers/gpu/drm/i915/intel_guc_fw.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c b/drivers/gpu/drm/i915/intel_guc_fw.c
index a9e6fcc..c5c5dd8 100644
--- a/drivers/gpu/drm/i915/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/intel_guc_fw.c
@@ -39,6 +39,9 @@
 #define KBL_FW_MAJOR 9
 #define KBL_FW_MINOR 39
 
+#define ICL_FW_MAJOR 27
+#define ICL_FW_MINOR 182
+
 #define GUC_FW_PATH(platform, major, minor) \
        "i915/" __stringify(platform) "_guc_ver" __stringify(major) "_" __stringify(minor) ".bin"
 
@@ -51,6 +54,8 @@
 #define I915_KBL_GUC_UCODE GUC_FW_PATH(kbl, KBL_FW_MAJOR, KBL_FW_MINOR)
 MODULE_FIRMWARE(I915_KBL_GUC_UCODE);
 
+#define I915_ICL_GUC_UCODE GUC_FW_PATH(icl, ICL_FW_MAJOR, ICL_FW_MINOR)
+
 static void guc_fw_select(struct intel_uc_fw *guc_fw)
 {
 	struct intel_guc *guc = container_of(guc_fw, struct intel_guc, fw);
@@ -77,6 +82,10 @@ static void guc_fw_select(struct intel_uc_fw *guc_fw)
 		guc_fw->path = I915_KBL_GUC_UCODE;
 		guc_fw->major_ver_wanted = KBL_FW_MAJOR;
 		guc_fw->minor_ver_wanted = KBL_FW_MINOR;
+	} else if (IS_ICELAKE(dev_priv)) {
+		guc_fw->path = I915_ICL_GUC_UCODE;
+		guc_fw->major_ver_wanted = ICL_FW_MAJOR;
+		guc_fw->minor_ver_wanted = ICL_FW_MINOR;
 	} else {
 		DRM_WARN("%s: No firmware known for this platform!\n",
 			 intel_uc_fw_type_repr(guc_fw->type));
-- 
1.9.1

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[PATCH 4/5] drm/i915/icl/huc: Correctly authenticate the HuC for Icelake

[Oscar Mateo]

The register to check for correct HuC authentication by the GuC
has changed in Icelake. Look into the right register & bit.

v2: rebased.
v3: rebased.
v4: Fix I915_PARAM_HUC_STATUS as well (Tony)

BSpec: 19686

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Cc: Tony Ye <tony.ye@intel.com>
Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Spotswood <john.a.spotswood@intel.com>
Cc: Tony Ye <tony.ye@intel.com>
---
 drivers/gpu/drm/i915/intel_guc_reg.h |  3 +++
 drivers/gpu/drm/i915/intel_huc.c     | 23 +++++++++++++++++++----
 2 files changed, 22 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_guc_reg.h b/drivers/gpu/drm/i915/intel_guc_reg.h
index d860847..9f14f9f 100644
--- a/drivers/gpu/drm/i915/intel_guc_reg.h
+++ b/drivers/gpu/drm/i915/intel_guc_reg.h
@@ -76,6 +76,9 @@
 #define HUC_STATUS2             _MMIO(0xD3B0)
 #define   HUC_FW_VERIFIED       (1<<7)
 
+#define HUC_KERNEL_LOAD_INFO	_MMIO(0xC1DC)
+#define   HUC_LOAD_SUCCESSFUL	(1 << 0)
+
 #define GUC_WOPCM_SIZE			_MMIO(0xc050)
 #define   GUC_WOPCM_SIZE_LOCKED		  (1<<0)
 #define   GUC_WOPCM_SIZE_SHIFT		12
diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c
index 2912852..b509756 100644
--- a/drivers/gpu/drm/i915/intel_huc.c
+++ b/drivers/gpu/drm/i915/intel_huc.c
@@ -48,9 +48,19 @@ int intel_huc_auth(struct intel_huc *huc)
 	struct drm_i915_private *i915 = huc_to_i915(huc);
 	struct intel_guc *guc = &i915->guc;
 	struct i915_vma *vma;
+	i915_reg_t status_reg;
 	u32 status;
+	u32 status_ok;
 	int ret;
 
+	if (INTEL_GEN(i915) >= 11) {
+		status_reg = HUC_KERNEL_LOAD_INFO;
+		status_ok = HUC_LOAD_SUCCESSFUL;
+	} else {
+		status_reg = HUC_STATUS2;
+		status_ok = HUC_FW_VERIFIED;
+	}
+
 	if (huc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
 		return -ENOEXEC;
 
@@ -72,9 +82,9 @@ int intel_huc_auth(struct intel_huc *huc)
 
 	/* Check authentication status, it should be done by now */
 	ret = __intel_wait_for_register(i915,
-					HUC_STATUS2,
-					HUC_FW_VERIFIED,
-					HUC_FW_VERIFIED,
+					status_reg,
+					status_ok,
+					status_ok,
 					2, 50, &status);
 	if (ret) {
 		DRM_ERROR("HuC: Firmware not verified %#x\n", status);
@@ -112,7 +122,12 @@ int intel_huc_check_status(struct intel_huc *huc)
 		return -ENODEV;
 
 	intel_runtime_pm_get(dev_priv);
-	status = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;
+
+	if (INTEL_GEN(dev_priv) >= 11)
+		status = I915_READ(HUC_KERNEL_LOAD_INFO) & HUC_LOAD_SUCCESSFUL;
+	else
+		status = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;
+
 	intel_runtime_pm_put(dev_priv);
 
 	return status;
-- 
1.9.1

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[PATCH 5/5] drm/i915/icl/huc: Define the HuC firmware version for Icelake

[Oscar Mateo]

This patch adds the support to load HuC on ICL.
Version 8.02.2678

v2 (James): Rebase

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Cc: Tony Ye <tony.ye@intel.com>
Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Spotswood <john.a.spotswood@intel.com>
---
 drivers/gpu/drm/i915/intel_huc_fw.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_huc_fw.c b/drivers/gpu/drm/i915/intel_huc_fw.c
index f93d238..795d585 100644
--- a/drivers/gpu/drm/i915/intel_huc_fw.c
+++ b/drivers/gpu/drm/i915/intel_huc_fw.c
@@ -34,6 +34,10 @@
 #define KBL_HUC_FW_MINOR 00
 #define KBL_BLD_NUM 1810
 
+#define ICL_HUC_FW_MAJOR 8
+#define ICL_HUC_FW_MINOR 02
+#define ICL_BLD_NUM 2678
+
 #define HUC_FW_PATH(platform, major, minor, bld_num) \
 	"i915/" __stringify(platform) "_huc_ver" __stringify(major) "_" \
 	__stringify(minor) "_" __stringify(bld_num) ".bin"
@@ -50,6 +54,9 @@
 	KBL_HUC_FW_MINOR, KBL_BLD_NUM)
 MODULE_FIRMWARE(I915_KBL_HUC_UCODE);
 
+#define I915_ICL_HUC_UCODE HUC_FW_PATH(icl, ICL_HUC_FW_MAJOR, \
+	ICL_HUC_FW_MINOR, ICL_BLD_NUM)
+
 static void huc_fw_select(struct intel_uc_fw *huc_fw)
 {
 	struct intel_huc *huc = container_of(huc_fw, struct intel_huc, fw);
@@ -76,6 +83,10 @@ static void huc_fw_select(struct intel_uc_fw *huc_fw)
 		huc_fw->path = I915_KBL_HUC_UCODE;
 		huc_fw->major_ver_wanted = KBL_HUC_FW_MAJOR;
 		huc_fw->minor_ver_wanted = KBL_HUC_FW_MINOR;
+	} else if (IS_ICELAKE(dev_priv)) {
+		huc->fw.path = I915_ICL_HUC_UCODE;
+		huc->fw.major_ver_wanted = ICL_HUC_FW_MAJOR;
+		huc->fw.minor_ver_wanted = ICL_HUC_FW_MINOR;
 	} else {
 		DRM_WARN("%s: No firmware known for this platform!\n",
 			 intel_uc_fw_type_repr(huc_fw->type));
-- 
1.9.1

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✗ Fi.CI.CHECKPATCH: warning for Enable HuC authentication in Icelake

[Patchwork]

== Series Details ==

Series: Enable HuC authentication in Icelake
URL   : https://patchwork.freedesktop.org/series/42433/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
e1a5588cbbae drm/i915/icl/guc: Do not allow GuC submission on Icelake for now
93fdefe745e1 drm/i915/icl/guc: Pass the bare minimum GuC init parameters for Icelake
-:28: WARNING:TABSTOP: Statements should start on a tabstop
#28: FILE: drivers/gpu/drm/i915/intel_guc.c:250:
+	 } else {

total: 0 errors, 1 warnings, 0 checks, 29 lines checked
2e5e67b8d6b0 drm/i915/icl/guc: Define the GuC firmware version for Icelake
e04f3af7240b drm/i915/icl/huc: Correctly authenticate the HuC for Icelake
-:21: WARNING:BAD_SIGN_OFF: Duplicate signature
#21: 
Cc: Tony Ye <tony.ye@intel.com>

total: 0 errors, 1 warnings, 0 checks, 53 lines checked
d7063d92a00f drm/i915/icl/huc: Define the HuC firmware version for Icelake

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✓ Fi.CI.BAT: success for Enable HuC authentication in Icelake

[Patchwork]

== Series Details ==

Series: Enable HuC authentication in Icelake
URL   : https://patchwork.freedesktop.org/series/42433/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4109 -> Patchwork_8831 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/42433/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_8831 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_frontbuffer_tracking@basic:
      fi-hsw-4200u:       PASS -> DMESG-FAIL (fdo#106103)

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      fi-bxt-dsi:         PASS -> INCOMPLETE (fdo#103927)

    
    ==== Possible fixes ====

    igt@gem_exec_suspend@basic-s3:
      fi-ivb-3520m:       DMESG-WARN (fdo#106084) -> PASS

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      fi-snb-2520m:       INCOMPLETE (fdo#103713) -> PASS

    
  fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
  fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
  fdo#106084 https://bugs.freedesktop.org/show_bug.cgi?id=106084
  fdo#106103 https://bugs.freedesktop.org/show_bug.cgi?id=106103


== Participating hosts (38 -> 36) ==

  Additional (1): fi-cnl-y3 
  Missing    (3): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq 


== Build changes ==

    * Linux: CI_DRM_4109 -> Patchwork_8831

  CI_DRM_4109: e701a0e6315dc85615f83b2ee14d9cb2f425d97d @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4451: 29ae12bd764e3b1876356e7628a32192b4ec9066 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_8831: d7063d92a00f3c3d24e9a2f722918c3671e63cb7 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4451: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit


== Linux commits ==

d7063d92a00f drm/i915/icl/huc: Define the HuC firmware version for Icelake
e04f3af7240b drm/i915/icl/huc: Correctly authenticate the HuC for Icelake
2e5e67b8d6b0 drm/i915/icl/guc: Define the GuC firmware version for Icelake
93fdefe745e1 drm/i915/icl/guc: Pass the bare minimum GuC init parameters for Icelake
e1a5588cbbae drm/i915/icl/guc: Do not allow GuC submission on Icelake for now

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8831/issues.html
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✓ Fi.CI.IGT: success for Enable HuC authentication in Icelake

[Patchwork]

== Series Details ==

Series: Enable HuC authentication in Icelake
URL   : https://patchwork.freedesktop.org/series/42433/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4109_full -> Patchwork_8831_full =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/42433/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_8831_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@drv_suspend@fence-restore-tiled2untiled:
      shard-kbl:          PASS -> DMESG-WARN (fdo#103313)

    igt@kms_flip@plain-flip-ts-check-interruptible:
      shard-glk:          PASS -> FAIL (fdo#100368) +1

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      shard-snb:          PASS -> INCOMPLETE (fdo#105411)

    igt@kms_sysfs_edid_timing:
      shard-apl:          PASS -> WARN (fdo#100047)

    
    ==== Possible fixes ====

    igt@kms_flip@2x-flip-vs-expired-vblank:
      shard-hsw:          FAIL (fdo#102887) -> PASS

    igt@kms_flip@plain-flip-fb-recreate:
      shard-hsw:          FAIL (fdo#100368) -> PASS

    igt@kms_flip@wf_vblank-ts-check-interruptible:
      shard-hsw:          FAIL (fdo#103928) -> PASS

    igt@kms_setmode@basic:
      shard-hsw:          FAIL (fdo#99912) -> PASS

    igt@kms_universal_plane@disable-primary-vs-flip-pipe-c:
      shard-kbl:          DMESG-WARN (fdo#103558, fdo#105602) -> PASS +14

    
  fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
  fdo#103313 https://bugs.freedesktop.org/show_bug.cgi?id=103313
  fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558
  fdo#103928 https://bugs.freedesktop.org/show_bug.cgi?id=103928
  fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411
  fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602
  fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912


== Participating hosts (9 -> 8) ==

  Missing    (1): shard-glkb 


== Build changes ==

    * Linux: CI_DRM_4109 -> Patchwork_8831

  CI_DRM_4109: e701a0e6315dc85615f83b2ee14d9cb2f425d97d @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4451: 29ae12bd764e3b1876356e7628a32192b4ec9066 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_8831: d7063d92a00f3c3d24e9a2f722918c3671e63cb7 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4451: b57600ba58ae0cdbad86826fd653aa0191212f27 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8831/shards.html
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Re: [PATCH 2/5] drm/i915/icl/guc: Pass the bare minimum GuC init parameters for Icelake

[John Spotswood]

On Fri, 2018-04-27 at 14:31 -0700, Oscar Mateo wrote:
> Only enough to achieve HuC authentication. No GuC submission
> or any other feature for the time being.
> 
> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Spotswood <john.a.spotswood@intel.com>
> Cc: Tony Ye <tony.ye@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_guc.c      | 10 ++++++++--
>  drivers/gpu/drm/i915/intel_guc_fwif.h |  1 +
>  2 files changed, 9 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_guc.c
> b/drivers/gpu/drm/i915/intel_guc.c
> index 116f4cc..133747c 100644
> --- a/drivers/gpu/drm/i915/intel_guc.c
> +++ b/drivers/gpu/drm/i915/intel_guc.c
> @@ -245,8 +245,12 @@ void intel_guc_init_params(struct intel_guc
> *guc)
>  
>  	params[GUC_CTL_WA] |= GUC_CTL_WA_UK_BY_DRIVER;
>  
> -	params[GUC_CTL_FEATURE] |= GUC_CTL_DISABLE_SCHEDULER |
> -			GUC_CTL_VCS2_ENABLED;
> +	if (INTEL_GEN(dev_priv) >= 11) {
> +		params[GUC_CTL_FEATURE] |=
> GEN11_GUC_CTL_DISABLE_SCHEDULER;
> +	 } else {
> +		params[GUC_CTL_FEATURE] |=
> GUC_CTL_DISABLE_SCHEDULER;
> 
> +		params[GUC_CTL_FEATURE] |= GUC_CTL_VCS2_ENABLED;

Should the OR'ing of GUC_CTL_VCS2_ENABLED be outside of the
conditional?  It looks like the only purpose of the conditional is to
distinguish GEN for the scheduler disable flag.

> +	}
>  
>  	params[GUC_CTL_LOG_PARAMS] = guc->log.flags;
>  
> @@ -259,6 +263,8 @@ void intel_guc_init_params(struct intel_guc *guc)
>  		u32 pgs = intel_guc_ggtt_offset(guc, guc-
> >stage_desc_pool);
>  		u32 ctx_in_16 = GUC_MAX_STAGE_DESCRIPTORS / 16;
>  
> +		GEM_BUG_ON(INTEL_GEN(dev_priv) >= 11);
> +
>  		params[GUC_CTL_DEBUG] |= ads << GUC_ADS_ADDR_SHIFT;
>  		params[GUC_CTL_DEBUG] |= GUC_ADS_ENABLED;
>  
> diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h
> b/drivers/gpu/drm/i915/intel_guc_fwif.h
> index 0867ba7..781c0c0 100644
> --- a/drivers/gpu/drm/i915/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
> @@ -106,6 +106,7 @@
>  #define   GUC_CTL_PREEMPTION_LOG	(1 << 5)
>  #define   GUC_CTL_ENABLE_SLPC		(1 << 7)
>  #define   GUC_CTL_RESET_ON_PREMPT_FAILURE	(1 << 8)
> +#define   GEN11_GUC_CTL_DISABLE_SCHEDULER	(1 << 14)
>  
>  #define GUC_CTL_DEBUG			8
>  #define   GUC_LOG_VERBOSITY_SHIFT	0
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Re: [PATCH 3/5] drm/i915/icl/guc: Define the GuC firmware version for Icelake

[John Spotswood]

On Fri, 2018-04-27 at 14:31 -0700, Oscar Mateo wrote:
> A GuC firmware for Icelake is now available. Let's use it.
> 
> v2: Split out the Cannonlake stuff in a separate patch (Michal)
> 
> v3: Rebased
> 
> v4:
>   - Rebased
>   - Split out MODULE_FIRMWARE so we don't accidentally push it
>     before linux-firmware (Joonas)
> 
> v5: Use the latest firmware (v23.120)
> v6: Use the latest firmware (v26.171)
> v7: Rebased (remove guc-core-family)
> v8: Use the latest firmware (v27.182)
> 
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Spotswood <john.a.spotswood@intel.com>
> Cc: Tony Ye <tony.ye@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_guc_fw.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c
> b/drivers/gpu/drm/i915/intel_guc_fw.c
> index a9e6fcc..c5c5dd8 100644
> --- a/drivers/gpu/drm/i915/intel_guc_fw.c
> +++ b/drivers/gpu/drm/i915/intel_guc_fw.c
> @@ -39,6 +39,9 @@
>  #define KBL_FW_MAJOR 9
>  #define KBL_FW_MINOR 39
>  
> +#define ICL_FW_MAJOR 27
> +#define ICL_FW_MINOR 182

This version will not be released, so why is this being added here?

> +
>  #define GUC_FW_PATH(platform, major, minor) \
>         "i915/" __stringify(platform) "_guc_ver" __stringify(major)
> "_" __stringify(minor) ".bin"
>  
> @@ -51,6 +54,8 @@
>  #define I915_KBL_GUC_UCODE GUC_FW_PATH(kbl, KBL_FW_MAJOR,
> KBL_FW_MINOR)
>  MODULE_FIRMWARE(I915_KBL_GUC_UCODE);
>  
> +#define I915_ICL_GUC_UCODE GUC_FW_PATH(icl, ICL_FW_MAJOR,
> ICL_FW_MINOR)
> +
>  static void guc_fw_select(struct intel_uc_fw *guc_fw)
>  {
>  	struct intel_guc *guc = container_of(guc_fw, struct
> intel_guc, fw);
> @@ -77,6 +82,10 @@ static void guc_fw_select(struct intel_uc_fw
> *guc_fw)
>  		guc_fw->path = I915_KBL_GUC_UCODE;
>  		guc_fw->major_ver_wanted = KBL_FW_MAJOR;
>  		guc_fw->minor_ver_wanted = KBL_FW_MINOR;
> +	} else if (IS_ICELAKE(dev_priv)) {
> +		guc_fw->path = I915_ICL_GUC_UCODE;
> +		guc_fw->major_ver_wanted = ICL_FW_MAJOR;
> +		guc_fw->minor_ver_wanted = ICL_FW_MINOR;
>  	} else {
>  		DRM_WARN("%s: No firmware known for this
> platform!\n",
>  			 intel_uc_fw_type_repr(guc_fw->type));
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Re: [PATCH 2/5] drm/i915/icl/guc: Pass the bare minimum GuC init parameters for Icelake

[Oscar Mateo]

On 04/30/2018 04:29 PM, John Spotswood wrote:
> On Fri, 2018-04-27 at 14:31 -0700, Oscar Mateo wrote:
>> Only enough to achieve HuC authentication. No GuC submission
>> or any other feature for the time being.
>>
>> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
>> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Cc: John Spotswood <john.a.spotswood@intel.com>
>> Cc: Tony Ye <tony.ye@intel.com>
>> ---
>>   drivers/gpu/drm/i915/intel_guc.c      | 10 ++++++++--
>>   drivers/gpu/drm/i915/intel_guc_fwif.h |  1 +
>>   2 files changed, 9 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_guc.c
>> b/drivers/gpu/drm/i915/intel_guc.c
>> index 116f4cc..133747c 100644
>> --- a/drivers/gpu/drm/i915/intel_guc.c
>> +++ b/drivers/gpu/drm/i915/intel_guc.c
>> @@ -245,8 +245,12 @@ void intel_guc_init_params(struct intel_guc
>> *guc)
>>   
>>   	params[GUC_CTL_WA] |= GUC_CTL_WA_UK_BY_DRIVER;
>>   
>> -	params[GUC_CTL_FEATURE] |= GUC_CTL_DISABLE_SCHEDULER |
>> -			GUC_CTL_VCS2_ENABLED;
>> +	if (INTEL_GEN(dev_priv) >= 11) {
>> +		params[GUC_CTL_FEATURE] |=
>> GEN11_GUC_CTL_DISABLE_SCHEDULER;
>> +	 } else {
>> +		params[GUC_CTL_FEATURE] |=
>> GUC_CTL_DISABLE_SCHEDULER;
>>
>> +		params[GUC_CTL_FEATURE] |= GUC_CTL_VCS2_ENABLED;
> Should the OR'ing of GUC_CTL_VCS2_ENABLED be outside of the
> conditional?  It looks like the only purpose of the conditional is to
> distinguish GEN for the scheduler disable flag.
>

No. ICL can have more than 2 VDBoxes enabled, and some of them can be 
fused off, so a simple GUC_CTL_VCS2_ENABLED does not cut it anymore. The 
way to inform GuC about the available engines has been moved to the ADS, 
but I didn't include those changes here because they are not really 
required if you only want the GuC to authenticate the HuC.


>> +	}
>>   
>>   	params[GUC_CTL_LOG_PARAMS] = guc->log.flags;
>>   
>> @@ -259,6 +263,8 @@ void intel_guc_init_params(struct intel_guc *guc)
>>   		u32 pgs = intel_guc_ggtt_offset(guc, guc-
>>> stage_desc_pool);
>>   		u32 ctx_in_16 = GUC_MAX_STAGE_DESCRIPTORS / 16;
>>   
>> +		GEM_BUG_ON(INTEL_GEN(dev_priv) >= 11);
>> +
>>   		params[GUC_CTL_DEBUG] |= ads << GUC_ADS_ADDR_SHIFT;
>>   		params[GUC_CTL_DEBUG] |= GUC_ADS_ENABLED;
>>   
>> diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h
>> b/drivers/gpu/drm/i915/intel_guc_fwif.h
>> index 0867ba7..781c0c0 100644
>> --- a/drivers/gpu/drm/i915/intel_guc_fwif.h
>> +++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
>> @@ -106,6 +106,7 @@
>>   #define   GUC_CTL_PREEMPTION_LOG	(1 << 5)
>>   #define   GUC_CTL_ENABLE_SLPC		(1 << 7)
>>   #define   GUC_CTL_RESET_ON_PREMPT_FAILURE	(1 << 8)
>> +#define   GEN11_GUC_CTL_DISABLE_SCHEDULER	(1 << 14)
>>   
>>   #define GUC_CTL_DEBUG			8
>>   #define   GUC_LOG_VERBOSITY_SHIFT	0

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Re: [PATCH 3/5] drm/i915/icl/guc: Define the GuC firmware version for Icelake

[Oscar Mateo]

On 04/30/2018 04:34 PM, John Spotswood wrote:
> On Fri, 2018-04-27 at 14:31 -0700, Oscar Mateo wrote:
>> A GuC firmware for Icelake is now available. Let's use it.
>>
>> v2: Split out the Cannonlake stuff in a separate patch (Michal)
>>
>> v3: Rebased
>>
>> v4:
>>    - Rebased
>>    - Split out MODULE_FIRMWARE so we don't accidentally push it
>>      before linux-firmware (Joonas)
>>
>> v5: Use the latest firmware (v23.120)
>> v6: Use the latest firmware (v26.171)
>> v7: Rebased (remove guc-core-family)
>> v8: Use the latest firmware (v27.182)
>>
>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Cc: John Spotswood <john.a.spotswood@intel.com>
>> Cc: Tony Ye <tony.ye@intel.com>
>> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
>> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
>> ---
>>   drivers/gpu/drm/i915/intel_guc_fw.c | 9 +++++++++
>>   1 file changed, 9 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c
>> b/drivers/gpu/drm/i915/intel_guc_fw.c
>> index a9e6fcc..c5c5dd8 100644
>> --- a/drivers/gpu/drm/i915/intel_guc_fw.c
>> +++ b/drivers/gpu/drm/i915/intel_guc_fw.c
>> @@ -39,6 +39,9 @@
>>   #define KBL_FW_MAJOR 9
>>   #define KBL_FW_MINOR 39
>>   
>> +#define ICL_FW_MAJOR 27
>> +#define ICL_FW_MINOR 182
> This version will not be released, so why is this being added here?

To be used by those who do have access to this firmware version. Please 
notice that I am purposefully not including the MODULE_FIRMWARE() tag 
for Icelake's GuC FW.

>> +
>>   #define GUC_FW_PATH(platform, major, minor) \
>>          "i915/" __stringify(platform) "_guc_ver" __stringify(major)
>> "_" __stringify(minor) ".bin"
>>   
>> @@ -51,6 +54,8 @@
>>   #define I915_KBL_GUC_UCODE GUC_FW_PATH(kbl, KBL_FW_MAJOR,
>> KBL_FW_MINOR)
>>   MODULE_FIRMWARE(I915_KBL_GUC_UCODE);
>>   
>> +#define I915_ICL_GUC_UCODE GUC_FW_PATH(icl, ICL_FW_MAJOR,
>> ICL_FW_MINOR)
>> +
>>   static void guc_fw_select(struct intel_uc_fw *guc_fw)
>>   {
>>   	struct intel_guc *guc = container_of(guc_fw, struct
>> intel_guc, fw);
>> @@ -77,6 +82,10 @@ static void guc_fw_select(struct intel_uc_fw
>> *guc_fw)
>>   		guc_fw->path = I915_KBL_GUC_UCODE;
>>   		guc_fw->major_ver_wanted = KBL_FW_MAJOR;
>>   		guc_fw->minor_ver_wanted = KBL_FW_MINOR;
>> +	} else if (IS_ICELAKE(dev_priv)) {
>> +		guc_fw->path = I915_ICL_GUC_UCODE;
>> +		guc_fw->major_ver_wanted = ICL_FW_MAJOR;
>> +		guc_fw->minor_ver_wanted = ICL_FW_MINOR;
>>   	} else {
>>   		DRM_WARN("%s: No firmware known for this
>> platform!\n",
>>   			 intel_uc_fw_type_repr(guc_fw->type));

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