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From: Thomas Gleixner <tglx@linutronix.de>
To: speck@linutronix.de
Subject: [patch V9 13/16] SSB 13
Date: Tue, 01 May 2018 17:24:33 +0200	[thread overview]
Message-ID: <20180501152659.149479255@linutronix.de> (raw)
In-Reply-To: 20180501152420.785133537@linutronix.de

Having everything in nospec-branch.h creates a hell of dependencies when
adding the prctl based switching mechanism. Move everything which is not
required in nospec-branch.h to spec-ctrl.h and fixup the includes in the
relevant files.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
---
 arch/x86/include/asm/nospec-branch.h |   14 --------------
 arch/x86/include/asm/spec-ctrl.h      |   21 +++++++++++++++++++++
 arch/x86/kernel/cpu/amd.c            |    2 +-
 arch/x86/kernel/cpu/bugs.c           |    2 +-
 arch/x86/kvm/svm.c                   |    2 +-
 arch/x86/kvm/vmx.c                   |    2 +-
 6 files changed, 25 insertions(+), 18 deletions(-)

--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -228,26 +228,12 @@ enum spectre_v2_mitigation {
 extern void x86_set_spec_ctrl(u64);
 extern u64 x86_get_default_spec_ctrl(void);
 
-/*
- * On VMENTER we must preserve whatever view of the SPEC_CTRL MSR
- * the guest has, while on VMEXIT we restore the host view. This
- * would be easier if SPEC_CTRL were architecturally maskable or
- * shadowable for guests but this is not (currently) the case.
- * Takes the guest view of SPEC_CTRL MSR as a parameter.
- */
-extern void x86_set_guest_spec_ctrl(u64);
-extern void x86_restore_host_spec_ctrl(u64);
-
 /* The Speculative Store Bypass disable variants */
 enum ssb_mitigation {
 	SPEC_STORE_BYPASS_NONE,
 	SPEC_STORE_BYPASS_DISABLE,
 };
 
-/* AMD specific Speculative Store Bypass MSR data */
-extern u64 x86_amd_ls_cfg_base;
-extern u64 x86_amd_ls_cfg_rds_mask;
-
 extern char __indirect_thunk_start[];
 extern char __indirect_thunk_end[];
 
--- /dev/null
+++ b/arch/x86/include/asm/spec-ctrl.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_X86_SPECCTRL_H_
+#define _ASM_X86_SPECCTRL_H_
+
+#include <asm/nospec-branch.h>
+
+/*
+ * On VMENTER we must preserve whatever view of the SPEC_CTRL MSR
+ * the guest has, while on VMEXIT we restore the host view. This
+ * would be easier if SPEC_CTRL were architecturally maskable or
+ * shadowable for guests but this is not (currently) the case.
+ * Takes the guest view of SPEC_CTRL MSR as a parameter.
+ */
+extern void x86_set_guest_spec_ctrl(u64);
+extern void x86_restore_host_spec_ctrl(u64);
+
+/* AMD specific Speculative Store Bypass MSR data */
+extern u64 x86_amd_ls_cfg_base;
+extern u64 x86_amd_ls_cfg_rds_mask;
+
+#endif
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -10,7 +10,7 @@
 #include <asm/processor.h>
 #include <asm/apic.h>
 #include <asm/cpu.h>
-#include <asm/nospec-branch.h>
+#include <asm/spec-ctrl.h>
 #include <asm/smp.h>
 #include <asm/pci-direct.h>
 #include <asm/delay.h>
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -13,7 +13,7 @@
 #include <linux/cpu.h>
 #include <linux/module.h>
 
-#include <asm/nospec-branch.h>
+#include <asm/spec-ctrl.h>
 #include <asm/cmdline.h>
 #include <asm/bugs.h>
 #include <asm/processor.h>
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -49,7 +49,7 @@
 #include <asm/debugreg.h>
 #include <asm/kvm_para.h>
 #include <asm/irq_remapping.h>
-#include <asm/nospec-branch.h>
+#include <asm/spec-ctrl.h>
 
 #include <asm/virtext.h>
 #include "trace.h"
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -51,7 +51,7 @@
 #include <asm/apic.h>
 #include <asm/irq_remapping.h>
 #include <asm/mmu_context.h>
-#include <asm/nospec-branch.h>
+#include <asm/spec-ctrl.h>
 #include <asm/mshyperv.h>
 
 #include "trace.h"

  parent reply	other threads:[~2018-05-01 15:50 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-01 15:24 [patch V9 00/16] SSB 0 Thomas Gleixner
2018-05-01 15:24 ` [patch V9 01/16] SSB 1 Thomas Gleixner
2018-05-01 15:24 ` [patch V9 02/16] SSB 2 Thomas Gleixner
2018-05-01 15:24 ` [patch V9 03/16] SSB 3 Thomas Gleixner
2018-05-01 15:24 ` [patch V9 04/16] SSB 4 Thomas Gleixner
2018-05-01 15:24 ` [patch V9 05/16] SSB 5 Thomas Gleixner
2018-05-01 15:24 ` [patch V9 06/16] SSB 6 Thomas Gleixner
2018-05-01 15:24 ` [patch V9 07/16] SSB 7 Thomas Gleixner
2018-05-01 15:24 ` [patch V9 08/16] SSB 8 Thomas Gleixner
2018-05-01 15:24 ` [patch V9 09/16] SSB 9 Thomas Gleixner
2018-05-01 15:24 ` [patch V9 10/16] SSB 10 Thomas Gleixner
2018-05-01 15:24 ` [patch V9 11/16] SSB 11 Thomas Gleixner
2018-05-01 19:26   ` Thomas Gleixner
2018-05-01 15:24 ` [patch V9 12/16] SSB 12 Thomas Gleixner
2018-05-01 15:24 ` Thomas Gleixner [this message]
2018-05-01 15:24 ` [patch V9 14/16] SSB 14 Thomas Gleixner
2018-05-01 15:24 ` [patch V9 15/16] SSB 15 Thomas Gleixner
2018-05-01 15:24 ` [patch V9 16/16] SSB 16 Thomas Gleixner
2018-05-01 15:40 ` [patch V9 00/16] SSB Thomas Gleixner
2018-05-01 15:51 ` [patch V9 00/16] SSB 0 - Bundle Thomas Gleixner
2018-05-01 16:11 ` [patch V9 00/16] SSB Thomas Gleixner
2018-05-01 17:22 ` [MODERATED] " Tim Chen
2018-05-01 17:28   ` Thomas Gleixner
2018-05-01 17:31   ` [MODERATED] " Linus Torvalds
2018-05-01 17:36     ` Thomas Gleixner
2018-05-01 19:14       ` [MODERATED] " Borislav Petkov
2018-05-01 19:20   ` Thomas Gleixner
2018-05-01 19:24   ` Thomas Gleixner
2018-05-01 19:28     ` [MODERATED] " Borislav Petkov
2018-05-01 18:12 ` Konrad Rzeszutek Wilk
2018-05-01 18:30   ` Thomas Gleixner
2018-05-01 22:22     ` [MODERATED] " Konrad Rzeszutek Wilk
2018-05-01 19:28   ` Tim Chen
2018-05-01 21:54     ` Thomas Gleixner
2018-05-01 22:33     ` [MODERATED] " Tim Chen
2018-05-01 22:46       ` Thomas Gleixner
2018-05-02  5:08 ` [MODERATED] " Jon Masters

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