* [Qemu-devel] [PATCH v1 0/2] xlnx-zynqmp: Change the Cortex-R5 for Cortex-R5F @ 2018-05-03 11:56 Edgar E. Iglesias 2018-05-03 11:56 ` [Qemu-devel] [PATCH v1 1/2] target-arm: Add the Cortex-R5F Edgar E. Iglesias 2018-05-03 11:56 ` [Qemu-devel] [PATCH v1 2/2] xlnx-zynqmp: Swap Cortex-R5 for Cortex-R5F Edgar E. Iglesias 0 siblings, 2 replies; 10+ messages in thread From: Edgar E. Iglesias @ 2018-05-03 11:56 UTC (permalink / raw) To: qemu-devel Cc: qemu-arm, peter.maydell, frederic.konrad, sai.pavan.boddu, alistair, frasse.iglesias, edgar.iglesias From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> The ZynqMP actually has Cortex-R5Fs with the optional FPU enabled. Cheers, Edgar Edgar E. Iglesias (2): target-arm: Add the Cortex-R5F xlnx-zynqmp: Swap Cortex-R5 for Cortex-R5F hw/arm/xlnx-zynqmp.c | 2 +- target/arm/cpu.c | 9 +++++++++ 2 files changed, 10 insertions(+), 1 deletion(-) -- 2.14.1 ^ permalink raw reply [flat|nested] 10+ messages in thread
* [Qemu-devel] [PATCH v1 1/2] target-arm: Add the Cortex-R5F 2018-05-03 11:56 [Qemu-devel] [PATCH v1 0/2] xlnx-zynqmp: Change the Cortex-R5 for Cortex-R5F Edgar E. Iglesias @ 2018-05-03 11:56 ` Edgar E. Iglesias 2018-05-03 14:34 ` KONRAD Frederic ` (2 more replies) 2018-05-03 11:56 ` [Qemu-devel] [PATCH v1 2/2] xlnx-zynqmp: Swap Cortex-R5 for Cortex-R5F Edgar E. Iglesias 1 sibling, 3 replies; 10+ messages in thread From: Edgar E. Iglesias @ 2018-05-03 11:56 UTC (permalink / raw) To: qemu-devel Cc: qemu-arm, peter.maydell, frederic.konrad, sai.pavan.boddu, alistair, frasse.iglesias, edgar.iglesias From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> Add the Cortex-R5F with the optional FPU enabled. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> --- target/arm/cpu.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index d175c5e94f..7a7035c037 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1341,6 +1341,14 @@ static void cortex_r5_initfn(Object *obj) define_arm_cp_regs(cpu, cortexr5_cp_reginfo); } +static void cortex_r5f_initfn(Object *obj) +{ + ARMCPU *cpu = ARM_CPU(obj); + + cortex_r5_initfn(obj); + set_feature(&cpu->env, ARM_FEATURE_VFP3); +} + static const ARMCPRegInfo cortexa8_cp_reginfo[] = { { .name = "L2LOCKDOWN", .cp = 15, .crn = 9, .crm = 0, .opc1 = 1, .opc2 = 0, .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 }, @@ -1801,6 +1809,7 @@ static const ARMCPUInfo arm_cpus[] = { { .name = "cortex-m33", .initfn = cortex_m33_initfn, .class_init = arm_v7m_class_init }, { .name = "cortex-r5", .initfn = cortex_r5_initfn }, + { .name = "cortex-r5f", .initfn = cortex_r5f_initfn }, { .name = "cortex-a7", .initfn = cortex_a7_initfn }, { .name = "cortex-a8", .initfn = cortex_a8_initfn }, { .name = "cortex-a9", .initfn = cortex_a9_initfn }, -- 2.14.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [Qemu-devel] [PATCH v1 1/2] target-arm: Add the Cortex-R5F 2018-05-03 11:56 ` [Qemu-devel] [PATCH v1 1/2] target-arm: Add the Cortex-R5F Edgar E. Iglesias @ 2018-05-03 14:34 ` KONRAD Frederic 2018-05-03 15:58 ` Alistair Francis 2018-05-10 17:59 ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé 2 siblings, 0 replies; 10+ messages in thread From: KONRAD Frederic @ 2018-05-03 14:34 UTC (permalink / raw) To: Edgar E. Iglesias, qemu-devel Cc: qemu-arm, peter.maydell, sai.pavan.boddu, alistair, frasse.iglesias, edgar.iglesias On 05/03/2018 01:56 PM, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> > > Add the Cortex-R5F with the optional FPU enabled. > Seems ok to me. Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com> > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> > --- > target/arm/cpu.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/target/arm/cpu.c b/target/arm/cpu.c > index d175c5e94f..7a7035c037 100644 > --- a/target/arm/cpu.c > +++ b/target/arm/cpu.c > @@ -1341,6 +1341,14 @@ static void cortex_r5_initfn(Object *obj) > define_arm_cp_regs(cpu, cortexr5_cp_reginfo); > } > > +static void cortex_r5f_initfn(Object *obj) > +{ > + ARMCPU *cpu = ARM_CPU(obj); > + > + cortex_r5_initfn(obj); > + set_feature(&cpu->env, ARM_FEATURE_VFP3); > +} > + > static const ARMCPRegInfo cortexa8_cp_reginfo[] = { > { .name = "L2LOCKDOWN", .cp = 15, .crn = 9, .crm = 0, .opc1 = 1, .opc2 = 0, > .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 }, > @@ -1801,6 +1809,7 @@ static const ARMCPUInfo arm_cpus[] = { > { .name = "cortex-m33", .initfn = cortex_m33_initfn, > .class_init = arm_v7m_class_init }, > { .name = "cortex-r5", .initfn = cortex_r5_initfn }, > + { .name = "cortex-r5f", .initfn = cortex_r5f_initfn }, > { .name = "cortex-a7", .initfn = cortex_a7_initfn }, > { .name = "cortex-a8", .initfn = cortex_a8_initfn }, > { .name = "cortex-a9", .initfn = cortex_a9_initfn }, > ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Qemu-devel] [PATCH v1 1/2] target-arm: Add the Cortex-R5F 2018-05-03 11:56 ` [Qemu-devel] [PATCH v1 1/2] target-arm: Add the Cortex-R5F Edgar E. Iglesias 2018-05-03 14:34 ` KONRAD Frederic @ 2018-05-03 15:58 ` Alistair Francis 2018-05-10 17:59 ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé 2 siblings, 0 replies; 10+ messages in thread From: Alistair Francis @ 2018-05-03 15:58 UTC (permalink / raw) To: Edgar Iglesias Cc: qemu-devel@nongnu.org Developers, Edgar Iglesias, Peter Maydell, Sai Pavan Boddu, Francisco Iglesias, Alistair Francis, KONRAD Frederic, qemu-arm On Thu, May 3, 2018 at 4:58 AM Edgar E. Iglesias <edgar.iglesias@gmail.com> wrote: > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> > Add the Cortex-R5F with the optional FPU enabled. > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/arm/cpu.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > diff --git a/target/arm/cpu.c b/target/arm/cpu.c > index d175c5e94f..7a7035c037 100644 > --- a/target/arm/cpu.c > +++ b/target/arm/cpu.c > @@ -1341,6 +1341,14 @@ static void cortex_r5_initfn(Object *obj) > define_arm_cp_regs(cpu, cortexr5_cp_reginfo); > } > +static void cortex_r5f_initfn(Object *obj) > +{ > + ARMCPU *cpu = ARM_CPU(obj); > + > + cortex_r5_initfn(obj); > + set_feature(&cpu->env, ARM_FEATURE_VFP3); > +} > + > static const ARMCPRegInfo cortexa8_cp_reginfo[] = { > { .name = "L2LOCKDOWN", .cp = 15, .crn = 9, .crm = 0, .opc1 = 1, .opc2 = 0, > .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 }, > @@ -1801,6 +1809,7 @@ static const ARMCPUInfo arm_cpus[] = { > { .name = "cortex-m33", .initfn = cortex_m33_initfn, > .class_init = arm_v7m_class_init }, > { .name = "cortex-r5", .initfn = cortex_r5_initfn }, > + { .name = "cortex-r5f", .initfn = cortex_r5f_initfn }, > { .name = "cortex-a7", .initfn = cortex_a7_initfn }, > { .name = "cortex-a8", .initfn = cortex_a8_initfn }, > { .name = "cortex-a9", .initfn = cortex_a9_initfn }, > -- > 2.14.1 ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Qemu-devel] [Qemu-arm] [PATCH v1 1/2] target-arm: Add the Cortex-R5F 2018-05-03 11:56 ` [Qemu-devel] [PATCH v1 1/2] target-arm: Add the Cortex-R5F Edgar E. Iglesias 2018-05-03 14:34 ` KONRAD Frederic 2018-05-03 15:58 ` Alistair Francis @ 2018-05-10 17:59 ` Philippe Mathieu-Daudé 2 siblings, 0 replies; 10+ messages in thread From: Philippe Mathieu-Daudé @ 2018-05-10 17:59 UTC (permalink / raw) To: Edgar E. Iglesias, qemu-devel Cc: edgar.iglesias, peter.maydell, sai.pavan.boddu, frasse.iglesias, alistair, frederic.konrad, qemu-arm On 05/03/2018 08:56 AM, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> > > Add the Cortex-R5F with the optional FPU enabled. > > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > --- > target/arm/cpu.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/target/arm/cpu.c b/target/arm/cpu.c > index d175c5e94f..7a7035c037 100644 > --- a/target/arm/cpu.c > +++ b/target/arm/cpu.c > @@ -1341,6 +1341,14 @@ static void cortex_r5_initfn(Object *obj) > define_arm_cp_regs(cpu, cortexr5_cp_reginfo); > } > > +static void cortex_r5f_initfn(Object *obj) > +{ > + ARMCPU *cpu = ARM_CPU(obj); > + > + cortex_r5_initfn(obj); > + set_feature(&cpu->env, ARM_FEATURE_VFP3); > +} > + > static const ARMCPRegInfo cortexa8_cp_reginfo[] = { > { .name = "L2LOCKDOWN", .cp = 15, .crn = 9, .crm = 0, .opc1 = 1, .opc2 = 0, > .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 }, > @@ -1801,6 +1809,7 @@ static const ARMCPUInfo arm_cpus[] = { > { .name = "cortex-m33", .initfn = cortex_m33_initfn, > .class_init = arm_v7m_class_init }, > { .name = "cortex-r5", .initfn = cortex_r5_initfn }, > + { .name = "cortex-r5f", .initfn = cortex_r5f_initfn }, > { .name = "cortex-a7", .initfn = cortex_a7_initfn }, > { .name = "cortex-a8", .initfn = cortex_a8_initfn }, > { .name = "cortex-a9", .initfn = cortex_a9_initfn }, > ^ permalink raw reply [flat|nested] 10+ messages in thread
* [Qemu-devel] [PATCH v1 2/2] xlnx-zynqmp: Swap Cortex-R5 for Cortex-R5F 2018-05-03 11:56 [Qemu-devel] [PATCH v1 0/2] xlnx-zynqmp: Change the Cortex-R5 for Cortex-R5F Edgar E. Iglesias 2018-05-03 11:56 ` [Qemu-devel] [PATCH v1 1/2] target-arm: Add the Cortex-R5F Edgar E. Iglesias @ 2018-05-03 11:56 ` Edgar E. Iglesias 2018-05-03 14:35 ` KONRAD Frederic ` (2 more replies) 1 sibling, 3 replies; 10+ messages in thread From: Edgar E. Iglesias @ 2018-05-03 11:56 UTC (permalink / raw) To: qemu-devel Cc: qemu-arm, peter.maydell, frederic.konrad, sai.pavan.boddu, alistair, frasse.iglesias, edgar.iglesias From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> The ZynqMP has Cortex-R5Fs with the optional FPU enabled. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> --- hw/arm/xlnx-zynqmp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index 505253e0d2..efeb53c732 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -116,7 +116,7 @@ static void xlnx_zynqmp_create_rpu(XlnxZynqMPState *s, const char *boot_cpu, char *name; object_initialize(&s->rpu_cpu[i], sizeof(s->rpu_cpu[i]), - "cortex-r5-" TYPE_ARM_CPU); + "cortex-r5f-" TYPE_ARM_CPU); object_property_add_child(OBJECT(s), "rpu-cpu[*]", OBJECT(&s->rpu_cpu[i]), &error_abort); -- 2.14.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [Qemu-devel] [PATCH v1 2/2] xlnx-zynqmp: Swap Cortex-R5 for Cortex-R5F 2018-05-03 11:56 ` [Qemu-devel] [PATCH v1 2/2] xlnx-zynqmp: Swap Cortex-R5 for Cortex-R5F Edgar E. Iglesias @ 2018-05-03 14:35 ` KONRAD Frederic 2018-05-03 15:59 ` Alistair Francis 2018-05-10 18:09 ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé 2 siblings, 0 replies; 10+ messages in thread From: KONRAD Frederic @ 2018-05-03 14:35 UTC (permalink / raw) To: Edgar E. Iglesias, qemu-devel Cc: qemu-arm, peter.maydell, sai.pavan.boddu, alistair, frasse.iglesias, edgar.iglesias On 05/03/2018 01:56 PM, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> > > The ZynqMP has Cortex-R5Fs with the optional FPU enabled. > Seems ok to me according to the documentation. Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com> > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> > --- > hw/arm/xlnx-zynqmp.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c > index 505253e0d2..efeb53c732 100644 > --- a/hw/arm/xlnx-zynqmp.c > +++ b/hw/arm/xlnx-zynqmp.c > @@ -116,7 +116,7 @@ static void xlnx_zynqmp_create_rpu(XlnxZynqMPState *s, const char *boot_cpu, > char *name; > > object_initialize(&s->rpu_cpu[i], sizeof(s->rpu_cpu[i]), > - "cortex-r5-" TYPE_ARM_CPU); > + "cortex-r5f-" TYPE_ARM_CPU); > object_property_add_child(OBJECT(s), "rpu-cpu[*]", > OBJECT(&s->rpu_cpu[i]), &error_abort); > > ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Qemu-devel] [PATCH v1 2/2] xlnx-zynqmp: Swap Cortex-R5 for Cortex-R5F 2018-05-03 11:56 ` [Qemu-devel] [PATCH v1 2/2] xlnx-zynqmp: Swap Cortex-R5 for Cortex-R5F Edgar E. Iglesias 2018-05-03 14:35 ` KONRAD Frederic @ 2018-05-03 15:59 ` Alistair Francis 2018-05-10 18:09 ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé 2 siblings, 0 replies; 10+ messages in thread From: Alistair Francis @ 2018-05-03 15:59 UTC (permalink / raw) To: Edgar Iglesias Cc: qemu-devel@nongnu.org Developers, Edgar Iglesias, Peter Maydell, Sai Pavan Boddu, Francisco Iglesias, Alistair Francis, KONRAD Frederic, qemu-arm On Thu, May 3, 2018 at 4:56 AM Edgar E. Iglesias <edgar.iglesias@gmail.com> wrote: > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> > The ZynqMP has Cortex-R5Fs with the optional FPU enabled. > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > hw/arm/xlnx-zynqmp.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c > index 505253e0d2..efeb53c732 100644 > --- a/hw/arm/xlnx-zynqmp.c > +++ b/hw/arm/xlnx-zynqmp.c > @@ -116,7 +116,7 @@ static void xlnx_zynqmp_create_rpu(XlnxZynqMPState *s, const char *boot_cpu, > char *name; > object_initialize(&s->rpu_cpu[i], sizeof(s->rpu_cpu[i]), > - "cortex-r5-" TYPE_ARM_CPU); > + "cortex-r5f-" TYPE_ARM_CPU); > object_property_add_child(OBJECT(s), "rpu-cpu[*]", > OBJECT(&s->rpu_cpu[i]), &error_abort); > -- > 2.14.1 ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Qemu-devel] [Qemu-arm] [PATCH v1 2/2] xlnx-zynqmp: Swap Cortex-R5 for Cortex-R5F 2018-05-03 11:56 ` [Qemu-devel] [PATCH v1 2/2] xlnx-zynqmp: Swap Cortex-R5 for Cortex-R5F Edgar E. Iglesias 2018-05-03 14:35 ` KONRAD Frederic 2018-05-03 15:59 ` Alistair Francis @ 2018-05-10 18:09 ` Philippe Mathieu-Daudé 2018-05-29 11:04 ` Edgar E. Iglesias 2 siblings, 1 reply; 10+ messages in thread From: Philippe Mathieu-Daudé @ 2018-05-10 18:09 UTC (permalink / raw) To: Edgar E. Iglesias, peter.maydell Cc: qemu-devel, edgar.iglesias, sai.pavan.boddu, frasse.iglesias, alistair, frederic.konrad, qemu-arm Hi Edgar, On 05/03/2018 08:56 AM, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> > > The ZynqMP has Cortex-R5Fs with the optional FPU enabled. What about updating the xlnx-zcu102 machine description too? mc->desc = "Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs ..." > > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> I just noticed we can not get information for the R profile cores via the monitor: (qemu) info cpus * CPU #0: thread_id=19283 CPU #1: thread_id=19284 CPU #2: thread_id=19285 CPU #3: thread_id=19286 same with "info registers -a" > --- > hw/arm/xlnx-zynqmp.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c > index 505253e0d2..efeb53c732 100644 > --- a/hw/arm/xlnx-zynqmp.c > +++ b/hw/arm/xlnx-zynqmp.c > @@ -116,7 +116,7 @@ static void xlnx_zynqmp_create_rpu(XlnxZynqMPState *s, const char *boot_cpu, > char *name; > > object_initialize(&s->rpu_cpu[i], sizeof(s->rpu_cpu[i]), > - "cortex-r5-" TYPE_ARM_CPU); > + "cortex-r5f-" TYPE_ARM_CPU); > object_property_add_child(OBJECT(s), "rpu-cpu[*]", > OBJECT(&s->rpu_cpu[i]), &error_abort); > > ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Qemu-devel] [Qemu-arm] [PATCH v1 2/2] xlnx-zynqmp: Swap Cortex-R5 for Cortex-R5F 2018-05-10 18:09 ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé @ 2018-05-29 11:04 ` Edgar E. Iglesias 0 siblings, 0 replies; 10+ messages in thread From: Edgar E. Iglesias @ 2018-05-29 11:04 UTC (permalink / raw) To: Philippe Mathieu-Daudé Cc: Edgar E. Iglesias, peter.maydell, qemu-devel, sai.pavan.boddu, frasse.iglesias, alistair, frederic.konrad, qemu-arm On Thu, May 10, 2018 at 03:09:46PM -0300, Philippe Mathieu-Daudé wrote: > Hi Edgar, > > On 05/03/2018 08:56 AM, Edgar E. Iglesias wrote: > > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> > > > > The ZynqMP has Cortex-R5Fs with the optional FPU enabled. > > What about updating the xlnx-zcu102 machine description too? > > mc->desc = "Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs ..." Yes, I've added the 'F' in v2 (I've kept the Rb and Tb lines). Will send v2 in a moment. Cheers, Edgar > > > > > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> > > Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > > I just noticed we can not get information for the R profile cores via > the monitor: > > (qemu) info cpus > * CPU #0: thread_id=19283 > CPU #1: thread_id=19284 > CPU #2: thread_id=19285 > CPU #3: thread_id=19286 > > same with "info registers -a" > > > --- > > hw/arm/xlnx-zynqmp.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c > > index 505253e0d2..efeb53c732 100644 > > --- a/hw/arm/xlnx-zynqmp.c > > +++ b/hw/arm/xlnx-zynqmp.c > > @@ -116,7 +116,7 @@ static void xlnx_zynqmp_create_rpu(XlnxZynqMPState *s, const char *boot_cpu, > > char *name; > > > > object_initialize(&s->rpu_cpu[i], sizeof(s->rpu_cpu[i]), > > - "cortex-r5-" TYPE_ARM_CPU); > > + "cortex-r5f-" TYPE_ARM_CPU); > > object_property_add_child(OBJECT(s), "rpu-cpu[*]", > > OBJECT(&s->rpu_cpu[i]), &error_abort); > > > > ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2018-05-29 11:05 UTC | newest] Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2018-05-03 11:56 [Qemu-devel] [PATCH v1 0/2] xlnx-zynqmp: Change the Cortex-R5 for Cortex-R5F Edgar E. Iglesias 2018-05-03 11:56 ` [Qemu-devel] [PATCH v1 1/2] target-arm: Add the Cortex-R5F Edgar E. Iglesias 2018-05-03 14:34 ` KONRAD Frederic 2018-05-03 15:58 ` Alistair Francis 2018-05-10 17:59 ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé 2018-05-03 11:56 ` [Qemu-devel] [PATCH v1 2/2] xlnx-zynqmp: Swap Cortex-R5 for Cortex-R5F Edgar E. Iglesias 2018-05-03 14:35 ` KONRAD Frederic 2018-05-03 15:59 ` Alistair Francis 2018-05-10 18:09 ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé 2018-05-29 11:04 ` Edgar E. Iglesias
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