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From: Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
To: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Maxime Ripard
	<maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>,
	Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
	Linus Walleij
	<linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Cc: linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
	Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
Subject: [PATCH 5/7] arm64: allwinner: h6: add R_INTC interrupt controller
Date: Fri,  4 May 2018 02:38:45 +0800	[thread overview]
Message-ID: <20180503183847.11046-6-icenowy@aosc.io> (raw)
In-Reply-To: <20180503183847.11046-1-icenowy-h8G6r0blFSE@public.gmane.org>

Allwinner H6 SoC has also a R_INTC interrupt controller like Allwinner
A64 SoC, but has its base address changed due to the memory map change
in H6.

Add it into the device tree.

Signed-off-by: Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
---
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index a18b78fb4850..b0b342c8c189 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -184,6 +184,15 @@
 			#reset-cells = <1>;
 		};
 
+		r_intc: interrupt-controller@7021000 {
+			compatible = "allwinner,sun50i-h6-r-intc",
+				     "allwinner,sun6i-a31-r-intc";
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			reg = <0x07021000 0x400>;
+			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
 		r_pio: pinctrl@7022000 {
 			compatible = "allwinner,sun50i-h6-r-pinctrl";
 			reg = <0x07022000 0x400>;
-- 
2.15.1

WARNING: multiple messages have this Message-ID (diff)
From: Icenowy Zheng <icenowy@aosc.io>
To: Rob Herring <robh+dt@kernel.org>,
	Maxime Ripard <maxime.ripard@bootlin.com>,
	Chen-Yu Tsai <wens@csie.org>,
	Linus Walleij <linus.walleij@linaro.org>
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
	linux-sunxi@googlegroups.com, Icenowy Zheng <icenowy@aosc.io>
Subject: [PATCH 5/7] arm64: allwinner: h6: add R_INTC interrupt controller
Date: Fri,  4 May 2018 02:38:45 +0800	[thread overview]
Message-ID: <20180503183847.11046-6-icenowy@aosc.io> (raw)
In-Reply-To: <20180503183847.11046-1-icenowy@aosc.io>

Allwinner H6 SoC has also a R_INTC interrupt controller like Allwinner
A64 SoC, but has its base address changed due to the memory map change
in H6.

Add it into the device tree.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index a18b78fb4850..b0b342c8c189 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -184,6 +184,15 @@
 			#reset-cells = <1>;
 		};
 
+		r_intc: interrupt-controller@7021000 {
+			compatible = "allwinner,sun50i-h6-r-intc",
+				     "allwinner,sun6i-a31-r-intc";
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			reg = <0x07021000 0x400>;
+			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
 		r_pio: pinctrl@7022000 {
 			compatible = "allwinner,sun50i-h6-r-pinctrl";
 			reg = <0x07022000 0x400>;
-- 
2.15.1

WARNING: multiple messages have this Message-ID (diff)
From: icenowy@aosc.io (Icenowy Zheng)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 5/7] arm64: allwinner: h6: add R_INTC interrupt controller
Date: Fri,  4 May 2018 02:38:45 +0800	[thread overview]
Message-ID: <20180503183847.11046-6-icenowy@aosc.io> (raw)
In-Reply-To: <20180503183847.11046-1-icenowy@aosc.io>

Allwinner H6 SoC has also a R_INTC interrupt controller like Allwinner
A64 SoC, but has its base address changed due to the memory map change
in H6.

Add it into the device tree.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index a18b78fb4850..b0b342c8c189 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -184,6 +184,15 @@
 			#reset-cells = <1>;
 		};
 
+		r_intc: interrupt-controller at 7021000 {
+			compatible = "allwinner,sun50i-h6-r-intc",
+				     "allwinner,sun6i-a31-r-intc";
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			reg = <0x07021000 0x400>;
+			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
 		r_pio: pinctrl at 7022000 {
 			compatible = "allwinner,sun50i-h6-r-pinctrl";
 			reg = <0x07022000 0x400>;
-- 
2.15.1

  parent reply	other threads:[~2018-05-03 18:38 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-03 18:38 [PATCH 0/7] Allwinner H6 R_{PIO,INTC,I2C} support Icenowy Zheng
2018-05-03 18:38 ` Icenowy Zheng
2018-05-03 18:38 ` Icenowy Zheng
2018-05-03 18:38 ` [PATCH 1/7] clk: sunxi-ng: add support for H6 PRCM CCU Icenowy Zheng
2018-05-03 18:38   ` Icenowy Zheng
     [not found]   ` <20180503183847.11046-2-icenowy-h8G6r0blFSE@public.gmane.org>
2018-05-04 15:06     ` Maxime Ripard
2018-05-04 15:06       ` Maxime Ripard
2018-05-04 15:06       ` Maxime Ripard
     [not found] ` <20180503183847.11046-1-icenowy-h8G6r0blFSE@public.gmane.org>
2018-05-03 18:38   ` [PATCH 2/7] arm64: allwinner: h6: add PRCM CCU device node Icenowy Zheng
2018-05-03 18:38     ` Icenowy Zheng
2018-05-03 18:38     ` Icenowy Zheng
     [not found]     ` <20180503183847.11046-3-icenowy-h8G6r0blFSE@public.gmane.org>
2018-05-04 15:07       ` Maxime Ripard
2018-05-04 15:07         ` Maxime Ripard
2018-05-04 15:07         ` Maxime Ripard
2018-05-03 18:38   ` [PATCH 3/7] pinctrl: sunxi: add support for H6 R_PIO pin controller Icenowy Zheng
2018-05-03 18:38     ` Icenowy Zheng
2018-05-03 18:38     ` Icenowy Zheng
     [not found]     ` <20180503183847.11046-4-icenowy-h8G6r0blFSE@public.gmane.org>
2018-05-04 15:06       ` Maxime Ripard
2018-05-04 15:06         ` Maxime Ripard
2018-05-04 15:06         ` Maxime Ripard
2018-05-07 21:05       ` Rob Herring
2018-05-07 21:05         ` Rob Herring
2018-05-07 21:05         ` Rob Herring
2018-05-16 12:20       ` Linus Walleij
2018-05-16 12:20         ` Linus Walleij
2018-05-16 12:20         ` Linus Walleij
2018-05-03 18:38   ` [PATCH 4/7] arm64: allwinner: h6: add node for " Icenowy Zheng
2018-05-03 18:38     ` Icenowy Zheng
2018-05-03 18:38     ` Icenowy Zheng
     [not found]     ` <20180503183847.11046-5-icenowy-h8G6r0blFSE@public.gmane.org>
2018-05-04 15:09       ` Maxime Ripard
2018-05-04 15:09         ` Maxime Ripard
2018-05-04 15:09         ` Maxime Ripard
2018-05-03 18:38   ` Icenowy Zheng [this message]
2018-05-03 18:38     ` [PATCH 5/7] arm64: allwinner: h6: add R_INTC interrupt controller Icenowy Zheng
2018-05-03 18:38     ` Icenowy Zheng
     [not found]     ` <20180503183847.11046-6-icenowy-h8G6r0blFSE@public.gmane.org>
2018-05-04 15:10       ` Maxime Ripard
2018-05-04 15:10         ` Maxime Ripard
2018-05-04 15:10         ` Maxime Ripard
2018-05-03 18:38   ` [PATCH 6/7] arm64: allwinner: h6: add R_I2C controller Icenowy Zheng
2018-05-03 18:38     ` Icenowy Zheng
2018-05-03 18:38     ` Icenowy Zheng
     [not found]     ` <20180503183847.11046-7-icenowy-h8G6r0blFSE@public.gmane.org>
2018-05-04 15:12       ` Maxime Ripard
2018-05-04 15:12         ` Maxime Ripard
2018-05-04 15:12         ` Maxime Ripard
2018-05-03 18:38   ` [PATCH 7/7] arm64: allwinner: h6: add PCF8563 RTC on Pine H64 board Icenowy Zheng
2018-05-03 18:38     ` Icenowy Zheng
2018-05-03 18:38     ` Icenowy Zheng

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