[U-Boot] [PATCH 3/3] rockchip: fix incorrect detection of ram size

[Marty E. Plummer <hanetzer@startmail.com>]

On Sun, May 06, 2018 at 02:08:25PM -0500, Marty E. Plummer wrote:
> > On Sun, May 06, 2018 at 08:39:23PM +0200, klaus.goger at theobroma-systems.com wrote:
> > > On 06.05.2018, at 16:25, Marty E. Plummer <hanetzer@startmail.com> wrote:
> > > +		 * we use the 0x00000000~0xfeffffff space
> > > +		 * since 0xff000000~0xffffffff is soc register space
> > > +		 * so we reserve it 
> > > +		 */
> > 
> > That's not true for all Rockchip SoCs. On the RK3399 for example the upper limit 
> > is 0xf8000000. Even on the RK3288 DRAM address range is actually
> >  0x00000000-0xfe00000
> >
> > > +		size_mb = min(size_mb, 0xff000000/SZ_1M);
> > > 	}
> > 
> > Should be 0xfe000000 (4G-32MB) for RK3288.
> > But there is already a define for that, SDRAM_MAX_SIZE is defined in
> > rkxxx_common.h. Using that one would help to avoid possible breakage
> > of other Rockchip SoCs.
> > 
> Oh, does that get #defined properly for each SoC? if so, I'll sub that
> in for better compat.
In fact, could you or someone else help me to understand the #include
chain here? I'm not certain as to what that is available in each header
mentioned can be used in this file to get max compat across the rockchip
lineup, and I don't want to break someone elses board/etc with something
that 'works for me'.