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From: "Marty E. Plummer" <hanetzer@startmail.com>
To: Kever Yang <kever.yang@rock-chips.com>
Cc: vagrant@debian.org, u-boot@lists.denx.de,
	linux-rockchip@lists.infradead.org
Subject: Re: [PATCH 3/3] rockchip: fix incorrect detection of ram size
Date: Sun, 6 May 2018 21:34:14 -0500	[thread overview]
Message-ID: <20180507023413.mil4wj7xtjy6gnuw@proprietary-killer> (raw)
In-Reply-To: <6a0116f8-fd8a-dd53-2759-0014c7ab2700@rock-chips.com>

On Mon, May 07, 2018 at 10:20:55AM +0800, Kever Yang wrote:
> Hi Marty,
> 
> 
> On 05/06/2018 10:25 PM, Marty E. Plummer wrote:
> > Taken from coreboot's src/soc/rockchip/rk3288/sdram.c
> >
> > Without this change, my u-boot build for the asus c201 chromebook (4GiB)
> > is incorrectly detected as 0 Bytes of ram.
> 
> I know the root cause for this issue, and I have a local patch for it.
> The rk3288 is 32bit, and 4GB size is just out of range, so we need to before
> the max size before return with '<<20'. Sorry for forgot to send it out.
> 
> >
> > Signed-off-by: Marty E. Plummer <hanetzer@startmail.com>
> > ---
> >  arch/arm/mach-rockchip/sdram_common.c | 62 ++++++++++++++++-----------
> >  1 file changed, 37 insertions(+), 25 deletions(-)
> >
> > diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
> > index 76dbdc8715..a9c9f970a4 100644
> > --- a/arch/arm/mach-rockchip/sdram_common.c
> > +++ b/arch/arm/mach-rockchip/sdram_common.c
> > @@ -10,6 +10,8 @@
> >  #include <asm/io.h>
> >  #include <asm/arch/sdram_common.h>
> >  #include <dm/uclass-internal.h>
> > +#include <linux/kernel.h>
> > +#include <linux/sizes.h>
> >  
> >  DECLARE_GLOBAL_DATA_PTR;
> >  size_t rockchip_sdram_size(phys_addr_t reg)
> > @@ -19,34 +21,44 @@ size_t rockchip_sdram_size(phys_addr_t reg)
> >  	size_t size_mb = 0;
> >  	u32 ch;
> >  
> > -	u32 sys_reg = readl(reg);
> > -	u32 ch_num = 1 + ((sys_reg >> SYS_REG_NUM_CH_SHIFT)
> > -		       & SYS_REG_NUM_CH_MASK);
> > +	if (!size_mb) {
> 
> I don't understand this and follow up changes, we don't really need it,
> isn't it?
> I think don't need the changes before here.
Yeah, that was just another level of indentation for the if (!size_mb)
guard, but I've reworked the patch to not do that as it was pointed out
that since size_mb is initialized to 0 prior.
> > +		/*
> > +		 * we use the 0x00000000~0xfeffffff space
> > +		 * since 0xff000000~0xffffffff is soc register space
> > +		 * so we reserve it
> > +		 */
> > +		size_mb = min(size_mb, 0xff000000/SZ_1M);
> 
> This is what we really need, as Klaus point out, we need to use
> SDRAM_MAX_SIZE
> instead of hard code.
Yeah, I've got a rework on that which uses SDRAM_MAX_SIZE as instructed,
build and boot tested on my hardware.
> 
> Thanks,
> - Kever
> >  	}
> >  
> >  	return (size_t)size_mb << 20;
> 
> 
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WARNING: multiple messages have this Message-ID (diff)
From: Marty E. Plummer <hanetzer@startmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 3/3] rockchip: fix incorrect detection of ram size
Date: Sun, 6 May 2018 21:34:14 -0500	[thread overview]
Message-ID: <20180507023413.mil4wj7xtjy6gnuw@proprietary-killer> (raw)
In-Reply-To: <6a0116f8-fd8a-dd53-2759-0014c7ab2700@rock-chips.com>

On Mon, May 07, 2018 at 10:20:55AM +0800, Kever Yang wrote:
> Hi Marty,
> 
> 
> On 05/06/2018 10:25 PM, Marty E. Plummer wrote:
> > Taken from coreboot's src/soc/rockchip/rk3288/sdram.c
> >
> > Without this change, my u-boot build for the asus c201 chromebook (4GiB)
> > is incorrectly detected as 0 Bytes of ram.
> 
> I know the root cause for this issue, and I have a local patch for it.
> The rk3288 is 32bit, and 4GB size is just out of range, so we need to before
> the max size before return with '<<20'. Sorry for forgot to send it out.
> 
> >
> > Signed-off-by: Marty E. Plummer <hanetzer@startmail.com>
> > ---
> >  arch/arm/mach-rockchip/sdram_common.c | 62 ++++++++++++++++-----------
> >  1 file changed, 37 insertions(+), 25 deletions(-)
> >
> > diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
> > index 76dbdc8715..a9c9f970a4 100644
> > --- a/arch/arm/mach-rockchip/sdram_common.c
> > +++ b/arch/arm/mach-rockchip/sdram_common.c
> > @@ -10,6 +10,8 @@
> >  #include <asm/io.h>
> >  #include <asm/arch/sdram_common.h>
> >  #include <dm/uclass-internal.h>
> > +#include <linux/kernel.h>
> > +#include <linux/sizes.h>
> >  
> >  DECLARE_GLOBAL_DATA_PTR;
> >  size_t rockchip_sdram_size(phys_addr_t reg)
> > @@ -19,34 +21,44 @@ size_t rockchip_sdram_size(phys_addr_t reg)
> >  	size_t size_mb = 0;
> >  	u32 ch;
> >  
> > -	u32 sys_reg = readl(reg);
> > -	u32 ch_num = 1 + ((sys_reg >> SYS_REG_NUM_CH_SHIFT)
> > -		       & SYS_REG_NUM_CH_MASK);
> > +	if (!size_mb) {
> 
> I don't understand this and follow up changes, we don't really need it,
> isn't it?
> I think don't need the changes before here.
Yeah, that was just another level of indentation for the if (!size_mb)
guard, but I've reworked the patch to not do that as it was pointed out
that since size_mb is initialized to 0 prior.
> > +		/*
> > +		 * we use the 0x00000000~0xfeffffff space
> > +		 * since 0xff000000~0xffffffff is soc register space
> > +		 * so we reserve it
> > +		 */
> > +		size_mb = min(size_mb, 0xff000000/SZ_1M);
> 
> This is what we really need, as Klaus point out, we need to use
> SDRAM_MAX_SIZE
> instead of hard code.
Yeah, I've got a rework on that which uses SDRAM_MAX_SIZE as instructed,
build and boot tested on my hardware.
> 
> Thanks,
> - Kever
> >  	}
> >  
> >  	return (size_t)size_mb << 20;
> 
> 

  reply	other threads:[~2018-05-07  2:34 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-06 14:25 [PATCH 0/3] add support for the asus C201 chromebook (4GiB) Marty E. Plummer
2018-05-06 14:25 ` [U-Boot] " Marty E. Plummer
     [not found] ` <20180506142513.19911-1-hanetzer-zVALfsKDk1AS+FvcfC7Uqw@public.gmane.org>
2018-05-06 14:25   ` [PATCH 1/3] sf: Add GigaDevice gd25q32b entry Marty E. Plummer
2018-05-06 14:25     ` [U-Boot] " Marty E. Plummer
2018-05-09  8:57     ` [U-Boot,1/3] " Philipp Tomsich
2018-05-09  8:57       ` [U-Boot] " Philipp Tomsich
2018-05-06 14:25   ` [PATCH 2/3] rockchip: add support for veyron-speedy (ASUS Chromebook C201) Marty E. Plummer
2018-05-06 14:25     ` [U-Boot] " Marty E. Plummer
2018-05-06 22:12     ` klaus.goger at theobroma-systems.com
2018-05-07  0:20       ` Marty E. Plummer
2018-07-13 10:31         ` Dr. Philipp Tomsich
2018-07-24  5:12           ` Marty E. Plummer
2018-07-24  8:05             ` Dr. Philipp Tomsich
2018-05-06 14:25   ` [PATCH 3/3] rockchip: fix incorrect detection of ram size Marty E. Plummer
2018-05-06 14:25     ` [U-Boot] " Marty E. Plummer
2018-05-06 18:39     ` klaus.goger at theobroma-systems.com
2018-05-06 19:08       ` Marty E. Plummer
2018-05-06 20:03         ` Marty E. Plummer
2018-05-06 20:21           ` klaus.goger at theobroma-systems.com
2018-05-06 20:41             ` Marty E. Plummer
2018-05-06 22:19     ` Dr. Philipp Tomsich
2018-05-06 22:19       ` [U-Boot] " Dr. Philipp Tomsich
2018-05-07  0:25       ` Marty E. Plummer
2018-05-07  0:25         ` [U-Boot] " Marty E. Plummer
2018-05-07  2:20     ` Kever Yang
2018-05-07  2:20       ` [U-Boot] " Kever Yang
2018-05-07  2:34       ` Marty E. Plummer [this message]
2018-05-07  2:34         ` Marty E. Plummer
2018-05-07  9:16         ` Dr. Philipp Tomsich
2018-05-07  9:16           ` [U-Boot] " Dr. Philipp Tomsich
     [not found]           ` <791299C0-EEC0-4DB1-97C4-A8DAD3B1A481-SN7IsUiht6C/RdPyistoZJqQE7yCjDx5@public.gmane.org>
2018-05-08  0:52             ` Marty E. Plummer
2018-05-08  0:52               ` Marty E. Plummer
2018-05-08 10:21               ` Dr. Philipp Tomsich
2018-05-08 10:21                 ` [U-Boot] " Dr. Philipp Tomsich
2018-05-08 10:23                 ` Dr. Philipp Tomsich
2018-05-08 10:23                   ` [U-Boot] " Dr. Philipp Tomsich
2018-05-08 19:21                 ` Marty E. Plummer
2018-05-08 19:21                   ` [U-Boot] " Marty E. Plummer
2018-05-08 21:08                   ` Dr. Philipp Tomsich
2018-05-08 21:08                     ` [U-Boot] " Dr. Philipp Tomsich
     [not found]                     ` <C5B7DFAE-C5CA-4D9E-B6CB-C44E9AD974E9-SN7IsUiht6C/RdPyistoZJqQE7yCjDx5@public.gmane.org>
2018-05-09  5:29                       ` Marty E. Plummer
2018-05-09  5:29                         ` Marty E. Plummer
2018-05-09  7:24                         ` Dr. Philipp Tomsich
2018-05-09  7:24                           ` [U-Boot] " Dr. Philipp Tomsich
2018-05-14 15:56                           ` Dr. Philipp Tomsich
2018-05-14 15:56                             ` [U-Boot] " Dr. Philipp Tomsich
2018-05-19 10:40                             ` Marty E. Plummer
2018-05-19 12:08                               ` Dr. Philipp Tomsich
2018-07-06  3:11                                 ` Marty E. Plummer
2018-07-24  8:07                                   ` Dr. Philipp Tomsich
2018-07-25 16:28                                     ` Carlo Caione
2018-07-10 14:41                 ` Simon Glass
2018-07-10 14:41                   ` [U-Boot] " Simon Glass
2018-07-10 18:55                   ` Dr. Philipp Tomsich
2018-07-10 18:55                     ` [U-Boot] " Dr. Philipp Tomsich
2018-05-07  0:32 ` [U-Boot] [PATCH 0/3] add support for the asus C201 chromebook (4GiB) Marty E. Plummer

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