All of lore.kernel.org
 help / color / mirror / Atom feed
From: Eduardo Habkost <ehabkost@redhat.com>
To: Babu Moger <babu.moger@amd.com>
Cc: geoff@hostfission.com, kvm@vger.kernel.org, mst@redhat.com,
	kash@tripleback.net, mtosatti@redhat.com, qemu-devel@nongnu.org,
	marcel@redhat.com, pbonzini@redhat.com, rth@twiddle.net
Subject: Re: [PATCH v7 2/9] i386: Add cache information in X86CPUDefinition
Date: Mon, 7 May 2018 16:09:46 -0300	[thread overview]
Message-ID: <20180507190946.GB13350@localhost.localdomain> (raw)
In-Reply-To: <1524760009-24710-3-git-send-email-babu.moger@amd.com>

On Thu, Apr 26, 2018 at 11:26:42AM -0500, Babu Moger wrote:
> Add cache information in X86CPUDefinition and CPUX86State.
> 
> Signed-off-by: Babu Moger <babu.moger@amd.com>
> Tested-by: Geoffrey McRae <geoff@hostfission.com>
> ---
>  target/i386/cpu.c | 4 ++++
>  target/i386/cpu.h | 8 ++++++++
>  2 files changed, 12 insertions(+)
> 
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index b6c1592..a518a0f 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -1105,6 +1105,7 @@ struct X86CPUDefinition {
>      int stepping;
>      FeatureWordArray features;
>      const char *model_id;
> +    CPUCaches cache_info;
>  };
>  
>  static X86CPUDefinition builtin_x86_defs[] = {
> @@ -3242,6 +3243,9 @@ static void x86_cpu_load_def(X86CPU *cpu, X86CPUDefinition *def, Error **errp)
>          env->features[w] = def->features[w];
>      }
>  
> +    /* Load Cache information from the X86CPUDefinition */
> +    memcpy(&env->cache_info, &def->cache_info, sizeof(CPUCaches));
> +
>      /* Special cases not set in the X86CPUDefinition structs: */
>      /* TODO: in-kernel irqchip for hvf */
>      if (kvm_enabled()) {
> diff --git a/target/i386/cpu.h b/target/i386/cpu.h
> index fa03e2c..1213bb7 100644
> --- a/target/i386/cpu.h
> +++ b/target/i386/cpu.h
> @@ -1096,6 +1096,13 @@ typedef struct CPUCacheInfo {
>  } CPUCacheInfo;
>  
>  
> +typedef struct CPUCaches {
> +        bool valid;
> +        CPUCacheInfo l1d_cache;
> +        CPUCacheInfo l1i_cache;
> +        CPUCacheInfo l2_cache;
> +        CPUCacheInfo l3_cache;
> +} CPUCaches;
>  
>  typedef struct CPUX86State {
>      /* standard registers */
> @@ -1282,6 +1289,7 @@ typedef struct CPUX86State {
>      /* Features that were explicitly enabled/disabled */
>      FeatureWordArray user_features;
>      uint32_t cpuid_model[12];
> +    CPUCaches cache_info;

Suggestion for a follow-up patch, or in case there's need to
respin this series: what about making both
X86CPUDefinition::cache_info and CPUX86State::cache_info pointers
instead of embedded structs?  This way you won't need the 'valid'
field (you can just check if the pointer is NULL), and won't need
the memcpy() above.

This shouldn't block the series, though:

Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>

-- 
Eduardo

WARNING: multiple messages have this Message-ID (diff)
From: Eduardo Habkost <ehabkost@redhat.com>
To: Babu Moger <babu.moger@amd.com>
Cc: mst@redhat.com, marcel@redhat.com, pbonzini@redhat.com,
	rth@twiddle.net, mtosatti@redhat.com, geoff@hostfission.com,
	kash@tripleback.net, qemu-devel@nongnu.org, kvm@vger.kernel.org
Subject: Re: [Qemu-devel] [PATCH v7 2/9] i386: Add cache information in X86CPUDefinition
Date: Mon, 7 May 2018 16:09:46 -0300	[thread overview]
Message-ID: <20180507190946.GB13350@localhost.localdomain> (raw)
In-Reply-To: <1524760009-24710-3-git-send-email-babu.moger@amd.com>

On Thu, Apr 26, 2018 at 11:26:42AM -0500, Babu Moger wrote:
> Add cache information in X86CPUDefinition and CPUX86State.
> 
> Signed-off-by: Babu Moger <babu.moger@amd.com>
> Tested-by: Geoffrey McRae <geoff@hostfission.com>
> ---
>  target/i386/cpu.c | 4 ++++
>  target/i386/cpu.h | 8 ++++++++
>  2 files changed, 12 insertions(+)
> 
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index b6c1592..a518a0f 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -1105,6 +1105,7 @@ struct X86CPUDefinition {
>      int stepping;
>      FeatureWordArray features;
>      const char *model_id;
> +    CPUCaches cache_info;
>  };
>  
>  static X86CPUDefinition builtin_x86_defs[] = {
> @@ -3242,6 +3243,9 @@ static void x86_cpu_load_def(X86CPU *cpu, X86CPUDefinition *def, Error **errp)
>          env->features[w] = def->features[w];
>      }
>  
> +    /* Load Cache information from the X86CPUDefinition */
> +    memcpy(&env->cache_info, &def->cache_info, sizeof(CPUCaches));
> +
>      /* Special cases not set in the X86CPUDefinition structs: */
>      /* TODO: in-kernel irqchip for hvf */
>      if (kvm_enabled()) {
> diff --git a/target/i386/cpu.h b/target/i386/cpu.h
> index fa03e2c..1213bb7 100644
> --- a/target/i386/cpu.h
> +++ b/target/i386/cpu.h
> @@ -1096,6 +1096,13 @@ typedef struct CPUCacheInfo {
>  } CPUCacheInfo;
>  
>  
> +typedef struct CPUCaches {
> +        bool valid;
> +        CPUCacheInfo l1d_cache;
> +        CPUCacheInfo l1i_cache;
> +        CPUCacheInfo l2_cache;
> +        CPUCacheInfo l3_cache;
> +} CPUCaches;
>  
>  typedef struct CPUX86State {
>      /* standard registers */
> @@ -1282,6 +1289,7 @@ typedef struct CPUX86State {
>      /* Features that were explicitly enabled/disabled */
>      FeatureWordArray user_features;
>      uint32_t cpuid_model[12];
> +    CPUCaches cache_info;

Suggestion for a follow-up patch, or in case there's need to
respin this series: what about making both
X86CPUDefinition::cache_info and CPUX86State::cache_info pointers
instead of embedded structs?  This way you won't need the 'valid'
field (you can just check if the pointer is NULL), and won't need
the memcpy() above.

This shouldn't block the series, though:

Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>

-- 
Eduardo

  reply	other threads:[~2018-05-07 19:09 UTC|newest]

Thread overview: 88+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-26 16:26 [PATCH v7 0/9] i386: Enable TOPOEXT to support hyperthreading on AMD CPU Babu Moger
2018-04-26 16:26 ` [Qemu-devel] " Babu Moger
2018-04-26 16:26 ` [PATCH v7 1/9] i386: Helpers to encode cache information consistently Babu Moger
2018-04-26 16:26   ` [Qemu-devel] " Babu Moger
2018-05-07 19:05   ` Eduardo Habkost
2018-05-07 19:05     ` [Qemu-devel] " Eduardo Habkost
2018-05-07 21:14     ` Moger, Babu
2018-05-07 21:14       ` [Qemu-devel] " Moger, Babu
2018-05-07 21:27       ` Eduardo Habkost
2018-05-07 21:27         ` [Qemu-devel] " Eduardo Habkost
2018-05-07 22:47         ` Moger, Babu
2018-05-07 22:47           ` [Qemu-devel] " Moger, Babu
2018-05-08 18:40           ` Moger, Babu
2018-05-08 18:40             ` [Qemu-devel] " Moger, Babu
2018-05-08 19:07             ` Eduardo Habkost
2018-05-08 19:07               ` [Qemu-devel] " Eduardo Habkost
2018-05-08 19:34               ` Moger, Babu
2018-05-08 19:34                 ` [Qemu-devel] " Moger, Babu
2018-04-26 16:26 ` [PATCH v7 2/9] i386: Add cache information in X86CPUDefinition Babu Moger
2018-04-26 16:26   ` [Qemu-devel] " Babu Moger
2018-05-07 19:09   ` Eduardo Habkost [this message]
2018-05-07 19:09     ` Eduardo Habkost
2018-05-07 22:56     ` Moger, Babu
2018-05-07 22:56       ` [Qemu-devel] " Moger, Babu
2018-04-26 16:26 ` [PATCH v7 3/9] i386: Initialize cache information for EPYC family processors Babu Moger
2018-04-26 16:26   ` [Qemu-devel] " Babu Moger
2018-05-07 20:22   ` Eduardo Habkost
2018-05-07 20:22     ` [Qemu-devel] " Eduardo Habkost
2018-04-26 16:26 ` [PATCH v7 4/9] i386: Add new property to control cache info Babu Moger
2018-04-26 16:26   ` [Qemu-devel] " Babu Moger
2018-05-07 19:14   ` Eduardo Habkost
2018-05-07 19:14     ` [Qemu-devel] " Eduardo Habkost
2018-05-07 23:29     ` Moger, Babu
2018-05-07 23:29       ` [Qemu-devel] " Moger, Babu
2018-05-08 14:25   ` Eduardo Habkost
2018-05-08 14:25     ` [Qemu-devel] " Eduardo Habkost
2018-05-08 17:26     ` Moger, Babu
2018-05-08 17:26       ` [Qemu-devel] " Moger, Babu
2018-05-08 18:33       ` Eduardo Habkost
2018-05-08 18:33         ` [Qemu-devel] " Eduardo Habkost
2018-05-08 18:44         ` Moger, Babu
2018-05-08 18:44           ` [Qemu-devel] " Moger, Babu
2018-04-26 16:26 ` [PATCH v7 5/9] i386: Use the statically loaded cache definitions Babu Moger
2018-04-26 16:26   ` [Qemu-devel] " Babu Moger
2018-05-07 19:15   ` Eduardo Habkost
2018-05-07 19:15     ` [Qemu-devel] " Eduardo Habkost
2018-05-07 23:32     ` Moger, Babu
2018-05-07 23:32       ` [Qemu-devel] " Moger, Babu
2018-05-07 19:37   ` Eduardo Habkost
2018-05-07 19:37     ` [Qemu-devel] " Eduardo Habkost
2018-05-07 23:39     ` Moger, Babu
2018-05-07 23:39       ` [Qemu-devel] " Moger, Babu
2018-05-08 14:12       ` Eduardo Habkost
2018-05-08 14:12         ` [Qemu-devel] " Eduardo Habkost
2018-05-08 17:08         ` Moger, Babu
2018-05-08 17:08           ` [Qemu-devel] " Moger, Babu
2018-04-26 16:26 ` [PATCH v7 6/9] i386: Populate AMD Processor Cache Information for cpuid 0x8000001D Babu Moger
2018-04-26 16:26   ` [Qemu-devel] " Babu Moger
2018-05-07 21:06   ` Eduardo Habkost
2018-05-07 21:06     ` [Qemu-devel] " Eduardo Habkost
2018-05-08 16:41     ` Moger, Babu
2018-05-08 16:41       ` [Qemu-devel] " Moger, Babu
2018-04-26 16:26 ` [PATCH v7 7/9] i386: Add support for CPUID_8000_001E for AMD Babu Moger
2018-04-26 16:26   ` [Qemu-devel] " Babu Moger
2018-05-07 19:39   ` Eduardo Habkost
2018-05-07 19:39     ` [Qemu-devel] " Eduardo Habkost
2018-05-07 23:44     ` Moger, Babu
2018-05-07 23:44       ` [Qemu-devel] " Moger, Babu
2018-05-08 14:16       ` Eduardo Habkost
2018-05-08 14:16         ` [Qemu-devel] " Eduardo Habkost
2018-05-08 15:02         ` Moger, Babu
2018-05-08 15:02           ` [Qemu-devel] " Moger, Babu
2018-05-11 14:12           ` Eduardo Habkost
2018-05-11 14:12             ` [Qemu-devel] " Eduardo Habkost
2018-05-11 14:44             ` Moger, Babu
2018-05-11 14:44               ` [Qemu-devel] " Moger, Babu
2018-05-11 14:59               ` Eduardo Habkost
2018-05-11 14:59                 ` [Qemu-devel] " Eduardo Habkost
2018-04-26 16:26 ` [PATCH v7 8/9] i386: Enable TOPOEXT feature on AMD EPYC CPU Babu Moger
2018-04-26 16:26   ` [Qemu-devel] " Babu Moger
2018-05-07 21:07   ` Eduardo Habkost
2018-05-07 21:07     ` [Qemu-devel] " Eduardo Habkost
2018-04-26 16:26 ` [PATCH v7 9/9] i386: Remove generic SMT thread check Babu Moger
2018-04-26 16:26   ` [Qemu-devel] " Babu Moger
2018-05-07 21:14   ` Eduardo Habkost
2018-05-07 21:14     ` [Qemu-devel] " Eduardo Habkost
2018-04-26 20:49 ` [PATCH v7 0/9] i386: Enable TOPOEXT to support hyperthreading on AMD CPU geoff--- via Qemu-devel
2018-04-26 20:49   ` [Qemu-devel] " geoff

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180507190946.GB13350@localhost.localdomain \
    --to=ehabkost@redhat.com \
    --cc=babu.moger@amd.com \
    --cc=geoff@hostfission.com \
    --cc=kash@tripleback.net \
    --cc=kvm@vger.kernel.org \
    --cc=marcel@redhat.com \
    --cc=mst@redhat.com \
    --cc=mtosatti@redhat.com \
    --cc=pbonzini@redhat.com \
    --cc=qemu-devel@nongnu.org \
    --cc=rth@twiddle.net \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.