[igt-dev] [PATCH i-g-t v3 1/5] lib/media_spin: Move helper functions to gpu_fill library

[igt-dev] [PATCH i-g-t v3 1/5] lib/media_spin: Move helper functions to gpu_fill library

[Katarzyna Dec]

Let's remove duplications introduced by moving media_spin helper
functions to gpu_fill. These were mainly the same functions
as for Gen8 media/gpgpu fill. gen8_render_flush from media_spin
was replaced by gen7_render_flush. The only functions that were
left intact are gen8_spin_curbe_buffer_data, gen8_emit_vfe_state_spin,
gen8_emit_media_objects_spin and gen8lp_emit_media_objects_spin.

v2: squashed patches 1 and 2 from v1
v3: updated commit msg

Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 lib/gpu_fill.c   |  81 +++++++++++++
 lib/gpu_fill.h   |  13 +++
 lib/media_spin.c | 347 +++----------------------------------------------------
 3 files changed, 113 insertions(+), 328 deletions(-)

diff --git a/lib/gpu_fill.c b/lib/gpu_fill.c
index f05d4eca..f5fc61bb 100644
--- a/lib/gpu_fill.c
+++ b/lib/gpu_fill.c
@@ -351,6 +351,20 @@ gen7_emit_gpgpu_walk(struct intel_batchbuffer *batch,
 	OUT_BATCH(0xffffffff);
 }
 
+uint32_t
+gen8_spin_curbe_buffer_data(struct intel_batchbuffer *batch,
+			    uint32_t iters)
+{
+	uint32_t *curbe_buffer;
+	uint32_t offset;
+
+	curbe_buffer = intel_batchbuffer_subdata_alloc(batch, 64, 64);
+	offset = intel_batchbuffer_subdata_offset(batch, curbe_buffer);
+	*curbe_buffer = iters;
+
+	return offset;
+}
+
 uint32_t
 gen8_fill_surface_state(struct intel_batchbuffer *batch,
 			struct igt_buf *buf,
@@ -525,6 +539,30 @@ gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
 	OUT_BATCH(0);
 }
 
+void
+gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch)
+{
+	OUT_BATCH(GEN8_MEDIA_VFE_STATE | (9 - 2));
+
+	/* scratch buffer */
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+
+	/* number of threads & urb entries */
+	OUT_BATCH(2 << 8);
+
+	OUT_BATCH(0);
+
+	/* urb entry size & curbe size */
+	OUT_BATCH(2 << 16 |
+		2);
+
+	/* scoreboard */
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+}
+
 void
 gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
 		     unsigned x, unsigned y,
@@ -585,6 +623,49 @@ gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
 	OUT_BATCH(0xffffffff);
 }
 
+void
+gen8_emit_media_objects_spin(struct intel_batchbuffer *batch)
+{
+	OUT_BATCH(GEN8_MEDIA_OBJECT | (8 - 2));
+
+	/* interface descriptor offset */
+	OUT_BATCH(0);
+
+	/* without indirect data */
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+
+	/* scoreboard */
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+
+	/* inline data (xoffset, yoffset) */
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	gen8_emit_media_state_flush(batch);
+}
+
+void
+gen8lp_emit_media_objects_spin(struct intel_batchbuffer *batch)
+{
+	OUT_BATCH(GEN8_MEDIA_OBJECT | (8 - 2));
+
+	/* interface descriptor offset */
+	OUT_BATCH(0);
+
+	/* without indirect data */
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+
+	/* scoreboard */
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+
+	/* inline data (xoffset, yoffset) */
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+}
+
 void
 gen9_emit_state_base_address(struct intel_batchbuffer *batch)
 {
diff --git a/lib/gpu_fill.h b/lib/gpu_fill.h
index 067d4987..5335fe3f 100644
--- a/lib/gpu_fill.h
+++ b/lib/gpu_fill.h
@@ -88,6 +88,10 @@ gen7_emit_gpgpu_walk(struct intel_batchbuffer *batch,
 		     unsigned x, unsigned y,
 		     unsigned width, unsigned height);
 
+uint32_t
+gen8_spin_curbe_buffer_data(struct intel_batchbuffer *batch,
+			    uint32_t iters);
+
 uint32_t
 gen8_fill_surface_state(struct intel_batchbuffer *batch,
 			struct igt_buf *buf,
@@ -109,11 +113,20 @@ gen8_emit_vfe_state(struct intel_batchbuffer *batch);
 void
 gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch);
 
+void
+gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch);
+
 void
 gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
 		     unsigned x, unsigned y,
 		     unsigned width, unsigned height);
 
+void
+gen8_emit_media_objects_spin(struct intel_batchbuffer *batch);
+
+void
+gen8lp_emit_media_objects_spin(struct intel_batchbuffer *batch);
+
 void
 gen9_emit_state_base_address(struct intel_batchbuffer *batch);
 
diff --git a/lib/media_spin.c b/lib/media_spin.c
index d9e058b1..16ea8483 100644
--- a/lib/media_spin.c
+++ b/lib/media_spin.c
@@ -31,6 +31,7 @@
 #include "intel_batchbuffer.h"
 #include "gen8_media.h"
 #include "media_spin.h"
+#include "gpu_fill.h"
 
 static const uint32_t spin_kernel[][4] = {
 	{ 0x00600001, 0x20800208, 0x008d0000, 0x00000000 }, /* mov (8)r4.0<1>:ud r0.0<8;8;1>:ud */
@@ -45,316 +46,6 @@ static const uint32_t spin_kernel[][4] = {
 	{ 0x07800031, 0x20000a40, 0x0e000e00, 0x82000010 }, /* send.ts (16)null<1> r112<0;1;0>:d 0x82000010 */
 };
 
-static void
-gen8_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end)
-{
-	int ret;
-
-	ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer);
-	if (ret == 0)
-		ret = drm_intel_gem_bo_context_exec(batch->bo, NULL,
-						    batch_end, 0);
-	igt_assert_eq(ret, 0);
-}
-
-static uint32_t
-gen8_spin_curbe_buffer_data(struct intel_batchbuffer *batch,
-			    uint32_t iters)
-{
-	uint32_t *curbe_buffer;
-	uint32_t offset;
-
-	curbe_buffer = intel_batchbuffer_subdata_alloc(batch, 64, 64);
-	offset = intel_batchbuffer_subdata_offset(batch, curbe_buffer);
-	*curbe_buffer = iters;
-
-	return offset;
-}
-
-static uint32_t
-gen8_spin_surface_state(struct intel_batchbuffer *batch,
-			struct igt_buf *buf,
-			uint32_t format,
-			int is_dst)
-{
-	struct gen8_surface_state *ss;
-	uint32_t write_domain, read_domain, offset;
-	int ret;
-
-	if (is_dst) {
-		write_domain = read_domain = I915_GEM_DOMAIN_RENDER;
-	} else {
-		write_domain = 0;
-		read_domain = I915_GEM_DOMAIN_SAMPLER;
-	}
-
-	ss = intel_batchbuffer_subdata_alloc(batch, sizeof(*ss), 64);
-	offset = intel_batchbuffer_subdata_offset(batch, ss);
-
-	ss->ss0.surface_type = GEN8_SURFACE_2D;
-	ss->ss0.surface_format = format;
-	ss->ss0.render_cache_read_write = 1;
-	ss->ss0.vertical_alignment = 1; /* align 4 */
-	ss->ss0.horizontal_alignment = 1; /* align 4 */
-
-	if (buf->tiling == I915_TILING_X)
-		ss->ss0.tiled_mode = 2;
-	else if (buf->tiling == I915_TILING_Y)
-		ss->ss0.tiled_mode = 3;
-
-	ss->ss8.base_addr = buf->bo->offset;
-
-	ret = drm_intel_bo_emit_reloc(batch->bo,
-				intel_batchbuffer_subdata_offset(batch, ss) + 8 * 4,
-				buf->bo, 0,
-				read_domain, write_domain);
-	igt_assert_eq(ret, 0);
-
-	ss->ss2.height = igt_buf_height(buf) - 1;
-	ss->ss2.width  = igt_buf_width(buf) - 1;
-	ss->ss3.pitch  = buf->stride - 1;
-
-	ss->ss7.shader_chanel_select_r = 4;
-	ss->ss7.shader_chanel_select_g = 5;
-	ss->ss7.shader_chanel_select_b = 6;
-	ss->ss7.shader_chanel_select_a = 7;
-
-	return offset;
-}
-
-static uint32_t
-gen8_spin_binding_table(struct intel_batchbuffer *batch,
-			struct igt_buf *dst)
-{
-	uint32_t *binding_table, offset;
-
-	binding_table = intel_batchbuffer_subdata_alloc(batch, 32, 64);
-	offset = intel_batchbuffer_subdata_offset(batch, binding_table);
-
-	binding_table[0] = gen8_spin_surface_state(batch, dst,
-					GEN8_SURFACEFORMAT_R8_UNORM, 1);
-
-	return offset;
-}
-
-static uint32_t
-gen8_spin_media_kernel(struct intel_batchbuffer *batch,
-		       const uint32_t kernel[][4],
-		       size_t size)
-{
-	uint32_t offset;
-
-	offset = intel_batchbuffer_copy_data(batch, kernel, size, 64);
-
-	return offset;
-}
-
-static uint32_t
-gen8_spin_interface_descriptor(struct intel_batchbuffer *batch,
-			       struct igt_buf *dst)
-{
-	struct gen8_interface_descriptor_data *idd;
-	uint32_t offset;
-	uint32_t binding_table_offset, kernel_offset;
-
-	binding_table_offset = gen8_spin_binding_table(batch, dst);
-	kernel_offset = gen8_spin_media_kernel(batch, spin_kernel,
-					       sizeof(spin_kernel));
-
-	idd = intel_batchbuffer_subdata_alloc(batch, sizeof(*idd), 64);
-	offset = intel_batchbuffer_subdata_offset(batch, idd);
-
-	idd->desc0.kernel_start_pointer = (kernel_offset >> 6);
-
-	idd->desc2.single_program_flow = 1;
-	idd->desc2.floating_point_mode = GEN8_FLOATING_POINT_IEEE_754;
-
-	idd->desc3.sampler_count = 0;      /* 0 samplers used */
-	idd->desc3.sampler_state_pointer = 0;
-
-	idd->desc4.binding_table_entry_count = 0;
-	idd->desc4.binding_table_pointer = (binding_table_offset >> 5);
-
-	idd->desc5.constant_urb_entry_read_offset = 0;
-	idd->desc5.constant_urb_entry_read_length = 1; /* grf 1 */
-
-	return offset;
-}
-
-static void
-gen8_emit_state_base_address(struct intel_batchbuffer *batch)
-{
-	OUT_BATCH(GEN8_STATE_BASE_ADDRESS | (16 - 2));
-
-	/* general */
-	OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
-	OUT_BATCH(0);
-
-	/* stateless data port */
-	OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
-
-	/* surface */
-	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
-
-	/* dynamic */
-	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
-		0, BASE_ADDRESS_MODIFY);
-
-	/* indirect */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-
-	/* instruction */
-	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
-
-	/* general state buffer size */
-	OUT_BATCH(0xfffff000 | 1);
-	/* dynamic state buffer size */
-	OUT_BATCH(1 << 12 | 1);
-	/* indirect object buffer size */
-	OUT_BATCH(0xfffff000 | 1);
-	/* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
-	OUT_BATCH(1 << 12 | 1);
-}
-
-static void
-gen9_emit_state_base_address(struct intel_batchbuffer *batch)
-{
-	OUT_BATCH(GEN8_STATE_BASE_ADDRESS | (19 - 2));
-
-	/* general */
-	OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
-	OUT_BATCH(0);
-
-	/* stateless data port */
-	OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
-
-	/* surface */
-	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
-
-	/* dynamic */
-	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
-		0, BASE_ADDRESS_MODIFY);
-
-	/* indirect */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-
-	/* instruction */
-	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
-
-	/* general state buffer size */
-	OUT_BATCH(0xfffff000 | 1);
-	/* dynamic state buffer size */
-	OUT_BATCH(1 << 12 | 1);
-	/* indirect object buffer size */
-	OUT_BATCH(0xfffff000 | 1);
-	/* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
-	OUT_BATCH(1 << 12 | 1);
-
-	/* Bindless surface state base address */
-	OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
-	OUT_BATCH(0);
-	OUT_BATCH(0xfffff000);
-}
-
-static void
-gen8_emit_vfe_state(struct intel_batchbuffer *batch)
-{
-	OUT_BATCH(GEN8_MEDIA_VFE_STATE | (9 - 2));
-
-	/* scratch buffer */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-
-	/* number of threads & urb entries */
-	OUT_BATCH(2 << 8);
-
-	OUT_BATCH(0);
-
-	/* urb entry size & curbe size */
-	OUT_BATCH(2 << 16 |
-		2);
-
-	/* scoreboard */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-}
-
-static void
-gen8_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer)
-{
-	OUT_BATCH(GEN8_MEDIA_CURBE_LOAD | (4 - 2));
-	OUT_BATCH(0);
-	/* curbe total data length */
-	OUT_BATCH(64);
-	/* curbe data start address, is relative to the dynamics base address */
-	OUT_BATCH(curbe_buffer);
-}
-
-static void
-gen8_emit_interface_descriptor_load(struct intel_batchbuffer *batch,
-				    uint32_t interface_descriptor)
-{
-	OUT_BATCH(GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2));
-	OUT_BATCH(0);
-	/* interface descriptor data length */
-	OUT_BATCH(sizeof(struct gen8_interface_descriptor_data));
-	/* interface descriptor address, is relative to the dynamics base address */
-	OUT_BATCH(interface_descriptor);
-}
-
-static void
-gen8_emit_media_state_flush(struct intel_batchbuffer *batch)
-{
-	OUT_BATCH(GEN8_MEDIA_STATE_FLUSH | (2 - 2));
-	OUT_BATCH(0);
-}
-
-static void
-gen8_emit_media_objects(struct intel_batchbuffer *batch)
-{
-	OUT_BATCH(GEN8_MEDIA_OBJECT | (8 - 2));
-
-	/* interface descriptor offset */
-	OUT_BATCH(0);
-
-	/* without indirect data */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-
-	/* scoreboard */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-
-	/* inline data (xoffset, yoffset) */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	gen8_emit_media_state_flush(batch);
-}
-
-static void
-gen8lp_emit_media_objects(struct intel_batchbuffer *batch)
-{
-	OUT_BATCH(GEN8_MEDIA_OBJECT | (8 - 2));
-
-	/* interface descriptor offset */
-	OUT_BATCH(0);
-
-	/* without indirect data */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-
-	/* scoreboard */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-
-	/* inline data (xoffset, yoffset) */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-}
-
 /*
  * This sets up the media pipeline,
  *
@@ -390,7 +81,7 @@ gen8_media_spinfunc(struct intel_batchbuffer *batch,
 	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
 
 	curbe_buffer = gen8_spin_curbe_buffer_data(batch, spins);
-	interface_descriptor = gen8_spin_interface_descriptor(batch, dst);
+	interface_descriptor = gen8_fill_interface_descriptor(batch, dst, spin_kernel, sizeof(spin_kernel));
 	igt_assert(batch->ptr < &batch->buffer[4095]);
 
 	/* media pipeline */
@@ -398,20 +89,20 @@ gen8_media_spinfunc(struct intel_batchbuffer *batch,
 	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
 	gen8_emit_state_base_address(batch);
 
-	gen8_emit_vfe_state(batch);
+	gen8_emit_vfe_state_spin(batch);
 
-	gen8_emit_curbe_load(batch, curbe_buffer);
+	gen7_emit_curbe_load(batch, curbe_buffer);
 
-	gen8_emit_interface_descriptor_load(batch, interface_descriptor);
+	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
 
-	gen8_emit_media_objects(batch);
+	gen8_emit_media_objects_spin(batch);
 
 	OUT_BATCH(MI_BATCH_BUFFER_END);
 
 	batch_end = intel_batchbuffer_align(batch, 8);
 	igt_assert(batch_end < BATCH_STATE_SPLIT);
 
-	gen8_render_flush(batch, batch_end);
+	gen7_render_flush(batch, batch_end);
 	intel_batchbuffer_reset(batch);
 }
 
@@ -428,7 +119,7 @@ gen8lp_media_spinfunc(struct intel_batchbuffer *batch,
 	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
 
 	curbe_buffer = gen8_spin_curbe_buffer_data(batch, spins);
-	interface_descriptor = gen8_spin_interface_descriptor(batch, dst);
+	interface_descriptor = gen8_fill_interface_descriptor(batch, dst, spin_kernel, sizeof(spin_kernel));
 	igt_assert(batch->ptr < &batch->buffer[4095]);
 
 	/* media pipeline */
@@ -436,20 +127,20 @@ gen8lp_media_spinfunc(struct intel_batchbuffer *batch,
 	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
 	gen8_emit_state_base_address(batch);
 
-	gen8_emit_vfe_state(batch);
+	gen8_emit_vfe_state_spin(batch);
 
-	gen8_emit_curbe_load(batch, curbe_buffer);
+	gen7_emit_curbe_load(batch, curbe_buffer);
 
-	gen8_emit_interface_descriptor_load(batch, interface_descriptor);
+	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
 
-	gen8lp_emit_media_objects(batch);
+	gen8lp_emit_media_objects_spin(batch);
 
 	OUT_BATCH(MI_BATCH_BUFFER_END);
 
 	batch_end = intel_batchbuffer_align(batch, 8);
 	igt_assert(batch_end < BATCH_STATE_SPLIT);
 
-	gen8_render_flush(batch, batch_end);
+	gen7_render_flush(batch, batch_end);
 	intel_batchbuffer_reset(batch);
 }
 
@@ -466,7 +157,7 @@ gen9_media_spinfunc(struct intel_batchbuffer *batch,
 	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
 
 	curbe_buffer = gen8_spin_curbe_buffer_data(batch, spins);
-	interface_descriptor = gen8_spin_interface_descriptor(batch, dst);
+	interface_descriptor = gen8_fill_interface_descriptor(batch, dst, spin_kernel, sizeof(spin_kernel));
 	igt_assert(batch->ptr < &batch->buffer[4095]);
 
 	/* media pipeline */
@@ -479,13 +170,13 @@ gen9_media_spinfunc(struct intel_batchbuffer *batch,
 			GEN9_FORCE_MEDIA_AWAKE_MASK);
 	gen9_emit_state_base_address(batch);
 
-	gen8_emit_vfe_state(batch);
+	gen8_emit_vfe_state_spin(batch);
 
-	gen8_emit_curbe_load(batch, curbe_buffer);
+	gen7_emit_curbe_load(batch, curbe_buffer);
 
-	gen8_emit_interface_descriptor_load(batch, interface_descriptor);
+	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
 
-	gen8_emit_media_objects(batch);
+	gen8_emit_media_objects_spin(batch);
 
 	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA |
 			GEN9_FORCE_MEDIA_AWAKE_DISABLE |
@@ -499,6 +190,6 @@ gen9_media_spinfunc(struct intel_batchbuffer *batch,
 	batch_end = intel_batchbuffer_align(batch, 8);
 	igt_assert(batch_end < BATCH_STATE_SPLIT);
 
-	gen8_render_flush(batch, batch_end);
+	gen7_render_flush(batch, batch_end);
 	intel_batchbuffer_reset(batch);
 }
-- 
2.14.3

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[igt-dev] [PATCH i-g-t v3 2/5] lib/media_spin: Remove gen8lp_media_spin function

[Katarzyna Dec]

Gen8lp function are duplicates of Gen8 with difference in
emit_media_objects - we cannot perform media_state_flush on CHT.
Similar changes were done previously for gpgpu_fill and media_fill.

v2: replaced IS_BRW and IS_CHT with IS_GEN8
v3: removed remaining 8lp spin function

Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 lib/gpu_fill.c          | 24 ++----------------------
 lib/gpu_fill.h          |  3 ---
 lib/intel_batchbuffer.c |  4 +---
 lib/media_spin.c        | 38 --------------------------------------
 lib/media_spin.h        |  3 ---
 5 files changed, 3 insertions(+), 69 deletions(-)

diff --git a/lib/gpu_fill.c b/lib/gpu_fill.c
index f5fc61bb..8dab39df 100644
--- a/lib/gpu_fill.c
+++ b/lib/gpu_fill.c
@@ -642,28 +642,8 @@ gen8_emit_media_objects_spin(struct intel_batchbuffer *batch)
 	/* inline data (xoffset, yoffset) */
 	OUT_BATCH(0);
 	OUT_BATCH(0);
-	gen8_emit_media_state_flush(batch);
-}
-
-void
-gen8lp_emit_media_objects_spin(struct intel_batchbuffer *batch)
-{
-	OUT_BATCH(GEN8_MEDIA_OBJECT | (8 - 2));
-
-	/* interface descriptor offset */
-	OUT_BATCH(0);
-
-	/* without indirect data */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-
-	/* scoreboard */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-
-	/* inline data (xoffset, yoffset) */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
+	if (AT_LEAST_GEN(batch->devid, 8) && !IS_CHERRYVIEW(batch->devid))
+		gen8_emit_media_state_flush(batch);
 }
 
 void
diff --git a/lib/gpu_fill.h b/lib/gpu_fill.h
index 5335fe3f..baa04807 100644
--- a/lib/gpu_fill.h
+++ b/lib/gpu_fill.h
@@ -124,9 +124,6 @@ gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
 void
 gen8_emit_media_objects_spin(struct intel_batchbuffer *batch);
 
-void
-gen8lp_emit_media_objects_spin(struct intel_batchbuffer *batch);
-
 void
 gen9_emit_state_base_address(struct intel_batchbuffer *batch);
 
diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index f87e6bed..cf7da44d 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -906,10 +906,8 @@ igt_media_spinfunc_t igt_get_media_spinfunc(int devid)
 
 	if (IS_GEN9(devid))
 		spin = gen9_media_spinfunc;
-	else if (IS_BROADWELL(devid))
+	else if (IS_GEN8(devid))
 		spin = gen8_media_spinfunc;
-	else if (IS_CHERRYVIEW(devid))
-		spin = gen8lp_media_spinfunc;
 
 	return spin;
 }
diff --git a/lib/media_spin.c b/lib/media_spin.c
index 16ea8483..b4414bee 100644
--- a/lib/media_spin.c
+++ b/lib/media_spin.c
@@ -106,44 +106,6 @@ gen8_media_spinfunc(struct intel_batchbuffer *batch,
 	intel_batchbuffer_reset(batch);
 }
 
-void
-gen8lp_media_spinfunc(struct intel_batchbuffer *batch,
-		      struct igt_buf *dst, uint32_t spins)
-{
-	uint32_t curbe_buffer, interface_descriptor;
-	uint32_t batch_end;
-
-	intel_batchbuffer_flush_with_context(batch, NULL);
-
-	/* setup states */
-	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
-
-	curbe_buffer = gen8_spin_curbe_buffer_data(batch, spins);
-	interface_descriptor = gen8_fill_interface_descriptor(batch, dst, spin_kernel, sizeof(spin_kernel));
-	igt_assert(batch->ptr < &batch->buffer[4095]);
-
-	/* media pipeline */
-	batch->ptr = batch->buffer;
-	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
-	gen8_emit_state_base_address(batch);
-
-	gen8_emit_vfe_state_spin(batch);
-
-	gen7_emit_curbe_load(batch, curbe_buffer);
-
-	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
-
-	gen8lp_emit_media_objects_spin(batch);
-
-	OUT_BATCH(MI_BATCH_BUFFER_END);
-
-	batch_end = intel_batchbuffer_align(batch, 8);
-	igt_assert(batch_end < BATCH_STATE_SPLIT);
-
-	gen7_render_flush(batch, batch_end);
-	intel_batchbuffer_reset(batch);
-}
-
 void
 gen9_media_spinfunc(struct intel_batchbuffer *batch,
 		    struct igt_buf *dst, uint32_t spins)
diff --git a/lib/media_spin.h b/lib/media_spin.h
index 8bc48291..57d8c2e2 100644
--- a/lib/media_spin.h
+++ b/lib/media_spin.h
@@ -30,9 +30,6 @@
 void gen8_media_spinfunc(struct intel_batchbuffer *batch,
 			 struct igt_buf *dst, uint32_t spins);
 
-void gen8lp_media_spinfunc(struct intel_batchbuffer *batch,
-			   struct igt_buf *dst, uint32_t spins);
-
 void gen9_media_spinfunc(struct intel_batchbuffer *batch,
 			 struct igt_buf *dst, uint32_t spins);
 
-- 
2.14.3

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[igt-dev] [PATCH i-g-t v3 3/5] lib: Adjust media_spin and gpu_fill to our code style

[Katarzyna Dec]

Let's adjust code to our coding style during refactoring
media_spin code.

v2: fixed minor typos
v3: few more style changes

Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
---
 lib/gpgpu_fill.c | 15 +++++------
 lib/gpu_fill.c   | 77 ++++++++++++++++++++++++++++++++++----------------------
 lib/gpu_fill.h   | 24 ++++++++++--------
 lib/media_spin.c |  6 +++--
 4 files changed, 71 insertions(+), 51 deletions(-)

diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
index 010dde06..52925a5c 100644
--- a/lib/gpgpu_fill.c
+++ b/lib/gpgpu_fill.c
@@ -112,9 +112,8 @@ gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
 	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
 
 	/*
-	 * const buffer needs to fill for every thread, but as we have just 1 thread
-	 * per every group, so need only one curbe data.
-	 *
+	 * const buffer needs to fill for every thread, but as we have just 1
+	 * thread per every group, so need only one curbe data.
 	 * For each thread, just use thread group ID for buffer offset.
 	 */
 	curbe_buffer = gen7_fill_curbe_buffer_data(batch, color);
@@ -160,9 +159,8 @@ gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch,
 	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
 
 	/*
-	 * const buffer needs to fill for every thread, but as we have just 1 thread
-	 * per every group, so need only one curbe data.
-	 *
+	 * const buffer needs to fill for every thread, but as we have just 1
+	 * thread per every group, so need only one curbe data.
 	 * For each thread, just use thread group ID for buffer offset.
 	 */
 	curbe_buffer = gen7_fill_curbe_buffer_data(batch, color);
@@ -208,9 +206,8 @@ gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch,
 	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
 
 	/*
-	 * const buffer needs to fill for every thread, but as we have just 1 thread
-	 * per every group, so need only one curbe data.
-	 *
+	 * const buffer needs to fill for every thread, but as we have just 1
+	 * thread per every group, so need only one curbe data.
 	 * For each thread, just use thread group ID for buffer offset.
 	 */
 	curbe_buffer = gen7_fill_curbe_buffer_data(batch, color);
diff --git a/lib/gpu_fill.c b/lib/gpu_fill.c
index 8dab39df..24e03cf2 100644
--- a/lib/gpu_fill.c
+++ b/lib/gpu_fill.c
@@ -32,13 +32,13 @@ gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end)
 	ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer);
 	if (ret == 0)
 		ret = drm_intel_bo_mrb_exec(batch->bo, batch_end,
-					NULL, 0, 0, 0);
+					    NULL, 0, 0, 0);
 	igt_assert(ret == 0);
 }
 
 uint32_t
 gen7_fill_curbe_buffer_data(struct intel_batchbuffer *batch,
-			uint8_t color)
+			    uint8_t color)
 {
 	uint8_t *curbe_buffer;
 	uint32_t offset;
@@ -132,8 +132,9 @@ gen7_fill_kernel(struct intel_batchbuffer *batch,
 }
 
 uint32_t
-gen7_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,
-			       const uint32_t kernel[][4], size_t size)
+gen7_fill_interface_descriptor(struct intel_batchbuffer *batch,
+			       struct igt_buf *dst, const uint32_t kernel[][4],
+			       size_t size)
 {
 	struct gen7_interface_descriptor_data *idd;
 	uint32_t offset;
@@ -171,16 +172,19 @@ gen7_emit_state_base_address(struct intel_batchbuffer *batch)
 	OUT_BATCH(0);
 
 	/* surface */
-	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
+	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
+		  BASE_ADDRESS_MODIFY);
 
 	/* dynamic */
-	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
+	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
+		  BASE_ADDRESS_MODIFY);
 
 	/* indirect */
 	OUT_BATCH(0);
 
 	/* instruction */
-	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
+	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
+		  BASE_ADDRESS_MODIFY);
 
 	/* general/dynamic/indirect/instruction access Bound */
 	OUT_BATCH(0);
@@ -204,8 +208,8 @@ gen7_emit_vfe_state(struct intel_batchbuffer *batch)
 	OUT_BATCH(0);
 
 	/* urb entry size & curbe size */
-	OUT_BATCH(2 << 16 | 	/* in 256 bits unit */
-		2);		/* in 256 bits unit */
+	OUT_BATCH(2 << 16 |	/* in 256 bits unit */
+		  2);		/* in 256 bits unit */
 
 	/* scoreboard */
 	OUT_BATCH(0);
@@ -229,7 +233,7 @@ gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
 	OUT_BATCH(0);
 
 	/* urb entry size & curbe size */
-	OUT_BATCH(0 << 16 | 	/* URB entry size in 256 bits unit */
+	OUT_BATCH(0 << 16 |	/* URB entry size in 256 bits unit */
 		  1);		/* CURBE entry size in 256 bits unit */
 
 	/* scoreboard */
@@ -250,7 +254,8 @@ gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer)
 }
 
 void
-gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor)
+gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch,
+				    uint32_t interface_descriptor)
 {
 	OUT_BATCH(GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2));
 	OUT_BATCH(0);
@@ -259,14 +264,16 @@ gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t in
 		OUT_BATCH(sizeof(struct gen7_interface_descriptor_data));
 	else
 		OUT_BATCH(sizeof(struct gen8_interface_descriptor_data));
-	/* interface descriptor address, is relative to the dynamics base address */
+	/* interface descriptor address, is relative to the dynamics base
+	 * address
+	 */
 	OUT_BATCH(interface_descriptor);
 }
 
 void
 gen7_emit_media_objects(struct intel_batchbuffer *batch,
-			unsigned x, unsigned y,
-			unsigned width, unsigned height)
+			unsigned int x, unsigned int y,
+			unsigned int width, unsigned int height)
 {
 	int i, j;
 
@@ -288,7 +295,8 @@ gen7_emit_media_objects(struct intel_batchbuffer *batch,
 			/* inline data (xoffset, yoffset) */
 			OUT_BATCH(x + i * 16);
 			OUT_BATCH(y + j * 16);
-			if (AT_LEAST_GEN(batch->devid, 8) && !IS_CHERRYVIEW(batch->devid))
+			if (AT_LEAST_GEN(batch->devid, 8) &&
+			    !IS_CHERRYVIEW(batch->devid))
 				gen8_emit_media_state_flush(batch);
 		}
 	}
@@ -296,8 +304,8 @@ gen7_emit_media_objects(struct intel_batchbuffer *batch,
 
 void
 gen7_emit_gpgpu_walk(struct intel_batchbuffer *batch,
-		     unsigned x, unsigned y,
-		     unsigned width, unsigned height)
+		     unsigned int x, unsigned int y,
+		     unsigned int width, unsigned int height)
 {
 	uint32_t x_dim, y_dim, tmp, right_mask;
 
@@ -400,8 +408,7 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch,
 
 	ret = drm_intel_bo_emit_reloc(batch->bo,
 				intel_batchbuffer_subdata_offset(batch, ss) + 8 * 4,
-				buf->bo, 0,
-				read_domain, write_domain);
+				buf->bo, 0, read_domain, write_domain);
 	igt_assert(ret == 0);
 
 	ss->ss2.height = igt_buf_height(buf) - 1;
@@ -417,7 +424,9 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch,
 }
 
 uint32_t
-gen8_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,  const uint32_t kernel[][4], size_t size)
+gen8_fill_interface_descriptor(struct intel_batchbuffer *batch,
+			       struct igt_buf *dst, const uint32_t kernel[][4],
+			       size_t size)
 {
 	struct gen8_interface_descriptor_data *idd;
 	uint32_t offset;
@@ -464,15 +473,17 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
 	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
 
 	/* dynamic */
-	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
-		0, BASE_ADDRESS_MODIFY);
+	OUT_RELOC(batch->bo,
+		  I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
+		  0, BASE_ADDRESS_MODIFY);
 
 	/* indirect */
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 
 	/* instruction */
-	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
+	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
+		  BASE_ADDRESS_MODIFY);
 
 	/* general state buffer size */
 	OUT_BATCH(0xfffff000 | 1);
@@ -480,7 +491,9 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
 	OUT_BATCH(1 << 12 | 1);
 	/* indirect object buffer size */
 	OUT_BATCH(0xfffff000 | 1);
-	/* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
+	/* instruction buffer size, must set modify enable bit, otherwise it may
+	 * result in GPU hang
+	 */
 	OUT_BATCH(1 << 12 | 1);
 }
 
@@ -565,8 +578,8 @@ gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch)
 
 void
 gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
-		     unsigned x, unsigned y,
-		     unsigned width, unsigned height)
+		     unsigned int x, unsigned int y,
+		     unsigned int width, unsigned int height)
 {
 	uint32_t x_dim, y_dim, tmp, right_mask;
 
@@ -662,15 +675,17 @@ gen9_emit_state_base_address(struct intel_batchbuffer *batch)
 	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
 
 	/* dynamic */
-	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
-		0, BASE_ADDRESS_MODIFY);
+	OUT_RELOC(batch->bo,
+		  I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
+		  0, BASE_ADDRESS_MODIFY);
 
 	/* indirect */
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 
 	/* instruction */
-	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
+	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
+		  BASE_ADDRESS_MODIFY);
 
 	/* general state buffer size */
 	OUT_BATCH(0xfffff000 | 1);
@@ -678,7 +693,9 @@ gen9_emit_state_base_address(struct intel_batchbuffer *batch)
 	OUT_BATCH(1 << 12 | 1);
 	/* indirect object buffer size */
 	OUT_BATCH(0xfffff000 | 1);
-	/* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
+	/* intruction buffer size, must set modify enable bit, otherwise it may
+	 * result in GPU hang
+	 */
 	OUT_BATCH(1 << 12 | 1);
 
 	/* Bindless surface state base address */
diff --git a/lib/gpu_fill.h b/lib/gpu_fill.h
index baa04807..1e4be4bb 100644
--- a/lib/gpu_fill.h
+++ b/lib/gpu_fill.h
@@ -60,8 +60,9 @@ gen7_fill_kernel(struct intel_batchbuffer *batch,
 		size_t size);
 
 uint32_t
-gen7_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,
-			       const uint32_t kernel[][4], size_t size);
+gen7_fill_interface_descriptor(struct intel_batchbuffer *batch,
+			       struct igt_buf *dst, const uint32_t kernel[][4],
+			       size_t size);
 
 void
 gen7_emit_state_base_address(struct intel_batchbuffer *batch);
@@ -76,17 +77,18 @@ void
 gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer);
 
 void
-gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor);
+gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch,
+				    uint32_t interface_descriptor);
 
 void
 gen7_emit_media_objects(struct intel_batchbuffer *batch,
-			unsigned x, unsigned y,
-			unsigned width, unsigned height);
+			unsigned int x, unsigned int y,
+			unsigned int width, unsigned int height);
 
 void
 gen7_emit_gpgpu_walk(struct intel_batchbuffer *batch,
-		     unsigned x, unsigned y,
-		     unsigned width, unsigned height);
+		     unsigned int x, unsigned int y,
+		     unsigned int width, unsigned int height);
 
 uint32_t
 gen8_spin_curbe_buffer_data(struct intel_batchbuffer *batch,
@@ -99,7 +101,9 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch,
 			int is_dst);
 
 uint32_t
-gen8_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,  const uint32_t kernel[][4], size_t size);
+gen8_fill_interface_descriptor(struct intel_batchbuffer *batch,
+			       struct igt_buf *dst, const uint32_t kernel[][4],
+			       size_t size);
 
 void
 gen8_emit_state_base_address(struct intel_batchbuffer *batch);
@@ -118,8 +122,8 @@ gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch);
 
 void
 gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
-		     unsigned x, unsigned y,
-		     unsigned width, unsigned height);
+		     unsigned int x, unsigned int y,
+		     unsigned int width, unsigned int height);
 
 void
 gen8_emit_media_objects_spin(struct intel_batchbuffer *batch);
diff --git a/lib/media_spin.c b/lib/media_spin.c
index b4414bee..b323550a 100644
--- a/lib/media_spin.c
+++ b/lib/media_spin.c
@@ -81,7 +81,8 @@ gen8_media_spinfunc(struct intel_batchbuffer *batch,
 	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
 
 	curbe_buffer = gen8_spin_curbe_buffer_data(batch, spins);
-	interface_descriptor = gen8_fill_interface_descriptor(batch, dst, spin_kernel, sizeof(spin_kernel));
+	interface_descriptor = gen8_fill_interface_descriptor(batch, dst,
+					      spin_kernel, sizeof(spin_kernel));
 	igt_assert(batch->ptr < &batch->buffer[4095]);
 
 	/* media pipeline */
@@ -119,7 +120,8 @@ gen9_media_spinfunc(struct intel_batchbuffer *batch,
 	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
 
 	curbe_buffer = gen8_spin_curbe_buffer_data(batch, spins);
-	interface_descriptor = gen8_fill_interface_descriptor(batch, dst, spin_kernel, sizeof(spin_kernel));
+	interface_descriptor = gen8_fill_interface_descriptor(batch, dst,
+					      spin_kernel, sizeof(spin_kernel));
 	igt_assert(batch->ptr < &batch->buffer[4095]);
 
 	/* media pipeline */
-- 
2.14.3

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Re: [igt-dev] [PATCH i-g-t v3 3/5] lib: Adjust media_spin and gpu_fill to our code style

[Katarzyna Dec]

On Fri, May 04, 2018 at 03:02:16PM +0200, Katarzyna Dec wrote:
> Let's adjust code to our coding style during refactoring
> media_spin code.
> 
> v2: fixed minor typos
> v3: few more style changes
> 
> Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
> Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> Cc: Antonio Argenziano <antonio.argenziano@intel.com>

Any thoughts on this patch version?
I would like to have this series merged quite soon - another patches
dependent on this series are waiting.

Thanks :)
Kasia

> ---
>  lib/gpgpu_fill.c | 15 +++++------
>  lib/gpu_fill.c   | 77 ++++++++++++++++++++++++++++++++++----------------------
>  lib/gpu_fill.h   | 24 ++++++++++--------
>  lib/media_spin.c |  6 +++--
>  4 files changed, 71 insertions(+), 51 deletions(-)
> 
> diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
> index 010dde06..52925a5c 100644
> --- a/lib/gpgpu_fill.c
> +++ b/lib/gpgpu_fill.c
> @@ -112,9 +112,8 @@ gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>  	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
>  
>  	/*
> -	 * const buffer needs to fill for every thread, but as we have just 1 thread
> -	 * per every group, so need only one curbe data.
> -	 *
> +	 * const buffer needs to fill for every thread, but as we have just 1
> +	 * thread per every group, so need only one curbe data.
>  	 * For each thread, just use thread group ID for buffer offset.
>  	 */
>  	curbe_buffer = gen7_fill_curbe_buffer_data(batch, color);
> @@ -160,9 +159,8 @@ gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>  	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
>  
>  	/*
> -	 * const buffer needs to fill for every thread, but as we have just 1 thread
> -	 * per every group, so need only one curbe data.
> -	 *
> +	 * const buffer needs to fill for every thread, but as we have just 1
> +	 * thread per every group, so need only one curbe data.
>  	 * For each thread, just use thread group ID for buffer offset.
>  	 */
>  	curbe_buffer = gen7_fill_curbe_buffer_data(batch, color);
> @@ -208,9 +206,8 @@ gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>  	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
>  
>  	/*
> -	 * const buffer needs to fill for every thread, but as we have just 1 thread
> -	 * per every group, so need only one curbe data.
> -	 *
> +	 * const buffer needs to fill for every thread, but as we have just 1
> +	 * thread per every group, so need only one curbe data.
>  	 * For each thread, just use thread group ID for buffer offset.
>  	 */
>  	curbe_buffer = gen7_fill_curbe_buffer_data(batch, color);
> diff --git a/lib/gpu_fill.c b/lib/gpu_fill.c
> index 8dab39df..24e03cf2 100644
> --- a/lib/gpu_fill.c
> +++ b/lib/gpu_fill.c
> @@ -32,13 +32,13 @@ gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end)
>  	ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer);
>  	if (ret == 0)
>  		ret = drm_intel_bo_mrb_exec(batch->bo, batch_end,
> -					NULL, 0, 0, 0);
> +					    NULL, 0, 0, 0);
>  	igt_assert(ret == 0);
>  }
>  
>  uint32_t
>  gen7_fill_curbe_buffer_data(struct intel_batchbuffer *batch,
> -			uint8_t color)
> +			    uint8_t color)
>  {
>  	uint8_t *curbe_buffer;
>  	uint32_t offset;
> @@ -132,8 +132,9 @@ gen7_fill_kernel(struct intel_batchbuffer *batch,
>  }
>  
>  uint32_t
> -gen7_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,
> -			       const uint32_t kernel[][4], size_t size)
> +gen7_fill_interface_descriptor(struct intel_batchbuffer *batch,
> +			       struct igt_buf *dst, const uint32_t kernel[][4],
> +			       size_t size)
>  {
>  	struct gen7_interface_descriptor_data *idd;
>  	uint32_t offset;
> @@ -171,16 +172,19 @@ gen7_emit_state_base_address(struct intel_batchbuffer *batch)
>  	OUT_BATCH(0);
>  
>  	/* surface */
> -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
> +	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
> +		  BASE_ADDRESS_MODIFY);
>  
>  	/* dynamic */
> -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
> +	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
> +		  BASE_ADDRESS_MODIFY);
>  
>  	/* indirect */
>  	OUT_BATCH(0);
>  
>  	/* instruction */
> -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
> +	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
> +		  BASE_ADDRESS_MODIFY);
>  
>  	/* general/dynamic/indirect/instruction access Bound */
>  	OUT_BATCH(0);
> @@ -204,8 +208,8 @@ gen7_emit_vfe_state(struct intel_batchbuffer *batch)
>  	OUT_BATCH(0);
>  
>  	/* urb entry size & curbe size */
> -	OUT_BATCH(2 << 16 | 	/* in 256 bits unit */
> -		2);		/* in 256 bits unit */
> +	OUT_BATCH(2 << 16 |	/* in 256 bits unit */
> +		  2);		/* in 256 bits unit */
>  
>  	/* scoreboard */
>  	OUT_BATCH(0);
> @@ -229,7 +233,7 @@ gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
>  	OUT_BATCH(0);
>  
>  	/* urb entry size & curbe size */
> -	OUT_BATCH(0 << 16 | 	/* URB entry size in 256 bits unit */
> +	OUT_BATCH(0 << 16 |	/* URB entry size in 256 bits unit */
>  		  1);		/* CURBE entry size in 256 bits unit */
>  
>  	/* scoreboard */
> @@ -250,7 +254,8 @@ gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer)
>  }
>  
>  void
> -gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor)
> +gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch,
> +				    uint32_t interface_descriptor)
>  {
>  	OUT_BATCH(GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2));
>  	OUT_BATCH(0);
> @@ -259,14 +264,16 @@ gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t in
>  		OUT_BATCH(sizeof(struct gen7_interface_descriptor_data));
>  	else
>  		OUT_BATCH(sizeof(struct gen8_interface_descriptor_data));
> -	/* interface descriptor address, is relative to the dynamics base address */
> +	/* interface descriptor address, is relative to the dynamics base
> +	 * address
> +	 */
>  	OUT_BATCH(interface_descriptor);
>  }
>  
>  void
>  gen7_emit_media_objects(struct intel_batchbuffer *batch,
> -			unsigned x, unsigned y,
> -			unsigned width, unsigned height)
> +			unsigned int x, unsigned int y,
> +			unsigned int width, unsigned int height)
>  {
>  	int i, j;
>  
> @@ -288,7 +295,8 @@ gen7_emit_media_objects(struct intel_batchbuffer *batch,
>  			/* inline data (xoffset, yoffset) */
>  			OUT_BATCH(x + i * 16);
>  			OUT_BATCH(y + j * 16);
> -			if (AT_LEAST_GEN(batch->devid, 8) && !IS_CHERRYVIEW(batch->devid))
> +			if (AT_LEAST_GEN(batch->devid, 8) &&
> +			    !IS_CHERRYVIEW(batch->devid))
>  				gen8_emit_media_state_flush(batch);
>  		}
>  	}
> @@ -296,8 +304,8 @@ gen7_emit_media_objects(struct intel_batchbuffer *batch,
>  
>  void
>  gen7_emit_gpgpu_walk(struct intel_batchbuffer *batch,
> -		     unsigned x, unsigned y,
> -		     unsigned width, unsigned height)
> +		     unsigned int x, unsigned int y,
> +		     unsigned int width, unsigned int height)
>  {
>  	uint32_t x_dim, y_dim, tmp, right_mask;
>  
> @@ -400,8 +408,7 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch,
>  
>  	ret = drm_intel_bo_emit_reloc(batch->bo,
>  				intel_batchbuffer_subdata_offset(batch, ss) + 8 * 4,
> -				buf->bo, 0,
> -				read_domain, write_domain);
> +				buf->bo, 0, read_domain, write_domain);
>  	igt_assert(ret == 0);
>  
>  	ss->ss2.height = igt_buf_height(buf) - 1;
> @@ -417,7 +424,9 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch,
>  }
>  
>  uint32_t
> -gen8_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,  const uint32_t kernel[][4], size_t size)
> +gen8_fill_interface_descriptor(struct intel_batchbuffer *batch,
> +			       struct igt_buf *dst, const uint32_t kernel[][4],
> +			       size_t size)
>  {
>  	struct gen8_interface_descriptor_data *idd;
>  	uint32_t offset;
> @@ -464,15 +473,17 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
>  	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
>  
>  	/* dynamic */
> -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
> -		0, BASE_ADDRESS_MODIFY);
> +	OUT_RELOC(batch->bo,
> +		  I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
> +		  0, BASE_ADDRESS_MODIFY);
>  
>  	/* indirect */
>  	OUT_BATCH(0);
>  	OUT_BATCH(0);
>  
>  	/* instruction */
> -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
> +	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
> +		  BASE_ADDRESS_MODIFY);
>  
>  	/* general state buffer size */
>  	OUT_BATCH(0xfffff000 | 1);
> @@ -480,7 +491,9 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
>  	OUT_BATCH(1 << 12 | 1);
>  	/* indirect object buffer size */
>  	OUT_BATCH(0xfffff000 | 1);
> -	/* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
> +	/* instruction buffer size, must set modify enable bit, otherwise it may
> +	 * result in GPU hang
> +	 */
>  	OUT_BATCH(1 << 12 | 1);
>  }
>  
> @@ -565,8 +578,8 @@ gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch)
>  
>  void
>  gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
> -		     unsigned x, unsigned y,
> -		     unsigned width, unsigned height)
> +		     unsigned int x, unsigned int y,
> +		     unsigned int width, unsigned int height)
>  {
>  	uint32_t x_dim, y_dim, tmp, right_mask;
>  
> @@ -662,15 +675,17 @@ gen9_emit_state_base_address(struct intel_batchbuffer *batch)
>  	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
>  
>  	/* dynamic */
> -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
> -		0, BASE_ADDRESS_MODIFY);
> +	OUT_RELOC(batch->bo,
> +		  I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
> +		  0, BASE_ADDRESS_MODIFY);
>  
>  	/* indirect */
>  	OUT_BATCH(0);
>  	OUT_BATCH(0);
>  
>  	/* instruction */
> -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
> +	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
> +		  BASE_ADDRESS_MODIFY);
>  
>  	/* general state buffer size */
>  	OUT_BATCH(0xfffff000 | 1);
> @@ -678,7 +693,9 @@ gen9_emit_state_base_address(struct intel_batchbuffer *batch)
>  	OUT_BATCH(1 << 12 | 1);
>  	/* indirect object buffer size */
>  	OUT_BATCH(0xfffff000 | 1);
> -	/* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
> +	/* intruction buffer size, must set modify enable bit, otherwise it may
> +	 * result in GPU hang
> +	 */
>  	OUT_BATCH(1 << 12 | 1);
>  
>  	/* Bindless surface state base address */
> diff --git a/lib/gpu_fill.h b/lib/gpu_fill.h
> index baa04807..1e4be4bb 100644
> --- a/lib/gpu_fill.h
> +++ b/lib/gpu_fill.h
> @@ -60,8 +60,9 @@ gen7_fill_kernel(struct intel_batchbuffer *batch,
>  		size_t size);
>  
>  uint32_t
> -gen7_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,
> -			       const uint32_t kernel[][4], size_t size);
> +gen7_fill_interface_descriptor(struct intel_batchbuffer *batch,
> +			       struct igt_buf *dst, const uint32_t kernel[][4],
> +			       size_t size);
>  
>  void
>  gen7_emit_state_base_address(struct intel_batchbuffer *batch);
> @@ -76,17 +77,18 @@ void
>  gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer);
>  
>  void
> -gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor);
> +gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch,
> +				    uint32_t interface_descriptor);
>  
>  void
>  gen7_emit_media_objects(struct intel_batchbuffer *batch,
> -			unsigned x, unsigned y,
> -			unsigned width, unsigned height);
> +			unsigned int x, unsigned int y,
> +			unsigned int width, unsigned int height);
>  
>  void
>  gen7_emit_gpgpu_walk(struct intel_batchbuffer *batch,
> -		     unsigned x, unsigned y,
> -		     unsigned width, unsigned height);
> +		     unsigned int x, unsigned int y,
> +		     unsigned int width, unsigned int height);
>  
>  uint32_t
>  gen8_spin_curbe_buffer_data(struct intel_batchbuffer *batch,
> @@ -99,7 +101,9 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch,
>  			int is_dst);
>  
>  uint32_t
> -gen8_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,  const uint32_t kernel[][4], size_t size);
> +gen8_fill_interface_descriptor(struct intel_batchbuffer *batch,
> +			       struct igt_buf *dst, const uint32_t kernel[][4],
> +			       size_t size);
>  
>  void
>  gen8_emit_state_base_address(struct intel_batchbuffer *batch);
> @@ -118,8 +122,8 @@ gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch);
>  
>  void
>  gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
> -		     unsigned x, unsigned y,
> -		     unsigned width, unsigned height);
> +		     unsigned int x, unsigned int y,
> +		     unsigned int width, unsigned int height);
>  
>  void
>  gen8_emit_media_objects_spin(struct intel_batchbuffer *batch);
> diff --git a/lib/media_spin.c b/lib/media_spin.c
> index b4414bee..b323550a 100644
> --- a/lib/media_spin.c
> +++ b/lib/media_spin.c
> @@ -81,7 +81,8 @@ gen8_media_spinfunc(struct intel_batchbuffer *batch,
>  	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
>  
>  	curbe_buffer = gen8_spin_curbe_buffer_data(batch, spins);
> -	interface_descriptor = gen8_fill_interface_descriptor(batch, dst, spin_kernel, sizeof(spin_kernel));
> +	interface_descriptor = gen8_fill_interface_descriptor(batch, dst,
> +					      spin_kernel, sizeof(spin_kernel));
>  	igt_assert(batch->ptr < &batch->buffer[4095]);
>  
>  	/* media pipeline */
> @@ -119,7 +120,8 @@ gen9_media_spinfunc(struct intel_batchbuffer *batch,
>  	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
>  
>  	curbe_buffer = gen8_spin_curbe_buffer_data(batch, spins);
> -	interface_descriptor = gen8_fill_interface_descriptor(batch, dst, spin_kernel, sizeof(spin_kernel));
> +	interface_descriptor = gen8_fill_interface_descriptor(batch, dst,
> +					      spin_kernel, sizeof(spin_kernel));
>  	igt_assert(batch->ptr < &batch->buffer[4095]);
>  
>  	/* media pipeline */
> -- 
> 2.14.3
> 
> _______________________________________________
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> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
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Re: [igt-dev] [PATCH i-g-t v3 3/5] lib: Adjust media_spin and gpu_fill to our code style

[Antonio Argenziano]

On 10/05/18 06:13, Katarzyna Dec wrote:
> On Fri, May 04, 2018 at 03:02:16PM +0200, Katarzyna Dec wrote:
>> Let's adjust code to our coding style during refactoring
>> media_spin code.
>>
>> v2: fixed minor typos
>> v3: few more style changes
>>
>> Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
>> Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
>> Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> 
> Any thoughts on this patch version?
> I would like to have this series merged quite soon - another patches
> dependent on this series are waiting.

The change looks OK, although, in quite a few places, there is a change 
in indent to align the function parameters on the same column or an 
/s/unsigned/unsigned int which I could not find in 
'process/coding-style.rst'. So maybe we should change the commit message 
to say that this is a cosmetic change to improve readability or 
something along those lines.

Antonio

> 
> Thanks :)
> Kasia
> 
>> ---
>>   lib/gpgpu_fill.c | 15 +++++------
>>   lib/gpu_fill.c   | 77 ++++++++++++++++++++++++++++++++++----------------------
>>   lib/gpu_fill.h   | 24 ++++++++++--------
>>   lib/media_spin.c |  6 +++--
>>   4 files changed, 71 insertions(+), 51 deletions(-)
>>
>> diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
>> index 010dde06..52925a5c 100644
>> --- a/lib/gpgpu_fill.c
>> +++ b/lib/gpgpu_fill.c
>> @@ -112,9 +112,8 @@ gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>>   	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
>>   
>>   	/*
>> -	 * const buffer needs to fill for every thread, but as we have just 1 thread
>> -	 * per every group, so need only one curbe data.
>> -	 *
>> +	 * const buffer needs to fill for every thread, but as we have just 1
>> +	 * thread per every group, so need only one curbe data.
>>   	 * For each thread, just use thread group ID for buffer offset.
>>   	 */
>>   	curbe_buffer = gen7_fill_curbe_buffer_data(batch, color);
>> @@ -160,9 +159,8 @@ gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>>   	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
>>   
>>   	/*
>> -	 * const buffer needs to fill for every thread, but as we have just 1 thread
>> -	 * per every group, so need only one curbe data.
>> -	 *
>> +	 * const buffer needs to fill for every thread, but as we have just 1
>> +	 * thread per every group, so need only one curbe data.
>>   	 * For each thread, just use thread group ID for buffer offset.
>>   	 */
>>   	curbe_buffer = gen7_fill_curbe_buffer_data(batch, color);
>> @@ -208,9 +206,8 @@ gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>>   	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
>>   
>>   	/*
>> -	 * const buffer needs to fill for every thread, but as we have just 1 thread
>> -	 * per every group, so need only one curbe data.
>> -	 *
>> +	 * const buffer needs to fill for every thread, but as we have just 1
>> +	 * thread per every group, so need only one curbe data.
>>   	 * For each thread, just use thread group ID for buffer offset.
>>   	 */
>>   	curbe_buffer = gen7_fill_curbe_buffer_data(batch, color);
>> diff --git a/lib/gpu_fill.c b/lib/gpu_fill.c
>> index 8dab39df..24e03cf2 100644
>> --- a/lib/gpu_fill.c
>> +++ b/lib/gpu_fill.c
>> @@ -32,13 +32,13 @@ gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end)
>>   	ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer);
>>   	if (ret == 0)
>>   		ret = drm_intel_bo_mrb_exec(batch->bo, batch_end,
>> -					NULL, 0, 0, 0);
>> +					    NULL, 0, 0, 0);
>>   	igt_assert(ret == 0);
>>   }
>>   
>>   uint32_t
>>   gen7_fill_curbe_buffer_data(struct intel_batchbuffer *batch,
>> -			uint8_t color)
>> +			    uint8_t color)
>>   {
>>   	uint8_t *curbe_buffer;
>>   	uint32_t offset;
>> @@ -132,8 +132,9 @@ gen7_fill_kernel(struct intel_batchbuffer *batch,
>>   }
>>   
>>   uint32_t
>> -gen7_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,
>> -			       const uint32_t kernel[][4], size_t size)
>> +gen7_fill_interface_descriptor(struct intel_batchbuffer *batch,
>> +			       struct igt_buf *dst, const uint32_t kernel[][4],
>> +			       size_t size)
>>   {
>>   	struct gen7_interface_descriptor_data *idd;
>>   	uint32_t offset;
>> @@ -171,16 +172,19 @@ gen7_emit_state_base_address(struct intel_batchbuffer *batch)
>>   	OUT_BATCH(0);
>>   
>>   	/* surface */
>> -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
>> +	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
>> +		  BASE_ADDRESS_MODIFY);
>>   
>>   	/* dynamic */
>> -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
>> +	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
>> +		  BASE_ADDRESS_MODIFY);
>>   
>>   	/* indirect */
>>   	OUT_BATCH(0);
>>   
>>   	/* instruction */
>> -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
>> +	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
>> +		  BASE_ADDRESS_MODIFY);
>>   
>>   	/* general/dynamic/indirect/instruction access Bound */
>>   	OUT_BATCH(0);
>> @@ -204,8 +208,8 @@ gen7_emit_vfe_state(struct intel_batchbuffer *batch)
>>   	OUT_BATCH(0);
>>   
>>   	/* urb entry size & curbe size */
>> -	OUT_BATCH(2 << 16 | 	/* in 256 bits unit */
>> -		2);		/* in 256 bits unit */
>> +	OUT_BATCH(2 << 16 |	/* in 256 bits unit */
>> +		  2);		/* in 256 bits unit */
>>   
>>   	/* scoreboard */
>>   	OUT_BATCH(0);
>> @@ -229,7 +233,7 @@ gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
>>   	OUT_BATCH(0);
>>   
>>   	/* urb entry size & curbe size */
>> -	OUT_BATCH(0 << 16 | 	/* URB entry size in 256 bits unit */
>> +	OUT_BATCH(0 << 16 |	/* URB entry size in 256 bits unit */
>>   		  1);		/* CURBE entry size in 256 bits unit */
>>   
>>   	/* scoreboard */
>> @@ -250,7 +254,8 @@ gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer)
>>   }
>>   
>>   void
>> -gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor)
>> +gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch,
>> +				    uint32_t interface_descriptor)
>>   {
>>   	OUT_BATCH(GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2));
>>   	OUT_BATCH(0);
>> @@ -259,14 +264,16 @@ gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t in
>>   		OUT_BATCH(sizeof(struct gen7_interface_descriptor_data));
>>   	else
>>   		OUT_BATCH(sizeof(struct gen8_interface_descriptor_data));
>> -	/* interface descriptor address, is relative to the dynamics base address */
>> +	/* interface descriptor address, is relative to the dynamics base
>> +	 * address
>> +	 */
>>   	OUT_BATCH(interface_descriptor);
>>   }
>>   
>>   void
>>   gen7_emit_media_objects(struct intel_batchbuffer *batch,
>> -			unsigned x, unsigned y,
>> -			unsigned width, unsigned height)
>> +			unsigned int x, unsigned int y,
>> +			unsigned int width, unsigned int height)
>>   {
>>   	int i, j;
>>   
>> @@ -288,7 +295,8 @@ gen7_emit_media_objects(struct intel_batchbuffer *batch,
>>   			/* inline data (xoffset, yoffset) */
>>   			OUT_BATCH(x + i * 16);
>>   			OUT_BATCH(y + j * 16);
>> -			if (AT_LEAST_GEN(batch->devid, 8) && !IS_CHERRYVIEW(batch->devid))
>> +			if (AT_LEAST_GEN(batch->devid, 8) &&
>> +			    !IS_CHERRYVIEW(batch->devid))
>>   				gen8_emit_media_state_flush(batch);
>>   		}
>>   	}
>> @@ -296,8 +304,8 @@ gen7_emit_media_objects(struct intel_batchbuffer *batch,
>>   
>>   void
>>   gen7_emit_gpgpu_walk(struct intel_batchbuffer *batch,
>> -		     unsigned x, unsigned y,
>> -		     unsigned width, unsigned height)
>> +		     unsigned int x, unsigned int y,
>> +		     unsigned int width, unsigned int height)
>>   {
>>   	uint32_t x_dim, y_dim, tmp, right_mask;
>>   
>> @@ -400,8 +408,7 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch,
>>   
>>   	ret = drm_intel_bo_emit_reloc(batch->bo,
>>   				intel_batchbuffer_subdata_offset(batch, ss) + 8 * 4,
>> -				buf->bo, 0,
>> -				read_domain, write_domain);
>> +				buf->bo, 0, read_domain, write_domain);
>>   	igt_assert(ret == 0);
>>   
>>   	ss->ss2.height = igt_buf_height(buf) - 1;
>> @@ -417,7 +424,9 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch,
>>   }
>>   
>>   uint32_t
>> -gen8_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,  const uint32_t kernel[][4], size_t size)
>> +gen8_fill_interface_descriptor(struct intel_batchbuffer *batch,
>> +			       struct igt_buf *dst, const uint32_t kernel[][4],
>> +			       size_t size)
>>   {
>>   	struct gen8_interface_descriptor_data *idd;
>>   	uint32_t offset;
>> @@ -464,15 +473,17 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
>>   	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
>>   
>>   	/* dynamic */
>> -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
>> -		0, BASE_ADDRESS_MODIFY);
>> +	OUT_RELOC(batch->bo,
>> +		  I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
>> +		  0, BASE_ADDRESS_MODIFY);
>>   
>>   	/* indirect */
>>   	OUT_BATCH(0);
>>   	OUT_BATCH(0);
>>   
>>   	/* instruction */
>> -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
>> +	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
>> +		  BASE_ADDRESS_MODIFY);
>>   
>>   	/* general state buffer size */
>>   	OUT_BATCH(0xfffff000 | 1);
>> @@ -480,7 +491,9 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
>>   	OUT_BATCH(1 << 12 | 1);
>>   	/* indirect object buffer size */
>>   	OUT_BATCH(0xfffff000 | 1);
>> -	/* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
>> +	/* instruction buffer size, must set modify enable bit, otherwise it may
>> +	 * result in GPU hang
>> +	 */
>>   	OUT_BATCH(1 << 12 | 1);
>>   }
>>   
>> @@ -565,8 +578,8 @@ gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch)
>>   
>>   void
>>   gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
>> -		     unsigned x, unsigned y,
>> -		     unsigned width, unsigned height)
>> +		     unsigned int x, unsigned int y,
>> +		     unsigned int width, unsigned int height)
>>   {
>>   	uint32_t x_dim, y_dim, tmp, right_mask;
>>   
>> @@ -662,15 +675,17 @@ gen9_emit_state_base_address(struct intel_batchbuffer *batch)
>>   	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
>>   
>>   	/* dynamic */
>> -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
>> -		0, BASE_ADDRESS_MODIFY);
>> +	OUT_RELOC(batch->bo,
>> +		  I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
>> +		  0, BASE_ADDRESS_MODIFY);
>>   
>>   	/* indirect */
>>   	OUT_BATCH(0);
>>   	OUT_BATCH(0);
>>   
>>   	/* instruction */
>> -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
>> +	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
>> +		  BASE_ADDRESS_MODIFY);
>>   
>>   	/* general state buffer size */
>>   	OUT_BATCH(0xfffff000 | 1);
>> @@ -678,7 +693,9 @@ gen9_emit_state_base_address(struct intel_batchbuffer *batch)
>>   	OUT_BATCH(1 << 12 | 1);
>>   	/* indirect object buffer size */
>>   	OUT_BATCH(0xfffff000 | 1);
>> -	/* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
>> +	/* intruction buffer size, must set modify enable bit, otherwise it may
>> +	 * result in GPU hang
>> +	 */
>>   	OUT_BATCH(1 << 12 | 1);
>>   
>>   	/* Bindless surface state base address */
>> diff --git a/lib/gpu_fill.h b/lib/gpu_fill.h
>> index baa04807..1e4be4bb 100644
>> --- a/lib/gpu_fill.h
>> +++ b/lib/gpu_fill.h
>> @@ -60,8 +60,9 @@ gen7_fill_kernel(struct intel_batchbuffer *batch,
>>   		size_t size);
>>   
>>   uint32_t
>> -gen7_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,
>> -			       const uint32_t kernel[][4], size_t size);
>> +gen7_fill_interface_descriptor(struct intel_batchbuffer *batch,
>> +			       struct igt_buf *dst, const uint32_t kernel[][4],
>> +			       size_t size);
>>   
>>   void
>>   gen7_emit_state_base_address(struct intel_batchbuffer *batch);
>> @@ -76,17 +77,18 @@ void
>>   gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer);
>>   
>>   void
>> -gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor);
>> +gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch,
>> +				    uint32_t interface_descriptor);
>>   
>>   void
>>   gen7_emit_media_objects(struct intel_batchbuffer *batch,
>> -			unsigned x, unsigned y,
>> -			unsigned width, unsigned height);
>> +			unsigned int x, unsigned int y,
>> +			unsigned int width, unsigned int height);
>>   
>>   void
>>   gen7_emit_gpgpu_walk(struct intel_batchbuffer *batch,
>> -		     unsigned x, unsigned y,
>> -		     unsigned width, unsigned height);
>> +		     unsigned int x, unsigned int y,
>> +		     unsigned int width, unsigned int height);
>>   
>>   uint32_t
>>   gen8_spin_curbe_buffer_data(struct intel_batchbuffer *batch,
>> @@ -99,7 +101,9 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch,
>>   			int is_dst);
>>   
>>   uint32_t
>> -gen8_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,  const uint32_t kernel[][4], size_t size);
>> +gen8_fill_interface_descriptor(struct intel_batchbuffer *batch,
>> +			       struct igt_buf *dst, const uint32_t kernel[][4],
>> +			       size_t size);
>>   
>>   void
>>   gen8_emit_state_base_address(struct intel_batchbuffer *batch);
>> @@ -118,8 +122,8 @@ gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch);
>>   
>>   void
>>   gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
>> -		     unsigned x, unsigned y,
>> -		     unsigned width, unsigned height);
>> +		     unsigned int x, unsigned int y,
>> +		     unsigned int width, unsigned int height);
>>   
>>   void
>>   gen8_emit_media_objects_spin(struct intel_batchbuffer *batch);
>> diff --git a/lib/media_spin.c b/lib/media_spin.c
>> index b4414bee..b323550a 100644
>> --- a/lib/media_spin.c
>> +++ b/lib/media_spin.c
>> @@ -81,7 +81,8 @@ gen8_media_spinfunc(struct intel_batchbuffer *batch,
>>   	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
>>   
>>   	curbe_buffer = gen8_spin_curbe_buffer_data(batch, spins);
>> -	interface_descriptor = gen8_fill_interface_descriptor(batch, dst, spin_kernel, sizeof(spin_kernel));
>> +	interface_descriptor = gen8_fill_interface_descriptor(batch, dst,
>> +					      spin_kernel, sizeof(spin_kernel));
>>   	igt_assert(batch->ptr < &batch->buffer[4095]);
>>   
>>   	/* media pipeline */
>> @@ -119,7 +120,8 @@ gen9_media_spinfunc(struct intel_batchbuffer *batch,
>>   	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
>>   
>>   	curbe_buffer = gen8_spin_curbe_buffer_data(batch, spins);
>> -	interface_descriptor = gen8_fill_interface_descriptor(batch, dst, spin_kernel, sizeof(spin_kernel));
>> +	interface_descriptor = gen8_fill_interface_descriptor(batch, dst,
>> +					      spin_kernel, sizeof(spin_kernel));
>>   	igt_assert(batch->ptr < &batch->buffer[4095]);
>>   
>>   	/* media pipeline */
>> -- 
>> 2.14.3
>>
>> _______________________________________________
>> igt-dev mailing list
>> igt-dev@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/igt-dev
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Re: [igt-dev] [PATCH i-g-t v3 3/5] lib: Adjust media_spin and gpu_fill to our code style

[Katarzyna Dec]

On Thu, May 10, 2018 at 10:11:51AM -0700, Antonio Argenziano wrote:
> 
> 
> On 10/05/18 06:13, Katarzyna Dec wrote:
> > On Fri, May 04, 2018 at 03:02:16PM +0200, Katarzyna Dec wrote:
> > > Let's adjust code to our coding style during refactoring
> > > media_spin code.
> > > 
> > > v2: fixed minor typos
> > > v3: few more style changes
> > > 
> > > Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
> > > Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> > > Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> > 
> > Any thoughts on this patch version?
> > I would like to have this series merged quite soon - another patches
> > dependent on this series are waiting.
> 
> The change looks OK, although, in quite a few places, there is a change in
> indent to align the function parameters on the same column or an
> /s/unsigned/unsigned int which I could not find in
> 'process/coding-style.rst'. So maybe we should change the commit message to
> say that this is a cosmetic change to improve readability or something along
> those lines.
> 
> Antonio
> 
I've double checked indents in whole patch and found few more issue.
Did you mean commit msg changes - add info about changes in gpgpu_fill as well?
If yes, I hope I did that.

Thanks!
Kasia :)

> > 
> > Thanks :)
> > Kasia
> > 
> > > ---
> > >   lib/gpgpu_fill.c | 15 +++++------
> > >   lib/gpu_fill.c   | 77 ++++++++++++++++++++++++++++++++++----------------------
> > >   lib/gpu_fill.h   | 24 ++++++++++--------
> > >   lib/media_spin.c |  6 +++--
> > >   4 files changed, 71 insertions(+), 51 deletions(-)
> > > 
> > > diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
> > > index 010dde06..52925a5c 100644
> > > --- a/lib/gpgpu_fill.c
> > > +++ b/lib/gpgpu_fill.c
> > > @@ -112,9 +112,8 @@ gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
> > >   	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
> > >   	/*
> > > -	 * const buffer needs to fill for every thread, but as we have just 1 thread
> > > -	 * per every group, so need only one curbe data.
> > > -	 *
> > > +	 * const buffer needs to fill for every thread, but as we have just 1
> > > +	 * thread per every group, so need only one curbe data.
> > >   	 * For each thread, just use thread group ID for buffer offset.
> > >   	 */
> > >   	curbe_buffer = gen7_fill_curbe_buffer_data(batch, color);
> > > @@ -160,9 +159,8 @@ gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch,
> > >   	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
> > >   	/*
> > > -	 * const buffer needs to fill for every thread, but as we have just 1 thread
> > > -	 * per every group, so need only one curbe data.
> > > -	 *
> > > +	 * const buffer needs to fill for every thread, but as we have just 1
> > > +	 * thread per every group, so need only one curbe data.
> > >   	 * For each thread, just use thread group ID for buffer offset.
> > >   	 */
> > >   	curbe_buffer = gen7_fill_curbe_buffer_data(batch, color);
> > > @@ -208,9 +206,8 @@ gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch,
> > >   	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
> > >   	/*
> > > -	 * const buffer needs to fill for every thread, but as we have just 1 thread
> > > -	 * per every group, so need only one curbe data.
> > > -	 *
> > > +	 * const buffer needs to fill for every thread, but as we have just 1
> > > +	 * thread per every group, so need only one curbe data.
> > >   	 * For each thread, just use thread group ID for buffer offset.
> > >   	 */
> > >   	curbe_buffer = gen7_fill_curbe_buffer_data(batch, color);
> > > diff --git a/lib/gpu_fill.c b/lib/gpu_fill.c
> > > index 8dab39df..24e03cf2 100644
> > > --- a/lib/gpu_fill.c
> > > +++ b/lib/gpu_fill.c
> > > @@ -32,13 +32,13 @@ gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end)
> > >   	ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer);
> > >   	if (ret == 0)
> > >   		ret = drm_intel_bo_mrb_exec(batch->bo, batch_end,
> > > -					NULL, 0, 0, 0);
> > > +					    NULL, 0, 0, 0);
> > >   	igt_assert(ret == 0);
> > >   }
> > >   uint32_t
> > >   gen7_fill_curbe_buffer_data(struct intel_batchbuffer *batch,
> > > -			uint8_t color)
> > > +			    uint8_t color)
> > >   {
> > >   	uint8_t *curbe_buffer;
> > >   	uint32_t offset;
> > > @@ -132,8 +132,9 @@ gen7_fill_kernel(struct intel_batchbuffer *batch,
> > >   }
> > >   uint32_t
> > > -gen7_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,
> > > -			       const uint32_t kernel[][4], size_t size)
> > > +gen7_fill_interface_descriptor(struct intel_batchbuffer *batch,
> > > +			       struct igt_buf *dst, const uint32_t kernel[][4],
> > > +			       size_t size)
> > >   {
> > >   	struct gen7_interface_descriptor_data *idd;
> > >   	uint32_t offset;
> > > @@ -171,16 +172,19 @@ gen7_emit_state_base_address(struct intel_batchbuffer *batch)
> > >   	OUT_BATCH(0);
> > >   	/* surface */
> > > -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
> > > +	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
> > > +		  BASE_ADDRESS_MODIFY);
> > >   	/* dynamic */
> > > -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
> > > +	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
> > > +		  BASE_ADDRESS_MODIFY);
> > >   	/* indirect */
> > >   	OUT_BATCH(0);
> > >   	/* instruction */
> > > -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
> > > +	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
> > > +		  BASE_ADDRESS_MODIFY);
> > >   	/* general/dynamic/indirect/instruction access Bound */
> > >   	OUT_BATCH(0);
> > > @@ -204,8 +208,8 @@ gen7_emit_vfe_state(struct intel_batchbuffer *batch)
> > >   	OUT_BATCH(0);
> > >   	/* urb entry size & curbe size */
> > > -	OUT_BATCH(2 << 16 | 	/* in 256 bits unit */
> > > -		2);		/* in 256 bits unit */
> > > +	OUT_BATCH(2 << 16 |	/* in 256 bits unit */
> > > +		  2);		/* in 256 bits unit */
> > >   	/* scoreboard */
> > >   	OUT_BATCH(0);
> > > @@ -229,7 +233,7 @@ gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
> > >   	OUT_BATCH(0);
> > >   	/* urb entry size & curbe size */
> > > -	OUT_BATCH(0 << 16 | 	/* URB entry size in 256 bits unit */
> > > +	OUT_BATCH(0 << 16 |	/* URB entry size in 256 bits unit */
> > >   		  1);		/* CURBE entry size in 256 bits unit */
> > >   	/* scoreboard */
> > > @@ -250,7 +254,8 @@ gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer)
> > >   }
> > >   void
> > > -gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor)
> > > +gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch,
> > > +				    uint32_t interface_descriptor)
> > >   {
> > >   	OUT_BATCH(GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2));
> > >   	OUT_BATCH(0);
> > > @@ -259,14 +264,16 @@ gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t in
> > >   		OUT_BATCH(sizeof(struct gen7_interface_descriptor_data));
> > >   	else
> > >   		OUT_BATCH(sizeof(struct gen8_interface_descriptor_data));
> > > -	/* interface descriptor address, is relative to the dynamics base address */
> > > +	/* interface descriptor address, is relative to the dynamics base
> > > +	 * address
> > > +	 */
> > >   	OUT_BATCH(interface_descriptor);
> > >   }
> > >   void
> > >   gen7_emit_media_objects(struct intel_batchbuffer *batch,
> > > -			unsigned x, unsigned y,
> > > -			unsigned width, unsigned height)
> > > +			unsigned int x, unsigned int y,
> > > +			unsigned int width, unsigned int height)
> > >   {
> > >   	int i, j;
> > > @@ -288,7 +295,8 @@ gen7_emit_media_objects(struct intel_batchbuffer *batch,
> > >   			/* inline data (xoffset, yoffset) */
> > >   			OUT_BATCH(x + i * 16);
> > >   			OUT_BATCH(y + j * 16);
> > > -			if (AT_LEAST_GEN(batch->devid, 8) && !IS_CHERRYVIEW(batch->devid))
> > > +			if (AT_LEAST_GEN(batch->devid, 8) &&
> > > +			    !IS_CHERRYVIEW(batch->devid))
> > >   				gen8_emit_media_state_flush(batch);
> > >   		}
> > >   	}
> > > @@ -296,8 +304,8 @@ gen7_emit_media_objects(struct intel_batchbuffer *batch,
> > >   void
> > >   gen7_emit_gpgpu_walk(struct intel_batchbuffer *batch,
> > > -		     unsigned x, unsigned y,
> > > -		     unsigned width, unsigned height)
> > > +		     unsigned int x, unsigned int y,
> > > +		     unsigned int width, unsigned int height)
> > >   {
> > >   	uint32_t x_dim, y_dim, tmp, right_mask;
> > > @@ -400,8 +408,7 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch,
> > >   	ret = drm_intel_bo_emit_reloc(batch->bo,
> > >   				intel_batchbuffer_subdata_offset(batch, ss) + 8 * 4,
> > > -				buf->bo, 0,
> > > -				read_domain, write_domain);
> > > +				buf->bo, 0, read_domain, write_domain);
> > >   	igt_assert(ret == 0);
> > >   	ss->ss2.height = igt_buf_height(buf) - 1;
> > > @@ -417,7 +424,9 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch,
> > >   }
> > >   uint32_t
> > > -gen8_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,  const uint32_t kernel[][4], size_t size)
> > > +gen8_fill_interface_descriptor(struct intel_batchbuffer *batch,
> > > +			       struct igt_buf *dst, const uint32_t kernel[][4],
> > > +			       size_t size)
> > >   {
> > >   	struct gen8_interface_descriptor_data *idd;
> > >   	uint32_t offset;
> > > @@ -464,15 +473,17 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
> > >   	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
> > >   	/* dynamic */
> > > -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
> > > -		0, BASE_ADDRESS_MODIFY);
> > > +	OUT_RELOC(batch->bo,
> > > +		  I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
> > > +		  0, BASE_ADDRESS_MODIFY);
> > >   	/* indirect */
> > >   	OUT_BATCH(0);
> > >   	OUT_BATCH(0);
> > >   	/* instruction */
> > > -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
> > > +	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
> > > +		  BASE_ADDRESS_MODIFY);
> > >   	/* general state buffer size */
> > >   	OUT_BATCH(0xfffff000 | 1);
> > > @@ -480,7 +491,9 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
> > >   	OUT_BATCH(1 << 12 | 1);
> > >   	/* indirect object buffer size */
> > >   	OUT_BATCH(0xfffff000 | 1);
> > > -	/* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
> > > +	/* instruction buffer size, must set modify enable bit, otherwise it may
> > > +	 * result in GPU hang
> > > +	 */
> > >   	OUT_BATCH(1 << 12 | 1);
> > >   }
> > > @@ -565,8 +578,8 @@ gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch)
> > >   void
> > >   gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
> > > -		     unsigned x, unsigned y,
> > > -		     unsigned width, unsigned height)
> > > +		     unsigned int x, unsigned int y,
> > > +		     unsigned int width, unsigned int height)
> > >   {
> > >   	uint32_t x_dim, y_dim, tmp, right_mask;
> > > @@ -662,15 +675,17 @@ gen9_emit_state_base_address(struct intel_batchbuffer *batch)
> > >   	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
> > >   	/* dynamic */
> > > -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
> > > -		0, BASE_ADDRESS_MODIFY);
> > > +	OUT_RELOC(batch->bo,
> > > +		  I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
> > > +		  0, BASE_ADDRESS_MODIFY);
> > >   	/* indirect */
> > >   	OUT_BATCH(0);
> > >   	OUT_BATCH(0);
> > >   	/* instruction */
> > > -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
> > > +	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
> > > +		  BASE_ADDRESS_MODIFY);
> > >   	/* general state buffer size */
> > >   	OUT_BATCH(0xfffff000 | 1);
> > > @@ -678,7 +693,9 @@ gen9_emit_state_base_address(struct intel_batchbuffer *batch)
> > >   	OUT_BATCH(1 << 12 | 1);
> > >   	/* indirect object buffer size */
> > >   	OUT_BATCH(0xfffff000 | 1);
> > > -	/* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
> > > +	/* intruction buffer size, must set modify enable bit, otherwise it may
> > > +	 * result in GPU hang
> > > +	 */
> > >   	OUT_BATCH(1 << 12 | 1);
> > >   	/* Bindless surface state base address */
> > > diff --git a/lib/gpu_fill.h b/lib/gpu_fill.h
> > > index baa04807..1e4be4bb 100644
> > > --- a/lib/gpu_fill.h
> > > +++ b/lib/gpu_fill.h
> > > @@ -60,8 +60,9 @@ gen7_fill_kernel(struct intel_batchbuffer *batch,
> > >   		size_t size);
> > >   uint32_t
> > > -gen7_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,
> > > -			       const uint32_t kernel[][4], size_t size);
> > > +gen7_fill_interface_descriptor(struct intel_batchbuffer *batch,
> > > +			       struct igt_buf *dst, const uint32_t kernel[][4],
> > > +			       size_t size);
> > >   void
> > >   gen7_emit_state_base_address(struct intel_batchbuffer *batch);
> > > @@ -76,17 +77,18 @@ void
> > >   gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer);
> > >   void
> > > -gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor);
> > > +gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch,
> > > +				    uint32_t interface_descriptor);
> > >   void
> > >   gen7_emit_media_objects(struct intel_batchbuffer *batch,
> > > -			unsigned x, unsigned y,
> > > -			unsigned width, unsigned height);
> > > +			unsigned int x, unsigned int y,
> > > +			unsigned int width, unsigned int height);
> > >   void
> > >   gen7_emit_gpgpu_walk(struct intel_batchbuffer *batch,
> > > -		     unsigned x, unsigned y,
> > > -		     unsigned width, unsigned height);
> > > +		     unsigned int x, unsigned int y,
> > > +		     unsigned int width, unsigned int height);
> > >   uint32_t
> > >   gen8_spin_curbe_buffer_data(struct intel_batchbuffer *batch,
> > > @@ -99,7 +101,9 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch,
> > >   			int is_dst);
> > >   uint32_t
> > > -gen8_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,  const uint32_t kernel[][4], size_t size);
> > > +gen8_fill_interface_descriptor(struct intel_batchbuffer *batch,
> > > +			       struct igt_buf *dst, const uint32_t kernel[][4],
> > > +			       size_t size);
> > >   void
> > >   gen8_emit_state_base_address(struct intel_batchbuffer *batch);
> > > @@ -118,8 +122,8 @@ gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch);
> > >   void
> > >   gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
> > > -		     unsigned x, unsigned y,
> > > -		     unsigned width, unsigned height);
> > > +		     unsigned int x, unsigned int y,
> > > +		     unsigned int width, unsigned int height);
> > >   void
> > >   gen8_emit_media_objects_spin(struct intel_batchbuffer *batch);
> > > diff --git a/lib/media_spin.c b/lib/media_spin.c
> > > index b4414bee..b323550a 100644
> > > --- a/lib/media_spin.c
> > > +++ b/lib/media_spin.c
> > > @@ -81,7 +81,8 @@ gen8_media_spinfunc(struct intel_batchbuffer *batch,
> > >   	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
> > >   	curbe_buffer = gen8_spin_curbe_buffer_data(batch, spins);
> > > -	interface_descriptor = gen8_fill_interface_descriptor(batch, dst, spin_kernel, sizeof(spin_kernel));
> > > +	interface_descriptor = gen8_fill_interface_descriptor(batch, dst,
> > > +					      spin_kernel, sizeof(spin_kernel));
> > >   	igt_assert(batch->ptr < &batch->buffer[4095]);
> > >   	/* media pipeline */
> > > @@ -119,7 +120,8 @@ gen9_media_spinfunc(struct intel_batchbuffer *batch,
> > >   	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
> > >   	curbe_buffer = gen8_spin_curbe_buffer_data(batch, spins);
> > > -	interface_descriptor = gen8_fill_interface_descriptor(batch, dst, spin_kernel, sizeof(spin_kernel));
> > > +	interface_descriptor = gen8_fill_interface_descriptor(batch, dst,
> > > +					      spin_kernel, sizeof(spin_kernel));
> > >   	igt_assert(batch->ptr < &batch->buffer[4095]);
> > >   	/* media pipeline */
> > > -- 
> > > 2.14.3
> > > 
> > > _______________________________________________
> > > igt-dev mailing list
> > > igt-dev@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/igt-dev
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[igt-dev] [PATCH i-g-t v5 3/5] lib: Adjust media_spin and gpu_fill to our code style

[Katarzyna Dec]

Let's adjust code to our coding style during refactoring
media_spin code.
Few more changes in gpgpu_fill lib was made as well:
intend align and /s/unsigned/unsigned int.

v2: fixed minor typos
v3: few more style changes
v4: few indentation changes

Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Ewelina Musial <ewelina.musial@intel.com>
---
 lib/gpgpu_fill.c | 15 +++++------
 lib/gpu_fill.c   | 77 ++++++++++++++++++++++++++++++++++----------------------
 lib/gpu_fill.h   | 24 ++++++++++--------
 lib/media_spin.c | 26 ++++++++++---------
 4 files changed, 81 insertions(+), 61 deletions(-)

diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
index 010dde06..52925a5c 100644
--- a/lib/gpgpu_fill.c
+++ b/lib/gpgpu_fill.c
@@ -112,9 +112,8 @@ gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
 	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
 
 	/*
-	 * const buffer needs to fill for every thread, but as we have just 1 thread
-	 * per every group, so need only one curbe data.
-	 *
+	 * const buffer needs to fill for every thread, but as we have just 1
+	 * thread per every group, so need only one curbe data.
 	 * For each thread, just use thread group ID for buffer offset.
 	 */
 	curbe_buffer = gen7_fill_curbe_buffer_data(batch, color);
@@ -160,9 +159,8 @@ gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch,
 	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
 
 	/*
-	 * const buffer needs to fill for every thread, but as we have just 1 thread
-	 * per every group, so need only one curbe data.
-	 *
+	 * const buffer needs to fill for every thread, but as we have just 1
+	 * thread per every group, so need only one curbe data.
 	 * For each thread, just use thread group ID for buffer offset.
 	 */
 	curbe_buffer = gen7_fill_curbe_buffer_data(batch, color);
@@ -208,9 +206,8 @@ gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch,
 	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
 
 	/*
-	 * const buffer needs to fill for every thread, but as we have just 1 thread
-	 * per every group, so need only one curbe data.
-	 *
+	 * const buffer needs to fill for every thread, but as we have just 1
+	 * thread per every group, so need only one curbe data.
 	 * For each thread, just use thread group ID for buffer offset.
 	 */
 	curbe_buffer = gen7_fill_curbe_buffer_data(batch, color);
diff --git a/lib/gpu_fill.c b/lib/gpu_fill.c
index 8dab39df..24e03cf2 100644
--- a/lib/gpu_fill.c
+++ b/lib/gpu_fill.c
@@ -32,13 +32,13 @@ gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end)
 	ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer);
 	if (ret == 0)
 		ret = drm_intel_bo_mrb_exec(batch->bo, batch_end,
-					NULL, 0, 0, 0);
+					    NULL, 0, 0, 0);
 	igt_assert(ret == 0);
 }
 
 uint32_t
 gen7_fill_curbe_buffer_data(struct intel_batchbuffer *batch,
-			uint8_t color)
+			    uint8_t color)
 {
 	uint8_t *curbe_buffer;
 	uint32_t offset;
@@ -132,8 +132,9 @@ gen7_fill_kernel(struct intel_batchbuffer *batch,
 }
 
 uint32_t
-gen7_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,
-			       const uint32_t kernel[][4], size_t size)
+gen7_fill_interface_descriptor(struct intel_batchbuffer *batch,
+			       struct igt_buf *dst, const uint32_t kernel[][4],
+			       size_t size)
 {
 	struct gen7_interface_descriptor_data *idd;
 	uint32_t offset;
@@ -171,16 +172,19 @@ gen7_emit_state_base_address(struct intel_batchbuffer *batch)
 	OUT_BATCH(0);
 
 	/* surface */
-	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
+	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
+		  BASE_ADDRESS_MODIFY);
 
 	/* dynamic */
-	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
+	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
+		  BASE_ADDRESS_MODIFY);
 
 	/* indirect */
 	OUT_BATCH(0);
 
 	/* instruction */
-	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
+	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
+		  BASE_ADDRESS_MODIFY);
 
 	/* general/dynamic/indirect/instruction access Bound */
 	OUT_BATCH(0);
@@ -204,8 +208,8 @@ gen7_emit_vfe_state(struct intel_batchbuffer *batch)
 	OUT_BATCH(0);
 
 	/* urb entry size & curbe size */
-	OUT_BATCH(2 << 16 | 	/* in 256 bits unit */
-		2);		/* in 256 bits unit */
+	OUT_BATCH(2 << 16 |	/* in 256 bits unit */
+		  2);		/* in 256 bits unit */
 
 	/* scoreboard */
 	OUT_BATCH(0);
@@ -229,7 +233,7 @@ gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
 	OUT_BATCH(0);
 
 	/* urb entry size & curbe size */
-	OUT_BATCH(0 << 16 | 	/* URB entry size in 256 bits unit */
+	OUT_BATCH(0 << 16 |	/* URB entry size in 256 bits unit */
 		  1);		/* CURBE entry size in 256 bits unit */
 
 	/* scoreboard */
@@ -250,7 +254,8 @@ gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer)
 }
 
 void
-gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor)
+gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch,
+				    uint32_t interface_descriptor)
 {
 	OUT_BATCH(GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2));
 	OUT_BATCH(0);
@@ -259,14 +264,16 @@ gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t in
 		OUT_BATCH(sizeof(struct gen7_interface_descriptor_data));
 	else
 		OUT_BATCH(sizeof(struct gen8_interface_descriptor_data));
-	/* interface descriptor address, is relative to the dynamics base address */
+	/* interface descriptor address, is relative to the dynamics base
+	 * address
+	 */
 	OUT_BATCH(interface_descriptor);
 }
 
 void
 gen7_emit_media_objects(struct intel_batchbuffer *batch,
-			unsigned x, unsigned y,
-			unsigned width, unsigned height)
+			unsigned int x, unsigned int y,
+			unsigned int width, unsigned int height)
 {
 	int i, j;
 
@@ -288,7 +295,8 @@ gen7_emit_media_objects(struct intel_batchbuffer *batch,
 			/* inline data (xoffset, yoffset) */
 			OUT_BATCH(x + i * 16);
 			OUT_BATCH(y + j * 16);
-			if (AT_LEAST_GEN(batch->devid, 8) && !IS_CHERRYVIEW(batch->devid))
+			if (AT_LEAST_GEN(batch->devid, 8) &&
+			    !IS_CHERRYVIEW(batch->devid))
 				gen8_emit_media_state_flush(batch);
 		}
 	}
@@ -296,8 +304,8 @@ gen7_emit_media_objects(struct intel_batchbuffer *batch,
 
 void
 gen7_emit_gpgpu_walk(struct intel_batchbuffer *batch,
-		     unsigned x, unsigned y,
-		     unsigned width, unsigned height)
+		     unsigned int x, unsigned int y,
+		     unsigned int width, unsigned int height)
 {
 	uint32_t x_dim, y_dim, tmp, right_mask;
 
@@ -400,8 +408,7 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch,
 
 	ret = drm_intel_bo_emit_reloc(batch->bo,
 				intel_batchbuffer_subdata_offset(batch, ss) + 8 * 4,
-				buf->bo, 0,
-				read_domain, write_domain);
+				buf->bo, 0, read_domain, write_domain);
 	igt_assert(ret == 0);
 
 	ss->ss2.height = igt_buf_height(buf) - 1;
@@ -417,7 +424,9 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch,
 }
 
 uint32_t
-gen8_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,  const uint32_t kernel[][4], size_t size)
+gen8_fill_interface_descriptor(struct intel_batchbuffer *batch,
+			       struct igt_buf *dst, const uint32_t kernel[][4],
+			       size_t size)
 {
 	struct gen8_interface_descriptor_data *idd;
 	uint32_t offset;
@@ -464,15 +473,17 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
 	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
 
 	/* dynamic */
-	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
-		0, BASE_ADDRESS_MODIFY);
+	OUT_RELOC(batch->bo,
+		  I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
+		  0, BASE_ADDRESS_MODIFY);
 
 	/* indirect */
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 
 	/* instruction */
-	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
+	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
+		  BASE_ADDRESS_MODIFY);
 
 	/* general state buffer size */
 	OUT_BATCH(0xfffff000 | 1);
@@ -480,7 +491,9 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
 	OUT_BATCH(1 << 12 | 1);
 	/* indirect object buffer size */
 	OUT_BATCH(0xfffff000 | 1);
-	/* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
+	/* instruction buffer size, must set modify enable bit, otherwise it may
+	 * result in GPU hang
+	 */
 	OUT_BATCH(1 << 12 | 1);
 }
 
@@ -565,8 +578,8 @@ gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch)
 
 void
 gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
-		     unsigned x, unsigned y,
-		     unsigned width, unsigned height)
+		     unsigned int x, unsigned int y,
+		     unsigned int width, unsigned int height)
 {
 	uint32_t x_dim, y_dim, tmp, right_mask;
 
@@ -662,15 +675,17 @@ gen9_emit_state_base_address(struct intel_batchbuffer *batch)
 	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
 
 	/* dynamic */
-	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
-		0, BASE_ADDRESS_MODIFY);
+	OUT_RELOC(batch->bo,
+		  I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
+		  0, BASE_ADDRESS_MODIFY);
 
 	/* indirect */
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 
 	/* instruction */
-	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
+	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
+		  BASE_ADDRESS_MODIFY);
 
 	/* general state buffer size */
 	OUT_BATCH(0xfffff000 | 1);
@@ -678,7 +693,9 @@ gen9_emit_state_base_address(struct intel_batchbuffer *batch)
 	OUT_BATCH(1 << 12 | 1);
 	/* indirect object buffer size */
 	OUT_BATCH(0xfffff000 | 1);
-	/* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
+	/* intruction buffer size, must set modify enable bit, otherwise it may
+	 * result in GPU hang
+	 */
 	OUT_BATCH(1 << 12 | 1);
 
 	/* Bindless surface state base address */
diff --git a/lib/gpu_fill.h b/lib/gpu_fill.h
index baa04807..1e4be4bb 100644
--- a/lib/gpu_fill.h
+++ b/lib/gpu_fill.h
@@ -60,8 +60,9 @@ gen7_fill_kernel(struct intel_batchbuffer *batch,
 		size_t size);
 
 uint32_t
-gen7_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,
-			       const uint32_t kernel[][4], size_t size);
+gen7_fill_interface_descriptor(struct intel_batchbuffer *batch,
+			       struct igt_buf *dst, const uint32_t kernel[][4],
+			       size_t size);
 
 void
 gen7_emit_state_base_address(struct intel_batchbuffer *batch);
@@ -76,17 +77,18 @@ void
 gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer);
 
 void
-gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor);
+gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch,
+				    uint32_t interface_descriptor);
 
 void
 gen7_emit_media_objects(struct intel_batchbuffer *batch,
-			unsigned x, unsigned y,
-			unsigned width, unsigned height);
+			unsigned int x, unsigned int y,
+			unsigned int width, unsigned int height);
 
 void
 gen7_emit_gpgpu_walk(struct intel_batchbuffer *batch,
-		     unsigned x, unsigned y,
-		     unsigned width, unsigned height);
+		     unsigned int x, unsigned int y,
+		     unsigned int width, unsigned int height);
 
 uint32_t
 gen8_spin_curbe_buffer_data(struct intel_batchbuffer *batch,
@@ -99,7 +101,9 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch,
 			int is_dst);
 
 uint32_t
-gen8_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,  const uint32_t kernel[][4], size_t size);
+gen8_fill_interface_descriptor(struct intel_batchbuffer *batch,
+			       struct igt_buf *dst, const uint32_t kernel[][4],
+			       size_t size);
 
 void
 gen8_emit_state_base_address(struct intel_batchbuffer *batch);
@@ -118,8 +122,8 @@ gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch);
 
 void
 gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
-		     unsigned x, unsigned y,
-		     unsigned width, unsigned height);
+		     unsigned int x, unsigned int y,
+		     unsigned int width, unsigned int height);
 
 void
 gen8_emit_media_objects_spin(struct intel_batchbuffer *batch);
diff --git a/lib/media_spin.c b/lib/media_spin.c
index b4414bee..3592e0d9 100644
--- a/lib/media_spin.c
+++ b/lib/media_spin.c
@@ -81,7 +81,8 @@ gen8_media_spinfunc(struct intel_batchbuffer *batch,
 	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
 
 	curbe_buffer = gen8_spin_curbe_buffer_data(batch, spins);
-	interface_descriptor = gen8_fill_interface_descriptor(batch, dst, spin_kernel, sizeof(spin_kernel));
+	interface_descriptor = gen8_fill_interface_descriptor(batch, dst,
+					      spin_kernel, sizeof(spin_kernel));
 	igt_assert(batch->ptr < &batch->buffer[4095]);
 
 	/* media pipeline */
@@ -119,17 +120,18 @@ gen9_media_spinfunc(struct intel_batchbuffer *batch,
 	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
 
 	curbe_buffer = gen8_spin_curbe_buffer_data(batch, spins);
-	interface_descriptor = gen8_fill_interface_descriptor(batch, dst, spin_kernel, sizeof(spin_kernel));
+	interface_descriptor = gen8_fill_interface_descriptor(batch, dst,
+					      spin_kernel, sizeof(spin_kernel));
 	igt_assert(batch->ptr < &batch->buffer[4095]);
 
 	/* media pipeline */
 	batch->ptr = batch->buffer;
 	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA |
-			GEN9_FORCE_MEDIA_AWAKE_ENABLE |
-			GEN9_SAMPLER_DOP_GATE_DISABLE |
-			GEN9_PIPELINE_SELECTION_MASK |
-			GEN9_SAMPLER_DOP_GATE_MASK |
-			GEN9_FORCE_MEDIA_AWAKE_MASK);
+		  GEN9_FORCE_MEDIA_AWAKE_ENABLE |
+		  GEN9_SAMPLER_DOP_GATE_DISABLE |
+		  GEN9_PIPELINE_SELECTION_MASK |
+		  GEN9_SAMPLER_DOP_GATE_MASK |
+		  GEN9_FORCE_MEDIA_AWAKE_MASK);
 	gen9_emit_state_base_address(batch);
 
 	gen8_emit_vfe_state_spin(batch);
@@ -141,11 +143,11 @@ gen9_media_spinfunc(struct intel_batchbuffer *batch,
 	gen8_emit_media_objects_spin(batch);
 
 	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA |
-			GEN9_FORCE_MEDIA_AWAKE_DISABLE |
-			GEN9_SAMPLER_DOP_GATE_ENABLE |
-			GEN9_PIPELINE_SELECTION_MASK |
-			GEN9_SAMPLER_DOP_GATE_MASK |
-			GEN9_FORCE_MEDIA_AWAKE_MASK);
+		  GEN9_FORCE_MEDIA_AWAKE_DISABLE |
+		  GEN9_SAMPLER_DOP_GATE_ENABLE |
+		  GEN9_PIPELINE_SELECTION_MASK |
+		  GEN9_SAMPLER_DOP_GATE_MASK |
+		  GEN9_FORCE_MEDIA_AWAKE_MASK);
 
 	OUT_BATCH(MI_BATCH_BUFFER_END);
 
-- 
2.14.3

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Re: [igt-dev] [PATCH i-g-t v5 3/5] lib: Adjust media_spin and gpu_fill to our code style

[Ewelina Musial]

On Fri, May 11, 2018 at 08:47:07AM +0200, Katarzyna Dec wrote:
> Let's adjust code to our coding style during refactoring
> media_spin code.
> Few more changes in gpgpu_fill lib was made as well:
> intend align and /s/unsigned/unsigned int.
> 
> v2: fixed minor typos
> v3: few more style changes
> v4: few indentation changes
> 
> Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>

Reviewed-by: Ewelina Musial <ewelina.musial@intel.com>

> Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> Cc: Ewelina Musial <ewelina.musial@intel.com>
> ---
>  lib/gpgpu_fill.c | 15 +++++------
>  lib/gpu_fill.c   | 77 ++++++++++++++++++++++++++++++++++----------------------
>  lib/gpu_fill.h   | 24 ++++++++++--------
>  lib/media_spin.c | 26 ++++++++++---------
>  4 files changed, 81 insertions(+), 61 deletions(-)
> 
> diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
> index 010dde06..52925a5c 100644
> --- a/lib/gpgpu_fill.c
> +++ b/lib/gpgpu_fill.c
> @@ -112,9 +112,8 @@ gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>  	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
>  
>  	/*
> -	 * const buffer needs to fill for every thread, but as we have just 1 thread
> -	 * per every group, so need only one curbe data.
> -	 *
> +	 * const buffer needs to fill for every thread, but as we have just 1
> +	 * thread per every group, so need only one curbe data.
>  	 * For each thread, just use thread group ID for buffer offset.
>  	 */
>  	curbe_buffer = gen7_fill_curbe_buffer_data(batch, color);
> @@ -160,9 +159,8 @@ gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>  	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
>  
>  	/*
> -	 * const buffer needs to fill for every thread, but as we have just 1 thread
> -	 * per every group, so need only one curbe data.
> -	 *
> +	 * const buffer needs to fill for every thread, but as we have just 1
> +	 * thread per every group, so need only one curbe data.
>  	 * For each thread, just use thread group ID for buffer offset.
>  	 */
>  	curbe_buffer = gen7_fill_curbe_buffer_data(batch, color);
> @@ -208,9 +206,8 @@ gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>  	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
>  
>  	/*
> -	 * const buffer needs to fill for every thread, but as we have just 1 thread
> -	 * per every group, so need only one curbe data.
> -	 *
> +	 * const buffer needs to fill for every thread, but as we have just 1
> +	 * thread per every group, so need only one curbe data.
>  	 * For each thread, just use thread group ID for buffer offset.
>  	 */
>  	curbe_buffer = gen7_fill_curbe_buffer_data(batch, color);
> diff --git a/lib/gpu_fill.c b/lib/gpu_fill.c
> index 8dab39df..24e03cf2 100644
> --- a/lib/gpu_fill.c
> +++ b/lib/gpu_fill.c
> @@ -32,13 +32,13 @@ gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end)
>  	ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer);
>  	if (ret == 0)
>  		ret = drm_intel_bo_mrb_exec(batch->bo, batch_end,
> -					NULL, 0, 0, 0);
> +					    NULL, 0, 0, 0);
>  	igt_assert(ret == 0);
>  }
>  
>  uint32_t
>  gen7_fill_curbe_buffer_data(struct intel_batchbuffer *batch,
> -			uint8_t color)
> +			    uint8_t color)
>  {
>  	uint8_t *curbe_buffer;
>  	uint32_t offset;
> @@ -132,8 +132,9 @@ gen7_fill_kernel(struct intel_batchbuffer *batch,
>  }
>  
>  uint32_t
> -gen7_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,
> -			       const uint32_t kernel[][4], size_t size)
> +gen7_fill_interface_descriptor(struct intel_batchbuffer *batch,
> +			       struct igt_buf *dst, const uint32_t kernel[][4],
> +			       size_t size)
>  {
>  	struct gen7_interface_descriptor_data *idd;
>  	uint32_t offset;
> @@ -171,16 +172,19 @@ gen7_emit_state_base_address(struct intel_batchbuffer *batch)
>  	OUT_BATCH(0);
>  
>  	/* surface */
> -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
> +	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
> +		  BASE_ADDRESS_MODIFY);
>  
>  	/* dynamic */
> -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
> +	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
> +		  BASE_ADDRESS_MODIFY);
>  
>  	/* indirect */
>  	OUT_BATCH(0);
>  
>  	/* instruction */
> -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
> +	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
> +		  BASE_ADDRESS_MODIFY);
>  
>  	/* general/dynamic/indirect/instruction access Bound */
>  	OUT_BATCH(0);
> @@ -204,8 +208,8 @@ gen7_emit_vfe_state(struct intel_batchbuffer *batch)
>  	OUT_BATCH(0);
>  
>  	/* urb entry size & curbe size */
> -	OUT_BATCH(2 << 16 | 	/* in 256 bits unit */
> -		2);		/* in 256 bits unit */
> +	OUT_BATCH(2 << 16 |	/* in 256 bits unit */
> +		  2);		/* in 256 bits unit */
>  
>  	/* scoreboard */
>  	OUT_BATCH(0);
> @@ -229,7 +233,7 @@ gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
>  	OUT_BATCH(0);
>  
>  	/* urb entry size & curbe size */
> -	OUT_BATCH(0 << 16 | 	/* URB entry size in 256 bits unit */
> +	OUT_BATCH(0 << 16 |	/* URB entry size in 256 bits unit */
>  		  1);		/* CURBE entry size in 256 bits unit */
>  
>  	/* scoreboard */
> @@ -250,7 +254,8 @@ gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer)
>  }
>  
>  void
> -gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor)
> +gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch,
> +				    uint32_t interface_descriptor)
>  {
>  	OUT_BATCH(GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2));
>  	OUT_BATCH(0);
> @@ -259,14 +264,16 @@ gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t in
>  		OUT_BATCH(sizeof(struct gen7_interface_descriptor_data));
>  	else
>  		OUT_BATCH(sizeof(struct gen8_interface_descriptor_data));
> -	/* interface descriptor address, is relative to the dynamics base address */
> +	/* interface descriptor address, is relative to the dynamics base
> +	 * address
> +	 */
>  	OUT_BATCH(interface_descriptor);
>  }
>  
>  void
>  gen7_emit_media_objects(struct intel_batchbuffer *batch,
> -			unsigned x, unsigned y,
> -			unsigned width, unsigned height)
> +			unsigned int x, unsigned int y,
> +			unsigned int width, unsigned int height)
>  {
>  	int i, j;
>  
> @@ -288,7 +295,8 @@ gen7_emit_media_objects(struct intel_batchbuffer *batch,
>  			/* inline data (xoffset, yoffset) */
>  			OUT_BATCH(x + i * 16);
>  			OUT_BATCH(y + j * 16);
> -			if (AT_LEAST_GEN(batch->devid, 8) && !IS_CHERRYVIEW(batch->devid))
> +			if (AT_LEAST_GEN(batch->devid, 8) &&
> +			    !IS_CHERRYVIEW(batch->devid))
>  				gen8_emit_media_state_flush(batch);
>  		}
>  	}
> @@ -296,8 +304,8 @@ gen7_emit_media_objects(struct intel_batchbuffer *batch,
>  
>  void
>  gen7_emit_gpgpu_walk(struct intel_batchbuffer *batch,
> -		     unsigned x, unsigned y,
> -		     unsigned width, unsigned height)
> +		     unsigned int x, unsigned int y,
> +		     unsigned int width, unsigned int height)
>  {
>  	uint32_t x_dim, y_dim, tmp, right_mask;
>  
> @@ -400,8 +408,7 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch,
>  
>  	ret = drm_intel_bo_emit_reloc(batch->bo,
>  				intel_batchbuffer_subdata_offset(batch, ss) + 8 * 4,
> -				buf->bo, 0,
> -				read_domain, write_domain);
> +				buf->bo, 0, read_domain, write_domain);
>  	igt_assert(ret == 0);
>  
>  	ss->ss2.height = igt_buf_height(buf) - 1;
> @@ -417,7 +424,9 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch,
>  }
>  
>  uint32_t
> -gen8_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,  const uint32_t kernel[][4], size_t size)
> +gen8_fill_interface_descriptor(struct intel_batchbuffer *batch,
> +			       struct igt_buf *dst, const uint32_t kernel[][4],
> +			       size_t size)
>  {
>  	struct gen8_interface_descriptor_data *idd;
>  	uint32_t offset;
> @@ -464,15 +473,17 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
>  	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
>  
>  	/* dynamic */
> -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
> -		0, BASE_ADDRESS_MODIFY);
> +	OUT_RELOC(batch->bo,
> +		  I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
> +		  0, BASE_ADDRESS_MODIFY);
>  
>  	/* indirect */
>  	OUT_BATCH(0);
>  	OUT_BATCH(0);
>  
>  	/* instruction */
> -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
> +	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
> +		  BASE_ADDRESS_MODIFY);
>  
>  	/* general state buffer size */
>  	OUT_BATCH(0xfffff000 | 1);
> @@ -480,7 +491,9 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
>  	OUT_BATCH(1 << 12 | 1);
>  	/* indirect object buffer size */
>  	OUT_BATCH(0xfffff000 | 1);
> -	/* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
> +	/* instruction buffer size, must set modify enable bit, otherwise it may
> +	 * result in GPU hang
> +	 */
>  	OUT_BATCH(1 << 12 | 1);
>  }
>  
> @@ -565,8 +578,8 @@ gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch)
>  
>  void
>  gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
> -		     unsigned x, unsigned y,
> -		     unsigned width, unsigned height)
> +		     unsigned int x, unsigned int y,
> +		     unsigned int width, unsigned int height)
>  {
>  	uint32_t x_dim, y_dim, tmp, right_mask;
>  
> @@ -662,15 +675,17 @@ gen9_emit_state_base_address(struct intel_batchbuffer *batch)
>  	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
>  
>  	/* dynamic */
> -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
> -		0, BASE_ADDRESS_MODIFY);
> +	OUT_RELOC(batch->bo,
> +		  I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
> +		  0, BASE_ADDRESS_MODIFY);
>  
>  	/* indirect */
>  	OUT_BATCH(0);
>  	OUT_BATCH(0);
>  
>  	/* instruction */
> -	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
> +	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
> +		  BASE_ADDRESS_MODIFY);
>  
>  	/* general state buffer size */
>  	OUT_BATCH(0xfffff000 | 1);
> @@ -678,7 +693,9 @@ gen9_emit_state_base_address(struct intel_batchbuffer *batch)
>  	OUT_BATCH(1 << 12 | 1);
>  	/* indirect object buffer size */
>  	OUT_BATCH(0xfffff000 | 1);
> -	/* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
> +	/* intruction buffer size, must set modify enable bit, otherwise it may
> +	 * result in GPU hang
> +	 */
>  	OUT_BATCH(1 << 12 | 1);
>  
>  	/* Bindless surface state base address */
> diff --git a/lib/gpu_fill.h b/lib/gpu_fill.h
> index baa04807..1e4be4bb 100644
> --- a/lib/gpu_fill.h
> +++ b/lib/gpu_fill.h
> @@ -60,8 +60,9 @@ gen7_fill_kernel(struct intel_batchbuffer *batch,
>  		size_t size);
>  
>  uint32_t
> -gen7_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,
> -			       const uint32_t kernel[][4], size_t size);
> +gen7_fill_interface_descriptor(struct intel_batchbuffer *batch,
> +			       struct igt_buf *dst, const uint32_t kernel[][4],
> +			       size_t size);
>  
>  void
>  gen7_emit_state_base_address(struct intel_batchbuffer *batch);
> @@ -76,17 +77,18 @@ void
>  gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer);
>  
>  void
> -gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor);
> +gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch,
> +				    uint32_t interface_descriptor);
>  
>  void
>  gen7_emit_media_objects(struct intel_batchbuffer *batch,
> -			unsigned x, unsigned y,
> -			unsigned width, unsigned height);
> +			unsigned int x, unsigned int y,
> +			unsigned int width, unsigned int height);
>  
>  void
>  gen7_emit_gpgpu_walk(struct intel_batchbuffer *batch,
> -		     unsigned x, unsigned y,
> -		     unsigned width, unsigned height);
> +		     unsigned int x, unsigned int y,
> +		     unsigned int width, unsigned int height);
>  
>  uint32_t
>  gen8_spin_curbe_buffer_data(struct intel_batchbuffer *batch,
> @@ -99,7 +101,9 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch,
>  			int is_dst);
>  
>  uint32_t
> -gen8_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst,  const uint32_t kernel[][4], size_t size);
> +gen8_fill_interface_descriptor(struct intel_batchbuffer *batch,
> +			       struct igt_buf *dst, const uint32_t kernel[][4],
> +			       size_t size);
>  
>  void
>  gen8_emit_state_base_address(struct intel_batchbuffer *batch);
> @@ -118,8 +122,8 @@ gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch);
>  
>  void
>  gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
> -		     unsigned x, unsigned y,
> -		     unsigned width, unsigned height);
> +		     unsigned int x, unsigned int y,
> +		     unsigned int width, unsigned int height);
>  
>  void
>  gen8_emit_media_objects_spin(struct intel_batchbuffer *batch);
> diff --git a/lib/media_spin.c b/lib/media_spin.c
> index b4414bee..3592e0d9 100644
> --- a/lib/media_spin.c
> +++ b/lib/media_spin.c
> @@ -81,7 +81,8 @@ gen8_media_spinfunc(struct intel_batchbuffer *batch,
>  	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
>  
>  	curbe_buffer = gen8_spin_curbe_buffer_data(batch, spins);
> -	interface_descriptor = gen8_fill_interface_descriptor(batch, dst, spin_kernel, sizeof(spin_kernel));
> +	interface_descriptor = gen8_fill_interface_descriptor(batch, dst,
> +					      spin_kernel, sizeof(spin_kernel));
>  	igt_assert(batch->ptr < &batch->buffer[4095]);
>  
>  	/* media pipeline */
> @@ -119,17 +120,18 @@ gen9_media_spinfunc(struct intel_batchbuffer *batch,
>  	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
>  
>  	curbe_buffer = gen8_spin_curbe_buffer_data(batch, spins);
> -	interface_descriptor = gen8_fill_interface_descriptor(batch, dst, spin_kernel, sizeof(spin_kernel));
> +	interface_descriptor = gen8_fill_interface_descriptor(batch, dst,
> +					      spin_kernel, sizeof(spin_kernel));
>  	igt_assert(batch->ptr < &batch->buffer[4095]);
>  
>  	/* media pipeline */
>  	batch->ptr = batch->buffer;
>  	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA |
> -			GEN9_FORCE_MEDIA_AWAKE_ENABLE |
> -			GEN9_SAMPLER_DOP_GATE_DISABLE |
> -			GEN9_PIPELINE_SELECTION_MASK |
> -			GEN9_SAMPLER_DOP_GATE_MASK |
> -			GEN9_FORCE_MEDIA_AWAKE_MASK);
> +		  GEN9_FORCE_MEDIA_AWAKE_ENABLE |
> +		  GEN9_SAMPLER_DOP_GATE_DISABLE |
> +		  GEN9_PIPELINE_SELECTION_MASK |
> +		  GEN9_SAMPLER_DOP_GATE_MASK |
> +		  GEN9_FORCE_MEDIA_AWAKE_MASK);
>  	gen9_emit_state_base_address(batch);
>  
>  	gen8_emit_vfe_state_spin(batch);
> @@ -141,11 +143,11 @@ gen9_media_spinfunc(struct intel_batchbuffer *batch,
>  	gen8_emit_media_objects_spin(batch);
>  
>  	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA |
> -			GEN9_FORCE_MEDIA_AWAKE_DISABLE |
> -			GEN9_SAMPLER_DOP_GATE_ENABLE |
> -			GEN9_PIPELINE_SELECTION_MASK |
> -			GEN9_SAMPLER_DOP_GATE_MASK |
> -			GEN9_FORCE_MEDIA_AWAKE_MASK);
> +		  GEN9_FORCE_MEDIA_AWAKE_DISABLE |
> +		  GEN9_SAMPLER_DOP_GATE_ENABLE |
> +		  GEN9_PIPELINE_SELECTION_MASK |
> +		  GEN9_SAMPLER_DOP_GATE_MASK |
> +		  GEN9_FORCE_MEDIA_AWAKE_MASK);
>  
>  	OUT_BATCH(MI_BATCH_BUFFER_END);
>  
> -- 
> 2.14.3
> 
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[igt-dev] [PATCH i-g-t v3 4/5] lib/gpu_fill: Further code unification in gpu_fill

[Katarzyna Dec]

We can unify gen7_emit_vfe_state and gen8_emit_vfe_state
functions for gpgpu/media_fill and media_spin by adding
parameters. gen8_emit_media_object was renamed to gen_*
and extended with additional offset parameters - we can
have one gen7_emit_media_objects for all tests.
I have renamed gen8_emit_media_object to gen_emit_*, because
function belongs to all gens and it would be odd to have
all named genX_* and only one without this prefix.

v2: Use #defines instead of variables as emit_vfe_state parameters.
Fixed gen7_emit_media_objects. Unified vfe state parameters
in media_spin library for gen8 and gen9 (gen9 had different values
by mistake).

Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 lib/gpgpu_fill.c      |  10 ++--
 lib/gpu_fill.c        | 126 +++++++++-----------------------------------------
 lib/gpu_fill.h        |  33 ++++++++-----
 lib/media_fill_gen7.c |   3 +-
 lib/media_fill_gen8.c |   3 +-
 lib/media_fill_gen9.c |   3 +-
 lib/media_spin.c      |  16 +++++--
 7 files changed, 67 insertions(+), 127 deletions(-)

diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
index 52925a5c..0d26d5c6 100644
--- a/lib/gpgpu_fill.c
+++ b/lib/gpgpu_fill.c
@@ -129,7 +129,9 @@ gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
 	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU);
 
 	gen7_emit_state_base_address(batch);
-	gen7_emit_vfe_state_gpgpu(batch);
+	gen7_emit_vfe_state(batch, THREADS, GEN7_GPGPU_URB_ENTRIES,
+			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE,
+			    GEN7_VFE_STATE_GPGPU_MODE);
 	gen7_emit_curbe_load(batch, curbe_buffer);
 	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
 	gen7_emit_gpgpu_walk(batch, x, y, width, height);
@@ -176,7 +178,8 @@ gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch,
 	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU);
 
 	gen8_emit_state_base_address(batch);
-	gen8_emit_vfe_state_gpgpu(batch);
+	gen8_emit_vfe_state(batch, THREADS, GEN7_GPGPU_URB_ENTRIES,
+			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE);
 	gen7_emit_curbe_load(batch, curbe_buffer);
 	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
 	gen8_emit_gpgpu_walk(batch, x, y, width, height);
@@ -224,7 +227,8 @@ gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch,
 		  PIPELINE_SELECT_GPGPU);
 
 	gen9_emit_state_base_address(batch);
-	gen8_emit_vfe_state_gpgpu(batch);
+	gen8_emit_vfe_state(batch, THREADS, GEN7_GPGPU_URB_ENTRIES,
+			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE);
 	gen7_emit_curbe_load(batch, curbe_buffer);
 	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
 	gen8_emit_gpgpu_walk(batch, x, y, width, height);
diff --git a/lib/gpu_fill.c b/lib/gpu_fill.c
index 24e03cf2..e8591648 100644
--- a/lib/gpu_fill.c
+++ b/lib/gpu_fill.c
@@ -194,7 +194,9 @@ gen7_emit_state_base_address(struct intel_batchbuffer *batch)
 }
 
 void
-gen7_emit_vfe_state(struct intel_batchbuffer *batch)
+gen7_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
+		    uint32_t urb_entries, uint32_t urb_size,
+		    uint32_t curbe_size, uint32_t mode)
 {
 	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (8 - 2));
 
@@ -202,39 +204,15 @@ gen7_emit_vfe_state(struct intel_batchbuffer *batch)
 	OUT_BATCH(0);
 
 	/* number of threads & urb entries */
-	OUT_BATCH(1 << 16 |
-		2 << 8);
+	OUT_BATCH(threads << 16 |
+		urb_entries << 8 |
+		mode << 2); /* GPGPU vs media mode */
 
 	OUT_BATCH(0);
 
 	/* urb entry size & curbe size */
-	OUT_BATCH(2 << 16 |	/* in 256 bits unit */
-		  2);		/* in 256 bits unit */
-
-	/* scoreboard */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-}
-
-void
-gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
-{
-	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (8 - 2));
-
-	/* scratch buffer */
-	OUT_BATCH(0);
-
-	/* number of threads & urb entries */
-	OUT_BATCH(1 << 16 | /* max num of threads */
-		  0 << 8 | /* num of URB entry */
-		  1 << 2); /* GPGPU mode */
-
-	OUT_BATCH(0);
-
-	/* urb entry size & curbe size */
-	OUT_BATCH(0 << 16 |	/* URB entry size in 256 bits unit */
-		  1);		/* CURBE entry size in 256 bits unit */
+	OUT_BATCH(urb_size << 16 |	/* in 256 bits unit */
+		  curbe_size);		/* in 256 bits unit */
 
 	/* scoreboard */
 	OUT_BATCH(0);
@@ -279,25 +257,7 @@ gen7_emit_media_objects(struct intel_batchbuffer *batch,
 
 	for (i = 0; i < width / 16; i++) {
 		for (j = 0; j < height / 16; j++) {
-			OUT_BATCH(GEN7_MEDIA_OBJECT | (8 - 2));
-
-			/* interface descriptor offset */
-			OUT_BATCH(0);
-
-			/* without indirect data */
-			OUT_BATCH(0);
-			OUT_BATCH(0);
-
-			/* scoreboard */
-			OUT_BATCH(0);
-			OUT_BATCH(0);
-
-			/* inline data (xoffset, yoffset) */
-			OUT_BATCH(x + i * 16);
-			OUT_BATCH(y + j * 16);
-			if (AT_LEAST_GEN(batch->devid, 8) &&
-			    !IS_CHERRYVIEW(batch->devid))
-				gen8_emit_media_state_flush(batch);
+			gen_emit_media_object(batch, x + i*16, y + j*16);
 		}
 	}
 }
@@ -505,32 +465,9 @@ gen8_emit_media_state_flush(struct intel_batchbuffer *batch)
 }
 
 void
-gen8_emit_vfe_state(struct intel_batchbuffer *batch)
-{
-	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (9 - 2));
-
-	/* scratch buffer */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-
-	/* number of threads & urb entries */
-	OUT_BATCH(1 << 16 |
-		2 << 8);
-
-	OUT_BATCH(0);
-
-	/* urb entry size & curbe size */
-	OUT_BATCH(2 << 16 |
-		2);
-
-	/* scoreboard */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-}
-
-void
-gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
+gen8_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
+		    uint32_t urb_entries, uint32_t urb_size,
+		    uint32_t curbe_size)
 {
 	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (9 - 2));
 
@@ -539,36 +476,14 @@ gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
 	OUT_BATCH(0);
 
 	/* number of threads & urb entries */
-	OUT_BATCH(1 << 16 | 1 << 8);
-
-	OUT_BATCH(0);
-
-	/* urb entry size & curbe size */
-	OUT_BATCH(0 << 16 | 1);
-
-	/* scoreboard */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-}
-
-void
-gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch)
-{
-	OUT_BATCH(GEN8_MEDIA_VFE_STATE | (9 - 2));
-
-	/* scratch buffer */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-
-	/* number of threads & urb entries */
-	OUT_BATCH(2 << 8);
+	OUT_BATCH(threads << 16 |
+		urb_entries << 8);
 
 	OUT_BATCH(0);
 
 	/* urb entry size & curbe size */
-	OUT_BATCH(2 << 16 |
-		2);
+	OUT_BATCH(urb_size << 16 |
+		curbe_size);
 
 	/* scoreboard */
 	OUT_BATCH(0);
@@ -637,9 +552,10 @@ gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
 }
 
 void
-gen8_emit_media_objects_spin(struct intel_batchbuffer *batch)
+gen_emit_media_object(struct intel_batchbuffer *batch,
+		       unsigned int xoffset, unsigned int yoffset)
 {
-	OUT_BATCH(GEN8_MEDIA_OBJECT | (8 - 2));
+	OUT_BATCH(GEN7_MEDIA_OBJECT | (8 - 2));
 
 	/* interface descriptor offset */
 	OUT_BATCH(0);
@@ -653,8 +569,8 @@ gen8_emit_media_objects_spin(struct intel_batchbuffer *batch)
 	OUT_BATCH(0);
 
 	/* inline data (xoffset, yoffset) */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
+	OUT_BATCH(xoffset);
+	OUT_BATCH(yoffset);
 	if (AT_LEAST_GEN(batch->devid, 8) && !IS_CHERRYVIEW(batch->devid))
 		gen8_emit_media_state_flush(batch);
 }
diff --git a/lib/gpu_fill.h b/lib/gpu_fill.h
index 1e4be4bb..eb9998bc 100644
--- a/lib/gpu_fill.h
+++ b/lib/gpu_fill.h
@@ -37,6 +37,19 @@
 #include "intel_chipset.h"
 #include <assert.h>
 
+/* VFE STATE params */
+#define THREADS 1
+#define SPIN_THREADS 0
+#define GEN7_GPGPU_URB_ENTRIES 0
+#define GEN8_GPGPU_URB_ENTRIES 1
+#define MEDIA_URB_ENTRIES 2
+#define GPGPU_URB_SIZE 0	/* size of 1 entry in 256 bits unit */
+#define MEDIA_URB_SIZE 2
+#define GPGPU_CURBE_SIZE 1	/* in 256 bits unit */
+#define MEDIA_CURBE_SIZE 2
+#define GEN7_VFE_STATE_GPGPU_MODE 1
+#define GEN7_MEDIA_VFE_STATE_GPGPU_MODE 0
+
 void
 gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end);
 
@@ -68,10 +81,9 @@ void
 gen7_emit_state_base_address(struct intel_batchbuffer *batch);
 
 void
-gen7_emit_vfe_state(struct intel_batchbuffer *batch);
-
-void
-gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch);
+gen7_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
+		    uint32_t urb_entries, uint32_t urb_size,
+		    uint32_t curbe_size, uint32_t mode);
 
 void
 gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer);
@@ -112,13 +124,9 @@ void
 gen8_emit_media_state_flush(struct intel_batchbuffer *batch);
 
 void
-gen8_emit_vfe_state(struct intel_batchbuffer *batch);
-
-void
-gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch);
-
-void
-gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch);
+gen8_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
+		    uint32_t urb_entries, uint32_t urb_size,
+		    uint32_t curbe_size);
 
 void
 gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
@@ -126,7 +134,8 @@ gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
 		     unsigned int width, unsigned int height);
 
 void
-gen8_emit_media_objects_spin(struct intel_batchbuffer *batch);
+gen_emit_media_object(struct intel_batchbuffer *batch, unsigned int xoffset,
+		  unsigned int yoffset);
 
 void
 gen9_emit_state_base_address(struct intel_batchbuffer *batch);
diff --git a/lib/media_fill_gen7.c b/lib/media_fill_gen7.c
index 3dc5617e..0f277350 100644
--- a/lib/media_fill_gen7.c
+++ b/lib/media_fill_gen7.c
@@ -69,7 +69,8 @@ gen7_media_fillfunc(struct intel_batchbuffer *batch,
 	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
 	gen7_emit_state_base_address(batch);
 
-	gen7_emit_vfe_state(batch);
+	gen7_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
+			    MEDIA_CURBE_SIZE, GEN7_MEDIA_VFE_STATE_GPGPU_MODE);
 
 	gen7_emit_curbe_load(batch, curbe_buffer);
 
diff --git a/lib/media_fill_gen8.c b/lib/media_fill_gen8.c
index 63fe72eb..b9791c63 100644
--- a/lib/media_fill_gen8.c
+++ b/lib/media_fill_gen8.c
@@ -72,7 +72,8 @@ gen8_media_fillfunc(struct intel_batchbuffer *batch,
 	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
 	gen8_emit_state_base_address(batch);
 
-	gen8_emit_vfe_state(batch);
+	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
+			    MEDIA_CURBE_SIZE);
 
 	gen7_emit_curbe_load(batch, curbe_buffer);
 
diff --git a/lib/media_fill_gen9.c b/lib/media_fill_gen9.c
index 78e892f2..d2c54bdd 100644
--- a/lib/media_fill_gen9.c
+++ b/lib/media_fill_gen9.c
@@ -74,7 +74,8 @@ gen9_media_fillfunc(struct intel_batchbuffer *batch,
 			GEN9_FORCE_MEDIA_AWAKE_MASK);
 	gen9_emit_state_base_address(batch);
 
-	gen8_emit_vfe_state(batch);
+	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
+			    MEDIA_CURBE_SIZE);
 
 	gen7_emit_curbe_load(batch, curbe_buffer);
 
diff --git a/lib/media_spin.c b/lib/media_spin.c
index b323550a..ecff65e1 100644
--- a/lib/media_spin.c
+++ b/lib/media_spin.c
@@ -68,6 +68,12 @@ static const uint32_t spin_kernel[][4] = {
 
 #define BATCH_STATE_SPLIT 2048
 
+/* Offsets needed in gen_emit_media_object. In media_spin library this
+ * values do not matter.
+ */
+#define xoffset 0
+#define yoffset 0
+
 void
 gen8_media_spinfunc(struct intel_batchbuffer *batch,
 		    struct igt_buf *dst, uint32_t spins)
@@ -90,13 +96,14 @@ gen8_media_spinfunc(struct intel_batchbuffer *batch,
 	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
 	gen8_emit_state_base_address(batch);
 
-	gen8_emit_vfe_state_spin(batch);
+	gen8_emit_vfe_state(batch, SPIN_THREADS, MEDIA_URB_ENTRIES,
+			    MEDIA_URB_SIZE, MEDIA_CURBE_SIZE);
 
 	gen7_emit_curbe_load(batch, curbe_buffer);
 
 	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
 
-	gen8_emit_media_objects_spin(batch);
+	gen_emit_media_object(batch, xoffset, yoffset);
 
 	OUT_BATCH(MI_BATCH_BUFFER_END);
 
@@ -134,13 +141,14 @@ gen9_media_spinfunc(struct intel_batchbuffer *batch,
 			GEN9_FORCE_MEDIA_AWAKE_MASK);
 	gen9_emit_state_base_address(batch);
 
-	gen8_emit_vfe_state_spin(batch);
+	gen8_emit_vfe_state(batch, SPIN_THREADS, MEDIA_URB_ENTRIES,
+			    MEDIA_URB_SIZE, MEDIA_CURBE_SIZE);
 
 	gen7_emit_curbe_load(batch, curbe_buffer);
 
 	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
 
-	gen8_emit_media_objects_spin(batch);
+	gen_emit_media_object(batch, xoffset, yoffset);
 
 	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA |
 			GEN9_FORCE_MEDIA_AWAKE_DISABLE |
-- 
2.14.3

_______________________________________________
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igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

Re: [igt-dev] [PATCH i-g-t v3 4/5] lib/gpu_fill: Further code unification in gpu_fill

[Daniele Ceraolo Spurio]

On 04/05/18 06:02, Katarzyna Dec wrote:
> We can unify gen7_emit_vfe_state and gen8_emit_vfe_state
> functions for gpgpu/media_fill and media_spin by adding
> parameters. gen8_emit_media_object was renamed to gen_*
> and extended with additional offset parameters - we can
> have one gen7_emit_media_objects for all tests.
> I have renamed gen8_emit_media_object to gen_emit_*, because
> function belongs to all gens and it would be odd to have
> all named genX_* and only one without this prefix.
> 
> v2: Use #defines instead of variables as emit_vfe_state parameters.
> Fixed gen7_emit_media_objects. Unified vfe state parameters
> in media_spin library for gen8 and gen9 (gen9 had different values
> by mistake).
> 
> Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
> Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---
>   lib/gpgpu_fill.c      |  10 ++--
>   lib/gpu_fill.c        | 126 +++++++++-----------------------------------------
>   lib/gpu_fill.h        |  33 ++++++++-----
>   lib/media_fill_gen7.c |   3 +-
>   lib/media_fill_gen8.c |   3 +-
>   lib/media_fill_gen9.c |   3 +-
>   lib/media_spin.c      |  16 +++++--
>   7 files changed, 67 insertions(+), 127 deletions(-)
> 
> diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
> index 52925a5c..0d26d5c6 100644
> --- a/lib/gpgpu_fill.c
> +++ b/lib/gpgpu_fill.c
> @@ -129,7 +129,9 @@ gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>   	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU);
>   
>   	gen7_emit_state_base_address(batch);
> -	gen7_emit_vfe_state_gpgpu(batch);
> +	gen7_emit_vfe_state(batch, THREADS, GEN7_GPGPU_URB_ENTRIES,
> +			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE,
> +			    GEN7_VFE_STATE_GPGPU_MODE);
>   	gen7_emit_curbe_load(batch, curbe_buffer);
>   	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
>   	gen7_emit_gpgpu_walk(batch, x, y, width, height);
> @@ -176,7 +178,8 @@ gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>   	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU);
>   
>   	gen8_emit_state_base_address(batch);
> -	gen8_emit_vfe_state_gpgpu(batch);
> +	gen8_emit_vfe_state(batch, THREADS, GEN7_GPGPU_URB_ENTRIES,

Shouldn't here and in the gen9 function use GEN8_GPGPU_URB_ENTRIES?

> +			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE);
>   	gen7_emit_curbe_load(batch, curbe_buffer);
>   	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
>   	gen8_emit_gpgpu_walk(batch, x, y, width, height);
> @@ -224,7 +227,8 @@ gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>   		  PIPELINE_SELECT_GPGPU);
>   
>   	gen9_emit_state_base_address(batch);
> -	gen8_emit_vfe_state_gpgpu(batch);
> +	gen8_emit_vfe_state(batch, THREADS, GEN7_GPGPU_URB_ENTRIES,
> +			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE);
>   	gen7_emit_curbe_load(batch, curbe_buffer);
>   	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
>   	gen8_emit_gpgpu_walk(batch, x, y, width, height);
> diff --git a/lib/gpu_fill.c b/lib/gpu_fill.c
> index 24e03cf2..e8591648 100644
> --- a/lib/gpu_fill.c
> +++ b/lib/gpu_fill.c
> @@ -194,7 +194,9 @@ gen7_emit_state_base_address(struct intel_batchbuffer *batch)
>   }
>   
>   void
> -gen7_emit_vfe_state(struct intel_batchbuffer *batch)
> +gen7_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> +		    uint32_t urb_entries, uint32_t urb_size,
> +		    uint32_t curbe_size, uint32_t mode)
>   {
>   	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (8 - 2));
>   
> @@ -202,39 +204,15 @@ gen7_emit_vfe_state(struct intel_batchbuffer *batch)
>   	OUT_BATCH(0);
>   
>   	/* number of threads & urb entries */
> -	OUT_BATCH(1 << 16 |
> -		2 << 8);
> +	OUT_BATCH(threads << 16 |
> +		urb_entries << 8 |
> +		mode << 2); /* GPGPU vs media mode */
>   
>   	OUT_BATCH(0);
>   
>   	/* urb entry size & curbe size */
> -	OUT_BATCH(2 << 16 |	/* in 256 bits unit */
> -		  2);		/* in 256 bits unit */
> -
> -	/* scoreboard */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -}
> -
> -void
> -gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
> -{
> -	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (8 - 2));
> -
> -	/* scratch buffer */
> -	OUT_BATCH(0);
> -
> -	/* number of threads & urb entries */
> -	OUT_BATCH(1 << 16 | /* max num of threads */
> -		  0 << 8 | /* num of URB entry */
> -		  1 << 2); /* GPGPU mode */
> -
> -	OUT_BATCH(0);
> -
> -	/* urb entry size & curbe size */
> -	OUT_BATCH(0 << 16 |	/* URB entry size in 256 bits unit */
> -		  1);		/* CURBE entry size in 256 bits unit */
> +	OUT_BATCH(urb_size << 16 |	/* in 256 bits unit */
> +		  curbe_size);		/* in 256 bits unit */
>   
>   	/* scoreboard */
>   	OUT_BATCH(0);
> @@ -279,25 +257,7 @@ gen7_emit_media_objects(struct intel_batchbuffer *batch,
>   
>   	for (i = 0; i < width / 16; i++) {
>   		for (j = 0; j < height / 16; j++) {
> -			OUT_BATCH(GEN7_MEDIA_OBJECT | (8 - 2));
> -
> -			/* interface descriptor offset */
> -			OUT_BATCH(0);
> -
> -			/* without indirect data */
> -			OUT_BATCH(0);
> -			OUT_BATCH(0);
> -
> -			/* scoreboard */
> -			OUT_BATCH(0);
> -			OUT_BATCH(0);
> -
> -			/* inline data (xoffset, yoffset) */
> -			OUT_BATCH(x + i * 16);
> -			OUT_BATCH(y + j * 16);
> -			if (AT_LEAST_GEN(batch->devid, 8) &&
> -			    !IS_CHERRYVIEW(batch->devid))
> -				gen8_emit_media_state_flush(batch);
> +			gen_emit_media_object(batch, x + i*16, y + j*16);
>   		}
>   	}
>   }
> @@ -505,32 +465,9 @@ gen8_emit_media_state_flush(struct intel_batchbuffer *batch)
>   }
>   
>   void
> -gen8_emit_vfe_state(struct intel_batchbuffer *batch)
> -{
> -	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (9 - 2));
> -
> -	/* scratch buffer */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -
> -	/* number of threads & urb entries */
> -	OUT_BATCH(1 << 16 |
> -		2 << 8);
> -
> -	OUT_BATCH(0);
> -
> -	/* urb entry size & curbe size */
> -	OUT_BATCH(2 << 16 |
> -		2);
> -
> -	/* scoreboard */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -}
> -
> -void
> -gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
> +gen8_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> +		    uint32_t urb_entries, uint32_t urb_size,
> +		    uint32_t curbe_size)
>   {
>   	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (9 - 2));
>   
> @@ -539,36 +476,14 @@ gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
>   	OUT_BATCH(0);
>   
>   	/* number of threads & urb entries */
> -	OUT_BATCH(1 << 16 | 1 << 8);
> -
> -	OUT_BATCH(0);
> -
> -	/* urb entry size & curbe size */
> -	OUT_BATCH(0 << 16 | 1);
> -
> -	/* scoreboard */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -}
> -
> -void
> -gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch)
> -{
> -	OUT_BATCH(GEN8_MEDIA_VFE_STATE | (9 - 2));
> -
> -	/* scratch buffer */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -
> -	/* number of threads & urb entries */
> -	OUT_BATCH(2 << 8);
> +	OUT_BATCH(threads << 16 |
> +		urb_entries << 8);
>   
>   	OUT_BATCH(0);
>   
>   	/* urb entry size & curbe size */
> -	OUT_BATCH(2 << 16 |
> -		2);
> +	OUT_BATCH(urb_size << 16 |
> +		curbe_size);
>   
>   	/* scoreboard */
>   	OUT_BATCH(0);
> @@ -637,9 +552,10 @@ gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
>   }
>   
>   void
> -gen8_emit_media_objects_spin(struct intel_batchbuffer *batch)
> +gen_emit_media_object(struct intel_batchbuffer *batch,
> +		       unsigned int xoffset, unsigned int yoffset)
>   {
> -	OUT_BATCH(GEN8_MEDIA_OBJECT | (8 - 2));
> +	OUT_BATCH(GEN7_MEDIA_OBJECT | (8 - 2));
>   
>   	/* interface descriptor offset */
>   	OUT_BATCH(0);
> @@ -653,8 +569,8 @@ gen8_emit_media_objects_spin(struct intel_batchbuffer *batch)
>   	OUT_BATCH(0);
>   
>   	/* inline data (xoffset, yoffset) */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> +	OUT_BATCH(xoffset);
> +	OUT_BATCH(yoffset);
>   	if (AT_LEAST_GEN(batch->devid, 8) && !IS_CHERRYVIEW(batch->devid))
>   		gen8_emit_media_state_flush(batch);
>   }
> diff --git a/lib/gpu_fill.h b/lib/gpu_fill.h
> index 1e4be4bb..eb9998bc 100644
> --- a/lib/gpu_fill.h
> +++ b/lib/gpu_fill.h
> @@ -37,6 +37,19 @@
>   #include "intel_chipset.h"
>   #include <assert.h>
>   
> +/* VFE STATE params */
> +#define THREADS 1
> +#define SPIN_THREADS 0
> +#define GEN7_GPGPU_URB_ENTRIES 0
> +#define GEN8_GPGPU_URB_ENTRIES 1
> +#define MEDIA_URB_ENTRIES 2
> +#define GPGPU_URB_SIZE 0	/* size of 1 entry in 256 bits unit */
> +#define MEDIA_URB_SIZE 2
> +#define GPGPU_CURBE_SIZE 1	/* in 256 bits unit */
> +#define MEDIA_CURBE_SIZE 2


Since those defines are workload specific I think they should be in 
their respective workload file (gpgpu_fill.c etc) instead of here, as 
they are a bit mixed up here. There would be a slight duplication, but 
most of it should go away later if we squash the various media_fill 
files into one.

Also, a define with a generic name like "THREADS" in a .h could cause 
issue if in the future we include the header from a test file with a 
define with the same name.

> +#define GEN7_VFE_STATE_GPGPU_MODE 1
> +#define GEN7_MEDIA_VFE_STATE_GPGPU_MODE 0
 > +

These 2 names have a slight different format, as one uses GEN7_VFE_STATE 
and the other GEN7_MEDIA_VFE_STATE prefix. The naming of the second one 
also seems to be referring to GPGPU but the value is for media. I'd go 
with GEN7_VFE_STATE_MEDIA_MODE for the second one to solve both issues.

Also, since those 2 defines represent specific bit values of
GEN7_MEDIA_VFE_STATE I better place for them would be where 
GEN7_MEDIA_VFE_STATE is defined (like we do for the pipeline bits for 
GEN7_PIPELINE_SELECT)

Daniele

>   void
>   gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end);
>   
> @@ -68,10 +81,9 @@ void
>   gen7_emit_state_base_address(struct intel_batchbuffer *batch);
>   
>   void
> -gen7_emit_vfe_state(struct intel_batchbuffer *batch);
> -
> -void
> -gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch);
> +gen7_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> +		    uint32_t urb_entries, uint32_t urb_size,
> +		    uint32_t curbe_size, uint32_t mode);
>   
>   void
>   gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer);
> @@ -112,13 +124,9 @@ void
>   gen8_emit_media_state_flush(struct intel_batchbuffer *batch);
>   
>   void
> -gen8_emit_vfe_state(struct intel_batchbuffer *batch);
> -
> -void
> -gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch);
> -
> -void
> -gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch);
> +gen8_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> +		    uint32_t urb_entries, uint32_t urb_size,
> +		    uint32_t curbe_size);
>   
>   void
>   gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
> @@ -126,7 +134,8 @@ gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
>   		     unsigned int width, unsigned int height);
>   
>   void
> -gen8_emit_media_objects_spin(struct intel_batchbuffer *batch);
> +gen_emit_media_object(struct intel_batchbuffer *batch, unsigned int xoffset,
> +		  unsigned int yoffset);
>   
>   void
>   gen9_emit_state_base_address(struct intel_batchbuffer *batch);
> diff --git a/lib/media_fill_gen7.c b/lib/media_fill_gen7.c
> index 3dc5617e..0f277350 100644
> --- a/lib/media_fill_gen7.c
> +++ b/lib/media_fill_gen7.c
> @@ -69,7 +69,8 @@ gen7_media_fillfunc(struct intel_batchbuffer *batch,
>   	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
>   	gen7_emit_state_base_address(batch);
>   
> -	gen7_emit_vfe_state(batch);
> +	gen7_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
> +			    MEDIA_CURBE_SIZE, GEN7_MEDIA_VFE_STATE_GPGPU_MODE);
>   
>   	gen7_emit_curbe_load(batch, curbe_buffer);
>   
> diff --git a/lib/media_fill_gen8.c b/lib/media_fill_gen8.c
> index 63fe72eb..b9791c63 100644
> --- a/lib/media_fill_gen8.c
> +++ b/lib/media_fill_gen8.c
> @@ -72,7 +72,8 @@ gen8_media_fillfunc(struct intel_batchbuffer *batch,
>   	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
>   	gen8_emit_state_base_address(batch);
>   
> -	gen8_emit_vfe_state(batch);
> +	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
> +			    MEDIA_CURBE_SIZE);
>   
>   	gen7_emit_curbe_load(batch, curbe_buffer);
>   
> diff --git a/lib/media_fill_gen9.c b/lib/media_fill_gen9.c
> index 78e892f2..d2c54bdd 100644
> --- a/lib/media_fill_gen9.c
> +++ b/lib/media_fill_gen9.c
> @@ -74,7 +74,8 @@ gen9_media_fillfunc(struct intel_batchbuffer *batch,
>   			GEN9_FORCE_MEDIA_AWAKE_MASK);
>   	gen9_emit_state_base_address(batch);
>   
> -	gen8_emit_vfe_state(batch);
> +	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
> +			    MEDIA_CURBE_SIZE);
>   
>   	gen7_emit_curbe_load(batch, curbe_buffer);
>   
> diff --git a/lib/media_spin.c b/lib/media_spin.c
> index b323550a..ecff65e1 100644
> --- a/lib/media_spin.c
> +++ b/lib/media_spin.c
> @@ -68,6 +68,12 @@ static const uint32_t spin_kernel[][4] = {
>   
>   #define BATCH_STATE_SPLIT 2048
>   
> +/* Offsets needed in gen_emit_media_object. In media_spin library this
> + * values do not matter.
> + */
> +#define xoffset 0
> +#define yoffset 0
> +
>   void
>   gen8_media_spinfunc(struct intel_batchbuffer *batch,
>   		    struct igt_buf *dst, uint32_t spins)
> @@ -90,13 +96,14 @@ gen8_media_spinfunc(struct intel_batchbuffer *batch,
>   	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
>   	gen8_emit_state_base_address(batch);
>   
> -	gen8_emit_vfe_state_spin(batch);
> +	gen8_emit_vfe_state(batch, SPIN_THREADS, MEDIA_URB_ENTRIES,
> +			    MEDIA_URB_SIZE, MEDIA_CURBE_SIZE);
>   
>   	gen7_emit_curbe_load(batch, curbe_buffer);
>   
>   	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
>   
> -	gen8_emit_media_objects_spin(batch);
> +	gen_emit_media_object(batch, xoffset, yoffset);
>   
>   	OUT_BATCH(MI_BATCH_BUFFER_END);
>   
> @@ -134,13 +141,14 @@ gen9_media_spinfunc(struct intel_batchbuffer *batch,
>   			GEN9_FORCE_MEDIA_AWAKE_MASK);
>   	gen9_emit_state_base_address(batch);
>   
> -	gen8_emit_vfe_state_spin(batch);
> +	gen8_emit_vfe_state(batch, SPIN_THREADS, MEDIA_URB_ENTRIES,
> +			    MEDIA_URB_SIZE, MEDIA_CURBE_SIZE);
>   
>   	gen7_emit_curbe_load(batch, curbe_buffer);
>   
>   	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
>   
> -	gen8_emit_media_objects_spin(batch);
> +	gen_emit_media_object(batch, xoffset, yoffset);
>   
>   	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA |
>   			GEN9_FORCE_MEDIA_AWAKE_DISABLE |
> 
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Re: [igt-dev] [PATCH i-g-t v3 4/5] lib/gpu_fill: Further code unification in gpu_fill

[Katarzyna Dec]

On Fri, May 04, 2018 at 05:04:25PM -0700, Daniele Ceraolo Spurio wrote:
> 
> 
> On 04/05/18 06:02, Katarzyna Dec wrote:
> > We can unify gen7_emit_vfe_state and gen8_emit_vfe_state
> > functions for gpgpu/media_fill and media_spin by adding
> > parameters. gen8_emit_media_object was renamed to gen_*
> > and extended with additional offset parameters - we can
> > have one gen7_emit_media_objects for all tests.
> > I have renamed gen8_emit_media_object to gen_emit_*, because
> > function belongs to all gens and it would be odd to have
> > all named genX_* and only one without this prefix.
> > 
> > v2: Use #defines instead of variables as emit_vfe_state parameters.
> > Fixed gen7_emit_media_objects. Unified vfe state parameters
> > in media_spin library for gen8 and gen9 (gen9 had different values
> > by mistake).
> > 
> > Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
> > Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> > Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> > ---
> >   lib/gpgpu_fill.c      |  10 ++--
> >   lib/gpu_fill.c        | 126 +++++++++-----------------------------------------
> >   lib/gpu_fill.h        |  33 ++++++++-----
> >   lib/media_fill_gen7.c |   3 +-
> >   lib/media_fill_gen8.c |   3 +-
> >   lib/media_fill_gen9.c |   3 +-
> >   lib/media_spin.c      |  16 +++++--
> >   7 files changed, 67 insertions(+), 127 deletions(-)
> > 
> > diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
> > index 52925a5c..0d26d5c6 100644
> > --- a/lib/gpgpu_fill.c
> > +++ b/lib/gpgpu_fill.c
> > @@ -129,7 +129,9 @@ gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
> >   	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU);
> >   	gen7_emit_state_base_address(batch);
> > -	gen7_emit_vfe_state_gpgpu(batch);
> > +	gen7_emit_vfe_state(batch, THREADS, GEN7_GPGPU_URB_ENTRIES,
> > +			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE,
> > +			    GEN7_VFE_STATE_GPGPU_MODE);
> >   	gen7_emit_curbe_load(batch, curbe_buffer);
> >   	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
> >   	gen7_emit_gpgpu_walk(batch, x, y, width, height);
> > @@ -176,7 +178,8 @@ gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch,
> >   	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU);
> >   	gen8_emit_state_base_address(batch);
> > -	gen8_emit_vfe_state_gpgpu(batch);
> > +	gen8_emit_vfe_state(batch, THREADS, GEN7_GPGPU_URB_ENTRIES,
> 
> Shouldn't here and in the gen9 function use GEN8_GPGPU_URB_ENTRIES?
>
You're right :) It looks like I ran wrong binary before sending.
Will be fixed in another version.
> > +			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE);
> >   	gen7_emit_curbe_load(batch, curbe_buffer);
> >   	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
> >   	gen8_emit_gpgpu_walk(batch, x, y, width, height);
> > @@ -224,7 +227,8 @@ gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch,
> >   		  PIPELINE_SELECT_GPGPU);
> >   	gen9_emit_state_base_address(batch);
> > -	gen8_emit_vfe_state_gpgpu(batch);
> > +	gen8_emit_vfe_state(batch, THREADS, GEN7_GPGPU_URB_ENTRIES,
> > +			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE);
> >   	gen7_emit_curbe_load(batch, curbe_buffer);
> >   	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
> >   	gen8_emit_gpgpu_walk(batch, x, y, width, height);
> > diff --git a/lib/gpu_fill.c b/lib/gpu_fill.c
> > index 24e03cf2..e8591648 100644
> > --- a/lib/gpu_fill.c
> > +++ b/lib/gpu_fill.c
> > @@ -194,7 +194,9 @@ gen7_emit_state_base_address(struct intel_batchbuffer *batch)
> >   }
> >   void
> > -gen7_emit_vfe_state(struct intel_batchbuffer *batch)
> > +gen7_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> > +		    uint32_t urb_entries, uint32_t urb_size,
> > +		    uint32_t curbe_size, uint32_t mode)
> >   {
> >   	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (8 - 2));
> > @@ -202,39 +204,15 @@ gen7_emit_vfe_state(struct intel_batchbuffer *batch)
> >   	OUT_BATCH(0);
> >   	/* number of threads & urb entries */
> > -	OUT_BATCH(1 << 16 |
> > -		2 << 8);
> > +	OUT_BATCH(threads << 16 |
> > +		urb_entries << 8 |
> > +		mode << 2); /* GPGPU vs media mode */
> >   	OUT_BATCH(0);
> >   	/* urb entry size & curbe size */
> > -	OUT_BATCH(2 << 16 |	/* in 256 bits unit */
> > -		  2);		/* in 256 bits unit */
> > -
> > -	/* scoreboard */
> > -	OUT_BATCH(0);
> > -	OUT_BATCH(0);
> > -	OUT_BATCH(0);
> > -}
> > -
> > -void
> > -gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
> > -{
> > -	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (8 - 2));
> > -
> > -	/* scratch buffer */
> > -	OUT_BATCH(0);
> > -
> > -	/* number of threads & urb entries */
> > -	OUT_BATCH(1 << 16 | /* max num of threads */
> > -		  0 << 8 | /* num of URB entry */
> > -		  1 << 2); /* GPGPU mode */
> > -
> > -	OUT_BATCH(0);
> > -
> > -	/* urb entry size & curbe size */
> > -	OUT_BATCH(0 << 16 |	/* URB entry size in 256 bits unit */
> > -		  1);		/* CURBE entry size in 256 bits unit */
> > +	OUT_BATCH(urb_size << 16 |	/* in 256 bits unit */
> > +		  curbe_size);		/* in 256 bits unit */
> >   	/* scoreboard */
> >   	OUT_BATCH(0);
> > @@ -279,25 +257,7 @@ gen7_emit_media_objects(struct intel_batchbuffer *batch,
> >   	for (i = 0; i < width / 16; i++) {
> >   		for (j = 0; j < height / 16; j++) {
> > -			OUT_BATCH(GEN7_MEDIA_OBJECT | (8 - 2));
> > -
> > -			/* interface descriptor offset */
> > -			OUT_BATCH(0);
> > -
> > -			/* without indirect data */
> > -			OUT_BATCH(0);
> > -			OUT_BATCH(0);
> > -
> > -			/* scoreboard */
> > -			OUT_BATCH(0);
> > -			OUT_BATCH(0);
> > -
> > -			/* inline data (xoffset, yoffset) */
> > -			OUT_BATCH(x + i * 16);
> > -			OUT_BATCH(y + j * 16);
> > -			if (AT_LEAST_GEN(batch->devid, 8) &&
> > -			    !IS_CHERRYVIEW(batch->devid))
> > -				gen8_emit_media_state_flush(batch);
> > +			gen_emit_media_object(batch, x + i*16, y + j*16);
> >   		}
> >   	}
> >   }
> > @@ -505,32 +465,9 @@ gen8_emit_media_state_flush(struct intel_batchbuffer *batch)
> >   }
> >   void
> > -gen8_emit_vfe_state(struct intel_batchbuffer *batch)
> > -{
> > -	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (9 - 2));
> > -
> > -	/* scratch buffer */
> > -	OUT_BATCH(0);
> > -	OUT_BATCH(0);
> > -
> > -	/* number of threads & urb entries */
> > -	OUT_BATCH(1 << 16 |
> > -		2 << 8);
> > -
> > -	OUT_BATCH(0);
> > -
> > -	/* urb entry size & curbe size */
> > -	OUT_BATCH(2 << 16 |
> > -		2);
> > -
> > -	/* scoreboard */
> > -	OUT_BATCH(0);
> > -	OUT_BATCH(0);
> > -	OUT_BATCH(0);
> > -}
> > -
> > -void
> > -gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
> > +gen8_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> > +		    uint32_t urb_entries, uint32_t urb_size,
> > +		    uint32_t curbe_size)
> >   {
> >   	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (9 - 2));
> > @@ -539,36 +476,14 @@ gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
> >   	OUT_BATCH(0);
> >   	/* number of threads & urb entries */
> > -	OUT_BATCH(1 << 16 | 1 << 8);
> > -
> > -	OUT_BATCH(0);
> > -
> > -	/* urb entry size & curbe size */
> > -	OUT_BATCH(0 << 16 | 1);
> > -
> > -	/* scoreboard */
> > -	OUT_BATCH(0);
> > -	OUT_BATCH(0);
> > -	OUT_BATCH(0);
> > -}
> > -
> > -void
> > -gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch)
> > -{
> > -	OUT_BATCH(GEN8_MEDIA_VFE_STATE | (9 - 2));
> > -
> > -	/* scratch buffer */
> > -	OUT_BATCH(0);
> > -	OUT_BATCH(0);
> > -
> > -	/* number of threads & urb entries */
> > -	OUT_BATCH(2 << 8);
> > +	OUT_BATCH(threads << 16 |
> > +		urb_entries << 8);
> >   	OUT_BATCH(0);
> >   	/* urb entry size & curbe size */
> > -	OUT_BATCH(2 << 16 |
> > -		2);
> > +	OUT_BATCH(urb_size << 16 |
> > +		curbe_size);
> >   	/* scoreboard */
> >   	OUT_BATCH(0);
> > @@ -637,9 +552,10 @@ gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
> >   }
> >   void
> > -gen8_emit_media_objects_spin(struct intel_batchbuffer *batch)
> > +gen_emit_media_object(struct intel_batchbuffer *batch,
> > +		       unsigned int xoffset, unsigned int yoffset)
> >   {
> > -	OUT_BATCH(GEN8_MEDIA_OBJECT | (8 - 2));
> > +	OUT_BATCH(GEN7_MEDIA_OBJECT | (8 - 2));
> >   	/* interface descriptor offset */
> >   	OUT_BATCH(0);
> > @@ -653,8 +569,8 @@ gen8_emit_media_objects_spin(struct intel_batchbuffer *batch)
> >   	OUT_BATCH(0);
> >   	/* inline data (xoffset, yoffset) */
> > -	OUT_BATCH(0);
> > -	OUT_BATCH(0);
> > +	OUT_BATCH(xoffset);
> > +	OUT_BATCH(yoffset);
> >   	if (AT_LEAST_GEN(batch->devid, 8) && !IS_CHERRYVIEW(batch->devid))
> >   		gen8_emit_media_state_flush(batch);
> >   }
> > diff --git a/lib/gpu_fill.h b/lib/gpu_fill.h
> > index 1e4be4bb..eb9998bc 100644
> > --- a/lib/gpu_fill.h
> > +++ b/lib/gpu_fill.h
> > @@ -37,6 +37,19 @@
> >   #include "intel_chipset.h"
> >   #include <assert.h>
> > +/* VFE STATE params */
> > +#define THREADS 1
> > +#define SPIN_THREADS 0
> > +#define GEN7_GPGPU_URB_ENTRIES 0
> > +#define GEN8_GPGPU_URB_ENTRIES 1
> > +#define MEDIA_URB_ENTRIES 2
> > +#define GPGPU_URB_SIZE 0	/* size of 1 entry in 256 bits unit */
> > +#define MEDIA_URB_SIZE 2
> > +#define GPGPU_CURBE_SIZE 1	/* in 256 bits unit */
> > +#define MEDIA_CURBE_SIZE 2
> 
> 
> Since those defines are workload specific I think they should be in their
> respective workload file (gpgpu_fill.c etc) instead of here, as they are a
> bit mixed up here. There would be a slight duplication, but most of it
> should go away later if we squash the various media_fill files into one.
> 
> Also, a define with a generic name like "THREADS" in a .h could cause issue
> if in the future we include the header from a test file with a define with
> the same name.
> 
> > +#define GEN7_VFE_STATE_GPGPU_MODE 1
> > +#define GEN7_MEDIA_VFE_STATE_GPGPU_MODE 0
> > +
> 
> These 2 names have a slight different format, as one uses GEN7_VFE_STATE and
> the other GEN7_MEDIA_VFE_STATE prefix. The naming of the second one also
> seems to be referring to GPGPU but the value is for media. I'd go with
> GEN7_VFE_STATE_MEDIA_MODE for the second one to solve both issues.
> 
> Also, since those 2 defines represent specific bit values of
> GEN7_MEDIA_VFE_STATE I better place for them would be where
> GEN7_MEDIA_VFE_STATE is defined (like we do for the pipeline bits for
> GEN7_PIPELINE_SELECT)
> 
> Daniele
> 
> >   void
> >   gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end);
> > @@ -68,10 +81,9 @@ void
> >   gen7_emit_state_base_address(struct intel_batchbuffer *batch);
> >   void
> > -gen7_emit_vfe_state(struct intel_batchbuffer *batch);
> > -
> > -void
> > -gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch);
> > +gen7_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> > +		    uint32_t urb_entries, uint32_t urb_size,
> > +		    uint32_t curbe_size, uint32_t mode);
> >   void
> >   gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer);
> > @@ -112,13 +124,9 @@ void
> >   gen8_emit_media_state_flush(struct intel_batchbuffer *batch);
> >   void
> > -gen8_emit_vfe_state(struct intel_batchbuffer *batch);
> > -
> > -void
> > -gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch);
> > -
> > -void
> > -gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch);
> > +gen8_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> > +		    uint32_t urb_entries, uint32_t urb_size,
> > +		    uint32_t curbe_size);
> >   void
> >   gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
> > @@ -126,7 +134,8 @@ gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
> >   		     unsigned int width, unsigned int height);
> >   void
> > -gen8_emit_media_objects_spin(struct intel_batchbuffer *batch);
> > +gen_emit_media_object(struct intel_batchbuffer *batch, unsigned int xoffset,
> > +		  unsigned int yoffset);
> >   void
> >   gen9_emit_state_base_address(struct intel_batchbuffer *batch);
> > diff --git a/lib/media_fill_gen7.c b/lib/media_fill_gen7.c
> > index 3dc5617e..0f277350 100644
> > --- a/lib/media_fill_gen7.c
> > +++ b/lib/media_fill_gen7.c
> > @@ -69,7 +69,8 @@ gen7_media_fillfunc(struct intel_batchbuffer *batch,
> >   	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
> >   	gen7_emit_state_base_address(batch);
> > -	gen7_emit_vfe_state(batch);
> > +	gen7_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
> > +			    MEDIA_CURBE_SIZE, GEN7_MEDIA_VFE_STATE_GPGPU_MODE);
> >   	gen7_emit_curbe_load(batch, curbe_buffer);
> > diff --git a/lib/media_fill_gen8.c b/lib/media_fill_gen8.c
> > index 63fe72eb..b9791c63 100644
> > --- a/lib/media_fill_gen8.c
> > +++ b/lib/media_fill_gen8.c
> > @@ -72,7 +72,8 @@ gen8_media_fillfunc(struct intel_batchbuffer *batch,
> >   	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
> >   	gen8_emit_state_base_address(batch);
> > -	gen8_emit_vfe_state(batch);
> > +	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
> > +			    MEDIA_CURBE_SIZE);
> >   	gen7_emit_curbe_load(batch, curbe_buffer);
> > diff --git a/lib/media_fill_gen9.c b/lib/media_fill_gen9.c
> > index 78e892f2..d2c54bdd 100644
> > --- a/lib/media_fill_gen9.c
> > +++ b/lib/media_fill_gen9.c
> > @@ -74,7 +74,8 @@ gen9_media_fillfunc(struct intel_batchbuffer *batch,
> >   			GEN9_FORCE_MEDIA_AWAKE_MASK);
> >   	gen9_emit_state_base_address(batch);
> > -	gen8_emit_vfe_state(batch);
> > +	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
> > +			    MEDIA_CURBE_SIZE);
> >   	gen7_emit_curbe_load(batch, curbe_buffer);
> > diff --git a/lib/media_spin.c b/lib/media_spin.c
> > index b323550a..ecff65e1 100644
> > --- a/lib/media_spin.c
> > +++ b/lib/media_spin.c
> > @@ -68,6 +68,12 @@ static const uint32_t spin_kernel[][4] = {
> >   #define BATCH_STATE_SPLIT 2048
> > +/* Offsets needed in gen_emit_media_object. In media_spin library this
> > + * values do not matter.
> > + */
> > +#define xoffset 0
> > +#define yoffset 0
> > +
> >   void
> >   gen8_media_spinfunc(struct intel_batchbuffer *batch,
> >   		    struct igt_buf *dst, uint32_t spins)
> > @@ -90,13 +96,14 @@ gen8_media_spinfunc(struct intel_batchbuffer *batch,
> >   	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
> >   	gen8_emit_state_base_address(batch);
> > -	gen8_emit_vfe_state_spin(batch);
> > +	gen8_emit_vfe_state(batch, SPIN_THREADS, MEDIA_URB_ENTRIES,
> > +			    MEDIA_URB_SIZE, MEDIA_CURBE_SIZE);
> >   	gen7_emit_curbe_load(batch, curbe_buffer);
> >   	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
> > -	gen8_emit_media_objects_spin(batch);
> > +	gen_emit_media_object(batch, xoffset, yoffset);
> >   	OUT_BATCH(MI_BATCH_BUFFER_END);
> > @@ -134,13 +141,14 @@ gen9_media_spinfunc(struct intel_batchbuffer *batch,
> >   			GEN9_FORCE_MEDIA_AWAKE_MASK);
> >   	gen9_emit_state_base_address(batch);
> > -	gen8_emit_vfe_state_spin(batch);
> > +	gen8_emit_vfe_state(batch, SPIN_THREADS, MEDIA_URB_ENTRIES,
> > +			    MEDIA_URB_SIZE, MEDIA_CURBE_SIZE);
> >   	gen7_emit_curbe_load(batch, curbe_buffer);
> >   	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
> > -	gen8_emit_media_objects_spin(batch);
> > +	gen_emit_media_object(batch, xoffset, yoffset);
> >   	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA |
> >   			GEN9_FORCE_MEDIA_AWAKE_DISABLE |
> > 
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Re: [igt-dev] [PATCH i-g-t v3 4/5] lib/gpu_fill: Further code unification in gpu_fill

[Katarzyna Dec]

On Fri, May 04, 2018 at 05:04:25PM -0700, Daniele Ceraolo Spurio wrote:
> 
> 
> On 04/05/18 06:02, Katarzyna Dec wrote:
> > We can unify gen7_emit_vfe_state and gen8_emit_vfe_state
> > functions for gpgpu/media_fill and media_spin by adding
> > parameters. gen8_emit_media_object was renamed to gen_*
> > and extended with additional offset parameters - we can
> > have one gen7_emit_media_objects for all tests.
> > I have renamed gen8_emit_media_object to gen_emit_*, because
> > function belongs to all gens and it would be odd to have
> > all named genX_* and only one without this prefix.
> > 
> > v2: Use #defines instead of variables as emit_vfe_state parameters.
> > Fixed gen7_emit_media_objects. Unified vfe state parameters
> > in media_spin library for gen8 and gen9 (gen9 had different values
> > by mistake).
> > 
> > Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
> > Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> > Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> > ---
> >   lib/gpgpu_fill.c      |  10 ++--
> >   lib/gpu_fill.c        | 126 +++++++++-----------------------------------------
> >   lib/gpu_fill.h        |  33 ++++++++-----
> >   lib/media_fill_gen7.c |   3 +-
> >   lib/media_fill_gen8.c |   3 +-
> >   lib/media_fill_gen9.c |   3 +-
> >   lib/media_spin.c      |  16 +++++--
> >   7 files changed, 67 insertions(+), 127 deletions(-)
> > 
> > diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
> > index 52925a5c..0d26d5c6 100644
> > --- a/lib/gpgpu_fill.c
> > +++ b/lib/gpgpu_fill.c
> > @@ -129,7 +129,9 @@ gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
> >   	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU);
> >   	gen7_emit_state_base_address(batch);
> > -	gen7_emit_vfe_state_gpgpu(batch);
> > +	gen7_emit_vfe_state(batch, THREADS, GEN7_GPGPU_URB_ENTRIES,
> > +			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE,
> > +			    GEN7_VFE_STATE_GPGPU_MODE);
> >   	gen7_emit_curbe_load(batch, curbe_buffer);
> >   	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
> >   	gen7_emit_gpgpu_walk(batch, x, y, width, height);
> > @@ -176,7 +178,8 @@ gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch,
> >   	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU);
> >   	gen8_emit_state_base_address(batch);
> > -	gen8_emit_vfe_state_gpgpu(batch);
> > +	gen8_emit_vfe_state(batch, THREADS, GEN7_GPGPU_URB_ENTRIES,
> 
> Shouldn't here and in the gen9 function use GEN8_GPGPU_URB_ENTRIES?
> 
> > +			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE);
> >   	gen7_emit_curbe_load(batch, curbe_buffer);
> >   	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
> >   	gen8_emit_gpgpu_walk(batch, x, y, width, height);
> > @@ -224,7 +227,8 @@ gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch,
> >   		  PIPELINE_SELECT_GPGPU);
> >   	gen9_emit_state_base_address(batch);
> > -	gen8_emit_vfe_state_gpgpu(batch);
> > +	gen8_emit_vfe_state(batch, THREADS, GEN7_GPGPU_URB_ENTRIES,
> > +			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE);
> >   	gen7_emit_curbe_load(batch, curbe_buffer);
> >   	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
> >   	gen8_emit_gpgpu_walk(batch, x, y, width, height);
> > diff --git a/lib/gpu_fill.c b/lib/gpu_fill.c
> > index 24e03cf2..e8591648 100644
> > --- a/lib/gpu_fill.c
> > +++ b/lib/gpu_fill.c
> > @@ -194,7 +194,9 @@ gen7_emit_state_base_address(struct intel_batchbuffer *batch)
> >   }
> >   void
> > -gen7_emit_vfe_state(struct intel_batchbuffer *batch)
> > +gen7_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> > +		    uint32_t urb_entries, uint32_t urb_size,
> > +		    uint32_t curbe_size, uint32_t mode)
> >   {
> >   	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (8 - 2));
> > @@ -202,39 +204,15 @@ gen7_emit_vfe_state(struct intel_batchbuffer *batch)
> >   	OUT_BATCH(0);
> >   	/* number of threads & urb entries */
> > -	OUT_BATCH(1 << 16 |
> > -		2 << 8);
> > +	OUT_BATCH(threads << 16 |
> > +		urb_entries << 8 |
> > +		mode << 2); /* GPGPU vs media mode */
> >   	OUT_BATCH(0);
> >   	/* urb entry size & curbe size */
> > -	OUT_BATCH(2 << 16 |	/* in 256 bits unit */
> > -		  2);		/* in 256 bits unit */
> > -
> > -	/* scoreboard */
> > -	OUT_BATCH(0);
> > -	OUT_BATCH(0);
> > -	OUT_BATCH(0);
> > -}
> > -
> > -void
> > -gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
> > -{
> > -	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (8 - 2));
> > -
> > -	/* scratch buffer */
> > -	OUT_BATCH(0);
> > -
> > -	/* number of threads & urb entries */
> > -	OUT_BATCH(1 << 16 | /* max num of threads */
> > -		  0 << 8 | /* num of URB entry */
> > -		  1 << 2); /* GPGPU mode */
> > -
> > -	OUT_BATCH(0);
> > -
> > -	/* urb entry size & curbe size */
> > -	OUT_BATCH(0 << 16 |	/* URB entry size in 256 bits unit */
> > -		  1);		/* CURBE entry size in 256 bits unit */
> > +	OUT_BATCH(urb_size << 16 |	/* in 256 bits unit */
> > +		  curbe_size);		/* in 256 bits unit */
> >   	/* scoreboard */
> >   	OUT_BATCH(0);
> > @@ -279,25 +257,7 @@ gen7_emit_media_objects(struct intel_batchbuffer *batch,
> >   	for (i = 0; i < width / 16; i++) {
> >   		for (j = 0; j < height / 16; j++) {
> > -			OUT_BATCH(GEN7_MEDIA_OBJECT | (8 - 2));
> > -
> > -			/* interface descriptor offset */
> > -			OUT_BATCH(0);
> > -
> > -			/* without indirect data */
> > -			OUT_BATCH(0);
> > -			OUT_BATCH(0);
> > -
> > -			/* scoreboard */
> > -			OUT_BATCH(0);
> > -			OUT_BATCH(0);
> > -
> > -			/* inline data (xoffset, yoffset) */
> > -			OUT_BATCH(x + i * 16);
> > -			OUT_BATCH(y + j * 16);
> > -			if (AT_LEAST_GEN(batch->devid, 8) &&
> > -			    !IS_CHERRYVIEW(batch->devid))
> > -				gen8_emit_media_state_flush(batch);
> > +			gen_emit_media_object(batch, x + i*16, y + j*16);
> >   		}
> >   	}
> >   }
> > @@ -505,32 +465,9 @@ gen8_emit_media_state_flush(struct intel_batchbuffer *batch)
> >   }
> >   void
> > -gen8_emit_vfe_state(struct intel_batchbuffer *batch)
> > -{
> > -	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (9 - 2));
> > -
> > -	/* scratch buffer */
> > -	OUT_BATCH(0);
> > -	OUT_BATCH(0);
> > -
> > -	/* number of threads & urb entries */
> > -	OUT_BATCH(1 << 16 |
> > -		2 << 8);
> > -
> > -	OUT_BATCH(0);
> > -
> > -	/* urb entry size & curbe size */
> > -	OUT_BATCH(2 << 16 |
> > -		2);
> > -
> > -	/* scoreboard */
> > -	OUT_BATCH(0);
> > -	OUT_BATCH(0);
> > -	OUT_BATCH(0);
> > -}
> > -
> > -void
> > -gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
> > +gen8_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> > +		    uint32_t urb_entries, uint32_t urb_size,
> > +		    uint32_t curbe_size)
> >   {
> >   	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (9 - 2));
> > @@ -539,36 +476,14 @@ gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
> >   	OUT_BATCH(0);
> >   	/* number of threads & urb entries */
> > -	OUT_BATCH(1 << 16 | 1 << 8);
> > -
> > -	OUT_BATCH(0);
> > -
> > -	/* urb entry size & curbe size */
> > -	OUT_BATCH(0 << 16 | 1);
> > -
> > -	/* scoreboard */
> > -	OUT_BATCH(0);
> > -	OUT_BATCH(0);
> > -	OUT_BATCH(0);
> > -}
> > -
> > -void
> > -gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch)
> > -{
> > -	OUT_BATCH(GEN8_MEDIA_VFE_STATE | (9 - 2));
> > -
> > -	/* scratch buffer */
> > -	OUT_BATCH(0);
> > -	OUT_BATCH(0);
> > -
> > -	/* number of threads & urb entries */
> > -	OUT_BATCH(2 << 8);
> > +	OUT_BATCH(threads << 16 |
> > +		urb_entries << 8);
> >   	OUT_BATCH(0);
> >   	/* urb entry size & curbe size */
> > -	OUT_BATCH(2 << 16 |
> > -		2);
> > +	OUT_BATCH(urb_size << 16 |
> > +		curbe_size);
> >   	/* scoreboard */
> >   	OUT_BATCH(0);
> > @@ -637,9 +552,10 @@ gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
> >   }
> >   void
> > -gen8_emit_media_objects_spin(struct intel_batchbuffer *batch)
> > +gen_emit_media_object(struct intel_batchbuffer *batch,
> > +		       unsigned int xoffset, unsigned int yoffset)
> >   {
> > -	OUT_BATCH(GEN8_MEDIA_OBJECT | (8 - 2));
> > +	OUT_BATCH(GEN7_MEDIA_OBJECT | (8 - 2));
> >   	/* interface descriptor offset */
> >   	OUT_BATCH(0);
> > @@ -653,8 +569,8 @@ gen8_emit_media_objects_spin(struct intel_batchbuffer *batch)
> >   	OUT_BATCH(0);
> >   	/* inline data (xoffset, yoffset) */
> > -	OUT_BATCH(0);
> > -	OUT_BATCH(0);
> > +	OUT_BATCH(xoffset);
> > +	OUT_BATCH(yoffset);
> >   	if (AT_LEAST_GEN(batch->devid, 8) && !IS_CHERRYVIEW(batch->devid))
> >   		gen8_emit_media_state_flush(batch);
> >   }
> > diff --git a/lib/gpu_fill.h b/lib/gpu_fill.h
> > index 1e4be4bb..eb9998bc 100644
> > --- a/lib/gpu_fill.h
> > +++ b/lib/gpu_fill.h
> > @@ -37,6 +37,19 @@
> >   #include "intel_chipset.h"
> >   #include <assert.h>
> > +/* VFE STATE params */
> > +#define THREADS 1
> > +#define SPIN_THREADS 0
> > +#define GEN7_GPGPU_URB_ENTRIES 0
> > +#define GEN8_GPGPU_URB_ENTRIES 1
> > +#define MEDIA_URB_ENTRIES 2
> > +#define GPGPU_URB_SIZE 0	/* size of 1 entry in 256 bits unit */
> > +#define MEDIA_URB_SIZE 2
> > +#define GPGPU_CURBE_SIZE 1	/* in 256 bits unit */
> > +#define MEDIA_CURBE_SIZE 2
> 
> 
> Since those defines are workload specific I think they should be in their
> respective workload file (gpgpu_fill.c etc) instead of here, as they are a
> bit mixed up here. There would be a slight duplication, but most of it
> should go away later if we squash the various media_fill files into one.
> 
> Also, a define with a generic name like "THREADS" in a .h could cause issue
> if in the future we include the header from a test file with a define with
> the same name.
>
I will move #defines to *.c files for gpgpu_fill, media_fill and media_spin.
> > +#define GEN7_VFE_STATE_GPGPU_MODE 1
> > +#define GEN7_MEDIA_VFE_STATE_GPGPU_MODE 0
> > +
> 
> These 2 names have a slight different format, as one uses GEN7_VFE_STATE and
> the other GEN7_MEDIA_VFE_STATE prefix. The naming of the second one also
> seems to be referring to GPGPU but the value is for media. I'd go with
> GEN7_VFE_STATE_MEDIA_MODE for the second one to solve both issues.
> 
> Also, since those 2 defines represent specific bit values of
> GEN7_MEDIA_VFE_STATE I better place for them would be where
> GEN7_MEDIA_VFE_STATE is defined (like we do for the pipeline bits for
> GEN7_PIPELINE_SELECT)
> 
> Daniele
>
Media tests are using genX_media.h libraries, while gpgpu_fill doesn't use                                                                                                                                        
anything like it. For now I would stay with gpgpu_fill/media_fill.c etc files.                                                                                                                                    
It is possible that after some more refactoring all such #defines will land                                                                                                                                       
in another lib.
Kasia
> >   void
> >   gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end);
> > @@ -68,10 +81,9 @@ void
> >   gen7_emit_state_base_address(struct intel_batchbuffer *batch);
> >   void
> > -gen7_emit_vfe_state(struct intel_batchbuffer *batch);
> > -
> > -void
> > -gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch);
> > +gen7_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> > +		    uint32_t urb_entries, uint32_t urb_size,
> > +		    uint32_t curbe_size, uint32_t mode);
> >   void
> >   gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer);
> > @@ -112,13 +124,9 @@ void
> >   gen8_emit_media_state_flush(struct intel_batchbuffer *batch);
> >   void
> > -gen8_emit_vfe_state(struct intel_batchbuffer *batch);
> > -
> > -void
> > -gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch);
> > -
> > -void
> > -gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch);
> > +gen8_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> > +		    uint32_t urb_entries, uint32_t urb_size,
> > +		    uint32_t curbe_size);
> >   void
> >   gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
> > @@ -126,7 +134,8 @@ gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
> >   		     unsigned int width, unsigned int height);
> >   void
> > -gen8_emit_media_objects_spin(struct intel_batchbuffer *batch);
> > +gen_emit_media_object(struct intel_batchbuffer *batch, unsigned int xoffset,
> > +		  unsigned int yoffset);
> >   void
> >   gen9_emit_state_base_address(struct intel_batchbuffer *batch);
> > diff --git a/lib/media_fill_gen7.c b/lib/media_fill_gen7.c
> > index 3dc5617e..0f277350 100644
> > --- a/lib/media_fill_gen7.c
> > +++ b/lib/media_fill_gen7.c
> > @@ -69,7 +69,8 @@ gen7_media_fillfunc(struct intel_batchbuffer *batch,
> >   	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
> >   	gen7_emit_state_base_address(batch);
> > -	gen7_emit_vfe_state(batch);
> > +	gen7_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
> > +			    MEDIA_CURBE_SIZE, GEN7_MEDIA_VFE_STATE_GPGPU_MODE);
> >   	gen7_emit_curbe_load(batch, curbe_buffer);
> > diff --git a/lib/media_fill_gen8.c b/lib/media_fill_gen8.c
> > index 63fe72eb..b9791c63 100644
> > --- a/lib/media_fill_gen8.c
> > +++ b/lib/media_fill_gen8.c
> > @@ -72,7 +72,8 @@ gen8_media_fillfunc(struct intel_batchbuffer *batch,
> >   	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
> >   	gen8_emit_state_base_address(batch);
> > -	gen8_emit_vfe_state(batch);
> > +	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
> > +			    MEDIA_CURBE_SIZE);
> >   	gen7_emit_curbe_load(batch, curbe_buffer);
> > diff --git a/lib/media_fill_gen9.c b/lib/media_fill_gen9.c
> > index 78e892f2..d2c54bdd 100644
> > --- a/lib/media_fill_gen9.c
> > +++ b/lib/media_fill_gen9.c
> > @@ -74,7 +74,8 @@ gen9_media_fillfunc(struct intel_batchbuffer *batch,
> >   			GEN9_FORCE_MEDIA_AWAKE_MASK);
> >   	gen9_emit_state_base_address(batch);
> > -	gen8_emit_vfe_state(batch);
> > +	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
> > +			    MEDIA_CURBE_SIZE);
> >   	gen7_emit_curbe_load(batch, curbe_buffer);
> > diff --git a/lib/media_spin.c b/lib/media_spin.c
> > index b323550a..ecff65e1 100644
> > --- a/lib/media_spin.c
> > +++ b/lib/media_spin.c
> > @@ -68,6 +68,12 @@ static const uint32_t spin_kernel[][4] = {
> >   #define BATCH_STATE_SPLIT 2048
> > +/* Offsets needed in gen_emit_media_object. In media_spin library this
> > + * values do not matter.
> > + */
> > +#define xoffset 0
> > +#define yoffset 0
> > +
> >   void
> >   gen8_media_spinfunc(struct intel_batchbuffer *batch,
> >   		    struct igt_buf *dst, uint32_t spins)
> > @@ -90,13 +96,14 @@ gen8_media_spinfunc(struct intel_batchbuffer *batch,
> >   	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
> >   	gen8_emit_state_base_address(batch);
> > -	gen8_emit_vfe_state_spin(batch);
> > +	gen8_emit_vfe_state(batch, SPIN_THREADS, MEDIA_URB_ENTRIES,
> > +			    MEDIA_URB_SIZE, MEDIA_CURBE_SIZE);
> >   	gen7_emit_curbe_load(batch, curbe_buffer);
> >   	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
> > -	gen8_emit_media_objects_spin(batch);
> > +	gen_emit_media_object(batch, xoffset, yoffset);
> >   	OUT_BATCH(MI_BATCH_BUFFER_END);
> > @@ -134,13 +141,14 @@ gen9_media_spinfunc(struct intel_batchbuffer *batch,
> >   			GEN9_FORCE_MEDIA_AWAKE_MASK);
> >   	gen9_emit_state_base_address(batch);
> > -	gen8_emit_vfe_state_spin(batch);
> > +	gen8_emit_vfe_state(batch, SPIN_THREADS, MEDIA_URB_ENTRIES,
> > +			    MEDIA_URB_SIZE, MEDIA_CURBE_SIZE);
> >   	gen7_emit_curbe_load(batch, curbe_buffer);
> >   	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
> > -	gen8_emit_media_objects_spin(batch);
> > +	gen_emit_media_object(batch, xoffset, yoffset);
> >   	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA |
> >   			GEN9_FORCE_MEDIA_AWAKE_DISABLE |
> > 
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[igt-dev] [PATCH i-g-t v4 4/5] lib/gpu_fill: Further code unification in gpu_fill

[Katarzyna Dec]

We can unify gen7_emit_vfe_state and gen8_emit_vfe_state
functions for gpgpu/media_fill and media_spin by adding
parameters. gen8_emit_media_object was renamed to gen_*
and extended with additional offset parameters - we can
have one gen7_emit_media_objects for all tests.
I have renamed gen8_emit_media_object to gen_emit_*, because
function belongs to all gens and it would be odd to have
all named genX_* and only one without this prefix.

v2: Use #defines instead of variables as emit_vfe_state parameters.
Fixed gen7_emit_media_objects. Unified vfe state parameters
in media_spin library for gen8 and gen9 (gen9 had different values
by mistake).
v3: Fixed bug in emit_vfe_state for gen8 and gen9 in gpgpu_fill.
Moved #defines for emit_vfe_state to particular libraries.

Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 lib/gpgpu_fill.c      |  17 +++++--
 lib/gpu_fill.c        | 126 +++++++++-----------------------------------------
 lib/gpu_fill.h        |  21 ++++-----
 lib/media_fill_gen7.c |   9 +++-
 lib/media_fill_gen8.c |   8 +++-
 lib/media_fill_gen9.c |   8 +++-
 lib/media_spin.c      |  21 +++++++--
 7 files changed, 83 insertions(+), 127 deletions(-)

diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
index 52925a5c..9a2598bc 100644
--- a/lib/gpgpu_fill.c
+++ b/lib/gpgpu_fill.c
@@ -95,6 +95,13 @@ static const uint32_t gen9_gpgpu_kernel[][4] = {
  */
 
 #define BATCH_STATE_SPLIT 2048
+/* VFE STATE params */
+#define THREADS 1
+#define GEN7_GPGPU_URB_ENTRIES 0
+#define GEN8_GPGPU_URB_ENTRIES 1
+#define GPGPU_URB_SIZE 0
+#define GPGPU_CURBE_SIZE 1
+#define GEN7_VFE_STATE_GPGPU_MODE 1
 
 void
 gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
@@ -129,7 +136,9 @@ gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
 	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU);
 
 	gen7_emit_state_base_address(batch);
-	gen7_emit_vfe_state_gpgpu(batch);
+	gen7_emit_vfe_state(batch, THREADS, GEN7_GPGPU_URB_ENTRIES,
+			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE,
+			    GEN7_VFE_STATE_GPGPU_MODE);
 	gen7_emit_curbe_load(batch, curbe_buffer);
 	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
 	gen7_emit_gpgpu_walk(batch, x, y, width, height);
@@ -176,7 +185,8 @@ gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch,
 	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU);
 
 	gen8_emit_state_base_address(batch);
-	gen8_emit_vfe_state_gpgpu(batch);
+	gen8_emit_vfe_state(batch, THREADS, GEN8_GPGPU_URB_ENTRIES,
+			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE);
 	gen7_emit_curbe_load(batch, curbe_buffer);
 	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
 	gen8_emit_gpgpu_walk(batch, x, y, width, height);
@@ -224,7 +234,8 @@ gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch,
 		  PIPELINE_SELECT_GPGPU);
 
 	gen9_emit_state_base_address(batch);
-	gen8_emit_vfe_state_gpgpu(batch);
+	gen8_emit_vfe_state(batch, THREADS, GEN8_GPGPU_URB_ENTRIES,
+			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE);
 	gen7_emit_curbe_load(batch, curbe_buffer);
 	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
 	gen8_emit_gpgpu_walk(batch, x, y, width, height);
diff --git a/lib/gpu_fill.c b/lib/gpu_fill.c
index 24e03cf2..e8591648 100644
--- a/lib/gpu_fill.c
+++ b/lib/gpu_fill.c
@@ -194,7 +194,9 @@ gen7_emit_state_base_address(struct intel_batchbuffer *batch)
 }
 
 void
-gen7_emit_vfe_state(struct intel_batchbuffer *batch)
+gen7_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
+		    uint32_t urb_entries, uint32_t urb_size,
+		    uint32_t curbe_size, uint32_t mode)
 {
 	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (8 - 2));
 
@@ -202,39 +204,15 @@ gen7_emit_vfe_state(struct intel_batchbuffer *batch)
 	OUT_BATCH(0);
 
 	/* number of threads & urb entries */
-	OUT_BATCH(1 << 16 |
-		2 << 8);
+	OUT_BATCH(threads << 16 |
+		urb_entries << 8 |
+		mode << 2); /* GPGPU vs media mode */
 
 	OUT_BATCH(0);
 
 	/* urb entry size & curbe size */
-	OUT_BATCH(2 << 16 |	/* in 256 bits unit */
-		  2);		/* in 256 bits unit */
-
-	/* scoreboard */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-}
-
-void
-gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
-{
-	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (8 - 2));
-
-	/* scratch buffer */
-	OUT_BATCH(0);
-
-	/* number of threads & urb entries */
-	OUT_BATCH(1 << 16 | /* max num of threads */
-		  0 << 8 | /* num of URB entry */
-		  1 << 2); /* GPGPU mode */
-
-	OUT_BATCH(0);
-
-	/* urb entry size & curbe size */
-	OUT_BATCH(0 << 16 |	/* URB entry size in 256 bits unit */
-		  1);		/* CURBE entry size in 256 bits unit */
+	OUT_BATCH(urb_size << 16 |	/* in 256 bits unit */
+		  curbe_size);		/* in 256 bits unit */
 
 	/* scoreboard */
 	OUT_BATCH(0);
@@ -279,25 +257,7 @@ gen7_emit_media_objects(struct intel_batchbuffer *batch,
 
 	for (i = 0; i < width / 16; i++) {
 		for (j = 0; j < height / 16; j++) {
-			OUT_BATCH(GEN7_MEDIA_OBJECT | (8 - 2));
-
-			/* interface descriptor offset */
-			OUT_BATCH(0);
-
-			/* without indirect data */
-			OUT_BATCH(0);
-			OUT_BATCH(0);
-
-			/* scoreboard */
-			OUT_BATCH(0);
-			OUT_BATCH(0);
-
-			/* inline data (xoffset, yoffset) */
-			OUT_BATCH(x + i * 16);
-			OUT_BATCH(y + j * 16);
-			if (AT_LEAST_GEN(batch->devid, 8) &&
-			    !IS_CHERRYVIEW(batch->devid))
-				gen8_emit_media_state_flush(batch);
+			gen_emit_media_object(batch, x + i*16, y + j*16);
 		}
 	}
 }
@@ -505,32 +465,9 @@ gen8_emit_media_state_flush(struct intel_batchbuffer *batch)
 }
 
 void
-gen8_emit_vfe_state(struct intel_batchbuffer *batch)
-{
-	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (9 - 2));
-
-	/* scratch buffer */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-
-	/* number of threads & urb entries */
-	OUT_BATCH(1 << 16 |
-		2 << 8);
-
-	OUT_BATCH(0);
-
-	/* urb entry size & curbe size */
-	OUT_BATCH(2 << 16 |
-		2);
-
-	/* scoreboard */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-}
-
-void
-gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
+gen8_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
+		    uint32_t urb_entries, uint32_t urb_size,
+		    uint32_t curbe_size)
 {
 	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (9 - 2));
 
@@ -539,36 +476,14 @@ gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
 	OUT_BATCH(0);
 
 	/* number of threads & urb entries */
-	OUT_BATCH(1 << 16 | 1 << 8);
-
-	OUT_BATCH(0);
-
-	/* urb entry size & curbe size */
-	OUT_BATCH(0 << 16 | 1);
-
-	/* scoreboard */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-}
-
-void
-gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch)
-{
-	OUT_BATCH(GEN8_MEDIA_VFE_STATE | (9 - 2));
-
-	/* scratch buffer */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-
-	/* number of threads & urb entries */
-	OUT_BATCH(2 << 8);
+	OUT_BATCH(threads << 16 |
+		urb_entries << 8);
 
 	OUT_BATCH(0);
 
 	/* urb entry size & curbe size */
-	OUT_BATCH(2 << 16 |
-		2);
+	OUT_BATCH(urb_size << 16 |
+		curbe_size);
 
 	/* scoreboard */
 	OUT_BATCH(0);
@@ -637,9 +552,10 @@ gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
 }
 
 void
-gen8_emit_media_objects_spin(struct intel_batchbuffer *batch)
+gen_emit_media_object(struct intel_batchbuffer *batch,
+		       unsigned int xoffset, unsigned int yoffset)
 {
-	OUT_BATCH(GEN8_MEDIA_OBJECT | (8 - 2));
+	OUT_BATCH(GEN7_MEDIA_OBJECT | (8 - 2));
 
 	/* interface descriptor offset */
 	OUT_BATCH(0);
@@ -653,8 +569,8 @@ gen8_emit_media_objects_spin(struct intel_batchbuffer *batch)
 	OUT_BATCH(0);
 
 	/* inline data (xoffset, yoffset) */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
+	OUT_BATCH(xoffset);
+	OUT_BATCH(yoffset);
 	if (AT_LEAST_GEN(batch->devid, 8) && !IS_CHERRYVIEW(batch->devid))
 		gen8_emit_media_state_flush(batch);
 }
diff --git a/lib/gpu_fill.h b/lib/gpu_fill.h
index 1e4be4bb..cf90d706 100644
--- a/lib/gpu_fill.h
+++ b/lib/gpu_fill.h
@@ -37,6 +37,7 @@
 #include "intel_chipset.h"
 #include <assert.h>
 
+
 void
 gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end);
 
@@ -68,10 +69,9 @@ void
 gen7_emit_state_base_address(struct intel_batchbuffer *batch);
 
 void
-gen7_emit_vfe_state(struct intel_batchbuffer *batch);
-
-void
-gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch);
+gen7_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
+		    uint32_t urb_entries, uint32_t urb_size,
+		    uint32_t curbe_size, uint32_t mode);
 
 void
 gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer);
@@ -112,13 +112,9 @@ void
 gen8_emit_media_state_flush(struct intel_batchbuffer *batch);
 
 void
-gen8_emit_vfe_state(struct intel_batchbuffer *batch);
-
-void
-gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch);
-
-void
-gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch);
+gen8_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
+		    uint32_t urb_entries, uint32_t urb_size,
+		    uint32_t curbe_size);
 
 void
 gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
@@ -126,7 +122,8 @@ gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
 		     unsigned int width, unsigned int height);
 
 void
-gen8_emit_media_objects_spin(struct intel_batchbuffer *batch);
+gen_emit_media_object(struct intel_batchbuffer *batch, unsigned int xoffset,
+		  unsigned int yoffset);
 
 void
 gen9_emit_state_base_address(struct intel_batchbuffer *batch);
diff --git a/lib/media_fill_gen7.c b/lib/media_fill_gen7.c
index 3dc5617e..a38b8556 100644
--- a/lib/media_fill_gen7.c
+++ b/lib/media_fill_gen7.c
@@ -43,6 +43,12 @@ static const uint32_t media_kernel[][4] = {
  */
 
 #define BATCH_STATE_SPLIT 2048
+/* VFE STATE params */
+#define THREADS 1
+#define MEDIA_URB_ENTRIES 2
+#define MEDIA_URB_SIZE 2
+#define MEDIA_CURBE_SIZE 2
+#define GEN7_VFE_STATE_MEDIA_MODE 0
 
 void
 gen7_media_fillfunc(struct intel_batchbuffer *batch,
@@ -69,7 +75,8 @@ gen7_media_fillfunc(struct intel_batchbuffer *batch,
 	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
 	gen7_emit_state_base_address(batch);
 
-	gen7_emit_vfe_state(batch);
+	gen7_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
+			    MEDIA_CURBE_SIZE, GEN7_VFE_STATE_MEDIA_MODE);
 
 	gen7_emit_curbe_load(batch, curbe_buffer);
 
diff --git a/lib/media_fill_gen8.c b/lib/media_fill_gen8.c
index 63fe72eb..fc89c7f0 100644
--- a/lib/media_fill_gen8.c
+++ b/lib/media_fill_gen8.c
@@ -46,6 +46,11 @@ static const uint32_t media_kernel[][4] = {
  */
 
 #define BATCH_STATE_SPLIT 2048
+/* VFE STATE params */
+#define THREADS 1
+#define MEDIA_URB_ENTRIES 2
+#define MEDIA_URB_SIZE 2
+#define MEDIA_CURBE_SIZE 2
 
 void
 gen8_media_fillfunc(struct intel_batchbuffer *batch,
@@ -72,7 +77,8 @@ gen8_media_fillfunc(struct intel_batchbuffer *batch,
 	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
 	gen8_emit_state_base_address(batch);
 
-	gen8_emit_vfe_state(batch);
+	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
+			    MEDIA_CURBE_SIZE);
 
 	gen7_emit_curbe_load(batch, curbe_buffer);
 
diff --git a/lib/media_fill_gen9.c b/lib/media_fill_gen9.c
index 78e892f2..805e7576 100644
--- a/lib/media_fill_gen9.c
+++ b/lib/media_fill_gen9.c
@@ -43,6 +43,11 @@ static const uint32_t media_kernel[][4] = {
  */
 
 #define BATCH_STATE_SPLIT 2048
+/* VFE STATE params */
+#define THREADS 1
+#define MEDIA_URB_ENTRIES 2
+#define MEDIA_URB_SIZE 2
+#define MEDIA_CURBE_SIZE 2
 
 void
 gen9_media_fillfunc(struct intel_batchbuffer *batch,
@@ -74,7 +79,8 @@ gen9_media_fillfunc(struct intel_batchbuffer *batch,
 			GEN9_FORCE_MEDIA_AWAKE_MASK);
 	gen9_emit_state_base_address(batch);
 
-	gen8_emit_vfe_state(batch);
+	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
+			    MEDIA_CURBE_SIZE);
 
 	gen7_emit_curbe_load(batch, curbe_buffer);
 
diff --git a/lib/media_spin.c b/lib/media_spin.c
index b323550a..f9b8dc0a 100644
--- a/lib/media_spin.c
+++ b/lib/media_spin.c
@@ -67,6 +67,17 @@ static const uint32_t spin_kernel[][4] = {
  */
 
 #define BATCH_STATE_SPLIT 2048
+/* VFE STATE params */
+#define THREADS 0
+#define MEDIA_URB_ENTRIES 2
+#define MEDIA_URB_SIZE 2
+#define MEDIA_CURBE_SIZE 2
+
+/* Offsets needed in gen_emit_media_object. In media_spin library this
+ * values do not matter.
+ */
+#define xoffset 0
+#define yoffset 0
 
 void
 gen8_media_spinfunc(struct intel_batchbuffer *batch,
@@ -90,13 +101,14 @@ gen8_media_spinfunc(struct intel_batchbuffer *batch,
 	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
 	gen8_emit_state_base_address(batch);
 
-	gen8_emit_vfe_state_spin(batch);
+	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES,
+			    MEDIA_URB_SIZE, MEDIA_CURBE_SIZE);
 
 	gen7_emit_curbe_load(batch, curbe_buffer);
 
 	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
 
-	gen8_emit_media_objects_spin(batch);
+	gen_emit_media_object(batch, xoffset, yoffset);
 
 	OUT_BATCH(MI_BATCH_BUFFER_END);
 
@@ -134,13 +146,14 @@ gen9_media_spinfunc(struct intel_batchbuffer *batch,
 			GEN9_FORCE_MEDIA_AWAKE_MASK);
 	gen9_emit_state_base_address(batch);
 
-	gen8_emit_vfe_state_spin(batch);
+	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES,
+			    MEDIA_URB_SIZE, MEDIA_CURBE_SIZE);
 
 	gen7_emit_curbe_load(batch, curbe_buffer);
 
 	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
 
-	gen8_emit_media_objects_spin(batch);
+	gen_emit_media_object(batch, xoffset, yoffset);
 
 	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA |
 			GEN9_FORCE_MEDIA_AWAKE_DISABLE |
-- 
2.14.3

_______________________________________________
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Re: [igt-dev] [PATCH i-g-t v4 4/5] lib/gpu_fill: Further code unification in gpu_fill

[Katarzyna Dec]

On Mon, May 07, 2018 at 02:36:51PM +0200, Katarzyna Dec wrote:
> We can unify gen7_emit_vfe_state and gen8_emit_vfe_state
> functions for gpgpu/media_fill and media_spin by adding
> parameters. gen8_emit_media_object was renamed to gen_*
> and extended with additional offset parameters - we can
> have one gen7_emit_media_objects for all tests.
> I have renamed gen8_emit_media_object to gen_emit_*, because
> function belongs to all gens and it would be odd to have
> all named genX_* and only one without this prefix.
> 
> v2: Use #defines instead of variables as emit_vfe_state parameters.
> Fixed gen7_emit_media_objects. Unified vfe state parameters
> in media_spin library for gen8 and gen9 (gen9 had different values
> by mistake).
> v3: Fixed bug in emit_vfe_state for gen8 and gen9 in gpgpu_fill.
> Moved #defines for emit_vfe_state to particular libraries.
> 
> Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
> Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Hello Guys,
Any more thoughts on this patch? If it is possible I would like to
have this series merged quite soon.

Thanks,
Kasia

> ---
>  lib/gpgpu_fill.c      |  17 +++++--
>  lib/gpu_fill.c        | 126 +++++++++-----------------------------------------
>  lib/gpu_fill.h        |  21 ++++-----
>  lib/media_fill_gen7.c |   9 +++-
>  lib/media_fill_gen8.c |   8 +++-
>  lib/media_fill_gen9.c |   8 +++-
>  lib/media_spin.c      |  21 +++++++--
>  7 files changed, 83 insertions(+), 127 deletions(-)
> 
> diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
> index 52925a5c..9a2598bc 100644
> --- a/lib/gpgpu_fill.c
> +++ b/lib/gpgpu_fill.c
> @@ -95,6 +95,13 @@ static const uint32_t gen9_gpgpu_kernel[][4] = {
>   */
>  
>  #define BATCH_STATE_SPLIT 2048
> +/* VFE STATE params */
> +#define THREADS 1
> +#define GEN7_GPGPU_URB_ENTRIES 0
> +#define GEN8_GPGPU_URB_ENTRIES 1
> +#define GPGPU_URB_SIZE 0
> +#define GPGPU_CURBE_SIZE 1
> +#define GEN7_VFE_STATE_GPGPU_MODE 1
>  
>  void
>  gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
> @@ -129,7 +136,9 @@ gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>  	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU);
>  
>  	gen7_emit_state_base_address(batch);
> -	gen7_emit_vfe_state_gpgpu(batch);
> +	gen7_emit_vfe_state(batch, THREADS, GEN7_GPGPU_URB_ENTRIES,
> +			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE,
> +			    GEN7_VFE_STATE_GPGPU_MODE);
>  	gen7_emit_curbe_load(batch, curbe_buffer);
>  	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
>  	gen7_emit_gpgpu_walk(batch, x, y, width, height);
> @@ -176,7 +185,8 @@ gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>  	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU);
>  
>  	gen8_emit_state_base_address(batch);
> -	gen8_emit_vfe_state_gpgpu(batch);
> +	gen8_emit_vfe_state(batch, THREADS, GEN8_GPGPU_URB_ENTRIES,
> +			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE);
>  	gen7_emit_curbe_load(batch, curbe_buffer);
>  	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
>  	gen8_emit_gpgpu_walk(batch, x, y, width, height);
> @@ -224,7 +234,8 @@ gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>  		  PIPELINE_SELECT_GPGPU);
>  
>  	gen9_emit_state_base_address(batch);
> -	gen8_emit_vfe_state_gpgpu(batch);
> +	gen8_emit_vfe_state(batch, THREADS, GEN8_GPGPU_URB_ENTRIES,
> +			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE);
>  	gen7_emit_curbe_load(batch, curbe_buffer);
>  	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
>  	gen8_emit_gpgpu_walk(batch, x, y, width, height);
> diff --git a/lib/gpu_fill.c b/lib/gpu_fill.c
> index 24e03cf2..e8591648 100644
> --- a/lib/gpu_fill.c
> +++ b/lib/gpu_fill.c
> @@ -194,7 +194,9 @@ gen7_emit_state_base_address(struct intel_batchbuffer *batch)
>  }
>  
>  void
> -gen7_emit_vfe_state(struct intel_batchbuffer *batch)
> +gen7_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> +		    uint32_t urb_entries, uint32_t urb_size,
> +		    uint32_t curbe_size, uint32_t mode)
>  {
>  	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (8 - 2));
>  
> @@ -202,39 +204,15 @@ gen7_emit_vfe_state(struct intel_batchbuffer *batch)
>  	OUT_BATCH(0);
>  
>  	/* number of threads & urb entries */
> -	OUT_BATCH(1 << 16 |
> -		2 << 8);
> +	OUT_BATCH(threads << 16 |
> +		urb_entries << 8 |
> +		mode << 2); /* GPGPU vs media mode */
>  
>  	OUT_BATCH(0);
>  
>  	/* urb entry size & curbe size */
> -	OUT_BATCH(2 << 16 |	/* in 256 bits unit */
> -		  2);		/* in 256 bits unit */
> -
> -	/* scoreboard */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -}
> -
> -void
> -gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
> -{
> -	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (8 - 2));
> -
> -	/* scratch buffer */
> -	OUT_BATCH(0);
> -
> -	/* number of threads & urb entries */
> -	OUT_BATCH(1 << 16 | /* max num of threads */
> -		  0 << 8 | /* num of URB entry */
> -		  1 << 2); /* GPGPU mode */
> -
> -	OUT_BATCH(0);
> -
> -	/* urb entry size & curbe size */
> -	OUT_BATCH(0 << 16 |	/* URB entry size in 256 bits unit */
> -		  1);		/* CURBE entry size in 256 bits unit */
> +	OUT_BATCH(urb_size << 16 |	/* in 256 bits unit */
> +		  curbe_size);		/* in 256 bits unit */
>  
>  	/* scoreboard */
>  	OUT_BATCH(0);
> @@ -279,25 +257,7 @@ gen7_emit_media_objects(struct intel_batchbuffer *batch,
>  
>  	for (i = 0; i < width / 16; i++) {
>  		for (j = 0; j < height / 16; j++) {
> -			OUT_BATCH(GEN7_MEDIA_OBJECT | (8 - 2));
> -
> -			/* interface descriptor offset */
> -			OUT_BATCH(0);
> -
> -			/* without indirect data */
> -			OUT_BATCH(0);
> -			OUT_BATCH(0);
> -
> -			/* scoreboard */
> -			OUT_BATCH(0);
> -			OUT_BATCH(0);
> -
> -			/* inline data (xoffset, yoffset) */
> -			OUT_BATCH(x + i * 16);
> -			OUT_BATCH(y + j * 16);
> -			if (AT_LEAST_GEN(batch->devid, 8) &&
> -			    !IS_CHERRYVIEW(batch->devid))
> -				gen8_emit_media_state_flush(batch);
> +			gen_emit_media_object(batch, x + i*16, y + j*16);
>  		}
>  	}
>  }
> @@ -505,32 +465,9 @@ gen8_emit_media_state_flush(struct intel_batchbuffer *batch)
>  }
>  
>  void
> -gen8_emit_vfe_state(struct intel_batchbuffer *batch)
> -{
> -	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (9 - 2));
> -
> -	/* scratch buffer */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -
> -	/* number of threads & urb entries */
> -	OUT_BATCH(1 << 16 |
> -		2 << 8);
> -
> -	OUT_BATCH(0);
> -
> -	/* urb entry size & curbe size */
> -	OUT_BATCH(2 << 16 |
> -		2);
> -
> -	/* scoreboard */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -}
> -
> -void
> -gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
> +gen8_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> +		    uint32_t urb_entries, uint32_t urb_size,
> +		    uint32_t curbe_size)
>  {
>  	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (9 - 2));
>  
> @@ -539,36 +476,14 @@ gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
>  	OUT_BATCH(0);
>  
>  	/* number of threads & urb entries */
> -	OUT_BATCH(1 << 16 | 1 << 8);
> -
> -	OUT_BATCH(0);
> -
> -	/* urb entry size & curbe size */
> -	OUT_BATCH(0 << 16 | 1);
> -
> -	/* scoreboard */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -}
> -
> -void
> -gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch)
> -{
> -	OUT_BATCH(GEN8_MEDIA_VFE_STATE | (9 - 2));
> -
> -	/* scratch buffer */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -
> -	/* number of threads & urb entries */
> -	OUT_BATCH(2 << 8);
> +	OUT_BATCH(threads << 16 |
> +		urb_entries << 8);
>  
>  	OUT_BATCH(0);
>  
>  	/* urb entry size & curbe size */
> -	OUT_BATCH(2 << 16 |
> -		2);
> +	OUT_BATCH(urb_size << 16 |
> +		curbe_size);
>  
>  	/* scoreboard */
>  	OUT_BATCH(0);
> @@ -637,9 +552,10 @@ gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
>  }
>  
>  void
> -gen8_emit_media_objects_spin(struct intel_batchbuffer *batch)
> +gen_emit_media_object(struct intel_batchbuffer *batch,
> +		       unsigned int xoffset, unsigned int yoffset)
>  {
> -	OUT_BATCH(GEN8_MEDIA_OBJECT | (8 - 2));
> +	OUT_BATCH(GEN7_MEDIA_OBJECT | (8 - 2));
>  
>  	/* interface descriptor offset */
>  	OUT_BATCH(0);
> @@ -653,8 +569,8 @@ gen8_emit_media_objects_spin(struct intel_batchbuffer *batch)
>  	OUT_BATCH(0);
>  
>  	/* inline data (xoffset, yoffset) */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> +	OUT_BATCH(xoffset);
> +	OUT_BATCH(yoffset);
>  	if (AT_LEAST_GEN(batch->devid, 8) && !IS_CHERRYVIEW(batch->devid))
>  		gen8_emit_media_state_flush(batch);
>  }
> diff --git a/lib/gpu_fill.h b/lib/gpu_fill.h
> index 1e4be4bb..cf90d706 100644
> --- a/lib/gpu_fill.h
> +++ b/lib/gpu_fill.h
> @@ -37,6 +37,7 @@
>  #include "intel_chipset.h"
>  #include <assert.h>
>  
> +
>  void
>  gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end);
>  
> @@ -68,10 +69,9 @@ void
>  gen7_emit_state_base_address(struct intel_batchbuffer *batch);
>  
>  void
> -gen7_emit_vfe_state(struct intel_batchbuffer *batch);
> -
> -void
> -gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch);
> +gen7_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> +		    uint32_t urb_entries, uint32_t urb_size,
> +		    uint32_t curbe_size, uint32_t mode);
>  
>  void
>  gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer);
> @@ -112,13 +112,9 @@ void
>  gen8_emit_media_state_flush(struct intel_batchbuffer *batch);
>  
>  void
> -gen8_emit_vfe_state(struct intel_batchbuffer *batch);
> -
> -void
> -gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch);
> -
> -void
> -gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch);
> +gen8_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> +		    uint32_t urb_entries, uint32_t urb_size,
> +		    uint32_t curbe_size);
>  
>  void
>  gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
> @@ -126,7 +122,8 @@ gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
>  		     unsigned int width, unsigned int height);
>  
>  void
> -gen8_emit_media_objects_spin(struct intel_batchbuffer *batch);
> +gen_emit_media_object(struct intel_batchbuffer *batch, unsigned int xoffset,
> +		  unsigned int yoffset);
>  
>  void
>  gen9_emit_state_base_address(struct intel_batchbuffer *batch);
> diff --git a/lib/media_fill_gen7.c b/lib/media_fill_gen7.c
> index 3dc5617e..a38b8556 100644
> --- a/lib/media_fill_gen7.c
> +++ b/lib/media_fill_gen7.c
> @@ -43,6 +43,12 @@ static const uint32_t media_kernel[][4] = {
>   */
>  
>  #define BATCH_STATE_SPLIT 2048
> +/* VFE STATE params */
> +#define THREADS 1
> +#define MEDIA_URB_ENTRIES 2
> +#define MEDIA_URB_SIZE 2
> +#define MEDIA_CURBE_SIZE 2
> +#define GEN7_VFE_STATE_MEDIA_MODE 0
>  
>  void
>  gen7_media_fillfunc(struct intel_batchbuffer *batch,
> @@ -69,7 +75,8 @@ gen7_media_fillfunc(struct intel_batchbuffer *batch,
>  	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
>  	gen7_emit_state_base_address(batch);
>  
> -	gen7_emit_vfe_state(batch);
> +	gen7_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
> +			    MEDIA_CURBE_SIZE, GEN7_VFE_STATE_MEDIA_MODE);
>  
>  	gen7_emit_curbe_load(batch, curbe_buffer);
>  
> diff --git a/lib/media_fill_gen8.c b/lib/media_fill_gen8.c
> index 63fe72eb..fc89c7f0 100644
> --- a/lib/media_fill_gen8.c
> +++ b/lib/media_fill_gen8.c
> @@ -46,6 +46,11 @@ static const uint32_t media_kernel[][4] = {
>   */
>  
>  #define BATCH_STATE_SPLIT 2048
> +/* VFE STATE params */
> +#define THREADS 1
> +#define MEDIA_URB_ENTRIES 2
> +#define MEDIA_URB_SIZE 2
> +#define MEDIA_CURBE_SIZE 2
>  
>  void
>  gen8_media_fillfunc(struct intel_batchbuffer *batch,
> @@ -72,7 +77,8 @@ gen8_media_fillfunc(struct intel_batchbuffer *batch,
>  	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
>  	gen8_emit_state_base_address(batch);
>  
> -	gen8_emit_vfe_state(batch);
> +	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
> +			    MEDIA_CURBE_SIZE);
>  
>  	gen7_emit_curbe_load(batch, curbe_buffer);
>  
> diff --git a/lib/media_fill_gen9.c b/lib/media_fill_gen9.c
> index 78e892f2..805e7576 100644
> --- a/lib/media_fill_gen9.c
> +++ b/lib/media_fill_gen9.c
> @@ -43,6 +43,11 @@ static const uint32_t media_kernel[][4] = {
>   */
>  
>  #define BATCH_STATE_SPLIT 2048
> +/* VFE STATE params */
> +#define THREADS 1
> +#define MEDIA_URB_ENTRIES 2
> +#define MEDIA_URB_SIZE 2
> +#define MEDIA_CURBE_SIZE 2
>  
>  void
>  gen9_media_fillfunc(struct intel_batchbuffer *batch,
> @@ -74,7 +79,8 @@ gen9_media_fillfunc(struct intel_batchbuffer *batch,
>  			GEN9_FORCE_MEDIA_AWAKE_MASK);
>  	gen9_emit_state_base_address(batch);
>  
> -	gen8_emit_vfe_state(batch);
> +	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
> +			    MEDIA_CURBE_SIZE);
>  
>  	gen7_emit_curbe_load(batch, curbe_buffer);
>  
> diff --git a/lib/media_spin.c b/lib/media_spin.c
> index b323550a..f9b8dc0a 100644
> --- a/lib/media_spin.c
> +++ b/lib/media_spin.c
> @@ -67,6 +67,17 @@ static const uint32_t spin_kernel[][4] = {
>   */
>  
>  #define BATCH_STATE_SPLIT 2048
> +/* VFE STATE params */
> +#define THREADS 0
> +#define MEDIA_URB_ENTRIES 2
> +#define MEDIA_URB_SIZE 2
> +#define MEDIA_CURBE_SIZE 2
> +
> +/* Offsets needed in gen_emit_media_object. In media_spin library this
> + * values do not matter.
> + */
> +#define xoffset 0
> +#define yoffset 0
>  
>  void
>  gen8_media_spinfunc(struct intel_batchbuffer *batch,
> @@ -90,13 +101,14 @@ gen8_media_spinfunc(struct intel_batchbuffer *batch,
>  	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
>  	gen8_emit_state_base_address(batch);
>  
> -	gen8_emit_vfe_state_spin(batch);
> +	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES,
> +			    MEDIA_URB_SIZE, MEDIA_CURBE_SIZE);
>  
>  	gen7_emit_curbe_load(batch, curbe_buffer);
>  
>  	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
>  
> -	gen8_emit_media_objects_spin(batch);
> +	gen_emit_media_object(batch, xoffset, yoffset);
>  
>  	OUT_BATCH(MI_BATCH_BUFFER_END);
>  
> @@ -134,13 +146,14 @@ gen9_media_spinfunc(struct intel_batchbuffer *batch,
>  			GEN9_FORCE_MEDIA_AWAKE_MASK);
>  	gen9_emit_state_base_address(batch);
>  
> -	gen8_emit_vfe_state_spin(batch);
> +	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES,
> +			    MEDIA_URB_SIZE, MEDIA_CURBE_SIZE);
>  
>  	gen7_emit_curbe_load(batch, curbe_buffer);
>  
>  	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
>  
> -	gen8_emit_media_objects_spin(batch);
> +	gen_emit_media_object(batch, xoffset, yoffset);
>  
>  	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA |
>  			GEN9_FORCE_MEDIA_AWAKE_DISABLE |
> -- 
> 2.14.3
> 
> _______________________________________________
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> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
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Re: [igt-dev] [PATCH i-g-t v4 4/5] lib/gpu_fill: Further code unification in gpu_fill

[Daniele Ceraolo Spurio]

On 07/05/18 05:36, Katarzyna Dec wrote:
> We can unify gen7_emit_vfe_state and gen8_emit_vfe_state
> functions for gpgpu/media_fill and media_spin by adding
> parameters. gen8_emit_media_object was renamed to gen_*
> and extended with additional offset parameters - we can
> have one gen7_emit_media_objects for all tests.
> I have renamed gen8_emit_media_object to gen_emit_*, because
> function belongs to all gens and it would be odd to have
> all named genX_* and only one without this prefix.
> 
> v2: Use #defines instead of variables as emit_vfe_state parameters.
> Fixed gen7_emit_media_objects. Unified vfe state parameters
> in media_spin library for gen8 and gen9 (gen9 had different values
> by mistake).
> v3: Fixed bug in emit_vfe_state for gen8 and gen9 in gpgpu_fill.
> Moved #defines for emit_vfe_state to particular libraries.
> 
> Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
> Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

A couple of style nitpicks below, you can fix them if you need to re-spin.
BTW, this patch conflicts with the one to unify the media_fill files so 
you'll need to rebase one of the 2 series on top of the other.

Daniele

>   lib/gpgpu_fill.c      |  17 +++++--
>   lib/gpu_fill.c        | 126 +++++++++-----------------------------------------
>   lib/gpu_fill.h        |  21 ++++-----
>   lib/media_fill_gen7.c |   9 +++-
>   lib/media_fill_gen8.c |   8 +++-
>   lib/media_fill_gen9.c |   8 +++-
>   lib/media_spin.c      |  21 +++++++--
>   7 files changed, 83 insertions(+), 127 deletions(-)
> 
> diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
> index 52925a5c..9a2598bc 100644
> --- a/lib/gpgpu_fill.c
> +++ b/lib/gpgpu_fill.c
> @@ -95,6 +95,13 @@ static const uint32_t gen9_gpgpu_kernel[][4] = {
>    */
>   
>   #define BATCH_STATE_SPLIT 2048
> +/* VFE STATE params */
> +#define THREADS 1
> +#define GEN7_GPGPU_URB_ENTRIES 0
> +#define GEN8_GPGPU_URB_ENTRIES 1
> +#define GPGPU_URB_SIZE 0
> +#define GPGPU_CURBE_SIZE 1
> +#define GEN7_VFE_STATE_GPGPU_MODE 1
>   
>   void
>   gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
> @@ -129,7 +136,9 @@ gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>   	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU);
>   
>   	gen7_emit_state_base_address(batch);
> -	gen7_emit_vfe_state_gpgpu(batch);
> +	gen7_emit_vfe_state(batch, THREADS, GEN7_GPGPU_URB_ENTRIES,
> +			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE,
> +			    GEN7_VFE_STATE_GPGPU_MODE);
>   	gen7_emit_curbe_load(batch, curbe_buffer);
>   	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
>   	gen7_emit_gpgpu_walk(batch, x, y, width, height);
> @@ -176,7 +185,8 @@ gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>   	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU);
>   
>   	gen8_emit_state_base_address(batch);
> -	gen8_emit_vfe_state_gpgpu(batch);
> +	gen8_emit_vfe_state(batch, THREADS, GEN8_GPGPU_URB_ENTRIES,
> +			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE);
>   	gen7_emit_curbe_load(batch, curbe_buffer);
>   	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
>   	gen8_emit_gpgpu_walk(batch, x, y, width, height);
> @@ -224,7 +234,8 @@ gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>   		  PIPELINE_SELECT_GPGPU);
>   
>   	gen9_emit_state_base_address(batch);
> -	gen8_emit_vfe_state_gpgpu(batch);
> +	gen8_emit_vfe_state(batch, THREADS, GEN8_GPGPU_URB_ENTRIES,
> +			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE);
>   	gen7_emit_curbe_load(batch, curbe_buffer);
>   	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
>   	gen8_emit_gpgpu_walk(batch, x, y, width, height);
> diff --git a/lib/gpu_fill.c b/lib/gpu_fill.c
> index 24e03cf2..e8591648 100644
> --- a/lib/gpu_fill.c
> +++ b/lib/gpu_fill.c
> @@ -194,7 +194,9 @@ gen7_emit_state_base_address(struct intel_batchbuffer *batch)
>   }
>   
>   void
> -gen7_emit_vfe_state(struct intel_batchbuffer *batch)
> +gen7_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> +		    uint32_t urb_entries, uint32_t urb_size,
> +		    uint32_t curbe_size, uint32_t mode)
>   {
>   	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (8 - 2));
>   
> @@ -202,39 +204,15 @@ gen7_emit_vfe_state(struct intel_batchbuffer *batch)
>   	OUT_BATCH(0);
>   
>   	/* number of threads & urb entries */
> -	OUT_BATCH(1 << 16 |
> -		2 << 8);
> +	OUT_BATCH(threads << 16 |
> +		urb_entries << 8 |
> +		mode << 2); /* GPGPU vs media mode */
>   
>   	OUT_BATCH(0);
>   
>   	/* urb entry size & curbe size */
> -	OUT_BATCH(2 << 16 |	/* in 256 bits unit */
> -		  2);		/* in 256 bits unit */
> -
> -	/* scoreboard */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -}
> -
> -void
> -gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
> -{
> -	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (8 - 2));
> -
> -	/* scratch buffer */
> -	OUT_BATCH(0);
> -
> -	/* number of threads & urb entries */
> -	OUT_BATCH(1 << 16 | /* max num of threads */
> -		  0 << 8 | /* num of URB entry */
> -		  1 << 2); /* GPGPU mode */
> -
> -	OUT_BATCH(0);
> -
> -	/* urb entry size & curbe size */
> -	OUT_BATCH(0 << 16 |	/* URB entry size in 256 bits unit */
> -		  1);		/* CURBE entry size in 256 bits unit */
> +	OUT_BATCH(urb_size << 16 |	/* in 256 bits unit */
> +		  curbe_size);		/* in 256 bits unit */
>   
>   	/* scoreboard */
>   	OUT_BATCH(0);
> @@ -279,25 +257,7 @@ gen7_emit_media_objects(struct intel_batchbuffer *batch,
>   
>   	for (i = 0; i < width / 16; i++) {
>   		for (j = 0; j < height / 16; j++) {
> -			OUT_BATCH(GEN7_MEDIA_OBJECT | (8 - 2));
> -
> -			/* interface descriptor offset */
> -			OUT_BATCH(0);
> -
> -			/* without indirect data */
> -			OUT_BATCH(0);
> -			OUT_BATCH(0);
> -
> -			/* scoreboard */
> -			OUT_BATCH(0);
> -			OUT_BATCH(0);
> -
> -			/* inline data (xoffset, yoffset) */
> -			OUT_BATCH(x + i * 16);
> -			OUT_BATCH(y + j * 16);
> -			if (AT_LEAST_GEN(batch->devid, 8) &&
> -			    !IS_CHERRYVIEW(batch->devid))
> -				gen8_emit_media_state_flush(batch);
> +			gen_emit_media_object(batch, x + i*16, y + j*16);

Style nitpick: there should be spaces around the "*"

>   		}
>   	}
>   }
> @@ -505,32 +465,9 @@ gen8_emit_media_state_flush(struct intel_batchbuffer *batch)
>   }
>   
>   void
> -gen8_emit_vfe_state(struct intel_batchbuffer *batch)
> -{
> -	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (9 - 2));
> -
> -	/* scratch buffer */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -
> -	/* number of threads & urb entries */
> -	OUT_BATCH(1 << 16 |
> -		2 << 8);
> -
> -	OUT_BATCH(0);
> -
> -	/* urb entry size & curbe size */
> -	OUT_BATCH(2 << 16 |
> -		2);
> -
> -	/* scoreboard */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -}
> -
> -void
> -gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
> +gen8_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> +		    uint32_t urb_entries, uint32_t urb_size,
> +		    uint32_t curbe_size)
>   {
>   	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (9 - 2));
>   
> @@ -539,36 +476,14 @@ gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
>   	OUT_BATCH(0);
>   
>   	/* number of threads & urb entries */
> -	OUT_BATCH(1 << 16 | 1 << 8);
> -
> -	OUT_BATCH(0);
> -
> -	/* urb entry size & curbe size */
> -	OUT_BATCH(0 << 16 | 1);
> -
> -	/* scoreboard */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -}
> -
> -void
> -gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch)
> -{
> -	OUT_BATCH(GEN8_MEDIA_VFE_STATE | (9 - 2));
> -
> -	/* scratch buffer */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -
> -	/* number of threads & urb entries */
> -	OUT_BATCH(2 << 8);
> +	OUT_BATCH(threads << 16 |
> +		urb_entries << 8);
>   
>   	OUT_BATCH(0);
>   
>   	/* urb entry size & curbe size */
> -	OUT_BATCH(2 << 16 |
> -		2);
> +	OUT_BATCH(urb_size << 16 |
> +		curbe_size);
>   
>   	/* scoreboard */
>   	OUT_BATCH(0);
> @@ -637,9 +552,10 @@ gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
>   }
>   
>   void
> -gen8_emit_media_objects_spin(struct intel_batchbuffer *batch)
> +gen_emit_media_object(struct intel_batchbuffer *batch,
> +		       unsigned int xoffset, unsigned int yoffset)
>   {
> -	OUT_BATCH(GEN8_MEDIA_OBJECT | (8 - 2));
> +	OUT_BATCH(GEN7_MEDIA_OBJECT | (8 - 2));
>   
>   	/* interface descriptor offset */
>   	OUT_BATCH(0);
> @@ -653,8 +569,8 @@ gen8_emit_media_objects_spin(struct intel_batchbuffer *batch)
>   	OUT_BATCH(0);
>   
>   	/* inline data (xoffset, yoffset) */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> +	OUT_BATCH(xoffset);
> +	OUT_BATCH(yoffset);
>   	if (AT_LEAST_GEN(batch->devid, 8) && !IS_CHERRYVIEW(batch->devid))
>   		gen8_emit_media_state_flush(batch);
>   }
> diff --git a/lib/gpu_fill.h b/lib/gpu_fill.h
> index 1e4be4bb..cf90d706 100644
> --- a/lib/gpu_fill.h
> +++ b/lib/gpu_fill.h
> @@ -37,6 +37,7 @@
>   #include "intel_chipset.h"
>   #include <assert.h>
>   
> +

nitpick: this newline isn't really needed

>   void
>   gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end);
>   
> @@ -68,10 +69,9 @@ void
>   gen7_emit_state_base_address(struct intel_batchbuffer *batch);
>   
>   void
> -gen7_emit_vfe_state(struct intel_batchbuffer *batch);
> -
> -void
> -gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch);
> +gen7_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> +		    uint32_t urb_entries, uint32_t urb_size,
> +		    uint32_t curbe_size, uint32_t mode);
>   
>   void
>   gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer);
> @@ -112,13 +112,9 @@ void
>   gen8_emit_media_state_flush(struct intel_batchbuffer *batch);
>   
>   void
> -gen8_emit_vfe_state(struct intel_batchbuffer *batch);
> -
> -void
> -gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch);
> -
> -void
> -gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch);
> +gen8_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> +		    uint32_t urb_entries, uint32_t urb_size,
> +		    uint32_t curbe_size);
>   
>   void
>   gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
> @@ -126,7 +122,8 @@ gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
>   		     unsigned int width, unsigned int height);
>   
>   void
> -gen8_emit_media_objects_spin(struct intel_batchbuffer *batch);
> +gen_emit_media_object(struct intel_batchbuffer *batch, unsigned int xoffset,
> +		  unsigned int yoffset);
>   
>   void
>   gen9_emit_state_base_address(struct intel_batchbuffer *batch);
> diff --git a/lib/media_fill_gen7.c b/lib/media_fill_gen7.c
> index 3dc5617e..a38b8556 100644
> --- a/lib/media_fill_gen7.c
> +++ b/lib/media_fill_gen7.c
> @@ -43,6 +43,12 @@ static const uint32_t media_kernel[][4] = {
>    */
>   
>   #define BATCH_STATE_SPLIT 2048
> +/* VFE STATE params */
> +#define THREADS 1
> +#define MEDIA_URB_ENTRIES 2
> +#define MEDIA_URB_SIZE 2
> +#define MEDIA_CURBE_SIZE 2
> +#define GEN7_VFE_STATE_MEDIA_MODE 0
>   
>   void
>   gen7_media_fillfunc(struct intel_batchbuffer *batch,
> @@ -69,7 +75,8 @@ gen7_media_fillfunc(struct intel_batchbuffer *batch,
>   	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
>   	gen7_emit_state_base_address(batch);
>   
> -	gen7_emit_vfe_state(batch);
> +	gen7_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
> +			    MEDIA_CURBE_SIZE, GEN7_VFE_STATE_MEDIA_MODE);
>   
>   	gen7_emit_curbe_load(batch, curbe_buffer);
>   
> diff --git a/lib/media_fill_gen8.c b/lib/media_fill_gen8.c
> index 63fe72eb..fc89c7f0 100644
> --- a/lib/media_fill_gen8.c
> +++ b/lib/media_fill_gen8.c
> @@ -46,6 +46,11 @@ static const uint32_t media_kernel[][4] = {
>    */
>   
>   #define BATCH_STATE_SPLIT 2048
> +/* VFE STATE params */
> +#define THREADS 1
> +#define MEDIA_URB_ENTRIES 2
> +#define MEDIA_URB_SIZE 2
> +#define MEDIA_CURBE_SIZE 2
>   
>   void
>   gen8_media_fillfunc(struct intel_batchbuffer *batch,
> @@ -72,7 +77,8 @@ gen8_media_fillfunc(struct intel_batchbuffer *batch,
>   	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
>   	gen8_emit_state_base_address(batch);
>   
> -	gen8_emit_vfe_state(batch);
> +	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
> +			    MEDIA_CURBE_SIZE);
>   
>   	gen7_emit_curbe_load(batch, curbe_buffer);
>   
> diff --git a/lib/media_fill_gen9.c b/lib/media_fill_gen9.c
> index 78e892f2..805e7576 100644
> --- a/lib/media_fill_gen9.c
> +++ b/lib/media_fill_gen9.c
> @@ -43,6 +43,11 @@ static const uint32_t media_kernel[][4] = {
>    */
>   
>   #define BATCH_STATE_SPLIT 2048
> +/* VFE STATE params */
> +#define THREADS 1
> +#define MEDIA_URB_ENTRIES 2
> +#define MEDIA_URB_SIZE 2
> +#define MEDIA_CURBE_SIZE 2
>   
>   void
>   gen9_media_fillfunc(struct intel_batchbuffer *batch,
> @@ -74,7 +79,8 @@ gen9_media_fillfunc(struct intel_batchbuffer *batch,
>   			GEN9_FORCE_MEDIA_AWAKE_MASK);
>   	gen9_emit_state_base_address(batch);
>   
> -	gen8_emit_vfe_state(batch);
> +	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
> +			    MEDIA_CURBE_SIZE);
>   
>   	gen7_emit_curbe_load(batch, curbe_buffer);
>   
> diff --git a/lib/media_spin.c b/lib/media_spin.c
> index b323550a..f9b8dc0a 100644
> --- a/lib/media_spin.c
> +++ b/lib/media_spin.c
> @@ -67,6 +67,17 @@ static const uint32_t spin_kernel[][4] = {
>    */
>   
>   #define BATCH_STATE_SPLIT 2048
> +/* VFE STATE params */
> +#define THREADS 0
> +#define MEDIA_URB_ENTRIES 2
> +#define MEDIA_URB_SIZE 2
> +#define MEDIA_CURBE_SIZE 2
> +
> +/* Offsets needed in gen_emit_media_object. In media_spin library this
> + * values do not matter.
> + */
> +#define xoffset 0
> +#define yoffset 0
>   
>   void
>   gen8_media_spinfunc(struct intel_batchbuffer *batch,
> @@ -90,13 +101,14 @@ gen8_media_spinfunc(struct intel_batchbuffer *batch,
>   	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
>   	gen8_emit_state_base_address(batch);
>   
> -	gen8_emit_vfe_state_spin(batch);
> +	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES,
> +			    MEDIA_URB_SIZE, MEDIA_CURBE_SIZE);
>   
>   	gen7_emit_curbe_load(batch, curbe_buffer);
>   
>   	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
>   
> -	gen8_emit_media_objects_spin(batch);
> +	gen_emit_media_object(batch, xoffset, yoffset);
>   
>   	OUT_BATCH(MI_BATCH_BUFFER_END);
>   
> @@ -134,13 +146,14 @@ gen9_media_spinfunc(struct intel_batchbuffer *batch,
>   			GEN9_FORCE_MEDIA_AWAKE_MASK);
>   	gen9_emit_state_base_address(batch);
>   
> -	gen8_emit_vfe_state_spin(batch);
> +	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES,
> +			    MEDIA_URB_SIZE, MEDIA_CURBE_SIZE);
>   
>   	gen7_emit_curbe_load(batch, curbe_buffer);
>   
>   	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
>   
> -	gen8_emit_media_objects_spin(batch);
> +	gen_emit_media_object(batch, xoffset, yoffset);
>   
>   	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA |
>   			GEN9_FORCE_MEDIA_AWAKE_DISABLE |
> 
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Re: [igt-dev] [PATCH i-g-t v4 4/5] lib/gpu_fill: Further code unification in gpu_fill

[Katarzyna Dec]

On Thu, May 10, 2018 at 08:41:27AM -0700, Daniele Ceraolo Spurio wrote:
> 
> 
> On 07/05/18 05:36, Katarzyna Dec wrote:
> > We can unify gen7_emit_vfe_state and gen8_emit_vfe_state
> > functions for gpgpu/media_fill and media_spin by adding
> > parameters. gen8_emit_media_object was renamed to gen_*
> > and extended with additional offset parameters - we can
> > have one gen7_emit_media_objects for all tests.
> > I have renamed gen8_emit_media_object to gen_emit_*, because
> > function belongs to all gens and it would be odd to have
> > all named genX_* and only one without this prefix.
> > 
> > v2: Use #defines instead of variables as emit_vfe_state parameters.
> > Fixed gen7_emit_media_objects. Unified vfe state parameters
> > in media_spin library for gen8 and gen9 (gen9 had different values
> > by mistake).
> > v3: Fixed bug in emit_vfe_state for gen8 and gen9 in gpgpu_fill.
> > Moved #defines for emit_vfe_state to particular libraries.
> > 
> > Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
> > Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> > Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> > ---
> 
> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> 
> A couple of style nitpicks below, you can fix them if you need to re-spin.
> BTW, this patch conflicts with the one to unify the media_fill files so
> you'll need to rebase one of the 2 series on top of the other.
> 
> Daniele
>
Thanks! I applied style nitpicks as well to new version.

Kasia :)

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[igt-dev] [PATCH i-g-t v5 4/5] lib/gpu_fill: Further code unification in gpu_fill

[Katarzyna Dec]

We can unify gen7_emit_vfe_state and gen8_emit_vfe_state
functions for gpgpu/media_fill and media_spin by adding
parameters. gen8_emit_media_object was renamed to gen_*
and extended with additional offset parameters - we can
have one gen7_emit_media_objects for all tests.
I have renamed gen8_emit_media_object to gen_emit_*, because
function belongs to all gens and it would be odd to have
all named genX_* and only one without this prefix.

v2: Use #defines instead of variables as emit_vfe_state parameters.
Fixed gen7_emit_media_objects. Unified vfe state parameters
in media_spin library for gen8 and gen9 (gen9 had different values
by mistake).
v3: Fixed bug in emit_vfe_state for gen8 and gen9 in gpgpu_fill.
Moved #defines for emit_vfe_state to particular libraries.
v4: Fixed indentations in media_spin
v4: Few more style changes.

Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Ewelina Musial <ewelina.musial@intel.com>
---
 lib/gpgpu_fill.c      |  17 +++++--
 lib/gpu_fill.c        | 126 +++++++++-----------------------------------------
 lib/gpu_fill.h        |  20 ++++----
 lib/media_fill_gen7.c |   9 +++-
 lib/media_fill_gen8.c |   8 +++-
 lib/media_fill_gen9.c |   8 +++-
 lib/media_spin.c      |  21 +++++++--
 7 files changed, 82 insertions(+), 127 deletions(-)

diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
index 52925a5c..9a2598bc 100644
--- a/lib/gpgpu_fill.c
+++ b/lib/gpgpu_fill.c
@@ -95,6 +95,13 @@ static const uint32_t gen9_gpgpu_kernel[][4] = {
  */
 
 #define BATCH_STATE_SPLIT 2048
+/* VFE STATE params */
+#define THREADS 1
+#define GEN7_GPGPU_URB_ENTRIES 0
+#define GEN8_GPGPU_URB_ENTRIES 1
+#define GPGPU_URB_SIZE 0
+#define GPGPU_CURBE_SIZE 1
+#define GEN7_VFE_STATE_GPGPU_MODE 1
 
 void
 gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
@@ -129,7 +136,9 @@ gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
 	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU);
 
 	gen7_emit_state_base_address(batch);
-	gen7_emit_vfe_state_gpgpu(batch);
+	gen7_emit_vfe_state(batch, THREADS, GEN7_GPGPU_URB_ENTRIES,
+			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE,
+			    GEN7_VFE_STATE_GPGPU_MODE);
 	gen7_emit_curbe_load(batch, curbe_buffer);
 	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
 	gen7_emit_gpgpu_walk(batch, x, y, width, height);
@@ -176,7 +185,8 @@ gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch,
 	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU);
 
 	gen8_emit_state_base_address(batch);
-	gen8_emit_vfe_state_gpgpu(batch);
+	gen8_emit_vfe_state(batch, THREADS, GEN8_GPGPU_URB_ENTRIES,
+			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE);
 	gen7_emit_curbe_load(batch, curbe_buffer);
 	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
 	gen8_emit_gpgpu_walk(batch, x, y, width, height);
@@ -224,7 +234,8 @@ gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch,
 		  PIPELINE_SELECT_GPGPU);
 
 	gen9_emit_state_base_address(batch);
-	gen8_emit_vfe_state_gpgpu(batch);
+	gen8_emit_vfe_state(batch, THREADS, GEN8_GPGPU_URB_ENTRIES,
+			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE);
 	gen7_emit_curbe_load(batch, curbe_buffer);
 	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
 	gen8_emit_gpgpu_walk(batch, x, y, width, height);
diff --git a/lib/gpu_fill.c b/lib/gpu_fill.c
index 24e03cf2..21791360 100644
--- a/lib/gpu_fill.c
+++ b/lib/gpu_fill.c
@@ -194,7 +194,9 @@ gen7_emit_state_base_address(struct intel_batchbuffer *batch)
 }
 
 void
-gen7_emit_vfe_state(struct intel_batchbuffer *batch)
+gen7_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
+		    uint32_t urb_entries, uint32_t urb_size,
+		    uint32_t curbe_size, uint32_t mode)
 {
 	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (8 - 2));
 
@@ -202,39 +204,15 @@ gen7_emit_vfe_state(struct intel_batchbuffer *batch)
 	OUT_BATCH(0);
 
 	/* number of threads & urb entries */
-	OUT_BATCH(1 << 16 |
-		2 << 8);
+	OUT_BATCH(threads << 16 |
+		urb_entries << 8 |
+		mode << 2); /* GPGPU vs media mode */
 
 	OUT_BATCH(0);
 
 	/* urb entry size & curbe size */
-	OUT_BATCH(2 << 16 |	/* in 256 bits unit */
-		  2);		/* in 256 bits unit */
-
-	/* scoreboard */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-}
-
-void
-gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
-{
-	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (8 - 2));
-
-	/* scratch buffer */
-	OUT_BATCH(0);
-
-	/* number of threads & urb entries */
-	OUT_BATCH(1 << 16 | /* max num of threads */
-		  0 << 8 | /* num of URB entry */
-		  1 << 2); /* GPGPU mode */
-
-	OUT_BATCH(0);
-
-	/* urb entry size & curbe size */
-	OUT_BATCH(0 << 16 |	/* URB entry size in 256 bits unit */
-		  1);		/* CURBE entry size in 256 bits unit */
+	OUT_BATCH(urb_size << 16 |	/* in 256 bits unit */
+		  curbe_size);		/* in 256 bits unit */
 
 	/* scoreboard */
 	OUT_BATCH(0);
@@ -279,25 +257,7 @@ gen7_emit_media_objects(struct intel_batchbuffer *batch,
 
 	for (i = 0; i < width / 16; i++) {
 		for (j = 0; j < height / 16; j++) {
-			OUT_BATCH(GEN7_MEDIA_OBJECT | (8 - 2));
-
-			/* interface descriptor offset */
-			OUT_BATCH(0);
-
-			/* without indirect data */
-			OUT_BATCH(0);
-			OUT_BATCH(0);
-
-			/* scoreboard */
-			OUT_BATCH(0);
-			OUT_BATCH(0);
-
-			/* inline data (xoffset, yoffset) */
-			OUT_BATCH(x + i * 16);
-			OUT_BATCH(y + j * 16);
-			if (AT_LEAST_GEN(batch->devid, 8) &&
-			    !IS_CHERRYVIEW(batch->devid))
-				gen8_emit_media_state_flush(batch);
+			gen_emit_media_object(batch, x + i * 16, y + j * 16);
 		}
 	}
 }
@@ -505,32 +465,9 @@ gen8_emit_media_state_flush(struct intel_batchbuffer *batch)
 }
 
 void
-gen8_emit_vfe_state(struct intel_batchbuffer *batch)
-{
-	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (9 - 2));
-
-	/* scratch buffer */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-
-	/* number of threads & urb entries */
-	OUT_BATCH(1 << 16 |
-		2 << 8);
-
-	OUT_BATCH(0);
-
-	/* urb entry size & curbe size */
-	OUT_BATCH(2 << 16 |
-		2);
-
-	/* scoreboard */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-}
-
-void
-gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
+gen8_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
+		    uint32_t urb_entries, uint32_t urb_size,
+		    uint32_t curbe_size)
 {
 	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (9 - 2));
 
@@ -539,36 +476,14 @@ gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
 	OUT_BATCH(0);
 
 	/* number of threads & urb entries */
-	OUT_BATCH(1 << 16 | 1 << 8);
-
-	OUT_BATCH(0);
-
-	/* urb entry size & curbe size */
-	OUT_BATCH(0 << 16 | 1);
-
-	/* scoreboard */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-}
-
-void
-gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch)
-{
-	OUT_BATCH(GEN8_MEDIA_VFE_STATE | (9 - 2));
-
-	/* scratch buffer */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-
-	/* number of threads & urb entries */
-	OUT_BATCH(2 << 8);
+	OUT_BATCH(threads << 16 |
+		urb_entries << 8);
 
 	OUT_BATCH(0);
 
 	/* urb entry size & curbe size */
-	OUT_BATCH(2 << 16 |
-		2);
+	OUT_BATCH(urb_size << 16 |
+		curbe_size);
 
 	/* scoreboard */
 	OUT_BATCH(0);
@@ -637,9 +552,10 @@ gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
 }
 
 void
-gen8_emit_media_objects_spin(struct intel_batchbuffer *batch)
+gen_emit_media_object(struct intel_batchbuffer *batch,
+		       unsigned int xoffset, unsigned int yoffset)
 {
-	OUT_BATCH(GEN8_MEDIA_OBJECT | (8 - 2));
+	OUT_BATCH(GEN7_MEDIA_OBJECT | (8 - 2));
 
 	/* interface descriptor offset */
 	OUT_BATCH(0);
@@ -653,8 +569,8 @@ gen8_emit_media_objects_spin(struct intel_batchbuffer *batch)
 	OUT_BATCH(0);
 
 	/* inline data (xoffset, yoffset) */
-	OUT_BATCH(0);
-	OUT_BATCH(0);
+	OUT_BATCH(xoffset);
+	OUT_BATCH(yoffset);
 	if (AT_LEAST_GEN(batch->devid, 8) && !IS_CHERRYVIEW(batch->devid))
 		gen8_emit_media_state_flush(batch);
 }
diff --git a/lib/gpu_fill.h b/lib/gpu_fill.h
index 1e4be4bb..d41e6ddb 100644
--- a/lib/gpu_fill.h
+++ b/lib/gpu_fill.h
@@ -68,10 +68,9 @@ void
 gen7_emit_state_base_address(struct intel_batchbuffer *batch);
 
 void
-gen7_emit_vfe_state(struct intel_batchbuffer *batch);
-
-void
-gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch);
+gen7_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
+		    uint32_t urb_entries, uint32_t urb_size,
+		    uint32_t curbe_size, uint32_t mode);
 
 void
 gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer);
@@ -112,13 +111,9 @@ void
 gen8_emit_media_state_flush(struct intel_batchbuffer *batch);
 
 void
-gen8_emit_vfe_state(struct intel_batchbuffer *batch);
-
-void
-gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch);
-
-void
-gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch);
+gen8_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
+		    uint32_t urb_entries, uint32_t urb_size,
+		    uint32_t curbe_size);
 
 void
 gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
@@ -126,7 +121,8 @@ gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
 		     unsigned int width, unsigned int height);
 
 void
-gen8_emit_media_objects_spin(struct intel_batchbuffer *batch);
+gen_emit_media_object(struct intel_batchbuffer *batch, unsigned int xoffset,
+		  unsigned int yoffset);
 
 void
 gen9_emit_state_base_address(struct intel_batchbuffer *batch);
diff --git a/lib/media_fill_gen7.c b/lib/media_fill_gen7.c
index 3dc5617e..a38b8556 100644
--- a/lib/media_fill_gen7.c
+++ b/lib/media_fill_gen7.c
@@ -43,6 +43,12 @@ static const uint32_t media_kernel[][4] = {
  */
 
 #define BATCH_STATE_SPLIT 2048
+/* VFE STATE params */
+#define THREADS 1
+#define MEDIA_URB_ENTRIES 2
+#define MEDIA_URB_SIZE 2
+#define MEDIA_CURBE_SIZE 2
+#define GEN7_VFE_STATE_MEDIA_MODE 0
 
 void
 gen7_media_fillfunc(struct intel_batchbuffer *batch,
@@ -69,7 +75,8 @@ gen7_media_fillfunc(struct intel_batchbuffer *batch,
 	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
 	gen7_emit_state_base_address(batch);
 
-	gen7_emit_vfe_state(batch);
+	gen7_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
+			    MEDIA_CURBE_SIZE, GEN7_VFE_STATE_MEDIA_MODE);
 
 	gen7_emit_curbe_load(batch, curbe_buffer);
 
diff --git a/lib/media_fill_gen8.c b/lib/media_fill_gen8.c
index 63fe72eb..fc89c7f0 100644
--- a/lib/media_fill_gen8.c
+++ b/lib/media_fill_gen8.c
@@ -46,6 +46,11 @@ static const uint32_t media_kernel[][4] = {
  */
 
 #define BATCH_STATE_SPLIT 2048
+/* VFE STATE params */
+#define THREADS 1
+#define MEDIA_URB_ENTRIES 2
+#define MEDIA_URB_SIZE 2
+#define MEDIA_CURBE_SIZE 2
 
 void
 gen8_media_fillfunc(struct intel_batchbuffer *batch,
@@ -72,7 +77,8 @@ gen8_media_fillfunc(struct intel_batchbuffer *batch,
 	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
 	gen8_emit_state_base_address(batch);
 
-	gen8_emit_vfe_state(batch);
+	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
+			    MEDIA_CURBE_SIZE);
 
 	gen7_emit_curbe_load(batch, curbe_buffer);
 
diff --git a/lib/media_fill_gen9.c b/lib/media_fill_gen9.c
index 78e892f2..805e7576 100644
--- a/lib/media_fill_gen9.c
+++ b/lib/media_fill_gen9.c
@@ -43,6 +43,11 @@ static const uint32_t media_kernel[][4] = {
  */
 
 #define BATCH_STATE_SPLIT 2048
+/* VFE STATE params */
+#define THREADS 1
+#define MEDIA_URB_ENTRIES 2
+#define MEDIA_URB_SIZE 2
+#define MEDIA_CURBE_SIZE 2
 
 void
 gen9_media_fillfunc(struct intel_batchbuffer *batch,
@@ -74,7 +79,8 @@ gen9_media_fillfunc(struct intel_batchbuffer *batch,
 			GEN9_FORCE_MEDIA_AWAKE_MASK);
 	gen9_emit_state_base_address(batch);
 
-	gen8_emit_vfe_state(batch);
+	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
+			    MEDIA_CURBE_SIZE);
 
 	gen7_emit_curbe_load(batch, curbe_buffer);
 
diff --git a/lib/media_spin.c b/lib/media_spin.c
index 3592e0d9..c3a8d572 100644
--- a/lib/media_spin.c
+++ b/lib/media_spin.c
@@ -67,6 +67,17 @@ static const uint32_t spin_kernel[][4] = {
  */
 
 #define BATCH_STATE_SPLIT 2048
+/* VFE STATE params */
+#define THREADS 0
+#define MEDIA_URB_ENTRIES 2
+#define MEDIA_URB_SIZE 2
+#define MEDIA_CURBE_SIZE 2
+
+/* Offsets needed in gen_emit_media_object. In media_spin library this
+ * values do not matter.
+ */
+#define xoffset 0
+#define yoffset 0
 
 void
 gen8_media_spinfunc(struct intel_batchbuffer *batch,
@@ -90,13 +101,14 @@ gen8_media_spinfunc(struct intel_batchbuffer *batch,
 	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
 	gen8_emit_state_base_address(batch);
 
-	gen8_emit_vfe_state_spin(batch);
+	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES,
+			    MEDIA_URB_SIZE, MEDIA_CURBE_SIZE);
 
 	gen7_emit_curbe_load(batch, curbe_buffer);
 
 	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
 
-	gen8_emit_media_objects_spin(batch);
+	gen_emit_media_object(batch, xoffset, yoffset);
 
 	OUT_BATCH(MI_BATCH_BUFFER_END);
 
@@ -134,13 +146,14 @@ gen9_media_spinfunc(struct intel_batchbuffer *batch,
 		  GEN9_FORCE_MEDIA_AWAKE_MASK);
 	gen9_emit_state_base_address(batch);
 
-	gen8_emit_vfe_state_spin(batch);
+	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES,
+			    MEDIA_URB_SIZE, MEDIA_CURBE_SIZE);
 
 	gen7_emit_curbe_load(batch, curbe_buffer);
 
 	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
 
-	gen8_emit_media_objects_spin(batch);
+	gen_emit_media_object(batch, xoffset, yoffset);
 
 	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA |
 		  GEN9_FORCE_MEDIA_AWAKE_DISABLE |
-- 
2.14.3

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

Re: [igt-dev] [PATCH i-g-t v5 4/5] lib/gpu_fill: Further code unification in gpu_fill

[Ewelina Musial]

LGTM
Reviewed-By: Ewelina Musial <ewelina.musial@intel.com>

On Fri, May 11, 2018 at 08:46:29AM +0200, Katarzyna Dec wrote:
> We can unify gen7_emit_vfe_state and gen8_emit_vfe_state
> functions for gpgpu/media_fill and media_spin by adding
> parameters. gen8_emit_media_object was renamed to gen_*
> and extended with additional offset parameters - we can
> have one gen7_emit_media_objects for all tests.
> I have renamed gen8_emit_media_object to gen_emit_*, because
> function belongs to all gens and it would be odd to have
> all named genX_* and only one without this prefix.
> 
> v2: Use #defines instead of variables as emit_vfe_state parameters.
> Fixed gen7_emit_media_objects. Unified vfe state parameters
> in media_spin library for gen8 and gen9 (gen9 had different values
> by mistake).
> v3: Fixed bug in emit_vfe_state for gen8 and gen9 in gpgpu_fill.
> Moved #defines for emit_vfe_state to particular libraries.
> v4: Fixed indentations in media_spin
> v4: Few more style changes.
> 
> Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
> Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Ewelina Musial <ewelina.musial@intel.com>
> ---
>  lib/gpgpu_fill.c      |  17 +++++--
>  lib/gpu_fill.c        | 126 +++++++++-----------------------------------------
>  lib/gpu_fill.h        |  20 ++++----
>  lib/media_fill_gen7.c |   9 +++-
>  lib/media_fill_gen8.c |   8 +++-
>  lib/media_fill_gen9.c |   8 +++-
>  lib/media_spin.c      |  21 +++++++--
>  7 files changed, 82 insertions(+), 127 deletions(-)
> 
> diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
> index 52925a5c..9a2598bc 100644
> --- a/lib/gpgpu_fill.c
> +++ b/lib/gpgpu_fill.c
> @@ -95,6 +95,13 @@ static const uint32_t gen9_gpgpu_kernel[][4] = {
>   */
>  
>  #define BATCH_STATE_SPLIT 2048
> +/* VFE STATE params */
> +#define THREADS 1
> +#define GEN7_GPGPU_URB_ENTRIES 0
> +#define GEN8_GPGPU_URB_ENTRIES 1
> +#define GPGPU_URB_SIZE 0
> +#define GPGPU_CURBE_SIZE 1
> +#define GEN7_VFE_STATE_GPGPU_MODE 1
>  
>  void
>  gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
> @@ -129,7 +136,9 @@ gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>  	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU);
>  
>  	gen7_emit_state_base_address(batch);
> -	gen7_emit_vfe_state_gpgpu(batch);
> +	gen7_emit_vfe_state(batch, THREADS, GEN7_GPGPU_URB_ENTRIES,
> +			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE,
> +			    GEN7_VFE_STATE_GPGPU_MODE);
>  	gen7_emit_curbe_load(batch, curbe_buffer);
>  	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
>  	gen7_emit_gpgpu_walk(batch, x, y, width, height);
> @@ -176,7 +185,8 @@ gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>  	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU);
>  
>  	gen8_emit_state_base_address(batch);
> -	gen8_emit_vfe_state_gpgpu(batch);
> +	gen8_emit_vfe_state(batch, THREADS, GEN8_GPGPU_URB_ENTRIES,
> +			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE);
>  	gen7_emit_curbe_load(batch, curbe_buffer);
>  	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
>  	gen8_emit_gpgpu_walk(batch, x, y, width, height);
> @@ -224,7 +234,8 @@ gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch,
>  		  PIPELINE_SELECT_GPGPU);
>  
>  	gen9_emit_state_base_address(batch);
> -	gen8_emit_vfe_state_gpgpu(batch);
> +	gen8_emit_vfe_state(batch, THREADS, GEN8_GPGPU_URB_ENTRIES,
> +			    GPGPU_URB_SIZE, GPGPU_CURBE_SIZE);
>  	gen7_emit_curbe_load(batch, curbe_buffer);
>  	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
>  	gen8_emit_gpgpu_walk(batch, x, y, width, height);
> diff --git a/lib/gpu_fill.c b/lib/gpu_fill.c
> index 24e03cf2..21791360 100644
> --- a/lib/gpu_fill.c
> +++ b/lib/gpu_fill.c
> @@ -194,7 +194,9 @@ gen7_emit_state_base_address(struct intel_batchbuffer *batch)
>  }
>  
>  void
> -gen7_emit_vfe_state(struct intel_batchbuffer *batch)
> +gen7_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> +		    uint32_t urb_entries, uint32_t urb_size,
> +		    uint32_t curbe_size, uint32_t mode)
>  {
>  	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (8 - 2));
>  
> @@ -202,39 +204,15 @@ gen7_emit_vfe_state(struct intel_batchbuffer *batch)
>  	OUT_BATCH(0);
>  
>  	/* number of threads & urb entries */
> -	OUT_BATCH(1 << 16 |
> -		2 << 8);
> +	OUT_BATCH(threads << 16 |
> +		urb_entries << 8 |
> +		mode << 2); /* GPGPU vs media mode */
>  
>  	OUT_BATCH(0);
>  
>  	/* urb entry size & curbe size */
> -	OUT_BATCH(2 << 16 |	/* in 256 bits unit */
> -		  2);		/* in 256 bits unit */
> -
> -	/* scoreboard */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -}
> -
> -void
> -gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
> -{
> -	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (8 - 2));
> -
> -	/* scratch buffer */
> -	OUT_BATCH(0);
> -
> -	/* number of threads & urb entries */
> -	OUT_BATCH(1 << 16 | /* max num of threads */
> -		  0 << 8 | /* num of URB entry */
> -		  1 << 2); /* GPGPU mode */
> -
> -	OUT_BATCH(0);
> -
> -	/* urb entry size & curbe size */
> -	OUT_BATCH(0 << 16 |	/* URB entry size in 256 bits unit */
> -		  1);		/* CURBE entry size in 256 bits unit */
> +	OUT_BATCH(urb_size << 16 |	/* in 256 bits unit */
> +		  curbe_size);		/* in 256 bits unit */
>  
>  	/* scoreboard */
>  	OUT_BATCH(0);
> @@ -279,25 +257,7 @@ gen7_emit_media_objects(struct intel_batchbuffer *batch,
>  
>  	for (i = 0; i < width / 16; i++) {
>  		for (j = 0; j < height / 16; j++) {
> -			OUT_BATCH(GEN7_MEDIA_OBJECT | (8 - 2));
> -
> -			/* interface descriptor offset */
> -			OUT_BATCH(0);
> -
> -			/* without indirect data */
> -			OUT_BATCH(0);
> -			OUT_BATCH(0);
> -
> -			/* scoreboard */
> -			OUT_BATCH(0);
> -			OUT_BATCH(0);
> -
> -			/* inline data (xoffset, yoffset) */
> -			OUT_BATCH(x + i * 16);
> -			OUT_BATCH(y + j * 16);
> -			if (AT_LEAST_GEN(batch->devid, 8) &&
> -			    !IS_CHERRYVIEW(batch->devid))
> -				gen8_emit_media_state_flush(batch);
> +			gen_emit_media_object(batch, x + i * 16, y + j * 16);
>  		}
>  	}
>  }
> @@ -505,32 +465,9 @@ gen8_emit_media_state_flush(struct intel_batchbuffer *batch)
>  }
>  
>  void
> -gen8_emit_vfe_state(struct intel_batchbuffer *batch)
> -{
> -	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (9 - 2));
> -
> -	/* scratch buffer */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -
> -	/* number of threads & urb entries */
> -	OUT_BATCH(1 << 16 |
> -		2 << 8);
> -
> -	OUT_BATCH(0);
> -
> -	/* urb entry size & curbe size */
> -	OUT_BATCH(2 << 16 |
> -		2);
> -
> -	/* scoreboard */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -}
> -
> -void
> -gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
> +gen8_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> +		    uint32_t urb_entries, uint32_t urb_size,
> +		    uint32_t curbe_size)
>  {
>  	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (9 - 2));
>  
> @@ -539,36 +476,14 @@ gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch)
>  	OUT_BATCH(0);
>  
>  	/* number of threads & urb entries */
> -	OUT_BATCH(1 << 16 | 1 << 8);
> -
> -	OUT_BATCH(0);
> -
> -	/* urb entry size & curbe size */
> -	OUT_BATCH(0 << 16 | 1);
> -
> -	/* scoreboard */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -}
> -
> -void
> -gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch)
> -{
> -	OUT_BATCH(GEN8_MEDIA_VFE_STATE | (9 - 2));
> -
> -	/* scratch buffer */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> -
> -	/* number of threads & urb entries */
> -	OUT_BATCH(2 << 8);
> +	OUT_BATCH(threads << 16 |
> +		urb_entries << 8);
>  
>  	OUT_BATCH(0);
>  
>  	/* urb entry size & curbe size */
> -	OUT_BATCH(2 << 16 |
> -		2);
> +	OUT_BATCH(urb_size << 16 |
> +		curbe_size);
>  
>  	/* scoreboard */
>  	OUT_BATCH(0);
> @@ -637,9 +552,10 @@ gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
>  }
>  
>  void
> -gen8_emit_media_objects_spin(struct intel_batchbuffer *batch)
> +gen_emit_media_object(struct intel_batchbuffer *batch,
> +		       unsigned int xoffset, unsigned int yoffset)
>  {
> -	OUT_BATCH(GEN8_MEDIA_OBJECT | (8 - 2));
> +	OUT_BATCH(GEN7_MEDIA_OBJECT | (8 - 2));
>  
>  	/* interface descriptor offset */
>  	OUT_BATCH(0);
> @@ -653,8 +569,8 @@ gen8_emit_media_objects_spin(struct intel_batchbuffer *batch)
>  	OUT_BATCH(0);
>  
>  	/* inline data (xoffset, yoffset) */
> -	OUT_BATCH(0);
> -	OUT_BATCH(0);
> +	OUT_BATCH(xoffset);
> +	OUT_BATCH(yoffset);
>  	if (AT_LEAST_GEN(batch->devid, 8) && !IS_CHERRYVIEW(batch->devid))
>  		gen8_emit_media_state_flush(batch);
>  }
> diff --git a/lib/gpu_fill.h b/lib/gpu_fill.h
> index 1e4be4bb..d41e6ddb 100644
> --- a/lib/gpu_fill.h
> +++ b/lib/gpu_fill.h
> @@ -68,10 +68,9 @@ void
>  gen7_emit_state_base_address(struct intel_batchbuffer *batch);
>  
>  void
> -gen7_emit_vfe_state(struct intel_batchbuffer *batch);
> -
> -void
> -gen7_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch);
> +gen7_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> +		    uint32_t urb_entries, uint32_t urb_size,
> +		    uint32_t curbe_size, uint32_t mode);
>  
>  void
>  gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer);
> @@ -112,13 +111,9 @@ void
>  gen8_emit_media_state_flush(struct intel_batchbuffer *batch);
>  
>  void
> -gen8_emit_vfe_state(struct intel_batchbuffer *batch);
> -
> -void
> -gen8_emit_vfe_state_gpgpu(struct intel_batchbuffer *batch);
> -
> -void
> -gen8_emit_vfe_state_spin(struct intel_batchbuffer *batch);
> +gen8_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
> +		    uint32_t urb_entries, uint32_t urb_size,
> +		    uint32_t curbe_size);
>  
>  void
>  gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
> @@ -126,7 +121,8 @@ gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
>  		     unsigned int width, unsigned int height);
>  
>  void
> -gen8_emit_media_objects_spin(struct intel_batchbuffer *batch);
> +gen_emit_media_object(struct intel_batchbuffer *batch, unsigned int xoffset,
> +		  unsigned int yoffset);
>  
>  void
>  gen9_emit_state_base_address(struct intel_batchbuffer *batch);
> diff --git a/lib/media_fill_gen7.c b/lib/media_fill_gen7.c
> index 3dc5617e..a38b8556 100644
> --- a/lib/media_fill_gen7.c
> +++ b/lib/media_fill_gen7.c
> @@ -43,6 +43,12 @@ static const uint32_t media_kernel[][4] = {
>   */
>  
>  #define BATCH_STATE_SPLIT 2048
> +/* VFE STATE params */
> +#define THREADS 1
> +#define MEDIA_URB_ENTRIES 2
> +#define MEDIA_URB_SIZE 2
> +#define MEDIA_CURBE_SIZE 2
> +#define GEN7_VFE_STATE_MEDIA_MODE 0
>  
>  void
>  gen7_media_fillfunc(struct intel_batchbuffer *batch,
> @@ -69,7 +75,8 @@ gen7_media_fillfunc(struct intel_batchbuffer *batch,
>  	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
>  	gen7_emit_state_base_address(batch);
>  
> -	gen7_emit_vfe_state(batch);
> +	gen7_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
> +			    MEDIA_CURBE_SIZE, GEN7_VFE_STATE_MEDIA_MODE);
>  
>  	gen7_emit_curbe_load(batch, curbe_buffer);
>  
> diff --git a/lib/media_fill_gen8.c b/lib/media_fill_gen8.c
> index 63fe72eb..fc89c7f0 100644
> --- a/lib/media_fill_gen8.c
> +++ b/lib/media_fill_gen8.c
> @@ -46,6 +46,11 @@ static const uint32_t media_kernel[][4] = {
>   */
>  
>  #define BATCH_STATE_SPLIT 2048
> +/* VFE STATE params */
> +#define THREADS 1
> +#define MEDIA_URB_ENTRIES 2
> +#define MEDIA_URB_SIZE 2
> +#define MEDIA_CURBE_SIZE 2
>  
>  void
>  gen8_media_fillfunc(struct intel_batchbuffer *batch,
> @@ -72,7 +77,8 @@ gen8_media_fillfunc(struct intel_batchbuffer *batch,
>  	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
>  	gen8_emit_state_base_address(batch);
>  
> -	gen8_emit_vfe_state(batch);
> +	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
> +			    MEDIA_CURBE_SIZE);
>  
>  	gen7_emit_curbe_load(batch, curbe_buffer);
>  
> diff --git a/lib/media_fill_gen9.c b/lib/media_fill_gen9.c
> index 78e892f2..805e7576 100644
> --- a/lib/media_fill_gen9.c
> +++ b/lib/media_fill_gen9.c
> @@ -43,6 +43,11 @@ static const uint32_t media_kernel[][4] = {
>   */
>  
>  #define BATCH_STATE_SPLIT 2048
> +/* VFE STATE params */
> +#define THREADS 1
> +#define MEDIA_URB_ENTRIES 2
> +#define MEDIA_URB_SIZE 2
> +#define MEDIA_CURBE_SIZE 2
>  
>  void
>  gen9_media_fillfunc(struct intel_batchbuffer *batch,
> @@ -74,7 +79,8 @@ gen9_media_fillfunc(struct intel_batchbuffer *batch,
>  			GEN9_FORCE_MEDIA_AWAKE_MASK);
>  	gen9_emit_state_base_address(batch);
>  
> -	gen8_emit_vfe_state(batch);
> +	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES, MEDIA_URB_SIZE,
> +			    MEDIA_CURBE_SIZE);
>  
>  	gen7_emit_curbe_load(batch, curbe_buffer);
>  
> diff --git a/lib/media_spin.c b/lib/media_spin.c
> index 3592e0d9..c3a8d572 100644
> --- a/lib/media_spin.c
> +++ b/lib/media_spin.c
> @@ -67,6 +67,17 @@ static const uint32_t spin_kernel[][4] = {
>   */
>  
>  #define BATCH_STATE_SPLIT 2048
> +/* VFE STATE params */
> +#define THREADS 0
> +#define MEDIA_URB_ENTRIES 2
> +#define MEDIA_URB_SIZE 2
> +#define MEDIA_CURBE_SIZE 2
> +
> +/* Offsets needed in gen_emit_media_object. In media_spin library this
> + * values do not matter.
> + */
> +#define xoffset 0
> +#define yoffset 0
>  
>  void
>  gen8_media_spinfunc(struct intel_batchbuffer *batch,
> @@ -90,13 +101,14 @@ gen8_media_spinfunc(struct intel_batchbuffer *batch,
>  	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
>  	gen8_emit_state_base_address(batch);
>  
> -	gen8_emit_vfe_state_spin(batch);
> +	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES,
> +			    MEDIA_URB_SIZE, MEDIA_CURBE_SIZE);
>  
>  	gen7_emit_curbe_load(batch, curbe_buffer);
>  
>  	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
>  
> -	gen8_emit_media_objects_spin(batch);
> +	gen_emit_media_object(batch, xoffset, yoffset);
>  
>  	OUT_BATCH(MI_BATCH_BUFFER_END);
>  
> @@ -134,13 +146,14 @@ gen9_media_spinfunc(struct intel_batchbuffer *batch,
>  		  GEN9_FORCE_MEDIA_AWAKE_MASK);
>  	gen9_emit_state_base_address(batch);
>  
> -	gen8_emit_vfe_state_spin(batch);
> +	gen8_emit_vfe_state(batch, THREADS, MEDIA_URB_ENTRIES,
> +			    MEDIA_URB_SIZE, MEDIA_CURBE_SIZE);
>  
>  	gen7_emit_curbe_load(batch, curbe_buffer);
>  
>  	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
>  
> -	gen8_emit_media_objects_spin(batch);
> +	gen_emit_media_object(batch, xoffset, yoffset);
>  
>  	OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA |
>  		  GEN9_FORCE_MEDIA_AWAKE_DISABLE |
> -- 
> 2.14.3
> 
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[igt-dev] [PATCH i-g-t v3 5/5] lib: Rename library from gpu_fill to gpu_cmds

[Katarzyna Dec]

After refactoring media_spin library - gpu_fill contains helper
functions for render copy, *_fill functions and media_spin.
Let's rename this library to gpu_cmds. This name will be more
general.
v2: changed name from gpu_helpers to gpu_cmds

Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 lib/Makefile.sources           | 4 ++--
 lib/gpgpu_fill.c               | 2 +-
 lib/{gpu_fill.c => gpu_cmds.c} | 2 +-
 lib/{gpu_fill.h => gpu_cmds.h} | 6 +++---
 lib/media_fill_gen7.c          | 2 +-
 lib/media_fill_gen8.c          | 2 +-
 lib/media_fill_gen9.c          | 2 +-
 lib/media_spin.c               | 2 +-
 lib/meson.build                | 2 +-
 9 files changed, 12 insertions(+), 12 deletions(-)
 rename lib/{gpu_fill.c => gpu_cmds.c} (99%)
 rename lib/{gpu_fill.h => gpu_cmds.h} (98%)

diff --git a/lib/Makefile.sources b/lib/Makefile.sources
index 9c0150c1..c0c33206 100644
--- a/lib/Makefile.sources
+++ b/lib/Makefile.sources
@@ -63,8 +63,8 @@ lib_source_list =	 	\
 	media_spin.c		\
 	gpgpu_fill.h		\
 	gpgpu_fill.c		\
-	gpu_fill.h		\
-	gpu_fill.c		\
+	gpu_cmds.h		\
+	gpu_cmds.c		\
 	gen7_media.h            \
 	gen8_media.h            \
 	rendercopy_i915.c	\
diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
index 0d26d5c6..1e23eeb8 100644
--- a/lib/gpgpu_fill.c
+++ b/lib/gpgpu_fill.c
@@ -32,7 +32,7 @@
 #include "drmtest.h"
 
 #include "gpgpu_fill.h"
-#include "gpu_fill.h"
+#include "gpu_cmds.h"
 
 /* shaders/gpgpu/gpgpu_fill.gxa */
 static const uint32_t gen7_gpgpu_kernel[][4] = {
diff --git a/lib/gpu_fill.c b/lib/gpu_cmds.c
similarity index 99%
rename from lib/gpu_fill.c
rename to lib/gpu_cmds.c
index e8591648..0ba3f537 100644
--- a/lib/gpu_fill.c
+++ b/lib/gpu_cmds.c
@@ -22,7 +22,7 @@
  *
  */
 
-#include "gpu_fill.h"
+#include "gpu_cmds.h"
 
 void
 gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end)
diff --git a/lib/gpu_fill.h b/lib/gpu_cmds.h
similarity index 98%
rename from lib/gpu_fill.h
rename to lib/gpu_cmds.h
index eb9998bc..fa586af5 100644
--- a/lib/gpu_fill.h
+++ b/lib/gpu_cmds.h
@@ -22,8 +22,8 @@
  *
  */
 
-#ifndef GPU_FILL_H
-#define GPU_FILL_H
+#ifndef GPU_CMDS_H
+#define GPU_CMDS_H
 
 #include <intel_bufmgr.h>
 #include <i915_drm.h>
@@ -140,4 +140,4 @@ gen_emit_media_object(struct intel_batchbuffer *batch, unsigned int xoffset,
 void
 gen9_emit_state_base_address(struct intel_batchbuffer *batch);
 
-#endif /* GPU_FILL_H */
+#endif /* GPU_CMDS_H */
diff --git a/lib/media_fill_gen7.c b/lib/media_fill_gen7.c
index 0f277350..d3752af3 100644
--- a/lib/media_fill_gen7.c
+++ b/lib/media_fill_gen7.c
@@ -5,7 +5,7 @@
 #include "gen7_media.h"
 #include "intel_reg.h"
 #include "drmtest.h"
-#include "gpu_fill.h"
+#include "gpu_cmds.h"
 #include <assert.h>
 
 static const uint32_t media_kernel[][4] = {
diff --git a/lib/media_fill_gen8.c b/lib/media_fill_gen8.c
index b9791c63..ce982c17 100644
--- a/lib/media_fill_gen8.c
+++ b/lib/media_fill_gen8.c
@@ -5,7 +5,7 @@
 #include "gen8_media.h"
 #include "intel_reg.h"
 #include "drmtest.h"
-#include "gpu_fill.h"
+#include "gpu_cmds.h"
 #include <assert.h>
 
 
diff --git a/lib/media_fill_gen9.c b/lib/media_fill_gen9.c
index d2c54bdd..aa9f1e4f 100644
--- a/lib/media_fill_gen9.c
+++ b/lib/media_fill_gen9.c
@@ -4,7 +4,7 @@
 #include "media_fill.h"
 #include "gen8_media.h"
 #include "intel_reg.h"
-#include "gpu_fill.h"
+#include "gpu_cmds.h"
 #include <assert.h>
 
 static const uint32_t media_kernel[][4] = {
diff --git a/lib/media_spin.c b/lib/media_spin.c
index ecff65e1..a236dd15 100644
--- a/lib/media_spin.c
+++ b/lib/media_spin.c
@@ -31,7 +31,7 @@
 #include "intel_batchbuffer.h"
 #include "gen8_media.h"
 #include "media_spin.h"
-#include "gpu_fill.h"
+#include "gpu_cmds.h"
 
 static const uint32_t spin_kernel[][4] = {
 	{ 0x00600001, 0x20800208, 0x008d0000, 0x00000000 }, /* mov (8)r4.0<1>:ud r0.0<8;8;1>:ud */
diff --git a/lib/meson.build b/lib/meson.build
index 5f2567fb..cc06ac98 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -29,7 +29,7 @@ lib_sources = [
 	'media_fill_gen9.c',
 	'media_spin.c',
 	'gpgpu_fill.c',
-	'gpu_fill.c',
+	'gpu_cmds.c',
 	'rendercopy_i915.c',
 	'rendercopy_i830.c',
 	'rendercopy_gen6.c',
-- 
2.14.3

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Re: [igt-dev] [PATCH i-g-t v3 5/5] lib: Rename library from gpu_fill to gpu_cmds

[Katarzyna Dec]

On Fri, May 04, 2018 at 03:02:18PM +0200, Katarzyna Dec wrote:
> After refactoring media_spin library - gpu_fill contains helper
> functions for render copy, *_fill functions and media_spin.
> Let's rename this library to gpu_cmds. This name will be more
> general.
> v2: changed name from gpu_helpers to gpu_cmds
> 
> Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
> Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Hello Guys,
Any more thoughts on this change?

Kasia :)

> ---
>  lib/Makefile.sources           | 4 ++--
>  lib/gpgpu_fill.c               | 2 +-
>  lib/{gpu_fill.c => gpu_cmds.c} | 2 +-
>  lib/{gpu_fill.h => gpu_cmds.h} | 6 +++---
>  lib/media_fill_gen7.c          | 2 +-
>  lib/media_fill_gen8.c          | 2 +-
>  lib/media_fill_gen9.c          | 2 +-
>  lib/media_spin.c               | 2 +-
>  lib/meson.build                | 2 +-
>  9 files changed, 12 insertions(+), 12 deletions(-)
>  rename lib/{gpu_fill.c => gpu_cmds.c} (99%)
>  rename lib/{gpu_fill.h => gpu_cmds.h} (98%)
> 
> diff --git a/lib/Makefile.sources b/lib/Makefile.sources
> index 9c0150c1..c0c33206 100644
> --- a/lib/Makefile.sources
> +++ b/lib/Makefile.sources
> @@ -63,8 +63,8 @@ lib_source_list =	 	\
>  	media_spin.c		\
>  	gpgpu_fill.h		\
>  	gpgpu_fill.c		\
> -	gpu_fill.h		\
> -	gpu_fill.c		\
> +	gpu_cmds.h		\
> +	gpu_cmds.c		\
>  	gen7_media.h            \
>  	gen8_media.h            \
>  	rendercopy_i915.c	\
> diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
> index 0d26d5c6..1e23eeb8 100644
> --- a/lib/gpgpu_fill.c
> +++ b/lib/gpgpu_fill.c
> @@ -32,7 +32,7 @@
>  #include "drmtest.h"
>  
>  #include "gpgpu_fill.h"
> -#include "gpu_fill.h"
> +#include "gpu_cmds.h"
>  
>  /* shaders/gpgpu/gpgpu_fill.gxa */
>  static const uint32_t gen7_gpgpu_kernel[][4] = {
> diff --git a/lib/gpu_fill.c b/lib/gpu_cmds.c
> similarity index 99%
> rename from lib/gpu_fill.c
> rename to lib/gpu_cmds.c
> index e8591648..0ba3f537 100644
> --- a/lib/gpu_fill.c
> +++ b/lib/gpu_cmds.c
> @@ -22,7 +22,7 @@
>   *
>   */
>  
> -#include "gpu_fill.h"
> +#include "gpu_cmds.h"
>  
>  void
>  gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end)
> diff --git a/lib/gpu_fill.h b/lib/gpu_cmds.h
> similarity index 98%
> rename from lib/gpu_fill.h
> rename to lib/gpu_cmds.h
> index eb9998bc..fa586af5 100644
> --- a/lib/gpu_fill.h
> +++ b/lib/gpu_cmds.h
> @@ -22,8 +22,8 @@
>   *
>   */
>  
> -#ifndef GPU_FILL_H
> -#define GPU_FILL_H
> +#ifndef GPU_CMDS_H
> +#define GPU_CMDS_H
>  
>  #include <intel_bufmgr.h>
>  #include <i915_drm.h>
> @@ -140,4 +140,4 @@ gen_emit_media_object(struct intel_batchbuffer *batch, unsigned int xoffset,
>  void
>  gen9_emit_state_base_address(struct intel_batchbuffer *batch);
>  
> -#endif /* GPU_FILL_H */
> +#endif /* GPU_CMDS_H */
> diff --git a/lib/media_fill_gen7.c b/lib/media_fill_gen7.c
> index 0f277350..d3752af3 100644
> --- a/lib/media_fill_gen7.c
> +++ b/lib/media_fill_gen7.c
> @@ -5,7 +5,7 @@
>  #include "gen7_media.h"
>  #include "intel_reg.h"
>  #include "drmtest.h"
> -#include "gpu_fill.h"
> +#include "gpu_cmds.h"
>  #include <assert.h>
>  
>  static const uint32_t media_kernel[][4] = {
> diff --git a/lib/media_fill_gen8.c b/lib/media_fill_gen8.c
> index b9791c63..ce982c17 100644
> --- a/lib/media_fill_gen8.c
> +++ b/lib/media_fill_gen8.c
> @@ -5,7 +5,7 @@
>  #include "gen8_media.h"
>  #include "intel_reg.h"
>  #include "drmtest.h"
> -#include "gpu_fill.h"
> +#include "gpu_cmds.h"
>  #include <assert.h>
>  
>  
> diff --git a/lib/media_fill_gen9.c b/lib/media_fill_gen9.c
> index d2c54bdd..aa9f1e4f 100644
> --- a/lib/media_fill_gen9.c
> +++ b/lib/media_fill_gen9.c
> @@ -4,7 +4,7 @@
>  #include "media_fill.h"
>  #include "gen8_media.h"
>  #include "intel_reg.h"
> -#include "gpu_fill.h"
> +#include "gpu_cmds.h"
>  #include <assert.h>
>  
>  static const uint32_t media_kernel[][4] = {
> diff --git a/lib/media_spin.c b/lib/media_spin.c
> index ecff65e1..a236dd15 100644
> --- a/lib/media_spin.c
> +++ b/lib/media_spin.c
> @@ -31,7 +31,7 @@
>  #include "intel_batchbuffer.h"
>  #include "gen8_media.h"
>  #include "media_spin.h"
> -#include "gpu_fill.h"
> +#include "gpu_cmds.h"
>  
>  static const uint32_t spin_kernel[][4] = {
>  	{ 0x00600001, 0x20800208, 0x008d0000, 0x00000000 }, /* mov (8)r4.0<1>:ud r0.0<8;8;1>:ud */
> diff --git a/lib/meson.build b/lib/meson.build
> index 5f2567fb..cc06ac98 100644
> --- a/lib/meson.build
> +++ b/lib/meson.build
> @@ -29,7 +29,7 @@ lib_sources = [
>  	'media_fill_gen9.c',
>  	'media_spin.c',
>  	'gpgpu_fill.c',
> -	'gpu_fill.c',
> +	'gpu_cmds.c',
>  	'rendercopy_i915.c',
>  	'rendercopy_i830.c',
>  	'rendercopy_gen6.c',
> -- 
> 2.14.3
> 
> _______________________________________________
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> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
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Re: [igt-dev] [PATCH i-g-t v3 5/5] lib: Rename library from gpu_fill to gpu_cmds

[Daniele Ceraolo Spurio]

On 10/05/18 06:17, Katarzyna Dec wrote:
> On Fri, May 04, 2018 at 03:02:18PM +0200, Katarzyna Dec wrote:
>> After refactoring media_spin library - gpu_fill contains helper
>> functions for render copy, *_fill functions and media_spin.
>> Let's rename this library to gpu_cmds. This name will be more
>> general.
>> v2: changed name from gpu_helpers to gpu_cmds
>>
>> Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
>> Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
>> Cc: Antonio Argenziano <antonio.argenziano@intel.com>
>> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> 
> Hello Guys,
> Any more thoughts on this change?
> 
> Kasia :)
> 

I was sure I had replied to this, but apparently not :)
The new name LGTM.

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Daniele

>> ---
>>   lib/Makefile.sources           | 4 ++--
>>   lib/gpgpu_fill.c               | 2 +-
>>   lib/{gpu_fill.c => gpu_cmds.c} | 2 +-
>>   lib/{gpu_fill.h => gpu_cmds.h} | 6 +++---
>>   lib/media_fill_gen7.c          | 2 +-
>>   lib/media_fill_gen8.c          | 2 +-
>>   lib/media_fill_gen9.c          | 2 +-
>>   lib/media_spin.c               | 2 +-
>>   lib/meson.build                | 2 +-
>>   9 files changed, 12 insertions(+), 12 deletions(-)
>>   rename lib/{gpu_fill.c => gpu_cmds.c} (99%)
>>   rename lib/{gpu_fill.h => gpu_cmds.h} (98%)
>>
>> diff --git a/lib/Makefile.sources b/lib/Makefile.sources
>> index 9c0150c1..c0c33206 100644
>> --- a/lib/Makefile.sources
>> +++ b/lib/Makefile.sources
>> @@ -63,8 +63,8 @@ lib_source_list =	 	\
>>   	media_spin.c		\
>>   	gpgpu_fill.h		\
>>   	gpgpu_fill.c		\
>> -	gpu_fill.h		\
>> -	gpu_fill.c		\
>> +	gpu_cmds.h		\
>> +	gpu_cmds.c		\
>>   	gen7_media.h            \
>>   	gen8_media.h            \
>>   	rendercopy_i915.c	\
>> diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
>> index 0d26d5c6..1e23eeb8 100644
>> --- a/lib/gpgpu_fill.c
>> +++ b/lib/gpgpu_fill.c
>> @@ -32,7 +32,7 @@
>>   #include "drmtest.h"
>>   
>>   #include "gpgpu_fill.h"
>> -#include "gpu_fill.h"
>> +#include "gpu_cmds.h"
>>   
>>   /* shaders/gpgpu/gpgpu_fill.gxa */
>>   static const uint32_t gen7_gpgpu_kernel[][4] = {
>> diff --git a/lib/gpu_fill.c b/lib/gpu_cmds.c
>> similarity index 99%
>> rename from lib/gpu_fill.c
>> rename to lib/gpu_cmds.c
>> index e8591648..0ba3f537 100644
>> --- a/lib/gpu_fill.c
>> +++ b/lib/gpu_cmds.c
>> @@ -22,7 +22,7 @@
>>    *
>>    */
>>   
>> -#include "gpu_fill.h"
>> +#include "gpu_cmds.h"
>>   
>>   void
>>   gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end)
>> diff --git a/lib/gpu_fill.h b/lib/gpu_cmds.h
>> similarity index 98%
>> rename from lib/gpu_fill.h
>> rename to lib/gpu_cmds.h
>> index eb9998bc..fa586af5 100644
>> --- a/lib/gpu_fill.h
>> +++ b/lib/gpu_cmds.h
>> @@ -22,8 +22,8 @@
>>    *
>>    */
>>   
>> -#ifndef GPU_FILL_H
>> -#define GPU_FILL_H
>> +#ifndef GPU_CMDS_H
>> +#define GPU_CMDS_H
>>   
>>   #include <intel_bufmgr.h>
>>   #include <i915_drm.h>
>> @@ -140,4 +140,4 @@ gen_emit_media_object(struct intel_batchbuffer *batch, unsigned int xoffset,
>>   void
>>   gen9_emit_state_base_address(struct intel_batchbuffer *batch);
>>   
>> -#endif /* GPU_FILL_H */
>> +#endif /* GPU_CMDS_H */
>> diff --git a/lib/media_fill_gen7.c b/lib/media_fill_gen7.c
>> index 0f277350..d3752af3 100644
>> --- a/lib/media_fill_gen7.c
>> +++ b/lib/media_fill_gen7.c
>> @@ -5,7 +5,7 @@
>>   #include "gen7_media.h"
>>   #include "intel_reg.h"
>>   #include "drmtest.h"
>> -#include "gpu_fill.h"
>> +#include "gpu_cmds.h"
>>   #include <assert.h>
>>   
>>   static const uint32_t media_kernel[][4] = {
>> diff --git a/lib/media_fill_gen8.c b/lib/media_fill_gen8.c
>> index b9791c63..ce982c17 100644
>> --- a/lib/media_fill_gen8.c
>> +++ b/lib/media_fill_gen8.c
>> @@ -5,7 +5,7 @@
>>   #include "gen8_media.h"
>>   #include "intel_reg.h"
>>   #include "drmtest.h"
>> -#include "gpu_fill.h"
>> +#include "gpu_cmds.h"
>>   #include <assert.h>
>>   
>>   
>> diff --git a/lib/media_fill_gen9.c b/lib/media_fill_gen9.c
>> index d2c54bdd..aa9f1e4f 100644
>> --- a/lib/media_fill_gen9.c
>> +++ b/lib/media_fill_gen9.c
>> @@ -4,7 +4,7 @@
>>   #include "media_fill.h"
>>   #include "gen8_media.h"
>>   #include "intel_reg.h"
>> -#include "gpu_fill.h"
>> +#include "gpu_cmds.h"
>>   #include <assert.h>
>>   
>>   static const uint32_t media_kernel[][4] = {
>> diff --git a/lib/media_spin.c b/lib/media_spin.c
>> index ecff65e1..a236dd15 100644
>> --- a/lib/media_spin.c
>> +++ b/lib/media_spin.c
>> @@ -31,7 +31,7 @@
>>   #include "intel_batchbuffer.h"
>>   #include "gen8_media.h"
>>   #include "media_spin.h"
>> -#include "gpu_fill.h"
>> +#include "gpu_cmds.h"
>>   
>>   static const uint32_t spin_kernel[][4] = {
>>   	{ 0x00600001, 0x20800208, 0x008d0000, 0x00000000 }, /* mov (8)r4.0<1>:ud r0.0<8;8;1>:ud */
>> diff --git a/lib/meson.build b/lib/meson.build
>> index 5f2567fb..cc06ac98 100644
>> --- a/lib/meson.build
>> +++ b/lib/meson.build
>> @@ -29,7 +29,7 @@ lib_sources = [
>>   	'media_fill_gen9.c',
>>   	'media_spin.c',
>>   	'gpgpu_fill.c',
>> -	'gpu_fill.c',
>> +	'gpu_cmds.c',
>>   	'rendercopy_i915.c',
>>   	'rendercopy_i830.c',
>>   	'rendercopy_gen6.c',
>> -- 
>> 2.14.3
>>
>> _______________________________________________
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>> igt-dev@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/igt-dev
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Re: [igt-dev] [PATCH i-g-t v3 5/5] lib: Rename library from gpu_fill to gpu_cmds

[Katarzyna Dec]

On Thu, May 10, 2018 at 08:10:58AM -0700, Daniele Ceraolo Spurio wrote:
> 
> 
> On 10/05/18 06:17, Katarzyna Dec wrote:
> > On Fri, May 04, 2018 at 03:02:18PM +0200, Katarzyna Dec wrote:
> > > After refactoring media_spin library - gpu_fill contains helper
> > > functions for render copy, *_fill functions and media_spin.
> > > Let's rename this library to gpu_cmds. This name will be more
> > > general.
> > > v2: changed name from gpu_helpers to gpu_cmds
> > > 
> > > Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
> > > Cc: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> > > Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> > > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> > 
> > Hello Guys,
> > Any more thoughts on this change?
> > 
> > Kasia :)
> > 
> 
> I was sure I had replied to this, but apparently not :)
> The new name LGTM.
> 
> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> 
> Daniele
> 
Thanks :)
Kasia
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[igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,v3,1/5] lib/media_spin: Move helper functions to gpu_fill library

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,v3,1/5] lib/media_spin: Move helper functions to gpu_fill library
URL   : https://patchwork.freedesktop.org/series/42684/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4146 -> IGTPW_1320 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/42684/revisions/1/mbox/

== Known issues ==

  Here are the changes found in IGTPW_1320 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
      fi-ivb-3520m:       PASS -> DMESG-WARN (fdo#106084)

    
    ==== Possible fixes ====

    igt@debugfs_test@read_all_entries:
      fi-snb-2520m:       INCOMPLETE (fdo#103713) -> PASS

    igt@gem_exec_suspend@basic-s4-devices:
      fi-skl-guc:         FAIL (fdo#105900, fdo#104699) -> PASS +1

    igt@kms_frontbuffer_tracking@basic:
      fi-hsw-4200u:       DMESG-FAIL (fdo#102614) -> PASS

    
  fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
  fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
  fdo#104699 https://bugs.freedesktop.org/show_bug.cgi?id=104699
  fdo#105900 https://bugs.freedesktop.org/show_bug.cgi?id=105900
  fdo#106084 https://bugs.freedesktop.org/show_bug.cgi?id=106084


== Participating hosts (39 -> 37) ==

  Additional (1): fi-skl-gvtdvm 
  Missing    (3): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq 


== Build changes ==

    * IGT: IGT_4461 -> IGTPW_1320

  CI_DRM_4146: be068d4cb8a8b4709af83ffa993d8fc8889f0230 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_1320: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1320/
  IGT_4461: f772d9a910130b3aec8efa4f09ed723618fae656 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4461: 55207ea5154dfaa6d2c128124c50e3be4f9b6440 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1320/issues.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

[igt-dev] ✗ Fi.CI.IGT: failure for series starting with [i-g-t,v3,1/5] lib/media_spin: Move helper functions to gpu_fill library

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,v3,1/5] lib/media_spin: Move helper functions to gpu_fill library
URL   : https://patchwork.freedesktop.org/series/42684/
State : failure

== Summary ==

= CI Bug Log - changes from IGT_4461_full -> IGTPW_1320_full =

== Summary - FAILURE ==

  Serious unknown changes coming with IGTPW_1320_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_1320_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/42684/revisions/1/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in IGTPW_1320_full:

  === IGT changes ===

    ==== Possible regressions ====

    igt@gem_gpgpu_fill:
      shard-glk:          PASS -> FAIL
      shard-apl:          PASS -> FAIL
      shard-kbl:          PASS -> FAIL

    
    ==== Warnings ====

    igt@gem_mocs_settings@mocs-rc6-dirty-render:
      shard-kbl:          PASS -> SKIP

    igt@kms_flip@flip-vs-fences:
      shard-kbl:          SKIP -> PASS +14

    igt@pm_rc6_residency@rc6-accuracy:
      shard-snb:          PASS -> SKIP

    
== Known issues ==

  Here are the changes found in IGTPW_1320_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@gem_exec_store@cachelines-bsd:
      shard-hsw:          PASS -> FAIL (fdo#100007)

    igt@gem_softpin@noreloc-s3:
      shard-kbl:          PASS -> INCOMPLETE (fdo#103665) +1

    igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible:
      shard-glk:          PASS -> FAIL (fdo#100368)

    igt@kms_flip@flip-vs-expired-vblank:
      shard-glk:          PASS -> FAIL (fdo#105707)

    igt@kms_flip@modeset-vs-vblank-race-interruptible:
      shard-glk:          PASS -> FAIL (fdo#103060) +1

    igt@kms_flip@wf_vblank-ts-check:
      shard-apl:          PASS -> FAIL (fdo#100368)

    igt@kms_sysfs_edid_timing:
      shard-apl:          PASS -> WARN (fdo#100047)

    
    ==== Possible fixes ====

    igt@gem_ppgtt@blt-vs-render-ctxn:
      shard-kbl:          INCOMPLETE (fdo#106023, fdo#103665) -> PASS

    igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
      shard-kbl:          DMESG-WARN (fdo#103313, fdo#105602, fdo#103558) -> PASS +1

    igt@kms_flip@dpms-vs-vblank-race:
      shard-glk:          FAIL (fdo#103060) -> PASS

    igt@kms_flip@flip-vs-expired-vblank-interruptible:
      shard-hsw:          FAIL (fdo#105707) -> PASS

    igt@kms_flip@wf_vblank-ts-check-interruptible:
      shard-glk:          FAIL (fdo#100368) -> PASS

    igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-cpu:
      shard-kbl:          DMESG-WARN (fdo#105602, fdo#103558) -> PASS +5

    igt@kms_rotation_crc@sprite-rotation-180:
      shard-snb:          FAIL (fdo#103925) -> PASS

    igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
      shard-apl:          FAIL (fdo#103925) -> PASS

    igt@kms_vblank@pipe-c-ts-continuation-suspend:
      shard-kbl:          INCOMPLETE (fdo#103665) -> PASS +1

    
  fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
  fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
  fdo#103313 https://bugs.freedesktop.org/show_bug.cgi?id=103313
  fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
  fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602
  fdo#105707 https://bugs.freedesktop.org/show_bug.cgi?id=105707
  fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023


== Participating hosts (6 -> 5) ==

  Missing    (1): pig-glk-j4005 


== Build changes ==

    * IGT: IGT_4461 -> IGTPW_1320
    * Linux: CI_DRM_4135 -> CI_DRM_4146

  CI_DRM_4135: 266fa55ff4e1d3b7ab86deccf5709ee79c79f5dc @ git://anongit.freedesktop.org/gfx-ci/linux
  CI_DRM_4146: be068d4cb8a8b4709af83ffa993d8fc8889f0230 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_1320: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1320/
  IGT_4461: f772d9a910130b3aec8efa4f09ed723618fae656 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4461: 55207ea5154dfaa6d2c128124c50e3be4f9b6440 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1320/shards.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

[igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,v3,1/5] lib/media_spin: Move helper functions to gpu_fill library (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,v3,1/5] lib/media_spin: Move helper functions to gpu_fill library (rev2)
URL   : https://patchwork.freedesktop.org/series/42684/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4150 -> IGTPW_1323 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/42684/revisions/2/mbox/

== Known issues ==

  Here are the changes found in IGTPW_1323 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@gem_exec_suspend@basic-s3:
      fi-ivb-3520m:       PASS -> DMESG-WARN (fdo#106084)

    igt@gem_exec_suspend@basic-s4-devices:
      fi-skl-guc:         PASS -> FAIL (fdo#105900, fdo#104699) +1

    igt@gem_ringfill@basic-default-hang:
      fi-pnv-d510:        NOTRUN -> DMESG-WARN (fdo#101600)

    igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
      fi-glk-j4005:       PASS -> DMESG-WARN (fdo#106235)

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
      fi-glk-j4005:       PASS -> DMESG-WARN (fdo#106097) +1

    
    ==== Possible fixes ====

    igt@kms_flip@basic-flip-vs-wf_vblank:
      fi-skl-guc:         FAIL (fdo#103928) -> PASS

    igt@kms_frontbuffer_tracking@basic:
      fi-hsw-4200u:       DMESG-FAIL (fdo#106103, fdo#102614) -> PASS

    igt@kms_pipe_crc_basic@read-crc-pipe-b:
      fi-skl-6700k2:      FAIL (fdo#103191, fdo#104724) -> PASS

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      fi-glk-j4005:       DMESG-WARN (fdo#106097) -> PASS

    
  fdo#101600 https://bugs.freedesktop.org/show_bug.cgi?id=101600
  fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
  fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
  fdo#103928 https://bugs.freedesktop.org/show_bug.cgi?id=103928
  fdo#104699 https://bugs.freedesktop.org/show_bug.cgi?id=104699
  fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724
  fdo#105900 https://bugs.freedesktop.org/show_bug.cgi?id=105900
  fdo#106084 https://bugs.freedesktop.org/show_bug.cgi?id=106084
  fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097
  fdo#106103 https://bugs.freedesktop.org/show_bug.cgi?id=106103
  fdo#106235 https://bugs.freedesktop.org/show_bug.cgi?id=106235


== Participating hosts (38 -> 37) ==

  Additional (2): fi-kbl-7560u fi-pnv-d510 
  Missing    (3): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq 


== Build changes ==

    * IGT: IGT_4463 -> IGTPW_1323

  CI_DRM_4150: 93d32416ba4b1dae9451fec28aaa71915d770f51 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_1323: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1323/
  IGT_4463: 91b5a3ef5516b29584ea4567b0f5ffa18219b29f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4463: 33e58d5583eb7ed3966a1b905f875a1dfa959f6b @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1323/issues.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

[igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,v3,1/5] lib/media_spin: Move helper functions to gpu_fill library (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,v3,1/5] lib/media_spin: Move helper functions to gpu_fill library (rev2)
URL   : https://patchwork.freedesktop.org/series/42684/
State : success

== Summary ==

= CI Bug Log - changes from IGT_4463_full -> IGTPW_1323_full =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/42684/revisions/2/mbox/

== Known issues ==

  Here are the changes found in IGTPW_1323_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@gem_exec_schedule@pi-ringfull-vebox:
      shard-kbl:          NOTRUN -> FAIL (fdo#103158)

    igt@kms_chv_cursor_fail@pipe-b-64x64-right-edge:
      shard-apl:          PASS -> FAIL (fdo#104671, fdo#104724)

    igt@kms_cursor_crc@cursor-64x21-sliding:
      shard-kbl:          NOTRUN -> DMESG-WARN (fdo#103558, fdo#105602)

    igt@kms_flip@absolute-wf_vblank-interruptible:
      shard-glk:          PASS -> FAIL (fdo#106087)

    igt@kms_flip@flip-vs-wf_vblank-interruptible:
      shard-hsw:          PASS -> FAIL (fdo#100368)

    igt@kms_flip@plain-flip-ts-check-interruptible:
      shard-hsw:          PASS -> FAIL (fdo#103928)

    igt@kms_flip@wf_vblank-ts-check-interruptible:
      shard-glk:          PASS -> FAIL (fdo#100368)

    igt@kms_rotation_crc@sprite-rotation-180:
      shard-snb:          PASS -> FAIL (fdo#103925, fdo#104724) +1

    igt@kms_rotation_crc@sprite-rotation-270:
      shard-apl:          PASS -> FAIL (fdo#103925, fdo#104724)

    igt@kms_vblank@pipe-b-wait-busy-hang:
      shard-kbl:          PASS -> DMESG-WARN (fdo#103558, fdo#105602) +26

    igt@pm_rpm@system-suspend:
      shard-apl:          PASS -> INCOMPLETE (fdo#103927) +1

    
    ==== Possible fixes ====

    igt@gem_eio@in-flight-suspend:
      shard-kbl:          INCOMPLETE (fdo#103665) -> PASS +1

    igt@gem_tiled_blits@interruptible:
      shard-apl:          INCOMPLETE (fdo#103927) -> PASS

    igt@kms_flip@2x-plain-flip-ts-check-interruptible:
      shard-hsw:          FAIL (fdo#100368) -> PASS

    igt@kms_flip@blocking-absolute-wf_vblank-interruptible:
      shard-glk:          FAIL (fdo#106134) -> PASS

    igt@kms_flip@dpms-vs-vblank-race-interruptible:
      shard-hsw:          FAIL (fdo#103060) -> PASS

    igt@kms_flip@flip-vs-expired-vblank-interruptible:
      shard-glk:          FAIL (fdo#102887) -> PASS

    igt@kms_flip@plain-flip-ts-check-interruptible:
      shard-glk:          FAIL (fdo#100368) -> PASS +2

    igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
      shard-apl:          FAIL (fdo#103167, fdo#104724) -> PASS

    
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
  fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
  fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158
  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
  fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
  fdo#103928 https://bugs.freedesktop.org/show_bug.cgi?id=103928
  fdo#104671 https://bugs.freedesktop.org/show_bug.cgi?id=104671
  fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724
  fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602
  fdo#106087 https://bugs.freedesktop.org/show_bug.cgi?id=106087
  fdo#106134 https://bugs.freedesktop.org/show_bug.cgi?id=106134


== Participating hosts (6 -> 5) ==

  Missing    (1): pig-snb-2600 


== Build changes ==

    * IGT: IGT_4463 -> IGTPW_1323
    * Linux: CI_DRM_4149 -> CI_DRM_4150

  CI_DRM_4149: 6c2ec0dee7d19b798a1de1101175f5a076549cd9 @ git://anongit.freedesktop.org/gfx-ci/linux
  CI_DRM_4150: 93d32416ba4b1dae9451fec28aaa71915d770f51 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_1323: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1323/
  IGT_4463: 91b5a3ef5516b29584ea4567b0f5ffa18219b29f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4463: 33e58d5583eb7ed3966a1b905f875a1dfa959f6b @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1323/shards.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

[igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,v3,1/5] lib/media_spin: Move helper functions to gpu_fill library (rev4)

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,v3,1/5] lib/media_spin: Move helper functions to gpu_fill library (rev4)
URL   : https://patchwork.freedesktop.org/series/42684/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4164 -> IGTPW_1343 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/42684/revisions/4/mbox/

== Known issues ==

  Here are the changes found in IGTPW_1343 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@drv_module_reload@basic-reload:
      fi-glk-j4005:       PASS -> DMESG-WARN (fdo#106248)

    igt@prime_vgem@basic-fence-flip:
      fi-glk-j4005:       PASS -> DMESG-WARN (fdo#106097, fdo#106000)

    
    ==== Possible fixes ====

    igt@gem_mmap_gtt@basic-small-bo-tiledx:
      fi-gdg-551:         FAIL (fdo#102575) -> PASS

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
      fi-bxt-dsi:         INCOMPLETE (fdo#103927) -> PASS
      fi-cnl-psr:         DMESG-WARN (fdo#104951) -> PASS

    
  fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
  fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
  fdo#104951 https://bugs.freedesktop.org/show_bug.cgi?id=104951
  fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000
  fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097
  fdo#106248 https://bugs.freedesktop.org/show_bug.cgi?id=106248


== Participating hosts (40 -> 34) ==

  Missing    (6): fi-ilk-m540 fi-hsw-peppy fi-byt-squawks fi-ctg-p8600 fi-pnv-d510 fi-skl-6700hq 


== Build changes ==

    * IGT: IGT_4475 -> IGTPW_1343

  CI_DRM_4164: a44969bdb6d69244a063eac7f76ea46353960409 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_1343: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1343/
  IGT_4475: 35f08c12aa216d5b62a5b9984b575cee6905098f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4475: 3ba0657bff4216d1ec7179935590261855f1651e @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1343/issues.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

[igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,v3,1/5] lib/media_spin: Move helper functions to gpu_fill library (rev4)

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,v3,1/5] lib/media_spin: Move helper functions to gpu_fill library (rev4)
URL   : https://patchwork.freedesktop.org/series/42684/
State : success

== Summary ==

= CI Bug Log - changes from IGT_4475_full -> IGTPW_1343_full =

== Summary - WARNING ==

  Minor unknown changes coming with IGTPW_1343_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_1343_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/42684/revisions/4/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in IGTPW_1343_full:

  === IGT changes ===

    ==== Warnings ====

    igt@gem_exec_schedule@deep-vebox:
      shard-kbl:          SKIP -> PASS +1

    igt@gem_mocs_settings@mocs-rc6-ctx-dirty-render:
      shard-kbl:          PASS -> SKIP

    igt@gem_pwrite@big-cpu-random:
      shard-glk:          SKIP -> PASS

    igt@kms_vblank@pipe-b-ts-continuation-suspend:
      shard-snb:          PASS -> SKIP +2

    
== Known issues ==

  Here are the changes found in IGTPW_1343_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_flip@flip-vs-wf_vblank-interruptible:
      shard-glk:          PASS -> FAIL (fdo#100368) +1

    igt@kms_rotation_crc@sprite-rotation-180:
      shard-apl:          PASS -> DMESG-WARN (fdo#105127)

    
    ==== Possible fixes ====

    igt@gem_ppgtt@blt-vs-render-ctxn:
      shard-kbl:          INCOMPLETE (fdo#106023, fdo#103665) -> PASS

    igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size:
      shard-apl:          FAIL -> PASS

    igt@kms_flip@absolute-wf_vblank-interruptible:
      shard-glk:          FAIL (fdo#106087) -> PASS

    igt@kms_flip@modeset-vs-vblank-race-interruptible:
      shard-glk:          FAIL (fdo#103060) -> PASS

    igt@kms_flip@plain-flip-ts-check-interruptible:
      shard-glk:          FAIL (fdo#100368) -> PASS +1
      shard-kbl:          FAIL (fdo#100368) -> PASS

    igt@kms_rotation_crc@primary-rotation-180:
      shard-snb:          FAIL (fdo#104724, fdo#103925) -> PASS

    igt@kms_sysfs_edid_timing:
      shard-apl:          WARN (fdo#100047) -> PASS

    igt@pm_rps@min-max-config-idle:
      shard-hsw:          FAIL -> PASS

    
  fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
  fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724
  fdo#105127 https://bugs.freedesktop.org/show_bug.cgi?id=105127
  fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023
  fdo#106087 https://bugs.freedesktop.org/show_bug.cgi?id=106087


== Participating hosts (9 -> 5) ==

  Missing    (4): pig-snb-2600 pig-glk-j5005 pig-skl-6600 pig-hsw-4770r 


== Build changes ==

    * IGT: IGT_4475 -> IGTPW_1343
    * Linux: CI_DRM_4163 -> CI_DRM_4164

  CI_DRM_4163: 8e1dab6e913be7d014eb9bc355ec65b6b56dcd56 @ git://anongit.freedesktop.org/gfx-ci/linux
  CI_DRM_4164: a44969bdb6d69244a063eac7f76ea46353960409 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_1343: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1343/
  IGT_4475: 35f08c12aa216d5b62a5b9984b575cee6905098f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4475: 3ba0657bff4216d1ec7179935590261855f1651e @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1343/shards.html
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