[MODERATED] [PATCH v15.3 1/1] [PATCH v15.3] SSB fixup patch #1

[MODERATED] [PATCH v15.3 1/1] [PATCH v15.3] SSB fixup patch #1

[konrad.wilk]

Cast val and (val >> 32) to uintptr_t, so that they fit in a
general-purpose register in both 32-bit and 64-bit code.

Fixes: c65732e4f721 ("x86/cpu: Restore CPUID_8000_0008_EBX reload")
Signed-off-by: Jim Mattson <jmattson@google.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
---
 arch/x86/include/asm/nospec-branch.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
index 328ea3cb769f..979aa050d311 100644
--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -265,8 +265,8 @@ void alternative_msr_write(unsigned int msr, u64 val, unsigned int feature)
 {
 	asm volatile(ALTERNATIVE("", "wrmsr", %c[feature])
 		: : "c" (msr),
-		    "a" (val),
-		    "d" (val >> 32),
+		    "a" ((uintptr_t)val),
+		    "d" ((uintptr_t)(val >> 32)),
 		    [feature] "i" (feature)
 		: "memory");
 }
-- 
2.14.3

[MODERATED] Re: [PATCH v15.3 1/1] [PATCH v15.3] SSB fixup patch #1

[Borislav Petkov]

On Sun, May 13, 2018 at 05:33:57PM -0400, speck for konrad.wilk_at_oracle.com wrote:
> x86/cpu: Make alternative_msr_write work for 32-bit code
> 
> Cast val and (val >> 32) to uintptr_t, so that they fit in a
> general-purpose register in both 32-bit and 64-bit code.
> 
> Fixes: c65732e4f721 ("x86/cpu: Restore CPUID_8000_0008_EBX reload")
> Signed-off-by: Jim Mattson <jmattson@google.com>
> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
> ---
>  arch/x86/include/asm/nospec-branch.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
> index 328ea3cb769f..979aa050d311 100644
> --- a/arch/x86/include/asm/nospec-branch.h
> +++ b/arch/x86/include/asm/nospec-branch.h
> @@ -265,8 +265,8 @@ void alternative_msr_write(unsigned int msr, u64 val, unsigned int feature)
>  {
>  	asm volatile(ALTERNATIVE("", "wrmsr", %c[feature])
>  		: : "c" (msr),
> -		    "a" (val),
> -		    "d" (val >> 32),
> +		    "a" ((uintptr_t)val),
> +		    "d" ((uintptr_t)(val >> 32)),

Make those casts (u32) simply as the rest of the MSR code does.

-- 
Regards/Gruss,
    Boris.

SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
-- 

[MODERATED] Re: [PATCH v15.3 1/1] [PATCH v15.3] SSB fixup patch #1

[Linus Torvalds]

On Sun, 13 May 2018, speck for konrad.wilk_at_oracle.com wrote:
> 
> Cast val and (val >> 32) to uintptr_t, so that they fit in a
> general-purpose register in both 32-bit and 64-bit code.

Fair enough. Except why "uintptr_t"? That feels like an odd choice. The 
values have nothing to do with pointers.

It's a fine type, and I guess it approximates "native register size", but 
so does "long".

So "Ack", albeit with a query about why that particular type was chosen..

                Linus

[MODERATED] Re: [PATCH v15.3 1/1] [PATCH v15.3] SSB fixup patch #1

[Linus Torvalds]

On Mon, 14 May 2018, speck for Borislav Petkov wrote:
> 
> Make those casts (u32) simply as the rest of the MSR code does.

Yeah, that's probably the right type.

                  Linus

Re: [PATCH v15.3 1/1] [PATCH v15.3] SSB fixup patch #1

[Thomas Gleixner]

On Sun, 13 May 2018, speck for Linus Torvalds wrote:
> On Mon, 14 May 2018, speck for Borislav Petkov wrote:
> > 
> > Make those casts (u32) simply as the rest of the MSR code does.
> 
> Yeah, that's probably the right type.

Indeed. I fixed it up and applied it.

Thanks,

	tglx