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* [igt-dev] [PATCH i-g-t 1/4] intel: deviceinfo: split CNL pciids into GT1/2
@ 2018-05-15  9:22 Lionel Landwerlin
  2018-05-15  9:22 ` [igt-dev] [PATCH i-g-t 2/4] intel: deviceinfo: register all ICL devices as GT1 Lionel Landwerlin
                   ` (5 more replies)
  0 siblings, 6 replies; 8+ messages in thread
From: Lionel Landwerlin @ 2018-05-15  9:22 UTC (permalink / raw)
  To: igt-dev

The situation with CNL is a bit odd because we have half GTs
(0.5/1.5). But we can group the GT0.5/1 into a single GT1 group of
devices that only have 1 slice and GT1.5/2 into another GT2 group of
devices with 2 slices.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 lib/i915_pciids.h       | 18 ++++++++++--------
 lib/intel_device_info.c | 13 +++++++++++--
 2 files changed, 21 insertions(+), 10 deletions(-)

diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
index bab70ff6..af4e8a6c 100644
--- a/lib/i915_pciids.h
+++ b/lib/i915_pciids.h
@@ -416,21 +416,23 @@
 	INTEL_CFL_U_GT3_IDS(info)
 
 /* CNL */
-#define INTEL_CNL_IDS(info) \
+#define INTEL_CNL_GT1_IDS(info) \
+	INTEL_VGA_DEVICE(0x5A49, info), \
+	INTEL_VGA_DEVICE(0x5A4A, info), \
+	INTEL_VGA_DEVICE(0x5A41, info), \
+	INTEL_VGA_DEVICE(0x5A42, info), \
+	INTEL_VGA_DEVICE(0x5A44, info), \
+	INTEL_VGA_DEVICE(0x5A4C, info)
+
+#define INTEL_CNL_GT2_IDS(info) \
 	INTEL_VGA_DEVICE(0x5A51, info), \
 	INTEL_VGA_DEVICE(0x5A59, info), \
-	INTEL_VGA_DEVICE(0x5A41, info), \
-	INTEL_VGA_DEVICE(0x5A49, info), \
 	INTEL_VGA_DEVICE(0x5A52, info), \
 	INTEL_VGA_DEVICE(0x5A5A, info), \
-	INTEL_VGA_DEVICE(0x5A42, info), \
-	INTEL_VGA_DEVICE(0x5A4A, info), \
 	INTEL_VGA_DEVICE(0x5A50, info), \
 	INTEL_VGA_DEVICE(0x5A40, info), \
 	INTEL_VGA_DEVICE(0x5A54, info), \
-	INTEL_VGA_DEVICE(0x5A5C, info), \
-	INTEL_VGA_DEVICE(0x5A44, info), \
-	INTEL_VGA_DEVICE(0x5A4C, info)
+	INTEL_VGA_DEVICE(0x5A5C, info)
 
 /* ICL */
 #define INTEL_ICL_11_IDS(info) \
diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index cc417ed5..f1b1aa83 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -277,8 +277,16 @@ static const struct intel_device_info intel_coffeelake_gt3_info = {
 	.gt = 3,
 };
 
-static const struct intel_device_info intel_cannonlake_info = {
+static const struct intel_device_info intel_cannonlake_gt1_info = {
 	.gen = BIT(9),
+	.gt = 1,
+	.is_cannonlake = true,
+	.codename = "cannonlake"
+};
+
+static const struct intel_device_info intel_cannonlake_gt2_info = {
+	.gen = BIT(9),
+	.gt = 2,
 	.is_cannonlake = true,
 	.codename = "cannonlake"
 };
@@ -355,7 +363,8 @@ static const struct pci_id_match intel_device_match[] = {
 	INTEL_CFL_U_GT2_IDS(&intel_coffeelake_gt2_info),
 	INTEL_CFL_U_GT3_IDS(&intel_coffeelake_gt3_info),
 
-	INTEL_CNL_IDS(&intel_cannonlake_info),
+	INTEL_CNL_GT1_IDS(&intel_cannonlake_gt1_info),
+	INTEL_CNL_GT2_IDS(&intel_cannonlake_gt2_info),
 
 	INTEL_ICL_11_IDS(&intel_icelake_info),
 
-- 
2.17.0

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https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [igt-dev] [PATCH i-g-t 2/4] intel: deviceinfo: register all ICL devices as GT1
  2018-05-15  9:22 [igt-dev] [PATCH i-g-t 1/4] intel: deviceinfo: split CNL pciids into GT1/2 Lionel Landwerlin
@ 2018-05-15  9:22 ` Lionel Landwerlin
  2018-05-15  9:22 ` [igt-dev] [PATCH i-g-t 3/4] lib: intel: report GT size from the database if available Lionel Landwerlin
                   ` (4 subsequent siblings)
  5 siblings, 0 replies; 8+ messages in thread
From: Lionel Landwerlin @ 2018-05-15  9:22 UTC (permalink / raw)
  To: igt-dev

So far all the configs have only 1 slice.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 lib/intel_device_info.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index f1b1aa83..5eddc359 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -293,6 +293,7 @@ static const struct intel_device_info intel_cannonlake_gt2_info = {
 
 static const struct intel_device_info intel_icelake_info = {
 	.gen = BIT(10),
+	.gt = 1,
 	.is_icelake = true,
 	.codename = "icelake"
 };
-- 
2.17.0

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^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [igt-dev] [PATCH i-g-t 3/4] lib: intel: report GT size from the database if available
  2018-05-15  9:22 [igt-dev] [PATCH i-g-t 1/4] intel: deviceinfo: split CNL pciids into GT1/2 Lionel Landwerlin
  2018-05-15  9:22 ` [igt-dev] [PATCH i-g-t 2/4] intel: deviceinfo: register all ICL devices as GT1 Lionel Landwerlin
@ 2018-05-15  9:22 ` Lionel Landwerlin
  2018-05-15  9:22 ` [igt-dev] [PATCH i-g-t 4/4] tests/perf: print out GT size if unknown Lionel Landwerlin
                   ` (3 subsequent siblings)
  5 siblings, 0 replies; 8+ messages in thread
From: Lionel Landwerlin @ 2018-05-15  9:22 UTC (permalink / raw)
  To: igt-dev

The scheme if getting the GT size from the PCI-id doesn't work anymore
on Coffeelake.

v2: Assert when GT isn't defined on gen8+ || haswell

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105451
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101740
---
 lib/intel_device_info.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index 5eddc359..34c86596 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -1,6 +1,7 @@
 #include "intel_chipset.h"
 #include "i915_pciids.h"
 
+#include <assert.h>
 #include <strings.h> /* ffs() */
 
 #define BIT(x) (1<<(x))
@@ -428,8 +429,18 @@ unsigned intel_gen(uint16_t devid)
  */
 unsigned intel_gt(uint16_t devid)
 {
+	const struct intel_device_info *devinfo = intel_get_device_info(devid);
 	unsigned mask = intel_gen(devid);
 
+	/*
+	 * From Coffelake onwards, the GT is no longer accurately
+	 * encoded in the PCI-ID and we need to use a look up table.
+	 */
+	if (devinfo->gt)
+		return devinfo->gt - 1;
+
+	assert(devinfo->gen < 8 || !devinfo->is_haswell);
+
 	if (mask >= 8)
 		mask = 0xf;
 	else if (mask >= 6)
-- 
2.17.0

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^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [igt-dev] [PATCH i-g-t 4/4] tests/perf: print out GT size if unknown
  2018-05-15  9:22 [igt-dev] [PATCH i-g-t 1/4] intel: deviceinfo: split CNL pciids into GT1/2 Lionel Landwerlin
  2018-05-15  9:22 ` [igt-dev] [PATCH i-g-t 2/4] intel: deviceinfo: register all ICL devices as GT1 Lionel Landwerlin
  2018-05-15  9:22 ` [igt-dev] [PATCH i-g-t 3/4] lib: intel: report GT size from the database if available Lionel Landwerlin
@ 2018-05-15  9:22 ` Lionel Landwerlin
  2018-05-15 12:37 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/4] intel: deviceinfo: split CNL pciids into GT1/2 Patchwork
                   ` (2 subsequent siblings)
  5 siblings, 0 replies; 8+ messages in thread
From: Lionel Landwerlin @ 2018-05-15  9:22 UTC (permalink / raw)
  To: igt-dev

Developers are running into issues on CFL where the GT size isn't
recognized. Let's print it out to make it easier to debug from the CI
traces.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 tests/perf.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/tests/perf.c b/tests/perf.c
index 1e2d40f5..f58c7a38 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -925,7 +925,8 @@ init_sys_info(void)
 				test_set_uuid = "882fa433-1f4a-4a67-a962-c741888fe5f5";
 				break;
 			default:
-				igt_debug("unsupported Skylake GT size\n");
+				igt_debug("unsupported Skylake GT%d size\n",
+					  intel_gt(devid) + 1);
 				return false;
 			}
 		} else if (IS_BROXTON(devid)) {
@@ -939,7 +940,8 @@ init_sys_info(void)
 				test_set_uuid = "f1792f32-6db2-4b50-b4b2-557128f1688d";
 				break;
 			default:
-				igt_debug("unsupported Kabylake GT size\n");
+				igt_debug("unsupported Kabylake GT%d\n",
+					  intel_gt(devid) + 1);
 				return false;
 			}
 		} else if (IS_GEMINILAKE(devid)) {
@@ -953,7 +955,8 @@ init_sys_info(void)
 				test_set_uuid = "577e8e2c-3fa0-4875-8743-3538d585e3b0";
 				break;
 			default:
-				igt_debug("unsupported Coffeelake GT size\n");
+				igt_debug("unsupported Coffeelake GT%d\n",
+					  intel_gt(devid) + 1);
 				return false;
 			}
 		} else if (IS_CANNONLAKE(devid)) {
-- 
2.17.0

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^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/4] intel: deviceinfo: split CNL pciids into GT1/2
  2018-05-15  9:22 [igt-dev] [PATCH i-g-t 1/4] intel: deviceinfo: split CNL pciids into GT1/2 Lionel Landwerlin
                   ` (2 preceding siblings ...)
  2018-05-15  9:22 ` [igt-dev] [PATCH i-g-t 4/4] tests/perf: print out GT size if unknown Lionel Landwerlin
@ 2018-05-15 12:37 ` Patchwork
  2018-05-15 13:02 ` [igt-dev] [PATCH i-g-t 1/4] " Chris Wilson
  2018-05-15 21:03 ` [igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,1/4] " Patchwork
  5 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2018-05-15 12:37 UTC (permalink / raw)
  To: Lionel Landwerlin; +Cc: igt-dev

== Series Details ==

Series: series starting with [i-g-t,1/4] intel: deviceinfo: split CNL pciids into GT1/2
URL   : https://patchwork.freedesktop.org/series/43183/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4183 -> IGTPW_1365 =

== Summary - WARNING ==

  Minor unknown changes coming with IGTPW_1365 need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_1365, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/43183/revisions/1/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in IGTPW_1365:

  === IGT changes ===

    ==== Warnings ====

    igt@gem_exec_gttfill@basic:
      fi-pnv-d510:        SKIP -> PASS

    
== Known issues ==

  Here are the changes found in IGTPW_1365 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
      fi-bxt-dsi:         PASS -> INCOMPLETE (fdo#103927)

    igt@kms_psr_sink_crc@basic:
      fi-hsw-4200u:       NOTRUN -> FAIL (fdo#106346)

    
    ==== Possible fixes ====

    igt@gem_exec_suspend@basic-s4-devices:
      fi-glk-j4005:       DMESG-WARN (fdo#106097) -> PASS

    
  fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
  fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097
  fdo#106346 https://bugs.freedesktop.org/show_bug.cgi?id=106346


== Participating hosts (38 -> 37) ==

  Additional (2): fi-hsw-peppy fi-hsw-4200u 
  Missing    (3): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq 


== Build changes ==

    * IGT: IGT_4480 -> IGTPW_1365
    * Piglit: piglit_4480 -> piglit_4481

  CI_DRM_4183: 9d97c6e3fd3ac8dd73f107ca85e2a12c746a2ccc @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_1365: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1365/
  IGT_4480: 18fa0c11012da6aa9a5511dc9b1736064a02b429 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4480: 3ba0657bff4216d1ec7179935590261855f1651e @ git://anongit.freedesktop.org/piglit
  piglit_4481: 3ba0657bff4216d1ec7179935590261855f1651e @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1365/issues.html
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https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [igt-dev] [PATCH i-g-t 1/4] intel: deviceinfo: split CNL pciids into GT1/2
  2018-05-15  9:22 [igt-dev] [PATCH i-g-t 1/4] intel: deviceinfo: split CNL pciids into GT1/2 Lionel Landwerlin
                   ` (3 preceding siblings ...)
  2018-05-15 12:37 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/4] intel: deviceinfo: split CNL pciids into GT1/2 Patchwork
@ 2018-05-15 13:02 ` Chris Wilson
  2018-05-15 13:39   ` Lionel Landwerlin
  2018-05-15 21:03 ` [igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,1/4] " Patchwork
  5 siblings, 1 reply; 8+ messages in thread
From: Chris Wilson @ 2018-05-15 13:02 UTC (permalink / raw)
  To: Lionel Landwerlin, igt-dev

Quoting Lionel Landwerlin (2018-05-15 10:22:40)
> The situation with CNL is a bit odd because we have half GTs
> (0.5/1.5). But we can group the GT0.5/1 into a single GT1 group of
> devices that only have 1 slice and GT1.5/2 into another GT2 group of
> devices with 2 slices.
> 
> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> ---
>  lib/i915_pciids.h       | 18 ++++++++++--------
>  lib/intel_device_info.c | 13 +++++++++++--
>  2 files changed, 21 insertions(+), 10 deletions(-)
> 
> diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
> index bab70ff6..af4e8a6c 100644
> --- a/lib/i915_pciids.h
> +++ b/lib/i915_pciids.h
> @@ -416,21 +416,23 @@
>         INTEL_CFL_U_GT3_IDS(info)
>  
>  /* CNL */
> -#define INTEL_CNL_IDS(info) \
> +#define INTEL_CNL_GT1_IDS(info) \
> +       INTEL_VGA_DEVICE(0x5A49, info), \
> +       INTEL_VGA_DEVICE(0x5A4A, info), \
> +       INTEL_VGA_DEVICE(0x5A41, info), \
> +       INTEL_VGA_DEVICE(0x5A42, info), \
> +       INTEL_VGA_DEVICE(0x5A44, info), \
> +       INTEL_VGA_DEVICE(0x5A4C, info)
> +
> +#define INTEL_CNL_GT2_IDS(info) \
>         INTEL_VGA_DEVICE(0x5A51, info), \
>         INTEL_VGA_DEVICE(0x5A59, info), \
> -       INTEL_VGA_DEVICE(0x5A41, info), \
> -       INTEL_VGA_DEVICE(0x5A49, info), \
>         INTEL_VGA_DEVICE(0x5A52, info), \
>         INTEL_VGA_DEVICE(0x5A5A, info), \
> -       INTEL_VGA_DEVICE(0x5A42, info), \
> -       INTEL_VGA_DEVICE(0x5A4A, info), \
>         INTEL_VGA_DEVICE(0x5A50, info), \
>         INTEL_VGA_DEVICE(0x5A40, info), \
>         INTEL_VGA_DEVICE(0x5A54, info), \
> -       INTEL_VGA_DEVICE(0x5A5C, info), \
> -       INTEL_VGA_DEVICE(0x5A44, info), \
> -       INTEL_VGA_DEVICE(0x5A4C, info)
> +       INTEL_VGA_DEVICE(0x5A5C, info)

Kernel commit sha for the above?
-Chris
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^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [igt-dev] [PATCH i-g-t 1/4] intel: deviceinfo: split CNL pciids into GT1/2
  2018-05-15 13:02 ` [igt-dev] [PATCH i-g-t 1/4] " Chris Wilson
@ 2018-05-15 13:39   ` Lionel Landwerlin
  0 siblings, 0 replies; 8+ messages in thread
From: Lionel Landwerlin @ 2018-05-15 13:39 UTC (permalink / raw)
  To: Chris Wilson, igt-dev


[-- Attachment #1.1: Type: text/plain, Size: 262 bytes --]

On 15/05/18 14:02, Chris Wilson wrote:
>> -       INTEL_VGA_DEVICE(0x5A44, info), \
>> -       INTEL_VGA_DEVICE(0x5A4C, info)
>> +       INTEL_VGA_DEVICE(0x5A5C, info)
> Kernel commit sha for the above? -Chris 
Apologies, I forgot those 2 were synced.

-
Lionel

[-- Attachment #1.2: Type: text/html, Size: 728 bytes --]

[-- Attachment #2: Type: text/plain, Size: 154 bytes --]

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^ permalink raw reply	[flat|nested] 8+ messages in thread

* [igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,1/4] intel: deviceinfo: split CNL pciids into GT1/2
  2018-05-15  9:22 [igt-dev] [PATCH i-g-t 1/4] intel: deviceinfo: split CNL pciids into GT1/2 Lionel Landwerlin
                   ` (4 preceding siblings ...)
  2018-05-15 13:02 ` [igt-dev] [PATCH i-g-t 1/4] " Chris Wilson
@ 2018-05-15 21:03 ` Patchwork
  5 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2018-05-15 21:03 UTC (permalink / raw)
  To: Lionel Landwerlin; +Cc: igt-dev

== Series Details ==

Series: series starting with [i-g-t,1/4] intel: deviceinfo: split CNL pciids into GT1/2
URL   : https://patchwork.freedesktop.org/series/43183/
State : success

== Summary ==

= CI Bug Log - changes from IGT_4480_full -> IGTPW_1365_full =

== Summary - WARNING ==

  Minor unknown changes coming with IGTPW_1365_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_1365_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/43183/revisions/1/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in IGTPW_1365_full:

  === IGT changes ===

    ==== Warnings ====

    igt@gem_exec_schedule@deep-render:
      shard-kbl:          PASS -> SKIP

    igt@gem_mocs_settings@mocs-rc6-blt:
      shard-kbl:          SKIP -> PASS +1

    
== Known issues ==

  Here are the changes found in IGTPW_1365_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@gem_eio@execbuf:
      shard-snb:          PASS -> DMESG-WARN (fdo#106523) +3

    igt@gem_eio@hibernate:
      shard-hsw:          PASS -> DMESG-WARN (fdo#106523) +4

    igt@gem_eio@in-flight-internal-immediate:
      shard-glk:          PASS -> DMESG-WARN (fdo#106523) +2

    igt@gem_eio@in-flight-suspend:
      shard-kbl:          PASS -> DMESG-WARN (fdo#106523) +4

    igt@gem_eio@suspend:
      shard-apl:          PASS -> DMESG-WARN (fdo#106523) +4

    igt@gem_eio@unwedge-stress:
      shard-glk:          NOTRUN -> DMESG-WARN (fdo#106523) +2

    igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
      shard-glk:          NOTRUN -> FAIL (fdo#105454, fdo#106509)

    igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
      shard-glk:          PASS -> FAIL (fdo#105363)

    igt@kms_flip@dpms-vs-vblank-race:
      shard-hsw:          PASS -> FAIL (fdo#103060)

    igt@kms_flip@plain-flip-fb-recreate:
      shard-glk:          NOTRUN -> FAIL (fdo#100368)

    igt@kms_setmode@basic:
      shard-glk:          NOTRUN -> FAIL (fdo#99912)
      shard-kbl:          PASS -> FAIL (fdo#99912)

    igt@pm_rpm@system-suspend:
      shard-kbl:          PASS -> INCOMPLETE (fdo#103665)

    
    ==== Possible fixes ====

    igt@gem_eio@in-flight-internal-10ms:
      shard-glk:          DMESG-WARN (fdo#106523) -> PASS +3

    igt@gem_eio@unwedge-stress:
      shard-snb:          DMESG-WARN (fdo#106523) -> PASS +4

    igt@gem_eio@wait-wedge-10ms:
      shard-apl:          DMESG-WARN (fdo#106523) -> PASS +2
      shard-kbl:          DMESG-WARN (fdo#106523) -> PASS +1

    igt@gem_eio@wait-wedge-immediate:
      shard-hsw:          DMESG-WARN (fdo#106523) -> PASS +3

    igt@kms_cursor_crc@cursor-64x21-onscreen:
      shard-kbl:          DMESG-WARN (fdo#103313, fdo#105602, fdo#103558) -> PASS +8

    igt@kms_fbcon_fbt@fbc-suspend:
      shard-kbl:          INCOMPLETE (fdo#103665) -> PASS

    igt@kms_flip@flip-vs-expired-vblank-interruptible:
      shard-glk:          FAIL (fdo#105363) -> PASS

    igt@kms_flip@flip-vs-panning-vs-hang:
      shard-snb:          DMESG-WARN (fdo#103821) -> PASS

    igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
      shard-kbl:          DMESG-WARN (fdo#105602, fdo#103558, fdo#103841) -> PASS

    igt@kms_rotation_crc@sprite-rotation-180:
      shard-snb:          FAIL (fdo#103925, fdo#104724) -> PASS

    igt@kms_rotation_crc@sprite-rotation-270:
      shard-apl:          FAIL (fdo#103925, fdo#104724) -> PASS

    igt@kms_universal_plane@cursor-fb-leak-pipe-b:
      shard-kbl:          DMESG-WARN (fdo#105602, fdo#103558) -> PASS +17

    
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
  fdo#103313 https://bugs.freedesktop.org/show_bug.cgi?id=103313
  fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#103821 https://bugs.freedesktop.org/show_bug.cgi?id=103821
  fdo#103841 https://bugs.freedesktop.org/show_bug.cgi?id=103841
  fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
  fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724
  fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
  fdo#105454 https://bugs.freedesktop.org/show_bug.cgi?id=105454
  fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602
  fdo#106509 https://bugs.freedesktop.org/show_bug.cgi?id=106509
  fdo#106523 https://bugs.freedesktop.org/show_bug.cgi?id=106523
  fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912


== Participating hosts (5 -> 5) ==

  No changes in participating hosts


== Build changes ==

    * IGT: IGT_4480 -> IGTPW_1365
    * Linux: CI_DRM_4182 -> CI_DRM_4183
    * Piglit: piglit_4480 -> piglit_4481

  CI_DRM_4182: 74146e495c113f6cf8721bb55feec6b459199cd4 @ git://anongit.freedesktop.org/gfx-ci/linux
  CI_DRM_4183: 9d97c6e3fd3ac8dd73f107ca85e2a12c746a2ccc @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_1365: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1365/
  IGT_4480: 18fa0c11012da6aa9a5511dc9b1736064a02b429 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4480: 3ba0657bff4216d1ec7179935590261855f1651e @ git://anongit.freedesktop.org/piglit
  piglit_4481: 3ba0657bff4216d1ec7179935590261855f1651e @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1365/shards.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
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^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2018-05-15 21:03 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-05-15  9:22 [igt-dev] [PATCH i-g-t 1/4] intel: deviceinfo: split CNL pciids into GT1/2 Lionel Landwerlin
2018-05-15  9:22 ` [igt-dev] [PATCH i-g-t 2/4] intel: deviceinfo: register all ICL devices as GT1 Lionel Landwerlin
2018-05-15  9:22 ` [igt-dev] [PATCH i-g-t 3/4] lib: intel: report GT size from the database if available Lionel Landwerlin
2018-05-15  9:22 ` [igt-dev] [PATCH i-g-t 4/4] tests/perf: print out GT size if unknown Lionel Landwerlin
2018-05-15 12:37 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/4] intel: deviceinfo: split CNL pciids into GT1/2 Patchwork
2018-05-15 13:02 ` [igt-dev] [PATCH i-g-t 1/4] " Chris Wilson
2018-05-15 13:39   ` Lionel Landwerlin
2018-05-15 21:03 ` [igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,1/4] " Patchwork

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