From: Simon Guo <wei.guo.simon@gmail.com>
To: Paul Mackerras <paulus@ozlabs.org>
Cc: linuxppc-dev@lists.ozlabs.org, kvm-ppc@vger.kernel.org,
kvm@vger.kernel.org
Subject: Re: [PATCH v2 07/30] KVM: PPC: Book3S PR: add C function wrapper for _kvmppc_save/restore_tm()
Date: Tue, 15 May 2018 20:41:19 +0800 [thread overview]
Message-ID: <20180515124119.GB10886@simonLocalRHEL7.x64> (raw)
In-Reply-To: <20180515060548.GB28451@fergus.ozlabs.ibm.com>
On Tue, May 15, 2018 at 04:05:48PM +1000, Paul Mackerras wrote:
> On Wed, Feb 28, 2018 at 01:37:14AM +0800, wei.guo.simon@gmail.com wrote:
> > From: Simon Guo <wei.guo.simon@gmail.com>
> >
> > Currently _kvmppc_save/restore_tm() APIs can only be invoked from
> > assembly function. This patch adds C function wrappers for them so
> > that they can be safely called from C function.
> >
> > Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
>
> Some relatively minor comments below:
>
> > diff --git a/arch/powerpc/kvm/tm.S b/arch/powerpc/kvm/tm.S
> > index 2d6fe5b..269dd11 100644
> > --- a/arch/powerpc/kvm/tm.S
> > +++ b/arch/powerpc/kvm/tm.S
> > @@ -35,7 +35,7 @@
> > * This can modify all checkpointed registers, but
> > * restores r1, r2 before exit.
> > */
> > -_GLOBAL(kvmppc_save_tm)
> > +_GLOBAL(__kvmppc_save_tm)
> > mflr r0
> > std r0, PPC_LR_STKOFF(r1)
> >
> > @@ -149,6 +149,52 @@ _GLOBAL(kvmppc_save_tm)
> > blr
> >
> > /*
> > + * _kvmppc_save_tm() is a wrapper around __kvmppc_save_tm(), so that it can
> > + * be invoked from C function by PR KVM only.
> > + */
> > +_GLOBAL(_kvmppc_save_tm_pr)
>
> The comment doesn't match the actual function name.
I will correct that. Thanks for point it out.
>
> > + mflr r5
> > + std r5, PPC_LR_STKOFF(r1)
> > + stdu r1, -SWITCH_FRAME_SIZE(r1)
> > + SAVE_NVGPRS(r1)
> > +
> > + /* save MSR since TM/math bits might be impacted
> > + * by __kvmppc_save_tm().
> > + */
> > + mfmsr r5
> > + SAVE_GPR(5, r1)
> > +
> > + /* also save DSCR/CR so that it can be recovered later */
> > + mfspr r6, SPRN_DSCR
> > + SAVE_GPR(6, r1)
> > +
> > + mfcr r7
> > + stw r7, _CCR(r1)
> > +
> > + bl __kvmppc_save_tm
> > +
> > + ld r7, _CCR(r1)
> > + mtcr r7
> > +
> > + REST_GPR(6, r1)
> > + mtspr SPRN_DSCR, r6
> > +
> > + /* need preserve current MSR's MSR_TS bits */
> > + REST_GPR(5, r1)
> > + mfmsr r6
> > + rldicl r6, r6, 64 - MSR_TS_S_LG, 62
> > + rldimi r5, r6, MSR_TS_S_LG, 63 - MSR_TS_T_LG
> > + mtmsrd r5
> > +
> > + REST_NVGPRS(r1)
> > + addi r1, r1, SWITCH_FRAME_SIZE
> > + ld r5, PPC_LR_STKOFF(r1)
> > + mtlr r5
> > + blr
> > +
> > +EXPORT_SYMBOL_GPL(_kvmppc_save_tm_pr);
> > +
> > +/*
> > * Restore transactional state and TM-related registers.
> > * Called with:
> > * - r3 pointing to the vcpu struct.
> > @@ -158,7 +204,7 @@ _GLOBAL(kvmppc_save_tm)
> > * This potentially modifies all checkpointed registers.
> > * It restores r1, r2 from the PACA.
> > */
> > -_GLOBAL(kvmppc_restore_tm)
> > +_GLOBAL(__kvmppc_restore_tm)
> > mflr r0
> > std r0, PPC_LR_STKOFF(r1)
> >
> > @@ -186,6 +232,7 @@ _GLOBAL(kvmppc_restore_tm)
> > rldicl. r5, r5, 64 - MSR_TS_S_LG, 62
> > beqlr /* TM not active in guest */
> > std r1, HSTATE_SCRATCH2(r13)
> > + std r3, HSTATE_SCRATCH1(r13)
>
> Why do we need to save r3 here and restore it below?
I think it is a legacy change when I did TM save/restore on each trap from
guest to host. It can be removed now.
>
> >
> > /* Make sure the failure summary is set, otherwise we'll program check
> > * when we trechkpt. It's possible that this might have been not set
> > @@ -262,6 +309,7 @@ _GLOBAL(kvmppc_restore_tm)
> > ld r29, HSTATE_DSCR(r13)
> > mtspr SPRN_DSCR, r29
> > #endif
> > + ld r3, HSTATE_SCRATCH1(r13)
> > ld r1, HSTATE_SCRATCH2(r13)
> > ld r2, PACATMSCRATCH(r13)
> >
> > @@ -273,4 +321,47 @@ _GLOBAL(kvmppc_restore_tm)
> > mtlr r0
> > blr
> >
> > +/*
> > + * _kvmppc_restore_tm() is a wrapper around __kvmppc_restore_tm(), so that it
> > + * can be invoked from C function by PR KVM only.
> > + */
> > +_GLOBAL(_kvmppc_restore_tm_pr)
>
> Again, comment doesn't match the actual function name.
I will correct that.
Thanks,
- Simon
WARNING: multiple messages have this Message-ID (diff)
From: Simon Guo <wei.guo.simon@gmail.com>
To: Paul Mackerras <paulus@ozlabs.org>
Cc: linuxppc-dev@lists.ozlabs.org, kvm@vger.kernel.org,
kvm-ppc@vger.kernel.org
Subject: Re: [PATCH v2 07/30] KVM: PPC: Book3S PR: add C function wrapper for _kvmppc_save/restore_tm()
Date: Tue, 15 May 2018 20:41:19 +0800 [thread overview]
Message-ID: <20180515124119.GB10886@simonLocalRHEL7.x64> (raw)
In-Reply-To: <20180515060548.GB28451@fergus.ozlabs.ibm.com>
On Tue, May 15, 2018 at 04:05:48PM +1000, Paul Mackerras wrote:
> On Wed, Feb 28, 2018 at 01:37:14AM +0800, wei.guo.simon@gmail.com wrote:
> > From: Simon Guo <wei.guo.simon@gmail.com>
> >
> > Currently _kvmppc_save/restore_tm() APIs can only be invoked from
> > assembly function. This patch adds C function wrappers for them so
> > that they can be safely called from C function.
> >
> > Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
>
> Some relatively minor comments below:
>
> > diff --git a/arch/powerpc/kvm/tm.S b/arch/powerpc/kvm/tm.S
> > index 2d6fe5b..269dd11 100644
> > --- a/arch/powerpc/kvm/tm.S
> > +++ b/arch/powerpc/kvm/tm.S
> > @@ -35,7 +35,7 @@
> > * This can modify all checkpointed registers, but
> > * restores r1, r2 before exit.
> > */
> > -_GLOBAL(kvmppc_save_tm)
> > +_GLOBAL(__kvmppc_save_tm)
> > mflr r0
> > std r0, PPC_LR_STKOFF(r1)
> >
> > @@ -149,6 +149,52 @@ _GLOBAL(kvmppc_save_tm)
> > blr
> >
> > /*
> > + * _kvmppc_save_tm() is a wrapper around __kvmppc_save_tm(), so that it can
> > + * be invoked from C function by PR KVM only.
> > + */
> > +_GLOBAL(_kvmppc_save_tm_pr)
>
> The comment doesn't match the actual function name.
I will correct that. Thanks for point it out.
>
> > + mflr r5
> > + std r5, PPC_LR_STKOFF(r1)
> > + stdu r1, -SWITCH_FRAME_SIZE(r1)
> > + SAVE_NVGPRS(r1)
> > +
> > + /* save MSR since TM/math bits might be impacted
> > + * by __kvmppc_save_tm().
> > + */
> > + mfmsr r5
> > + SAVE_GPR(5, r1)
> > +
> > + /* also save DSCR/CR so that it can be recovered later */
> > + mfspr r6, SPRN_DSCR
> > + SAVE_GPR(6, r1)
> > +
> > + mfcr r7
> > + stw r7, _CCR(r1)
> > +
> > + bl __kvmppc_save_tm
> > +
> > + ld r7, _CCR(r1)
> > + mtcr r7
> > +
> > + REST_GPR(6, r1)
> > + mtspr SPRN_DSCR, r6
> > +
> > + /* need preserve current MSR's MSR_TS bits */
> > + REST_GPR(5, r1)
> > + mfmsr r6
> > + rldicl r6, r6, 64 - MSR_TS_S_LG, 62
> > + rldimi r5, r6, MSR_TS_S_LG, 63 - MSR_TS_T_LG
> > + mtmsrd r5
> > +
> > + REST_NVGPRS(r1)
> > + addi r1, r1, SWITCH_FRAME_SIZE
> > + ld r5, PPC_LR_STKOFF(r1)
> > + mtlr r5
> > + blr
> > +
> > +EXPORT_SYMBOL_GPL(_kvmppc_save_tm_pr);
> > +
> > +/*
> > * Restore transactional state and TM-related registers.
> > * Called with:
> > * - r3 pointing to the vcpu struct.
> > @@ -158,7 +204,7 @@ _GLOBAL(kvmppc_save_tm)
> > * This potentially modifies all checkpointed registers.
> > * It restores r1, r2 from the PACA.
> > */
> > -_GLOBAL(kvmppc_restore_tm)
> > +_GLOBAL(__kvmppc_restore_tm)
> > mflr r0
> > std r0, PPC_LR_STKOFF(r1)
> >
> > @@ -186,6 +232,7 @@ _GLOBAL(kvmppc_restore_tm)
> > rldicl. r5, r5, 64 - MSR_TS_S_LG, 62
> > beqlr /* TM not active in guest */
> > std r1, HSTATE_SCRATCH2(r13)
> > + std r3, HSTATE_SCRATCH1(r13)
>
> Why do we need to save r3 here and restore it below?
I think it is a legacy change when I did TM save/restore on each trap from
guest to host. It can be removed now.
>
> >
> > /* Make sure the failure summary is set, otherwise we'll program check
> > * when we trechkpt. It's possible that this might have been not set
> > @@ -262,6 +309,7 @@ _GLOBAL(kvmppc_restore_tm)
> > ld r29, HSTATE_DSCR(r13)
> > mtspr SPRN_DSCR, r29
> > #endif
> > + ld r3, HSTATE_SCRATCH1(r13)
> > ld r1, HSTATE_SCRATCH2(r13)
> > ld r2, PACATMSCRATCH(r13)
> >
> > @@ -273,4 +321,47 @@ _GLOBAL(kvmppc_restore_tm)
> > mtlr r0
> > blr
> >
> > +/*
> > + * _kvmppc_restore_tm() is a wrapper around __kvmppc_restore_tm(), so that it
> > + * can be invoked from C function by PR KVM only.
> > + */
> > +_GLOBAL(_kvmppc_restore_tm_pr)
>
> Again, comment doesn't match the actual function name.
I will correct that.
Thanks,
- Simon
WARNING: multiple messages have this Message-ID (diff)
From: Simon Guo <wei.guo.simon@gmail.com>
To: Paul Mackerras <paulus@ozlabs.org>
Cc: linuxppc-dev@lists.ozlabs.org, kvm-ppc@vger.kernel.org,
kvm@vger.kernel.org
Subject: Re: [PATCH v2 07/30] KVM: PPC: Book3S PR: add C function wrapper for _kvmppc_save/restore_tm()
Date: Tue, 15 May 2018 12:41:19 +0000 [thread overview]
Message-ID: <20180515124119.GB10886@simonLocalRHEL7.x64> (raw)
In-Reply-To: <20180515060548.GB28451@fergus.ozlabs.ibm.com>
On Tue, May 15, 2018 at 04:05:48PM +1000, Paul Mackerras wrote:
> On Wed, Feb 28, 2018 at 01:37:14AM +0800, wei.guo.simon@gmail.com wrote:
> > From: Simon Guo <wei.guo.simon@gmail.com>
> >
> > Currently _kvmppc_save/restore_tm() APIs can only be invoked from
> > assembly function. This patch adds C function wrappers for them so
> > that they can be safely called from C function.
> >
> > Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
>
> Some relatively minor comments below:
>
> > diff --git a/arch/powerpc/kvm/tm.S b/arch/powerpc/kvm/tm.S
> > index 2d6fe5b..269dd11 100644
> > --- a/arch/powerpc/kvm/tm.S
> > +++ b/arch/powerpc/kvm/tm.S
> > @@ -35,7 +35,7 @@
> > * This can modify all checkpointed registers, but
> > * restores r1, r2 before exit.
> > */
> > -_GLOBAL(kvmppc_save_tm)
> > +_GLOBAL(__kvmppc_save_tm)
> > mflr r0
> > std r0, PPC_LR_STKOFF(r1)
> >
> > @@ -149,6 +149,52 @@ _GLOBAL(kvmppc_save_tm)
> > blr
> >
> > /*
> > + * _kvmppc_save_tm() is a wrapper around __kvmppc_save_tm(), so that it can
> > + * be invoked from C function by PR KVM only.
> > + */
> > +_GLOBAL(_kvmppc_save_tm_pr)
>
> The comment doesn't match the actual function name.
I will correct that. Thanks for point it out.
>
> > + mflr r5
> > + std r5, PPC_LR_STKOFF(r1)
> > + stdu r1, -SWITCH_FRAME_SIZE(r1)
> > + SAVE_NVGPRS(r1)
> > +
> > + /* save MSR since TM/math bits might be impacted
> > + * by __kvmppc_save_tm().
> > + */
> > + mfmsr r5
> > + SAVE_GPR(5, r1)
> > +
> > + /* also save DSCR/CR so that it can be recovered later */
> > + mfspr r6, SPRN_DSCR
> > + SAVE_GPR(6, r1)
> > +
> > + mfcr r7
> > + stw r7, _CCR(r1)
> > +
> > + bl __kvmppc_save_tm
> > +
> > + ld r7, _CCR(r1)
> > + mtcr r7
> > +
> > + REST_GPR(6, r1)
> > + mtspr SPRN_DSCR, r6
> > +
> > + /* need preserve current MSR's MSR_TS bits */
> > + REST_GPR(5, r1)
> > + mfmsr r6
> > + rldicl r6, r6, 64 - MSR_TS_S_LG, 62
> > + rldimi r5, r6, MSR_TS_S_LG, 63 - MSR_TS_T_LG
> > + mtmsrd r5
> > +
> > + REST_NVGPRS(r1)
> > + addi r1, r1, SWITCH_FRAME_SIZE
> > + ld r5, PPC_LR_STKOFF(r1)
> > + mtlr r5
> > + blr
> > +
> > +EXPORT_SYMBOL_GPL(_kvmppc_save_tm_pr);
> > +
> > +/*
> > * Restore transactional state and TM-related registers.
> > * Called with:
> > * - r3 pointing to the vcpu struct.
> > @@ -158,7 +204,7 @@ _GLOBAL(kvmppc_save_tm)
> > * This potentially modifies all checkpointed registers.
> > * It restores r1, r2 from the PACA.
> > */
> > -_GLOBAL(kvmppc_restore_tm)
> > +_GLOBAL(__kvmppc_restore_tm)
> > mflr r0
> > std r0, PPC_LR_STKOFF(r1)
> >
> > @@ -186,6 +232,7 @@ _GLOBAL(kvmppc_restore_tm)
> > rldicl. r5, r5, 64 - MSR_TS_S_LG, 62
> > beqlr /* TM not active in guest */
> > std r1, HSTATE_SCRATCH2(r13)
> > + std r3, HSTATE_SCRATCH1(r13)
>
> Why do we need to save r3 here and restore it below?
I think it is a legacy change when I did TM save/restore on each trap from
guest to host. It can be removed now.
>
> >
> > /* Make sure the failure summary is set, otherwise we'll program check
> > * when we trechkpt. It's possible that this might have been not set
> > @@ -262,6 +309,7 @@ _GLOBAL(kvmppc_restore_tm)
> > ld r29, HSTATE_DSCR(r13)
> > mtspr SPRN_DSCR, r29
> > #endif
> > + ld r3, HSTATE_SCRATCH1(r13)
> > ld r1, HSTATE_SCRATCH2(r13)
> > ld r2, PACATMSCRATCH(r13)
> >
> > @@ -273,4 +321,47 @@ _GLOBAL(kvmppc_restore_tm)
> > mtlr r0
> > blr
> >
> > +/*
> > + * _kvmppc_restore_tm() is a wrapper around __kvmppc_restore_tm(), so that it
> > + * can be invoked from C function by PR KVM only.
> > + */
> > +_GLOBAL(_kvmppc_restore_tm_pr)
>
> Again, comment doesn't match the actual function name.
I will correct that.
Thanks,
- Simon
next prev parent reply other threads:[~2018-05-15 12:41 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-27 17:37 [PATCH v2 00/30] KVM: PPC: Book3S PR: Transaction memory support on PR KVM wei.guo.simon
2018-02-27 17:37 ` wei.guo.simon
2018-02-27 17:37 ` wei.guo.simon
2018-02-27 17:37 ` [PATCH v2 01/30] powerpc: export symbol msr_check_and_set() wei.guo.simon
2018-02-27 17:37 ` wei.guo.simon
2018-02-27 17:37 ` wei.guo.simon
2018-02-27 17:37 ` [PATCH v2 02/30] powerpc: add TEXASR related macros wei.guo.simon
2018-02-27 17:37 ` wei.guo.simon
2018-02-27 17:37 ` wei.guo.simon
2018-02-27 17:37 ` [PATCH v2 03/30] powerpc: export tm_enable()/tm_disable/tm_abort() APIs wei.guo.simon
2018-02-27 17:37 ` wei.guo.simon
2018-02-27 17:37 ` wei.guo.simon
2018-02-27 17:37 ` [PATCH v2 04/30] KVM: PPC: Book3S PR: Move kvmppc_save_tm/kvmppc_restore_tm to separate file wei.guo.simon
2018-02-27 17:37 ` wei.guo.simon
2018-02-27 17:37 ` wei.guo.simon
2018-02-27 17:37 ` [PATCH v2 05/30] KVM: PPC: Book3S PR: add new parameter (guest MSR) for kvmppc_save_tm()/kvmppc_restore_tm() wei.guo.simon
2018-02-27 17:37 ` [PATCH v2 05/30] KVM: PPC: Book3S PR: add new parameter (guest MSR) for kvmppc_save_tm()/kvmppc_rest wei.guo.simon
2018-02-27 17:37 ` [PATCH v2 05/30] KVM: PPC: Book3S PR: add new parameter (guest MSR) for kvmppc_save_tm()/kvmppc_restore_tm() wei.guo.simon
2018-02-27 17:37 ` [PATCH v2 06/30] KVM: PPC: Book3S PR: turn on FP/VSX/VMX MSR bits in kvmppc_save_tm() wei.guo.simon
2018-02-27 17:37 ` wei.guo.simon
2018-02-27 17:37 ` wei.guo.simon
2018-02-27 17:37 ` [PATCH v2 07/30] KVM: PPC: Book3S PR: add C function wrapper for _kvmppc_save/restore_tm() wei.guo.simon
2018-02-27 17:37 ` wei.guo.simon
2018-02-27 17:37 ` wei.guo.simon
2018-05-15 6:05 ` Paul Mackerras
2018-05-15 6:05 ` Paul Mackerras
2018-05-15 6:05 ` Paul Mackerras
2018-05-15 12:41 ` Simon Guo [this message]
2018-05-15 12:41 ` Simon Guo
2018-05-15 12:41 ` Simon Guo
2018-02-27 17:37 ` [PATCH v2 08/30] KVM: PPC: Book3S PR: In PR KVM suspends Transactional state when inject an interrupt wei.guo.simon
2018-02-27 17:37 ` [PATCH v2 08/30] KVM: PPC: Book3S PR: In PR KVM suspends Transactional state when inject an interrup wei.guo.simon
2018-02-27 17:37 ` [PATCH v2 08/30] KVM: PPC: Book3S PR: In PR KVM suspends Transactional state when inject an interrupt wei.guo.simon
2018-02-27 17:37 ` [PATCH v2 09/30] KVM: PPC: Book3S PR: PR KVM pass through MSR TM/TS bits to shadow_msr wei.guo.simon
2018-02-27 17:37 ` wei.guo.simon
2018-02-27 17:37 ` wei.guo.simon
2018-02-27 17:37 ` [PATCH v2 10/30] KVM: PPC: Book3S PR: Sync TM bits to shadow msr for problem state guest wei.guo.simon
2018-02-27 17:37 ` wei.guo.simon
2018-02-27 17:37 ` wei.guo.simon
2018-05-15 6:01 ` [PATCH v2 00/30] KVM: PPC: Book3S PR: Transaction memory support on PR KVM Paul Mackerras
2018-05-15 6:01 ` Paul Mackerras
2018-05-15 6:01 ` Paul Mackerras
2018-05-15 11:44 ` Simon Guo
2018-05-15 11:44 ` Simon Guo
2018-05-15 11:44 ` Simon Guo
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20180515124119.GB10886@simonLocalRHEL7.x64 \
--to=wei.guo.simon@gmail.com \
--cc=kvm-ppc@vger.kernel.org \
--cc=kvm@vger.kernel.org \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=paulus@ozlabs.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.