[PATCH 0/7] ZFB support for amdgpu

[PATCH 0/7] ZFB support for amdgpu

[Alex Deucher]

This patch set adds Zero FrameBuffer (ZFB) support to amdgpu.  This
feature is used for emulators and early silicon before vram is
available.  System ram is used for "vram".

Feifei Xu (6):
  drm/amdgpu: add new member in amdgpu_mc for zfb support
  drm/amdgpu: add amdgpu module parameter for zfb
  drm/amdgpu: init zfb start address and size
  drm/amdgpu: user reserved zfb to init vram base offset and size
  drm/amdgpu: enable physical transaction for ptd/pde when ZFB is
    enabled
  drm/amdgpu: program system bit for pte/pde when ZFB is enabled

Hawking Zhang (1):
  drm/amdgpu: program AGP aperture as frame buffer when ZFB is enabled

 drivers/gpu/drm/amd/amdgpu/amdgpu.h        |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  9 ++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c    |  4 ++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h    |  4 ++++
 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c   | 30 +++++++++++++++++++++------
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c      | 33 ++++++++++++++++++++++++------
 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c    | 30 +++++++++++++++++++++------
 7 files changed, 93 insertions(+), 18 deletions(-)

-- 
2.13.6

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[PATCH 1/7] drm/amdgpu: add new member in amdgpu_mc for zfb support

[Alex Deucher]

From: Feifei Xu <Feifei.Xu@amd.com>

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: John Bridgman <john.bridgman@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
index 893c2490b783..c760b9ad69d9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
@@ -107,6 +107,10 @@ struct amdgpu_gmc {
 	bool			translate_further;
 
 	const struct amdgpu_gmc_funcs	*gmc_funcs;
+
+	/* zero frame buffer */
+	u64		zfb_phys_addr;
+	u64		zfb_size;
 };
 
 #endif
-- 
2.13.6

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[PATCH 2/7] drm/amdgpu: add amdgpu module parameter for zfb

[Alex Deucher]

From: Feifei Xu <Feifei.Xu@amd.com>

Users can pass in an array to decide enable/disable Zero Frame Buffer.
zfb[0] = zfb_size(MB), zfb[1] = zfb_phys_addr(MB).
If zbf_size > 0, zfb is enabled. Otherwise disabled.
Usage for example:
    modprobe amdgpu zfb=256,4096

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: John Bridgman <john.bridgman@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h     | 1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 ++++
 2 files changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 2d7500921c0b..dc55b73cbeed 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -130,6 +130,7 @@ extern int amdgpu_compute_multipipe;
 extern int amdgpu_gpu_recovery;
 extern int amdgpu_emu_mode;
 extern uint amdgpu_smu_memory_pool_size;
+extern ulong amdgpu_zfb[];
 
 #ifdef CONFIG_DRM_AMDGPU_SI
 extern int amdgpu_si_support;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 739e7e09c8b0..a7a81ddab721 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -134,6 +134,7 @@ int amdgpu_compute_multipipe = -1;
 int amdgpu_gpu_recovery = -1; /* auto */
 int amdgpu_emu_mode = 0;
 uint amdgpu_smu_memory_pool_size = 0;
+ulong amdgpu_zfb[2] = {0,4096UL}; /* {0,0x100000000} */
 
 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
 module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
@@ -292,6 +293,9 @@ module_param_named(gpu_recovery, amdgpu_gpu_recovery, int, 0444);
 MODULE_PARM_DESC(emu_mode, "Emulation mode, (1 = enable, 0 = disable)");
 module_param_named(emu_mode, amdgpu_emu_mode, int, 0444);
 
+MODULE_PARM_DESC(zfb,
+    "Enable Zero Frame Buffer feature (zfb will be set like xxxx,xxxx(zfb_size MB,zfb_phys_addr MB),default disabled)");
+module_param_array_named(zfb, amdgpu_zfb, ulong, NULL, 0444);
 #ifdef CONFIG_DRM_AMDGPU_SI
 
 #if defined(CONFIG_DRM_RADEON) || defined(CONFIG_DRM_RADEON_MODULE)
-- 
2.13.6

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Re: [PATCH 2/7] drm/amdgpu: add amdgpu module parameter for zfb

[Christian König]

Am 15.05.2018 um 16:50 schrieb Alex Deucher:
> From: Feifei Xu <Feifei.Xu@amd.com>
>
> Users can pass in an array to decide enable/disable Zero Frame Buffer.
> zfb[0] = zfb_size(MB), zfb[1] = zfb_phys_addr(MB).
> If zbf_size > 0, zfb is enabled. Otherwise disabled.
> Usage for example:
>      modprobe amdgpu zfb=256,4096

I still vote for using the CMA instead of this hack for that.

Should be trivial to implement and is far less error prone than manually 
messing with memory configuration.

Christian.

>
> Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
> Acked-by: John Bridgman <john.bridgman@amd.com>
> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu.h     | 1 +
>   drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 ++++
>   2 files changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 2d7500921c0b..dc55b73cbeed 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -130,6 +130,7 @@ extern int amdgpu_compute_multipipe;
>   extern int amdgpu_gpu_recovery;
>   extern int amdgpu_emu_mode;
>   extern uint amdgpu_smu_memory_pool_size;
> +extern ulong amdgpu_zfb[];
>   
>   #ifdef CONFIG_DRM_AMDGPU_SI
>   extern int amdgpu_si_support;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index 739e7e09c8b0..a7a81ddab721 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -134,6 +134,7 @@ int amdgpu_compute_multipipe = -1;
>   int amdgpu_gpu_recovery = -1; /* auto */
>   int amdgpu_emu_mode = 0;
>   uint amdgpu_smu_memory_pool_size = 0;
> +ulong amdgpu_zfb[2] = {0,4096UL}; /* {0,0x100000000} */
>   
>   MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
>   module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
> @@ -292,6 +293,9 @@ module_param_named(gpu_recovery, amdgpu_gpu_recovery, int, 0444);
>   MODULE_PARM_DESC(emu_mode, "Emulation mode, (1 = enable, 0 = disable)");
>   module_param_named(emu_mode, amdgpu_emu_mode, int, 0444);
>   
> +MODULE_PARM_DESC(zfb,
> +    "Enable Zero Frame Buffer feature (zfb will be set like xxxx,xxxx(zfb_size MB,zfb_phys_addr MB),default disabled)");
> +module_param_array_named(zfb, amdgpu_zfb, ulong, NULL, 0444);
>   #ifdef CONFIG_DRM_AMDGPU_SI
>   
>   #if defined(CONFIG_DRM_RADEON) || defined(CONFIG_DRM_RADEON_MODULE)

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[PATCH 3/7] drm/amdgpu: init zfb start address and size

[Alex Deucher]

From: Feifei Xu <Feifei.Xu@amd.com>

Use module parameter passed from user to initialize zfb start address
and size.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: John Bridgman <john.bridgman@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 887f7c9e84e0..b175178345aa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1010,6 +1010,15 @@ static void amdgpu_device_check_arguments(struct amdgpu_device *adev)
 	}
 
 	adev->firmware.load_type = amdgpu_ucode_get_load_type(adev, amdgpu_fw_load_type);
+
+	if (amdgpu_zfb[0] > 0) {
+		dev_warn(adev->dev, "Zero Fram Buffer is enabled\n");
+		adev->gmc.zfb_phys_addr = amdgpu_zfb[1] << 20;
+		adev->gmc.zfb_size = amdgpu_zfb[0] << 20;
+	} else {
+		adev->gmc.zfb_phys_addr = 0;
+		adev->gmc.zfb_size = 0;
+	}
 }
 
 /**
-- 
2.13.6

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Re: [PATCH 3/7] drm/amdgpu: init zfb start address and size

[Nils Wallménius]

[-- Attachment #1.1: Type: text/plain, Size: 1778 bytes --]

Den tis 15 maj 2018 16:50Alex Deucher <alexdeucher-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> skrev:

> From: Feifei Xu <Feifei.Xu-5C7GfCeVMHo@public.gmane.org>
>
> Use module parameter passed from user to initialize zfb start address
> and size.
>
> Signed-off-by: Feifei Xu <Feifei.Xu-5C7GfCeVMHo@public.gmane.org>
> Signed-off-by: Hawking Zhang <Hawking.Zhang-5C7GfCeVMHo@public.gmane.org>
> Acked-by: John Bridgman <john.bridgman-5C7GfCeVMHo@public.gmane.org>
> Reviewed-by: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>
> Signed-off-by: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 887f7c9e84e0..b175178345aa 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -1010,6 +1010,15 @@ static void amdgpu_device_check_arguments(struct
> amdgpu_device *adev)
>         }
>
>         adev->firmware.load_type = amdgpu_ucode_get_load_type(adev,
> amdgpu_fw_load_type);
> +
> +       if (amdgpu_zfb[0] > 0) {
> +               dev_warn(adev->dev, "Zero Fram Buffer is enabled\n");
>

s/Fram/Frame/

BR
Nils

+               adev->gmc.zfb_phys_addr = amdgpu_zfb[1] << 20;
> +               adev->gmc.zfb_size = amdgpu_zfb[0] << 20;
> +       } else {
> +               adev->gmc.zfb_phys_addr = 0;
> +               adev->gmc.zfb_size = 0;
> +       }
>  }
>
>  /**
> --
> 2.13.6
>
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[PATCH 4/7] drm/amdgpu: user reserved zfb to init vram base offset and size

[Alex Deucher]

From: Feifei Xu <Feifei.Xu@amd.com>

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: John Bridgman <john.bridgman@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 27 +++++++++++++++++++++------
 1 file changed, 21 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 734306902e4e..65aa28f14153 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -693,7 +693,10 @@ static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
 	amdgpu_device_vram_location(adev, &adev->gmc, base);
 	amdgpu_device_gart_location(adev, mc);
 	/* base offset of vram pages */
-	adev->vm_manager.vram_base_offset = gfxhub_v1_0_get_mc_fb_offset(adev);
+	if (adev->gmc.zfb_size > 0)
+		adev->vm_manager.vram_base_offset = adev->gmc.zfb_phys_addr;
+	else
+		adev->vm_manager.vram_base_offset = gfxhub_v1_0_get_mc_fb_offset(adev);
 }
 
 /**
@@ -724,8 +727,11 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
 	}
 
 	/* size in MB on si */
-	adev->gmc.mc_vram_size =
-		adev->nbio_funcs->get_memsize(adev) * 1024ULL * 1024ULL;
+	if (adev->gmc.zfb_size > 0)
+		adev->gmc.mc_vram_size = adev->gmc.zfb_size;
+	else
+		adev->gmc.mc_vram_size =
+			adev->nbio_funcs->get_memsize(adev) * 1024ULL * 1024ULL;
 	adev->gmc.real_vram_size = adev->gmc.mc_vram_size;
 
 	if (!(adev->flags & AMD_IS_APU)) {
@@ -733,12 +739,21 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
 		if (r)
 			return r;
 	}
-	adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
-	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+
+	if (adev->gmc.zfb_size > 0) {
+		adev->gmc.aper_base = adev->gmc.zfb_phys_addr;
+		adev->gmc.aper_size = adev->gmc.zfb_size;
+	} else {
+		adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
+		adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+	}
 
 #ifdef CONFIG_X86_64
 	if (adev->flags & AMD_IS_APU) {
-		adev->gmc.aper_base = gfxhub_v1_0_get_mc_fb_offset(adev);
+		if (adev->gmc.zfb_size > 0)
+			adev->gmc.aper_base = adev->gmc.zfb_phys_addr;
+		else
+			adev->gmc.aper_base = gfxhub_v1_0_get_mc_fb_offset(adev);
 		adev->gmc.aper_size = adev->gmc.real_vram_size;
 	}
 #endif
-- 
2.13.6

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[PATCH 5/7] drm/amdgpu: enable physical transaction for ptd/pde when ZFB is enabled

[Alex Deucher]

From: Feifei Xu <Feifei.Xu@amd.com>

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: John Bridgman <john.bridgman@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 9 +++++++--
 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c  | 9 +++++++--
 2 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
index acfbd2d749cf..0d72f52a41b6 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
@@ -155,8 +155,13 @@ static void gfxhub_v1_0_init_cache_regs(struct amdgpu_device *adev)
 	WREG32_SOC15(GC, 0, mmVM_L2_CNTL3, tmp);
 
 	tmp = mmVM_L2_CNTL4_DEFAULT;
-	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_PDE_REQUEST_PHYSICAL, 0);
-	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_PTE_REQUEST_PHYSICAL, 0);
+	if (adev->gmc.zfb_size > 0) {
+		tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_PDE_REQUEST_PHYSICAL, 1);
+		tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_PTE_REQUEST_PHYSICAL, 1);
+	} else {
+		tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_PDE_REQUEST_PHYSICAL, 0);
+		tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_PTE_REQUEST_PHYSICAL, 0);
+	}
 	WREG32_SOC15(GC, 0, mmVM_L2_CNTL4, tmp);
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index 43f925773b57..e9289a6b61de 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
@@ -166,8 +166,13 @@ static void mmhub_v1_0_init_cache_regs(struct amdgpu_device *adev)
 	}
 
 	tmp = mmVM_L2_CNTL4_DEFAULT;
-	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_PDE_REQUEST_PHYSICAL, 0);
-	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_PTE_REQUEST_PHYSICAL, 0);
+	if (adev->gmc.zfb_size > 0) {
+		tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_PDE_REQUEST_PHYSICAL, 1);
+		tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_PTE_REQUEST_PHYSICAL, 1);
+	} else {
+		tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_PDE_REQUEST_PHYSICAL, 0);
+		tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_PTE_REQUEST_PHYSICAL, 0);
+	}
 	WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL4, tmp);
 }
 
-- 
2.13.6

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[PATCH 6/7] drm/amdgpu: program AGP aperture as frame buffer when ZFB is enabled

[Alex Deucher]

From: Hawking Zhang <Hawking.Zhang@amd.com>

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: John Bridgman <john.bridgman@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 19 +++++++++++++++----
 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c  | 19 +++++++++++++++----
 2 files changed, 30 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
index 0d72f52a41b6..3689f1d43685 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
@@ -71,10 +71,21 @@ static void gfxhub_v1_0_init_system_aperture_regs(struct amdgpu_device *adev)
 {
 	uint64_t value;
 
-	/* Disable AGP. */
-	WREG32_SOC15(GC, 0, mmMC_VM_AGP_BASE, 0);
-	WREG32_SOC15(GC, 0, mmMC_VM_AGP_TOP, 0);
-	WREG32_SOC15(GC, 0, mmMC_VM_AGP_BOT, 0xFFFFFFFF);
+	if (adev->gmc.zfb_size > 0) {
+		/* Disable LFB */
+		WREG32_SOC15(GC, 0, mmMC_VM_FB_LOCATION_TOP, 0);
+		WREG32_SOC15(GC, 0, mmMC_VM_FB_LOCATION_BASE, 0x00FFFFFF);
+
+		/* Enable AGP */
+		WREG32_SOC15(GC, 0, mmMC_VM_AGP_BASE, adev->gmc.zfb_phys_addr >> 24);
+		WREG32_SOC15(GC, 0, mmMC_VM_AGP_TOP, adev->gmc.vram_end >> 24);
+		WREG32_SOC15(GC, 0, mmMC_VM_AGP_BOT, adev->gmc.vram_start >> 24);
+	} else {
+		/* Disable AGP. */
+		WREG32_SOC15(GC, 0, mmMC_VM_AGP_BASE, 0);
+		WREG32_SOC15(GC, 0, mmMC_VM_AGP_TOP, 0);
+		WREG32_SOC15(GC, 0, mmMC_VM_AGP_BOT, 0xFFFFFFFF);
+	}
 
 	/* Program the system aperture low logical page number. */
 	WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index e9289a6b61de..dc0157093635 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
@@ -82,10 +82,21 @@ static void mmhub_v1_0_init_system_aperture_regs(struct amdgpu_device *adev)
 	uint64_t value;
 	uint32_t tmp;
 
-	/* Disable AGP. */
-	WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BASE, 0);
-	WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_TOP, 0);
-	WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BOT, 0x00FFFFFF);
+	if (adev->gmc.zfb_size > 0) {
+		/* Disable LFB */
+		WREG32_SOC15(MMHUB, 0, mmMC_VM_FB_LOCATION_TOP, 0);
+		WREG32_SOC15(MMHUB, 0, mmMC_VM_FB_LOCATION_BASE, 0x00FFFFFF);
+
+		/* Enable AGP */
+		WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BASE, adev->gmc.zfb_phys_addr >> 24);
+		WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_TOP, adev->gmc.vram_end >> 24);
+		WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BOT, adev->gmc.vram_start >> 24);
+	} else {
+		/* Disable AGP. */
+		WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BASE, 0);
+		WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_TOP, 0);
+		WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BOT, 0x00FFFFFF);
+	}
 
 	/* Program the system aperture low logical page number. */
 	WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
-- 
2.13.6

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[PATCH 7/7] drm/amdgpu: program system bit for pte/pde when ZFB is enabled

[Alex Deucher]

From: Feifei Xu <Feifei.Xu@amd.com>

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: John Bridgman <john.bridgman@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 2 ++
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c    | 6 ++++++
 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c  | 2 ++
 3 files changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
index 3689f1d43685..6b172caa88f1 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
@@ -44,6 +44,8 @@ static void gfxhub_v1_0_init_gart_pt_regs(struct amdgpu_device *adev)
 		+ adev->vm_manager.vram_base_offset;
 	value &= 0x0000FFFFFFFFF000ULL;
 	value |= 0x1; /*valid bit*/
+	if (adev->gmc.zfb_size > 0)
+		value |= 0x2; /*system bit*/
 
 	WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,
 		     lower_32_bits(value));
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 65aa28f14153..780a8fdb7369 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -472,6 +472,9 @@ static uint64_t gmc_v9_0_get_vm_pte_flags(struct amdgpu_device *adev,
 	if (flags & AMDGPU_VM_PAGE_WRITEABLE)
 		pte_flag |= AMDGPU_PTE_WRITEABLE;
 
+	if (adev->gmc.zfb_size > 0)
+		pte_flag |= AMDGPU_PTE_SYSTEM;
+
 	switch (flags & AMDGPU_VM_MTYPE_MASK) {
 	case AMDGPU_VM_MTYPE_DEFAULT:
 		pte_flag |= AMDGPU_PTE_MTYPE(MTYPE_NC);
@@ -507,6 +510,9 @@ static void gmc_v9_0_get_vm_pde(struct amdgpu_device *adev, int level,
 			adev->gmc.vram_start;
 	BUG_ON(*addr & 0xFFFF00000000003FULL);
 
+	if (adev->gmc.zfb_size > 0)
+		*flags |= AMDGPU_PTE_SYSTEM;
+
 	if (!adev->gmc.translate_further)
 		return;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index dc0157093635..2721403f1452 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
@@ -54,6 +54,8 @@ static void mmhub_v1_0_init_gart_pt_regs(struct amdgpu_device *adev)
 		adev->vm_manager.vram_base_offset;
 	value &= 0x0000FFFFFFFFF000ULL;
 	value |= 0x1; /* valid bit */
+	if (adev->gmc.zfb_size > 0)
+		value |= 0x2; /* system bit*/
 
 	WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,
 		     lower_32_bits(value));
-- 
2.13.6

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