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* [Qemu-devel] [PULL 0/1] target/lm32 BQL patch
@ 2018-05-21 15:49 Michael Walle
  2018-05-21 15:49 ` [Qemu-devel] [PULL 1/1] lm32: take BQL before writing IP/IM register Michael Walle
  2018-05-22 10:01 ` [Qemu-devel] [PULL 0/1] target/lm32 BQL patch Peter Maydell
  0 siblings, 2 replies; 5+ messages in thread
From: Michael Walle @ 2018-05-21 15:49 UTC (permalink / raw)
  To: qemu-devel; +Cc: Peter Maydell, Michael Walle

The following changes since commit 81e9cbd0ca1131012b058df6804b1f626a6b730c:

  lm32: take BQL before writing IP/IM register (2018-05-21 13:37:12 +0200)

are available in the git repository at:

  git://github.com/mwalle/qemu.git tags/lm32-queue/20180521

for you to fetch changes up to 81e9cbd0ca1131012b058df6804b1f626a6b730c:

  lm32: take BQL before writing IP/IM register (2018-05-21 13:37:12 +0200)

----------------------------------------------------------------

Michael Walle (1):
  lm32: take BQL before writing IP/IM register

 target/lm32/op_helper.c | 4 ++++
 1 file changed, 4 insertions(+)

-- 
2.11.0

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [Qemu-devel] [PULL 1/1] lm32: take BQL before writing IP/IM register
  2018-05-21 15:49 [Qemu-devel] [PULL 0/1] target/lm32 BQL patch Michael Walle
@ 2018-05-21 15:49 ` Michael Walle
  2018-05-22 10:01 ` [Qemu-devel] [PULL 0/1] target/lm32 BQL patch Peter Maydell
  1 sibling, 0 replies; 5+ messages in thread
From: Michael Walle @ 2018-05-21 15:49 UTC (permalink / raw)
  To: qemu-devel; +Cc: Peter Maydell, Michael Walle, qemu-stable

Writing to these registers may raise an interrupt request. Actually,
this prevents the milkymist board from starting.

Cc: qemu-stable@nongnu.org
Signed-off-by: Michael Walle <michael@walle.cc>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
---
 target/lm32/op_helper.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/target/lm32/op_helper.c b/target/lm32/op_helper.c
index 577f8306e3..234d55e056 100644
--- a/target/lm32/op_helper.c
+++ b/target/lm32/op_helper.c
@@ -102,12 +102,16 @@ void HELPER(wcsr_dc)(CPULM32State *env, uint32_t dc)
 
 void HELPER(wcsr_im)(CPULM32State *env, uint32_t im)
 {
+    qemu_mutex_lock_iothread();
     lm32_pic_set_im(env->pic_state, im);
+    qemu_mutex_unlock_iothread();
 }
 
 void HELPER(wcsr_ip)(CPULM32State *env, uint32_t im)
 {
+    qemu_mutex_lock_iothread();
     lm32_pic_set_ip(env->pic_state, im);
+    qemu_mutex_unlock_iothread();
 }
 
 void HELPER(wcsr_jtx)(CPULM32State *env, uint32_t jtx)
-- 
2.11.0

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [Qemu-devel] [PULL 0/1] target/lm32 BQL patch
  2018-05-21 15:49 [Qemu-devel] [PULL 0/1] target/lm32 BQL patch Michael Walle
  2018-05-21 15:49 ` [Qemu-devel] [PULL 1/1] lm32: take BQL before writing IP/IM register Michael Walle
@ 2018-05-22 10:01 ` Peter Maydell
  2018-05-22 18:33   ` Michael Walle
  1 sibling, 1 reply; 5+ messages in thread
From: Peter Maydell @ 2018-05-22 10:01 UTC (permalink / raw)
  To: Michael Walle; +Cc: QEMU Developers

On 21 May 2018 at 16:49, Michael Walle <michael@walle.cc> wrote:
> The following changes since commit 81e9cbd0ca1131012b058df6804b1f626a6b730c:
>
>   lm32: take BQL before writing IP/IM register (2018-05-21 13:37:12 +0200)
>
> are available in the git repository at:
>
>   git://github.com/mwalle/qemu.git tags/lm32-queue/20180521

Hi -- this doesn't appear to be a GPG signed tag?

thanks
-- PMM

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [Qemu-devel] [PULL 0/1] target/lm32 BQL patch
  2018-05-22 10:01 ` [Qemu-devel] [PULL 0/1] target/lm32 BQL patch Peter Maydell
@ 2018-05-22 18:33   ` Michael Walle
  2018-05-24 10:19     ` Peter Maydell
  0 siblings, 1 reply; 5+ messages in thread
From: Michael Walle @ 2018-05-22 18:33 UTC (permalink / raw)
  To: Peter Maydell; +Cc: QEMU Developers

Am 2018-05-22 12:01, schrieb Peter Maydell:
> On 21 May 2018 at 16:49, Michael Walle <michael@walle.cc> wrote:
>> The following changes since commit 
>> 81e9cbd0ca1131012b058df6804b1f626a6b730c:
>> 
>>   lm32: take BQL before writing IP/IM register (2018-05-21 13:37:12 
>> +0200)
>> 
>> are available in the git repository at:
>> 
>>   git://github.com/mwalle/qemu.git tags/lm32-queue/20180521
> 
> Hi -- this doesn't appear to be a GPG signed tag?
> 

whoops, fixed. I guess I get everything wrong with this 
patch/pullrequest..

-michael

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [Qemu-devel] [PULL 0/1] target/lm32 BQL patch
  2018-05-22 18:33   ` Michael Walle
@ 2018-05-24 10:19     ` Peter Maydell
  0 siblings, 0 replies; 5+ messages in thread
From: Peter Maydell @ 2018-05-24 10:19 UTC (permalink / raw)
  To: Michael Walle; +Cc: QEMU Developers

On 22 May 2018 at 19:33, Michael Walle <michael@walle.cc> wrote:
> Am 2018-05-22 12:01, schrieb Peter Maydell:
>>
>> On 21 May 2018 at 16:49, Michael Walle <michael@walle.cc> wrote:
>>>
>>> The following changes since commit
>>> 81e9cbd0ca1131012b058df6804b1f626a6b730c:
>>>
>>>   lm32: take BQL before writing IP/IM register (2018-05-21 13:37:12
>>> +0200)
>>>
>>> are available in the git repository at:
>>>
>>>   git://github.com/mwalle/qemu.git tags/lm32-queue/20180521
>>
>>
>> Hi -- this doesn't appear to be a GPG signed tag?
>>
>
> whoops, fixed. I guess I get everything wrong with this patch/pullrequest..

Applied the now-signed version.

thanks
-- PMM

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2018-05-24 10:20 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-05-21 15:49 [Qemu-devel] [PULL 0/1] target/lm32 BQL patch Michael Walle
2018-05-21 15:49 ` [Qemu-devel] [PULL 1/1] lm32: take BQL before writing IP/IM register Michael Walle
2018-05-22 10:01 ` [Qemu-devel] [PULL 0/1] target/lm32 BQL patch Peter Maydell
2018-05-22 18:33   ` Michael Walle
2018-05-24 10:19     ` Peter Maydell

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