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* [PATCH][next] drm/nouveau/disp: avoid potential overflow on shift of int value
@ 2018-05-27 21:54 ` Colin King
  0 siblings, 0 replies; 6+ messages in thread
From: Colin King @ 2018-05-27 21:54 UTC (permalink / raw)
  To: Ben Skeggs, David Airlie, dri-devel, nouveau
  Cc: kernel-janitors, linux-kernel

From: Colin Ian King <colin.king@canonical.com>

The constant values being shifted are 32 bit integers and may potentially
overflow on the shift.  Avoid this potential overflow by making them
unsigned long long values before the shift.

Detected by CoverityScan, CID#1469383, 1469400 ("Unintentional
integer overflow")

Signed-off-by: Colin Ian King <colin.king@canonical.com>
---
 drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c | 2 +-
 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c
index 29e6dd58ac48..99b94802ed63 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c
@@ -52,7 +52,7 @@ void
 gf119_disp_chan_intr(struct nv50_disp_chan *chan, bool en)
 {
 	struct nvkm_device *device = chan->disp->base.engine.subdev.device;
-	const u64 mask = 0x00000001 << chan->chid.user;
+	const u64 mask = 0x00000001ULL << chan->chid.user;
 	if (!en) {
 		nvkm_mask(device, 0x610090, mask, 0x00000000);
 		nvkm_mask(device, 0x6100a0, mask, 0x00000000);
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c
index 57719f675eec..43ae3b092e43 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c
@@ -166,7 +166,7 @@ void
 nv50_disp_chan_intr(struct nv50_disp_chan *chan, bool en)
 {
 	struct nvkm_device *device = chan->disp->base.engine.subdev.device;
-	const u64 mask = 0x00010001 << chan->chid.user;
+	const u64 mask = 0x00010001ULL << chan->chid.user;
 	const u64 data = en ? 0x00010000 : 0x00000000;
 	nvkm_mask(device, 0x610028, mask, data);
 }
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH][next] drm/nouveau/disp: avoid potential overflow on shift of int value
@ 2018-05-27 21:54 ` Colin King
  0 siblings, 0 replies; 6+ messages in thread
From: Colin King @ 2018-05-27 21:54 UTC (permalink / raw)
  To: Ben Skeggs, David Airlie, dri-devel, nouveau
  Cc: kernel-janitors, linux-kernel

From: Colin Ian King <colin.king@canonical.com>

The constant values being shifted are 32 bit integers and may potentially
overflow on the shift.  Avoid this potential overflow by making them
unsigned long long values before the shift.

Detected by CoverityScan, CID#1469383, 1469400 ("Unintentional
integer overflow")

Signed-off-by: Colin Ian King <colin.king@canonical.com>
---
 drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c | 2 +-
 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c
index 29e6dd58ac48..99b94802ed63 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c
@@ -52,7 +52,7 @@ void
 gf119_disp_chan_intr(struct nv50_disp_chan *chan, bool en)
 {
 	struct nvkm_device *device = chan->disp->base.engine.subdev.device;
-	const u64 mask = 0x00000001 << chan->chid.user;
+	const u64 mask = 0x00000001ULL << chan->chid.user;
 	if (!en) {
 		nvkm_mask(device, 0x610090, mask, 0x00000000);
 		nvkm_mask(device, 0x6100a0, mask, 0x00000000);
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c
index 57719f675eec..43ae3b092e43 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c
@@ -166,7 +166,7 @@ void
 nv50_disp_chan_intr(struct nv50_disp_chan *chan, bool en)
 {
 	struct nvkm_device *device = chan->disp->base.engine.subdev.device;
-	const u64 mask = 0x00010001 << chan->chid.user;
+	const u64 mask = 0x00010001ULL << chan->chid.user;
 	const u64 data = en ? 0x00010000 : 0x00000000;
 	nvkm_mask(device, 0x610028, mask, data);
 }
-- 
2.17.0


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH][next] drm/nouveau/disp: avoid potential overflow on shift of int value
@ 2018-05-27 21:54 ` Colin King
  0 siblings, 0 replies; 6+ messages in thread
From: Colin King @ 2018-05-27 21:54 UTC (permalink / raw)
  To: Ben Skeggs, David Airlie, dri-devel, nouveau
  Cc: kernel-janitors, linux-kernel

From: Colin Ian King <colin.king@canonical.com>

The constant values being shifted are 32 bit integers and may potentially
overflow on the shift.  Avoid this potential overflow by making them
unsigned long long values before the shift.

Detected by CoverityScan, CID#1469383, 1469400 ("Unintentional
integer overflow")

Signed-off-by: Colin Ian King <colin.king@canonical.com>
---
 drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c | 2 +-
 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c
index 29e6dd58ac48..99b94802ed63 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c
@@ -52,7 +52,7 @@ void
 gf119_disp_chan_intr(struct nv50_disp_chan *chan, bool en)
 {
 	struct nvkm_device *device = chan->disp->base.engine.subdev.device;
-	const u64 mask = 0x00000001 << chan->chid.user;
+	const u64 mask = 0x00000001ULL << chan->chid.user;
 	if (!en) {
 		nvkm_mask(device, 0x610090, mask, 0x00000000);
 		nvkm_mask(device, 0x6100a0, mask, 0x00000000);
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c
index 57719f675eec..43ae3b092e43 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c
@@ -166,7 +166,7 @@ void
 nv50_disp_chan_intr(struct nv50_disp_chan *chan, bool en)
 {
 	struct nvkm_device *device = chan->disp->base.engine.subdev.device;
-	const u64 mask = 0x00010001 << chan->chid.user;
+	const u64 mask = 0x00010001ULL << chan->chid.user;
 	const u64 data = en ? 0x00010000 : 0x00000000;
 	nvkm_mask(device, 0x610028, mask, data);
 }
-- 
2.17.0

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [Nouveau] [PATCH][next] drm/nouveau/disp: avoid potential overflow on shift of int value
  2018-05-27 21:54 ` Colin King
  (?)
@ 2018-05-28  2:14   ` Ilia Mirkin
  -1 siblings, 0 replies; 6+ messages in thread
From: Ilia Mirkin @ 2018-05-28  2:14 UTC (permalink / raw)
  To: Colin King
  Cc: Ben Skeggs, David Airlie, dri-devel, nouveau, kernel-janitors, LKML

On Sun, May 27, 2018 at 5:54 PM, Colin King <colin.king@canonical.com> wrote:
> From: Colin Ian King <colin.king@canonical.com>
>
> The constant values being shifted are 32 bit integers and may potentially
> overflow on the shift.  Avoid this potential overflow by making them
> unsigned long long values before the shift.
>
> Detected by CoverityScan, CID#1469383, 1469400 ("Unintentional
> integer overflow")
>
> Signed-off-by: Colin Ian King <colin.king@canonical.com>
> ---
>  drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c | 2 +-
>  drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c  | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c
> index 29e6dd58ac48..99b94802ed63 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c
> +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c
> @@ -52,7 +52,7 @@ void
>  gf119_disp_chan_intr(struct nv50_disp_chan *chan, bool en)
>  {
>         struct nvkm_device *device = chan->disp->base.engine.subdev.device;
> -       const u64 mask = 0x00000001 << chan->chid.user;
> +       const u64 mask = 0x00000001ULL << chan->chid.user;

I'm pretty sure all of these should just be u32 (below as well). The
registers that this is masking are all 32-bit, more doesn't make
sense.

>         if (!en) {
>                 nvkm_mask(device, 0x610090, mask, 0x00000000);
>                 nvkm_mask(device, 0x6100a0, mask, 0x00000000);
> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c
> index 57719f675eec..43ae3b092e43 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c
> +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c
> @@ -166,7 +166,7 @@ void
>  nv50_disp_chan_intr(struct nv50_disp_chan *chan, bool en)
>  {
>         struct nvkm_device *device = chan->disp->base.engine.subdev.device;
> -       const u64 mask = 0x00010001 << chan->chid.user;
> +       const u64 mask = 0x00010001ULL << chan->chid.user;
>         const u64 data = en ? 0x00010000 : 0x00000000;
>         nvkm_mask(device, 0x610028, mask, data);
>  }
> --
> 2.17.0
>
> _______________________________________________
> Nouveau mailing list
> Nouveau@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/nouveau

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [Nouveau] [PATCH][next] drm/nouveau/disp: avoid potential overflow on shift of int value
@ 2018-05-28  2:14   ` Ilia Mirkin
  0 siblings, 0 replies; 6+ messages in thread
From: Ilia Mirkin @ 2018-05-28  2:14 UTC (permalink / raw)
  To: Colin King
  Cc: David Airlie, nouveau, kernel-janitors, LKML, dri-devel, Ben Skeggs

On Sun, May 27, 2018 at 5:54 PM, Colin King <colin.king@canonical.com> wrote:
> From: Colin Ian King <colin.king@canonical.com>
>
> The constant values being shifted are 32 bit integers and may potentially
> overflow on the shift.  Avoid this potential overflow by making them
> unsigned long long values before the shift.
>
> Detected by CoverityScan, CID#1469383, 1469400 ("Unintentional
> integer overflow")
>
> Signed-off-by: Colin Ian King <colin.king@canonical.com>
> ---
>  drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c | 2 +-
>  drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c  | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c
> index 29e6dd58ac48..99b94802ed63 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c
> +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c
> @@ -52,7 +52,7 @@ void
>  gf119_disp_chan_intr(struct nv50_disp_chan *chan, bool en)
>  {
>         struct nvkm_device *device = chan->disp->base.engine.subdev.device;
> -       const u64 mask = 0x00000001 << chan->chid.user;
> +       const u64 mask = 0x00000001ULL << chan->chid.user;

I'm pretty sure all of these should just be u32 (below as well). The
registers that this is masking are all 32-bit, more doesn't make
sense.

>         if (!en) {
>                 nvkm_mask(device, 0x610090, mask, 0x00000000);
>                 nvkm_mask(device, 0x6100a0, mask, 0x00000000);
> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c
> index 57719f675eec..43ae3b092e43 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c
> +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c
> @@ -166,7 +166,7 @@ void
>  nv50_disp_chan_intr(struct nv50_disp_chan *chan, bool en)
>  {
>         struct nvkm_device *device = chan->disp->base.engine.subdev.device;
> -       const u64 mask = 0x00010001 << chan->chid.user;
> +       const u64 mask = 0x00010001ULL << chan->chid.user;
>         const u64 data = en ? 0x00010000 : 0x00000000;
>         nvkm_mask(device, 0x610028, mask, data);
>  }
> --
> 2.17.0
>
> _______________________________________________
> Nouveau mailing list
> Nouveau@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/nouveau

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [Nouveau] [PATCH][next] drm/nouveau/disp: avoid potential overflow on shift of int value
@ 2018-05-28  2:14   ` Ilia Mirkin
  0 siblings, 0 replies; 6+ messages in thread
From: Ilia Mirkin @ 2018-05-28  2:14 UTC (permalink / raw)
  To: Colin King
  Cc: David Airlie, nouveau, kernel-janitors, LKML, dri-devel, Ben Skeggs

On Sun, May 27, 2018 at 5:54 PM, Colin King <colin.king@canonical.com> wrote:
> From: Colin Ian King <colin.king@canonical.com>
>
> The constant values being shifted are 32 bit integers and may potentially
> overflow on the shift.  Avoid this potential overflow by making them
> unsigned long long values before the shift.
>
> Detected by CoverityScan, CID#1469383, 1469400 ("Unintentional
> integer overflow")
>
> Signed-off-by: Colin Ian King <colin.king@canonical.com>
> ---
>  drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c | 2 +-
>  drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c  | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c
> index 29e6dd58ac48..99b94802ed63 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c
> +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c
> @@ -52,7 +52,7 @@ void
>  gf119_disp_chan_intr(struct nv50_disp_chan *chan, bool en)
>  {
>         struct nvkm_device *device = chan->disp->base.engine.subdev.device;
> -       const u64 mask = 0x00000001 << chan->chid.user;
> +       const u64 mask = 0x00000001ULL << chan->chid.user;

I'm pretty sure all of these should just be u32 (below as well). The
registers that this is masking are all 32-bit, more doesn't make
sense.

>         if (!en) {
>                 nvkm_mask(device, 0x610090, mask, 0x00000000);
>                 nvkm_mask(device, 0x6100a0, mask, 0x00000000);
> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c
> index 57719f675eec..43ae3b092e43 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c
> +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c
> @@ -166,7 +166,7 @@ void
>  nv50_disp_chan_intr(struct nv50_disp_chan *chan, bool en)
>  {
>         struct nvkm_device *device = chan->disp->base.engine.subdev.device;
> -       const u64 mask = 0x00010001 << chan->chid.user;
> +       const u64 mask = 0x00010001ULL << chan->chid.user;
>         const u64 data = en ? 0x00010000 : 0x00000000;
>         nvkm_mask(device, 0x610028, mask, data);
>  }
> --
> 2.17.0
>
> _______________________________________________
> Nouveau mailing list
> Nouveau@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/nouveau
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2018-05-28  2:14 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-05-27 21:54 [PATCH][next] drm/nouveau/disp: avoid potential overflow on shift of int value Colin King
2018-05-27 21:54 ` Colin King
2018-05-27 21:54 ` Colin King
2018-05-28  2:14 ` [Nouveau] " Ilia Mirkin
2018-05-28  2:14   ` Ilia Mirkin
2018-05-28  2:14   ` Ilia Mirkin

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