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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Subject: [PATCH 3/6] drm/i915: Flush all writes before suspend
Date: Fri,  1 Jun 2018 10:35:51 +0100	[thread overview]
Message-ID: <20180601093554.13083-3-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20180601093554.13083-1-chris@chris-wilson.co.uk>

As we have already suspended the device, this should be a no-op except
for marking that all writes are indeed complete. The downside is that
we then have to walk all the lists of objects for what should be a no-op
(in some cases they will be mmio read to ensure the GGTT writes are
indeed flushed, and clflushes to ensure that cpu writes are in memory).

It seems prudent and the safer course for us to ensure all writes are
flushed to memory before suspend.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index f5c4ef052001..d91fb25a8a1f 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -5066,6 +5066,13 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv)
 
 void i915_gem_suspend_late(struct drm_i915_private *i915)
 {
+	struct drm_i915_gem_object *obj;
+	struct list_head *phases[] = {
+		&i915->mm.unbound_list,
+		&i915->mm.bound_list,
+		NULL
+	}, **p;
+
 	/*
 	 * Neither the BIOS, ourselves or any other kernel
 	 * expects the system to be in execlists mode on startup,
@@ -5086,6 +5093,13 @@ void i915_gem_suspend_late(struct drm_i915_private *i915)
 	 * machine in an unusable condition.
 	 */
 
+	mutex_lock(&i915->drm.struct_mutex);
+	for (p = phases; *p; p++) {
+		list_for_each_entry(obj, *p, mm.link)
+			WARN_ON(i915_gem_object_set_to_gtt_domain(obj, false));
+	}
+	mutex_unlock(&i915->drm.struct_mutex);
+
 	intel_uc_sanitize(i915);
 	i915_gem_sanitize(i915);
 }
-- 
2.17.1

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  parent reply	other threads:[~2018-06-01  9:36 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-01  9:35 [PATCH 1/6] drm/i915/gtt: Avoid calling non-existent allocate_va_range Chris Wilson
2018-06-01  9:35 ` [PATCH 2/6] drm/i915/gtt: Don't restore the non-existent PDE for GGTT Chris Wilson
2018-06-01 12:56   ` Joonas Lahtinen
2018-06-01 13:55     ` Chris Wilson
2018-06-01  9:35 ` Chris Wilson [this message]
2018-06-01 13:01   ` [PATCH 3/6] drm/i915: Flush all writes before suspend Joonas Lahtinen
2018-06-01  9:35 ` [PATCH 4/6] drm/i915: Apply the full CPU domain markup before freezing Chris Wilson
2018-06-01 13:04   ` Joonas Lahtinen
2018-06-01  9:35 ` [PATCH 5/6] drm/i915/gtt: Enable full-ppgtt by default for HSW Chris Wilson
2018-06-01  9:35 ` [PATCH 6/6] drm/i915/gtt: Enable full-ppgtt by default everywhere! Chris Wilson
2018-06-01 10:01 ` ✗ Fi.CI.BAT: failure for series starting with [1/6] drm/i915/gtt: Avoid calling non-existent allocate_va_range Patchwork
2018-06-01 11:37 ` ✗ Fi.CI.IGT: " Patchwork

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