* [PATCH 0/3] arm64: allwinner: a64: Add initial support for Pinebook
@ 2018-06-01 6:28 ` Vasily Khoruzhick
0 siblings, 0 replies; 24+ messages in thread
From: Vasily Khoruzhick @ 2018-06-01 6:28 UTC (permalink / raw)
To: linux-arm-kernel
This series adds dts for Pinebook with few prerequisites - PWM and R_I2C
devices nodes.
Andre Przywara (1):
dts: sunxi: A64: Add PWM controllers
Icenowy Zheng (2):
arm64: allwinner: a64: add R_I2C controller
arm64: dts: allwinner: add support for Pinebook
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../dts/allwinner/sun50i-a64-pinebook.dts | 285 ++++++++++++++++++
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 45 +++
3 files changed, 331 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
--
2.17.1
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 1/3] arm64: allwinner: a64: add R_I2C controller
2018-06-01 6:28 ` Vasily Khoruzhick
@ 2018-06-01 6:28 ` Vasily Khoruzhick
-1 siblings, 0 replies; 24+ messages in thread
From: Vasily Khoruzhick @ 2018-06-01 6:28 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai, Rob Herring, Mark Rutland,
Catalin Marinas, Will Deacon, linux-arm-kernel, devicetree
Cc: Icenowy Zheng
From: Icenowy Zheng <icenowy@aosc.io>
Allwinner A64 has a I2C controller, which is in the R_ MMIO zone and has
two groups of pinmuxes on PL bank, so it's called R_I2C.
Add support for this I2C controller and the pinmux which doesn't conflict
with RSB.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 1b2ef28c42bd..b5e903ccf0ec 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -46,6 +46,7 @@
#include <dt-bindings/clock/sun8i-r-ccu.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/sun50i-a64-ccu.h>
+#include <dt-bindings/reset/sun8i-r-ccu.h>
/ {
interrupt-parent = <&gic>;
@@ -655,6 +656,17 @@
#reset-cells = <1>;
};
+ r_i2c: i2c@1f02400 {
+ compatible = "allwinner,sun6i-a31-i2c";
+ reg = <0x01f02400 0x400>;
+ interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&r_ccu CLK_APB0_I2C>;
+ resets = <&r_ccu RST_APB0_I2C>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
r_pio: pinctrl@1f02c00 {
compatible = "allwinner,sun50i-a64-r-pinctrl";
reg = <0x01f02c00 0x400>;
@@ -670,6 +682,11 @@
pins = "PL0", "PL1";
function = "s_rsb";
};
+
+ r_i2c_pins_a: i2c-a {
+ pins = "PL8", "PL9";
+ function = "s_i2c";
+ };
};
r_rsb: rsb@1f03400 {
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 1/3] arm64: allwinner: a64: add R_I2C controller
@ 2018-06-01 6:28 ` Vasily Khoruzhick
0 siblings, 0 replies; 24+ messages in thread
From: Vasily Khoruzhick @ 2018-06-01 6:28 UTC (permalink / raw)
To: linux-arm-kernel
From: Icenowy Zheng <icenowy@aosc.io>
Allwinner A64 has a I2C controller, which is in the R_ MMIO zone and has
two groups of pinmuxes on PL bank, so it's called R_I2C.
Add support for this I2C controller and the pinmux which doesn't conflict
with RSB.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 1b2ef28c42bd..b5e903ccf0ec 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -46,6 +46,7 @@
#include <dt-bindings/clock/sun8i-r-ccu.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/sun50i-a64-ccu.h>
+#include <dt-bindings/reset/sun8i-r-ccu.h>
/ {
interrupt-parent = <&gic>;
@@ -655,6 +656,17 @@
#reset-cells = <1>;
};
+ r_i2c: i2c at 1f02400 {
+ compatible = "allwinner,sun6i-a31-i2c";
+ reg = <0x01f02400 0x400>;
+ interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&r_ccu CLK_APB0_I2C>;
+ resets = <&r_ccu RST_APB0_I2C>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
r_pio: pinctrl at 1f02c00 {
compatible = "allwinner,sun50i-a64-r-pinctrl";
reg = <0x01f02c00 0x400>;
@@ -670,6 +682,11 @@
pins = "PL0", "PL1";
function = "s_rsb";
};
+
+ r_i2c_pins_a: i2c-a {
+ pins = "PL8", "PL9";
+ function = "s_i2c";
+ };
};
r_rsb: rsb at 1f03400 {
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* Re: [PATCH 1/3] arm64: allwinner: a64: add R_I2C controller
2018-06-01 6:28 ` Vasily Khoruzhick
@ 2018-06-01 9:16 ` Maxime Ripard
-1 siblings, 0 replies; 24+ messages in thread
From: Maxime Ripard @ 2018-06-01 9:16 UTC (permalink / raw)
To: Vasily Khoruzhick
Cc: Mark Rutland, devicetree, Catalin Marinas, Will Deacon,
Chen-Yu Tsai, Rob Herring, linux-arm-kernel, Icenowy Zheng
[-- Attachment #1.1: Type: text/plain, Size: 2110 bytes --]
Hi,
On Thu, May 31, 2018 at 11:28:59PM -0700, Vasily Khoruzhick wrote:
> From: Icenowy Zheng <icenowy@aosc.io>
>
> Allwinner A64 has a I2C controller, which is in the R_ MMIO zone and has
> two groups of pinmuxes on PL bank, so it's called R_I2C.
>
> Add support for this I2C controller and the pinmux which doesn't conflict
> with RSB.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
You should have your SoB there.
> ---
> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> index 1b2ef28c42bd..b5e903ccf0ec 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -46,6 +46,7 @@
> #include <dt-bindings/clock/sun8i-r-ccu.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/reset/sun50i-a64-ccu.h>
> +#include <dt-bindings/reset/sun8i-r-ccu.h>
>
> / {
> interrupt-parent = <&gic>;
> @@ -655,6 +656,17 @@
> #reset-cells = <1>;
> };
>
> + r_i2c: i2c@1f02400 {
> + compatible = "allwinner,sun6i-a31-i2c";
You should add an a64 compatible here
> + reg = <0x01f02400 0x400>;
> + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&r_ccu CLK_APB0_I2C>;
> + resets = <&r_ccu RST_APB0_I2C>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> r_pio: pinctrl@1f02c00 {
> compatible = "allwinner,sun50i-a64-r-pinctrl";
> reg = <0x01f02c00 0x400>;
> @@ -670,6 +682,11 @@
> pins = "PL0", "PL1";
> function = "s_rsb";
> };
> +
> + r_i2c_pins_a: i2c-a {
> + pins = "PL8", "PL9";
> + function = "s_i2c";
> + };
This should be ordered by alphabetical order
If this is the only muxing option, you can also add it to the i2c DT
node.
Thanks!
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH 1/3] arm64: allwinner: a64: add R_I2C controller
@ 2018-06-01 9:16 ` Maxime Ripard
0 siblings, 0 replies; 24+ messages in thread
From: Maxime Ripard @ 2018-06-01 9:16 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On Thu, May 31, 2018 at 11:28:59PM -0700, Vasily Khoruzhick wrote:
> From: Icenowy Zheng <icenowy@aosc.io>
>
> Allwinner A64 has a I2C controller, which is in the R_ MMIO zone and has
> two groups of pinmuxes on PL bank, so it's called R_I2C.
>
> Add support for this I2C controller and the pinmux which doesn't conflict
> with RSB.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
You should have your SoB there.
> ---
> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> index 1b2ef28c42bd..b5e903ccf0ec 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -46,6 +46,7 @@
> #include <dt-bindings/clock/sun8i-r-ccu.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/reset/sun50i-a64-ccu.h>
> +#include <dt-bindings/reset/sun8i-r-ccu.h>
>
> / {
> interrupt-parent = <&gic>;
> @@ -655,6 +656,17 @@
> #reset-cells = <1>;
> };
>
> + r_i2c: i2c at 1f02400 {
> + compatible = "allwinner,sun6i-a31-i2c";
You should add an a64 compatible here
> + reg = <0x01f02400 0x400>;
> + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&r_ccu CLK_APB0_I2C>;
> + resets = <&r_ccu RST_APB0_I2C>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> r_pio: pinctrl at 1f02c00 {
> compatible = "allwinner,sun50i-a64-r-pinctrl";
> reg = <0x01f02c00 0x400>;
> @@ -670,6 +682,11 @@
> pins = "PL0", "PL1";
> function = "s_rsb";
> };
> +
> + r_i2c_pins_a: i2c-a {
> + pins = "PL8", "PL9";
> + function = "s_i2c";
> + };
This should be ordered by alphabetical order
If this is the only muxing option, you can also add it to the i2c DT
node.
Thanks!
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [PATCH 1/3] arm64: allwinner: a64: add R_I2C controller
2018-06-01 9:16 ` Maxime Ripard
@ 2018-06-01 17:30 ` Vasily Khoruzhick
-1 siblings, 0 replies; 24+ messages in thread
From: Vasily Khoruzhick @ 2018-06-01 17:30 UTC (permalink / raw)
To: Maxime Ripard
Cc: Mark Rutland, devicetree, Catalin Marinas, Will Deacon,
Chen-Yu Tsai, Rob Herring, arm-linux, Icenowy Zheng
On Fri, Jun 1, 2018 at 2:16 AM, Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> Hi,
>
> On Thu, May 31, 2018 at 11:28:59PM -0700, Vasily Khoruzhick wrote:
>> From: Icenowy Zheng <icenowy@aosc.io>
>>
>> Allwinner A64 has a I2C controller, which is in the R_ MMIO zone and has
>> two groups of pinmuxes on PL bank, so it's called R_I2C.
>>
>> Add support for this I2C controller and the pinmux which doesn't conflict
>> with RSB.
>>
>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>
> You should have your SoB there.
OK, will do.
>> ---
>> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 17 +++++++++++++++++
>> 1 file changed, 17 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> index 1b2ef28c42bd..b5e903ccf0ec 100644
>> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> @@ -46,6 +46,7 @@
>> #include <dt-bindings/clock/sun8i-r-ccu.h>
>> #include <dt-bindings/interrupt-controller/arm-gic.h>
>> #include <dt-bindings/reset/sun50i-a64-ccu.h>
>> +#include <dt-bindings/reset/sun8i-r-ccu.h>
>>
>> / {
>> interrupt-parent = <&gic>;
>> @@ -655,6 +656,17 @@
>> #reset-cells = <1>;
>> };
>>
>> + r_i2c: i2c@1f02400 {
>> + compatible = "allwinner,sun6i-a31-i2c";
>
> You should add an a64 compatible here
We don't have it for regular i2c, why should I add it here?
>> + reg = <0x01f02400 0x400>;
>> + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&r_ccu CLK_APB0_I2C>;
>> + resets = <&r_ccu RST_APB0_I2C>;
>> + status = "disabled";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + };
>> +
>> r_pio: pinctrl@1f02c00 {
>> compatible = "allwinner,sun50i-a64-r-pinctrl";
>> reg = <0x01f02c00 0x400>;
>> @@ -670,6 +682,11 @@
>> pins = "PL0", "PL1";
>> function = "s_rsb";
>> };
>> +
>> + r_i2c_pins_a: i2c-a {
>> + pins = "PL8", "PL9";
>> + function = "s_i2c";
>> + };
>
> This should be ordered by alphabetical order
OK
> If this is the only muxing option, you can also add it to the i2c DT
> node.
It's not the only option, but other option conflicts with rsb. Should
I still add it to i2c DT node?
>
> Thanks!
> Maxime
>
> --
> Maxime Ripard, Bootlin (formerly Free Electrons)
> Embedded Linux and Kernel engineering
> https://bootlin.com
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH 1/3] arm64: allwinner: a64: add R_I2C controller
@ 2018-06-01 17:30 ` Vasily Khoruzhick
0 siblings, 0 replies; 24+ messages in thread
From: Vasily Khoruzhick @ 2018-06-01 17:30 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Jun 1, 2018 at 2:16 AM, Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> Hi,
>
> On Thu, May 31, 2018 at 11:28:59PM -0700, Vasily Khoruzhick wrote:
>> From: Icenowy Zheng <icenowy@aosc.io>
>>
>> Allwinner A64 has a I2C controller, which is in the R_ MMIO zone and has
>> two groups of pinmuxes on PL bank, so it's called R_I2C.
>>
>> Add support for this I2C controller and the pinmux which doesn't conflict
>> with RSB.
>>
>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>
> You should have your SoB there.
OK, will do.
>> ---
>> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 17 +++++++++++++++++
>> 1 file changed, 17 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> index 1b2ef28c42bd..b5e903ccf0ec 100644
>> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> @@ -46,6 +46,7 @@
>> #include <dt-bindings/clock/sun8i-r-ccu.h>
>> #include <dt-bindings/interrupt-controller/arm-gic.h>
>> #include <dt-bindings/reset/sun50i-a64-ccu.h>
>> +#include <dt-bindings/reset/sun8i-r-ccu.h>
>>
>> / {
>> interrupt-parent = <&gic>;
>> @@ -655,6 +656,17 @@
>> #reset-cells = <1>;
>> };
>>
>> + r_i2c: i2c at 1f02400 {
>> + compatible = "allwinner,sun6i-a31-i2c";
>
> You should add an a64 compatible here
We don't have it for regular i2c, why should I add it here?
>> + reg = <0x01f02400 0x400>;
>> + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&r_ccu CLK_APB0_I2C>;
>> + resets = <&r_ccu RST_APB0_I2C>;
>> + status = "disabled";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + };
>> +
>> r_pio: pinctrl at 1f02c00 {
>> compatible = "allwinner,sun50i-a64-r-pinctrl";
>> reg = <0x01f02c00 0x400>;
>> @@ -670,6 +682,11 @@
>> pins = "PL0", "PL1";
>> function = "s_rsb";
>> };
>> +
>> + r_i2c_pins_a: i2c-a {
>> + pins = "PL8", "PL9";
>> + function = "s_i2c";
>> + };
>
> This should be ordered by alphabetical order
OK
> If this is the only muxing option, you can also add it to the i2c DT
> node.
It's not the only option, but other option conflicts with rsb. Should
I still add it to i2c DT node?
>
> Thanks!
> Maxime
>
> --
> Maxime Ripard, Bootlin (formerly Free Electrons)
> Embedded Linux and Kernel engineering
> https://bootlin.com
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [PATCH 1/3] arm64: allwinner: a64: add R_I2C controller
2018-06-01 17:30 ` Vasily Khoruzhick
@ 2018-06-04 8:51 ` Maxime Ripard
-1 siblings, 0 replies; 24+ messages in thread
From: Maxime Ripard @ 2018-06-04 8:51 UTC (permalink / raw)
To: Vasily Khoruzhick
Cc: Mark Rutland, devicetree, Catalin Marinas, Will Deacon,
Chen-Yu Tsai, Rob Herring, arm-linux, Icenowy Zheng
[-- Attachment #1.1: Type: text/plain, Size: 2678 bytes --]
On Fri, Jun 01, 2018 at 10:30:00AM -0700, Vasily Khoruzhick wrote:
> >> ---
> >> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 17 +++++++++++++++++
> >> 1 file changed, 17 insertions(+)
> >>
> >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >> index 1b2ef28c42bd..b5e903ccf0ec 100644
> >> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >> @@ -46,6 +46,7 @@
> >> #include <dt-bindings/clock/sun8i-r-ccu.h>
> >> #include <dt-bindings/interrupt-controller/arm-gic.h>
> >> #include <dt-bindings/reset/sun50i-a64-ccu.h>
> >> +#include <dt-bindings/reset/sun8i-r-ccu.h>
> >>
> >> / {
> >> interrupt-parent = <&gic>;
> >> @@ -655,6 +656,17 @@
> >> #reset-cells = <1>;
> >> };
> >>
> >> + r_i2c: i2c@1f02400 {
> >> + compatible = "allwinner,sun6i-a31-i2c";
> >
> > You should add an a64 compatible here
>
> We don't have it for regular i2c, why should I add it here?
We miss some of them. Adding for i2c would make sense too.
> >> + reg = <0x01f02400 0x400>;
> >> + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
> >> + clocks = <&r_ccu CLK_APB0_I2C>;
> >> + resets = <&r_ccu RST_APB0_I2C>;
> >> + status = "disabled";
> >> + #address-cells = <1>;
> >> + #size-cells = <0>;
> >> + };
> >> +
> >> r_pio: pinctrl@1f02c00 {
> >> compatible = "allwinner,sun50i-a64-r-pinctrl";
> >> reg = <0x01f02c00 0x400>;
> >> @@ -670,6 +682,11 @@
> >> pins = "PL0", "PL1";
> >> function = "s_rsb";
> >> };
> >> +
> >> + r_i2c_pins_a: i2c-a {
> >> + pins = "PL8", "PL9";
> >> + function = "s_i2c";
> >> + };
> >
> > This should be ordered by alphabetical order
>
> OK
>
> > If this is the only muxing option, you can also add it to the i2c DT
> > node.
>
> It's not the only option, but other option conflicts with rsb. Should
> I still add it to i2c DT node?
I guess you can put it there, the muxing will only be enforced if the
device is enabled, and there should be only one of RSB or I2C that
would be.
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH 1/3] arm64: allwinner: a64: add R_I2C controller
@ 2018-06-04 8:51 ` Maxime Ripard
0 siblings, 0 replies; 24+ messages in thread
From: Maxime Ripard @ 2018-06-04 8:51 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Jun 01, 2018 at 10:30:00AM -0700, Vasily Khoruzhick wrote:
> >> ---
> >> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 17 +++++++++++++++++
> >> 1 file changed, 17 insertions(+)
> >>
> >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >> index 1b2ef28c42bd..b5e903ccf0ec 100644
> >> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >> @@ -46,6 +46,7 @@
> >> #include <dt-bindings/clock/sun8i-r-ccu.h>
> >> #include <dt-bindings/interrupt-controller/arm-gic.h>
> >> #include <dt-bindings/reset/sun50i-a64-ccu.h>
> >> +#include <dt-bindings/reset/sun8i-r-ccu.h>
> >>
> >> / {
> >> interrupt-parent = <&gic>;
> >> @@ -655,6 +656,17 @@
> >> #reset-cells = <1>;
> >> };
> >>
> >> + r_i2c: i2c at 1f02400 {
> >> + compatible = "allwinner,sun6i-a31-i2c";
> >
> > You should add an a64 compatible here
>
> We don't have it for regular i2c, why should I add it here?
We miss some of them. Adding for i2c would make sense too.
> >> + reg = <0x01f02400 0x400>;
> >> + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
> >> + clocks = <&r_ccu CLK_APB0_I2C>;
> >> + resets = <&r_ccu RST_APB0_I2C>;
> >> + status = "disabled";
> >> + #address-cells = <1>;
> >> + #size-cells = <0>;
> >> + };
> >> +
> >> r_pio: pinctrl at 1f02c00 {
> >> compatible = "allwinner,sun50i-a64-r-pinctrl";
> >> reg = <0x01f02c00 0x400>;
> >> @@ -670,6 +682,11 @@
> >> pins = "PL0", "PL1";
> >> function = "s_rsb";
> >> };
> >> +
> >> + r_i2c_pins_a: i2c-a {
> >> + pins = "PL8", "PL9";
> >> + function = "s_i2c";
> >> + };
> >
> > This should be ordered by alphabetical order
>
> OK
>
> > If this is the only muxing option, you can also add it to the i2c DT
> > node.
>
> It's not the only option, but other option conflicts with rsb. Should
> I still add it to i2c DT node?
I guess you can put it there, the muxing will only be enforced if the
device is enabled, and there should be only one of RSB or I2C that
would be.
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 2/3] dts: sunxi: A64: Add PWM controllers
2018-06-01 6:28 ` Vasily Khoruzhick
@ 2018-06-01 6:29 ` Vasily Khoruzhick
-1 siblings, 0 replies; 24+ messages in thread
From: Vasily Khoruzhick @ 2018-06-01 6:29 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai, Rob Herring, Mark Rutland,
Catalin Marinas, Will Deacon, linux-arm-kernel, devicetree
Cc: Andre Przywara
From: Andre Przywara <andre.przywara@arm.com>
The Allwinner A64 SoC features two PWM controllers, which are fully
compatible to the one used in the A13 and H3 chips.
Add the nodes for the devices (one for the "normal" PWM, the other for
the one in the CPUS domain) and the pins their outputs are connected to.
On the A64 the "normal" PWM is muxed together with one of the MDIO pins
used to communicate with the Ethernet PHY, so it won't be usable on many
boards. But the Pinebook laptop uses this pin for controlling the LCD
backlight.
On Pine64 the CPUS PWM pin however is routed to the "RPi2" header,
at the same location as the PWM pin on the RaspberryPi.
[vasily: fixed comment message as requested by Stefan Bruens]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Vasily Khoruzhick <anarsoul@gmail.com> on Pinebook (only the "normal" PWM)
Tested-by: Harald Geyer <harald@ccbib.org> on Teres-I (only the "normal" PWM)
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 28 +++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index b5e903ccf0ec..e94bfa8477f6 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -365,6 +365,11 @@
bias-pull-up;
};
+ pwm_pin: pwm_pin {
+ pins = "PD22";
+ function = "pwm";
+ };
+
rmii_pins: rmii_pins {
pins = "PD10", "PD11", "PD13", "PD14", "PD17",
"PD18", "PD19", "PD20", "PD22", "PD23";
@@ -630,6 +635,15 @@
#interrupt-cells = <3>;
};
+ pwm: pwm@1c21400 {
+ compatible = "allwinner,sun50i-a64-pwm",
+ "allwinner,sun5i-a13-pwm";
+ reg = <0x01c21400 0x400>;
+ clocks = <&osc24M>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
rtc: rtc@1f00000 {
compatible = "allwinner,sun6i-a31-rtc";
reg = <0x01f00000 0x54>;
@@ -667,6 +681,15 @@
#size-cells = <0>;
};
+ r_pwm: pwm@1f03800 {
+ compatible = "allwinner,sun50i-a64-pwm",
+ "allwinner,sun5i-a13-pwm";
+ reg = <0x01f03800 0x400>;
+ clocks = <&osc24M>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
r_pio: pinctrl@1f02c00 {
compatible = "allwinner,sun50i-a64-r-pinctrl";
reg = <0x01f02c00 0x400>;
@@ -687,6 +710,11 @@
pins = "PL8", "PL9";
function = "s_i2c";
};
+
+ r_pwm_pin: pwm {
+ pins = "PL10";
+ function = "s_pwm";
+ };
};
r_rsb: rsb@1f03400 {
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 2/3] dts: sunxi: A64: Add PWM controllers
@ 2018-06-01 6:29 ` Vasily Khoruzhick
0 siblings, 0 replies; 24+ messages in thread
From: Vasily Khoruzhick @ 2018-06-01 6:29 UTC (permalink / raw)
To: linux-arm-kernel
From: Andre Przywara <andre.przywara@arm.com>
The Allwinner A64 SoC features two PWM controllers, which are fully
compatible to the one used in the A13 and H3 chips.
Add the nodes for the devices (one for the "normal" PWM, the other for
the one in the CPUS domain) and the pins their outputs are connected to.
On the A64 the "normal" PWM is muxed together with one of the MDIO pins
used to communicate with the Ethernet PHY, so it won't be usable on many
boards. But the Pinebook laptop uses this pin for controlling the LCD
backlight.
On Pine64 the CPUS PWM pin however is routed to the "RPi2" header,
at the same location as the PWM pin on the RaspberryPi.
[vasily: fixed comment message as requested by Stefan Bruens]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Vasily Khoruzhick <anarsoul@gmail.com> on Pinebook (only the "normal" PWM)
Tested-by: Harald Geyer <harald@ccbib.org> on Teres-I (only the "normal" PWM)
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 28 +++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index b5e903ccf0ec..e94bfa8477f6 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -365,6 +365,11 @@
bias-pull-up;
};
+ pwm_pin: pwm_pin {
+ pins = "PD22";
+ function = "pwm";
+ };
+
rmii_pins: rmii_pins {
pins = "PD10", "PD11", "PD13", "PD14", "PD17",
"PD18", "PD19", "PD20", "PD22", "PD23";
@@ -630,6 +635,15 @@
#interrupt-cells = <3>;
};
+ pwm: pwm at 1c21400 {
+ compatible = "allwinner,sun50i-a64-pwm",
+ "allwinner,sun5i-a13-pwm";
+ reg = <0x01c21400 0x400>;
+ clocks = <&osc24M>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
rtc: rtc at 1f00000 {
compatible = "allwinner,sun6i-a31-rtc";
reg = <0x01f00000 0x54>;
@@ -667,6 +681,15 @@
#size-cells = <0>;
};
+ r_pwm: pwm at 1f03800 {
+ compatible = "allwinner,sun50i-a64-pwm",
+ "allwinner,sun5i-a13-pwm";
+ reg = <0x01f03800 0x400>;
+ clocks = <&osc24M>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
r_pio: pinctrl at 1f02c00 {
compatible = "allwinner,sun50i-a64-r-pinctrl";
reg = <0x01f02c00 0x400>;
@@ -687,6 +710,11 @@
pins = "PL8", "PL9";
function = "s_i2c";
};
+
+ r_pwm_pin: pwm {
+ pins = "PL10";
+ function = "s_pwm";
+ };
};
r_rsb: rsb at 1f03400 {
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* Re: [PATCH 2/3] dts: sunxi: A64: Add PWM controllers
2018-06-01 6:29 ` Vasily Khoruzhick
@ 2018-06-01 9:18 ` Maxime Ripard
-1 siblings, 0 replies; 24+ messages in thread
From: Maxime Ripard @ 2018-06-01 9:18 UTC (permalink / raw)
To: Vasily Khoruzhick
Cc: Mark Rutland, devicetree, Catalin Marinas, Will Deacon,
Chen-Yu Tsai, Rob Herring, Andre Przywara, linux-arm-kernel
[-- Attachment #1.1: Type: text/plain, Size: 3159 bytes --]
On Thu, May 31, 2018 at 11:29:00PM -0700, Vasily Khoruzhick wrote:
> From: Andre Przywara <andre.przywara@arm.com>
>
> The Allwinner A64 SoC features two PWM controllers, which are fully
> compatible to the one used in the A13 and H3 chips.
>
> Add the nodes for the devices (one for the "normal" PWM, the other for
> the one in the CPUS domain) and the pins their outputs are connected to.
>
> On the A64 the "normal" PWM is muxed together with one of the MDIO pins
> used to communicate with the Ethernet PHY, so it won't be usable on many
> boards. But the Pinebook laptop uses this pin for controlling the LCD
> backlight.
>
> On Pine64 the CPUS PWM pin however is routed to the "RPi2" header,
> at the same location as the PWM pin on the RaspberryPi.
>
> [vasily: fixed comment message as requested by Stefan Bruens]
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> Tested-by: Vasily Khoruzhick <anarsoul@gmail.com> on Pinebook (only the "normal" PWM)
> Tested-by: Harald Geyer <harald@ccbib.org> on Teres-I (only the "normal" PWM)
Same thing, you should have your SoB there. And I'm not sure the
Tested-by format is valid. This information would be better in the
commit log itself.
> ---
> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 28 +++++++++++++++++++
> 1 file changed, 28 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> index b5e903ccf0ec..e94bfa8477f6 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -365,6 +365,11 @@
> bias-pull-up;
> };
>
> + pwm_pin: pwm_pin {
> + pins = "PD22";
> + function = "pwm";
> + };
> +
Is there multiple options for that muxing? If not, add it to the PWM
node by default.
> rmii_pins: rmii_pins {
> pins = "PD10", "PD11", "PD13", "PD14", "PD17",
> "PD18", "PD19", "PD20", "PD22", "PD23";
> @@ -630,6 +635,15 @@
> #interrupt-cells = <3>;
> };
>
> + pwm: pwm@1c21400 {
> + compatible = "allwinner,sun50i-a64-pwm",
> + "allwinner,sun5i-a13-pwm";
> + reg = <0x01c21400 0x400>;
> + clocks = <&osc24M>;
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> rtc: rtc@1f00000 {
> compatible = "allwinner,sun6i-a31-rtc";
> reg = <0x01f00000 0x54>;
> @@ -667,6 +681,15 @@
> #size-cells = <0>;
> };
>
> + r_pwm: pwm@1f03800 {
> + compatible = "allwinner,sun50i-a64-pwm",
> + "allwinner,sun5i-a13-pwm";
> + reg = <0x01f03800 0x400>;
> + clocks = <&osc24M>;
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> r_pio: pinctrl@1f02c00 {
> compatible = "allwinner,sun50i-a64-r-pinctrl";
> reg = <0x01f02c00 0x400>;
> @@ -687,6 +710,11 @@
> pins = "PL8", "PL9";
> function = "s_i2c";
> };
> +
> + r_pwm_pin: pwm {
> + pins = "PL10";
> + function = "s_pwm";
> + };
Ditto.
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH 2/3] dts: sunxi: A64: Add PWM controllers
@ 2018-06-01 9:18 ` Maxime Ripard
0 siblings, 0 replies; 24+ messages in thread
From: Maxime Ripard @ 2018-06-01 9:18 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, May 31, 2018 at 11:29:00PM -0700, Vasily Khoruzhick wrote:
> From: Andre Przywara <andre.przywara@arm.com>
>
> The Allwinner A64 SoC features two PWM controllers, which are fully
> compatible to the one used in the A13 and H3 chips.
>
> Add the nodes for the devices (one for the "normal" PWM, the other for
> the one in the CPUS domain) and the pins their outputs are connected to.
>
> On the A64 the "normal" PWM is muxed together with one of the MDIO pins
> used to communicate with the Ethernet PHY, so it won't be usable on many
> boards. But the Pinebook laptop uses this pin for controlling the LCD
> backlight.
>
> On Pine64 the CPUS PWM pin however is routed to the "RPi2" header,
> at the same location as the PWM pin on the RaspberryPi.
>
> [vasily: fixed comment message as requested by Stefan Bruens]
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> Tested-by: Vasily Khoruzhick <anarsoul@gmail.com> on Pinebook (only the "normal" PWM)
> Tested-by: Harald Geyer <harald@ccbib.org> on Teres-I (only the "normal" PWM)
Same thing, you should have your SoB there. And I'm not sure the
Tested-by format is valid. This information would be better in the
commit log itself.
> ---
> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 28 +++++++++++++++++++
> 1 file changed, 28 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> index b5e903ccf0ec..e94bfa8477f6 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -365,6 +365,11 @@
> bias-pull-up;
> };
>
> + pwm_pin: pwm_pin {
> + pins = "PD22";
> + function = "pwm";
> + };
> +
Is there multiple options for that muxing? If not, add it to the PWM
node by default.
> rmii_pins: rmii_pins {
> pins = "PD10", "PD11", "PD13", "PD14", "PD17",
> "PD18", "PD19", "PD20", "PD22", "PD23";
> @@ -630,6 +635,15 @@
> #interrupt-cells = <3>;
> };
>
> + pwm: pwm at 1c21400 {
> + compatible = "allwinner,sun50i-a64-pwm",
> + "allwinner,sun5i-a13-pwm";
> + reg = <0x01c21400 0x400>;
> + clocks = <&osc24M>;
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> rtc: rtc at 1f00000 {
> compatible = "allwinner,sun6i-a31-rtc";
> reg = <0x01f00000 0x54>;
> @@ -667,6 +681,15 @@
> #size-cells = <0>;
> };
>
> + r_pwm: pwm at 1f03800 {
> + compatible = "allwinner,sun50i-a64-pwm",
> + "allwinner,sun5i-a13-pwm";
> + reg = <0x01f03800 0x400>;
> + clocks = <&osc24M>;
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> r_pio: pinctrl at 1f02c00 {
> compatible = "allwinner,sun50i-a64-r-pinctrl";
> reg = <0x01f02c00 0x400>;
> @@ -687,6 +710,11 @@
> pins = "PL8", "PL9";
> function = "s_i2c";
> };
> +
> + r_pwm_pin: pwm {
> + pins = "PL10";
> + function = "s_pwm";
> + };
Ditto.
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [PATCH 2/3] dts: sunxi: A64: Add PWM controllers
2018-06-01 9:18 ` Maxime Ripard
@ 2018-06-01 17:31 ` Vasily Khoruzhick
-1 siblings, 0 replies; 24+ messages in thread
From: Vasily Khoruzhick @ 2018-06-01 17:31 UTC (permalink / raw)
To: Maxime Ripard
Cc: Mark Rutland, devicetree, Catalin Marinas, Will Deacon,
Chen-Yu Tsai, Rob Herring, Andre Przywara, arm-linux
On Fri, Jun 1, 2018 at 2:18 AM, Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> On Thu, May 31, 2018 at 11:29:00PM -0700, Vasily Khoruzhick wrote:
>> From: Andre Przywara <andre.przywara@arm.com>
>>
>> The Allwinner A64 SoC features two PWM controllers, which are fully
>> compatible to the one used in the A13 and H3 chips.
>>
>> Add the nodes for the devices (one for the "normal" PWM, the other for
>> the one in the CPUS domain) and the pins their outputs are connected to.
>>
>> On the A64 the "normal" PWM is muxed together with one of the MDIO pins
>> used to communicate with the Ethernet PHY, so it won't be usable on many
>> boards. But the Pinebook laptop uses this pin for controlling the LCD
>> backlight.
>>
>> On Pine64 the CPUS PWM pin however is routed to the "RPi2" header,
>> at the same location as the PWM pin on the RaspberryPi.
>>
>> [vasily: fixed comment message as requested by Stefan Bruens]
>>
>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>> Tested-by: Vasily Khoruzhick <anarsoul@gmail.com> on Pinebook (only the "normal" PWM)
>> Tested-by: Harald Geyer <harald@ccbib.org> on Teres-I (only the "normal" PWM)
>
> Same thing, you should have your SoB there. And I'm not sure the
> Tested-by format is valid. This information would be better in the
> commit log itself.
OK
>
>> ---
>> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 28 +++++++++++++++++++
>> 1 file changed, 28 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> index b5e903ccf0ec..e94bfa8477f6 100644
>> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> @@ -365,6 +365,11 @@
>> bias-pull-up;
>> };
>>
>> + pwm_pin: pwm_pin {
>> + pins = "PD22";
>> + function = "pwm";
>> + };
>> +
>
> Is there multiple options for that muxing? If not, add it to the PWM
> node by default.
OK
>
>> rmii_pins: rmii_pins {
>> pins = "PD10", "PD11", "PD13", "PD14", "PD17",
>> "PD18", "PD19", "PD20", "PD22", "PD23";
>> @@ -630,6 +635,15 @@
>> #interrupt-cells = <3>;
>> };
>>
>> + pwm: pwm@1c21400 {
>> + compatible = "allwinner,sun50i-a64-pwm",
>> + "allwinner,sun5i-a13-pwm";
>> + reg = <0x01c21400 0x400>;
>> + clocks = <&osc24M>;
>> + #pwm-cells = <3>;
>> + status = "disabled";
>> + };
>> +
>> rtc: rtc@1f00000 {
>> compatible = "allwinner,sun6i-a31-rtc";
>> reg = <0x01f00000 0x54>;
>> @@ -667,6 +681,15 @@
>> #size-cells = <0>;
>> };
>>
>> + r_pwm: pwm@1f03800 {
>> + compatible = "allwinner,sun50i-a64-pwm",
>> + "allwinner,sun5i-a13-pwm";
>> + reg = <0x01f03800 0x400>;
>> + clocks = <&osc24M>;
>> + #pwm-cells = <3>;
>> + status = "disabled";
>> + };
>> +
>> r_pio: pinctrl@1f02c00 {
>> compatible = "allwinner,sun50i-a64-r-pinctrl";
>> reg = <0x01f02c00 0x400>;
>> @@ -687,6 +710,11 @@
>> pins = "PL8", "PL9";
>> function = "s_i2c";
>> };
>> +
>> + r_pwm_pin: pwm {
>> + pins = "PL10";
>> + function = "s_pwm";
>> + };
>
> Ditto.
OK
>
> Maxime
>
> --
> Maxime Ripard, Bootlin (formerly Free Electrons)
> Embedded Linux and Kernel engineering
> https://bootlin.com
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH 2/3] dts: sunxi: A64: Add PWM controllers
@ 2018-06-01 17:31 ` Vasily Khoruzhick
0 siblings, 0 replies; 24+ messages in thread
From: Vasily Khoruzhick @ 2018-06-01 17:31 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Jun 1, 2018 at 2:18 AM, Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> On Thu, May 31, 2018 at 11:29:00PM -0700, Vasily Khoruzhick wrote:
>> From: Andre Przywara <andre.przywara@arm.com>
>>
>> The Allwinner A64 SoC features two PWM controllers, which are fully
>> compatible to the one used in the A13 and H3 chips.
>>
>> Add the nodes for the devices (one for the "normal" PWM, the other for
>> the one in the CPUS domain) and the pins their outputs are connected to.
>>
>> On the A64 the "normal" PWM is muxed together with one of the MDIO pins
>> used to communicate with the Ethernet PHY, so it won't be usable on many
>> boards. But the Pinebook laptop uses this pin for controlling the LCD
>> backlight.
>>
>> On Pine64 the CPUS PWM pin however is routed to the "RPi2" header,
>> at the same location as the PWM pin on the RaspberryPi.
>>
>> [vasily: fixed comment message as requested by Stefan Bruens]
>>
>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>> Tested-by: Vasily Khoruzhick <anarsoul@gmail.com> on Pinebook (only the "normal" PWM)
>> Tested-by: Harald Geyer <harald@ccbib.org> on Teres-I (only the "normal" PWM)
>
> Same thing, you should have your SoB there. And I'm not sure the
> Tested-by format is valid. This information would be better in the
> commit log itself.
OK
>
>> ---
>> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 28 +++++++++++++++++++
>> 1 file changed, 28 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> index b5e903ccf0ec..e94bfa8477f6 100644
>> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> @@ -365,6 +365,11 @@
>> bias-pull-up;
>> };
>>
>> + pwm_pin: pwm_pin {
>> + pins = "PD22";
>> + function = "pwm";
>> + };
>> +
>
> Is there multiple options for that muxing? If not, add it to the PWM
> node by default.
OK
>
>> rmii_pins: rmii_pins {
>> pins = "PD10", "PD11", "PD13", "PD14", "PD17",
>> "PD18", "PD19", "PD20", "PD22", "PD23";
>> @@ -630,6 +635,15 @@
>> #interrupt-cells = <3>;
>> };
>>
>> + pwm: pwm at 1c21400 {
>> + compatible = "allwinner,sun50i-a64-pwm",
>> + "allwinner,sun5i-a13-pwm";
>> + reg = <0x01c21400 0x400>;
>> + clocks = <&osc24M>;
>> + #pwm-cells = <3>;
>> + status = "disabled";
>> + };
>> +
>> rtc: rtc at 1f00000 {
>> compatible = "allwinner,sun6i-a31-rtc";
>> reg = <0x01f00000 0x54>;
>> @@ -667,6 +681,15 @@
>> #size-cells = <0>;
>> };
>>
>> + r_pwm: pwm at 1f03800 {
>> + compatible = "allwinner,sun50i-a64-pwm",
>> + "allwinner,sun5i-a13-pwm";
>> + reg = <0x01f03800 0x400>;
>> + clocks = <&osc24M>;
>> + #pwm-cells = <3>;
>> + status = "disabled";
>> + };
>> +
>> r_pio: pinctrl at 1f02c00 {
>> compatible = "allwinner,sun50i-a64-r-pinctrl";
>> reg = <0x01f02c00 0x400>;
>> @@ -687,6 +710,11 @@
>> pins = "PL8", "PL9";
>> function = "s_i2c";
>> };
>> +
>> + r_pwm_pin: pwm {
>> + pins = "PL10";
>> + function = "s_pwm";
>> + };
>
> Ditto.
OK
>
> Maxime
>
> --
> Maxime Ripard, Bootlin (formerly Free Electrons)
> Embedded Linux and Kernel engineering
> https://bootlin.com
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 3/3] arm64: dts: allwinner: add support for Pinebook
2018-06-01 6:28 ` Vasily Khoruzhick
@ 2018-06-01 6:29 ` Vasily Khoruzhick
-1 siblings, 0 replies; 24+ messages in thread
From: Vasily Khoruzhick @ 2018-06-01 6:29 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai, Rob Herring, Mark Rutland,
Catalin Marinas, Will Deacon, linux-arm-kernel, devicetree
Cc: Vasily Khoruzhick, Icenowy Zheng
From: Icenowy Zheng <icenowy@aosc.xyz>
Pinebook is a A64-based laptop produced by Pine64, with the following
peripherals:
USB:
- Two external USB ports (one is directly connected to A64's OTG
controller, the other is under a internal hub connected to the host-only
controller.)
- USB HID keyboard and touchpad connected to the internal hub.
- USB UVC camera connected to the internal hub.
Power-related:
- A DC IN jack connected to AXP803's DCIN pin.
- A Li-Polymer battery connected to AXP803's battery pins.
Storage:
- An eMMC by Foresee on the main board (in the product revision of the
main board it's designed to be switchable).
- An external MicroSD card slot.
Display:
- An eDP LCD panel (1366x768) connected via an ANX6345 RGB-eDP bridge.
- A mini HDMI port.
Misc:
- A Hall sensor designed to detect the status of lid, connected to GPIO PL12.
- A headphone jack connected to the SoC's internal codec.
- A debug UART port muxed with headphone jack.
This commit adds basical support for it.
[vasily: squashed several commits into one, added simplefb node, added usbphy
to ehci0 and ohci0 nodes]
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../dts/allwinner/sun50i-a64-pinebook.dts | 285 ++++++++++++++++++
2 files changed, 286 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 8bebe7da5ed9..a8c6d0c6f2c5 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-nanopi-a64.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinebook.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
new file mode 100644
index 000000000000..d952db217702
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
@@ -0,0 +1,285 @@
+/*
+ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.xyz>
+ * Copyright (C) 2018 Vasily Khoruzhick <anarsoul@gmail.com>
+ *
+ * SPDX-License-Identifier: (GPL-2.0 OR MIT)
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pwm/pwm.h>
+
+/ {
+ model = "Pinebook";
+ compatible = "pine64,pinebook", "allwinner,sun50i-a64";
+
+ aliases {
+ serial0 = &uart0;
+ ethernet0 = &rtl8723cs;
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm 0 50000 0>;
+ brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
+ default-brightness-level = <2>;
+ enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+
+ framebuffer-lcd {
+ panel-supply = <®_dc1sw>;
+ dvdd25-supply = <®_dldo2>;
+ dvdd12-supply = <®_fldo1>;
+ };
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+
+ lid_switch {
+ label = "Lid Switch";
+ gpios = <&r_pio 0 12 GPIO_ACTIVE_LOW>; /* PL12 */
+ linux,input-type = <EV_SW>;
+ linux,code = <SW_LID>;
+ linux,can-disable;
+ };
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+ };
+};
+
+&ehci0 {
+ phys = <&usbphy 0>;
+ phy-names = "usb";
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ vmmc-supply = <®_dcdc1>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
+ cd-inverted;
+ disable-wp;
+ bus-width = <4>;
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vmmc-supply = <®_dldo4>;
+ vqmmc-supply = <®_eldo1>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ rtl8723cs: wifi@1 {
+ reg = <1>;
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <®_dcdc1>;
+ vqmmc-supply = <®_eldo1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ mmc-hs200-1_8v;
+ status = "okay";
+};
+
+&ohci0 {
+ phys = <&usbphy 0>;
+ phy-names = "usb";
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pin>;
+ status = "okay";
+};
+
+&r_rsb {
+ status = "okay";
+
+ axp803: pmic@3a3 {
+ compatible = "x-powers,axp803";
+ reg = <0x3a3>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+/* The ANX6345 eDP-bridge is on r_i2c. There is no linux (mainline)
+ * driver for this chip at the moment, the bootloader initializes it.
+ * However it can be accessed with the i2c-dev driver from user space.
+ */
+&r_i2c {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_i2c_pins_a>;
+ status = "okay";
+};
+
+#include "axp803.dtsi"
+
+®_aldo1 {
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "vcc-csi";
+};
+
+®_aldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pl";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <2700000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+®_dc1sw {
+ regulator-name = "vcc-lcd";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-name = "vdd-cpux";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dcdc6 {
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-sys";
+};
+
+®_dldo1 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-hdmi";
+};
+
+®_dldo2 {
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-name = "vcc-edp";
+};
+
+®_dldo3 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "avdd-csi";
+};
+
+®_dldo4 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi";
+};
+
+®_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "cpvdd";
+};
+
+®_eldo3 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vdd-1v8-csi";
+};
+
+®_fldo1 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vcc-1v2-hsic";
+};
+
+®_fldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-cpus";
+};
+
+®_ldo_io0 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-usb";
+ status = "okay";
+};
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+};
+
+&usbphy {
+ usb0_vbus-supply = <®_ldo_io0>;
+ usb1_vbus-supply = <®_ldo_io0>;
+ status = "okay";
+};
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 3/3] arm64: dts: allwinner: add support for Pinebook
@ 2018-06-01 6:29 ` Vasily Khoruzhick
0 siblings, 0 replies; 24+ messages in thread
From: Vasily Khoruzhick @ 2018-06-01 6:29 UTC (permalink / raw)
To: linux-arm-kernel
From: Icenowy Zheng <icenowy@aosc.xyz>
Pinebook is a A64-based laptop produced by Pine64, with the following
peripherals:
USB:
- Two external USB ports (one is directly connected to A64's OTG
controller, the other is under a internal hub connected to the host-only
controller.)
- USB HID keyboard and touchpad connected to the internal hub.
- USB UVC camera connected to the internal hub.
Power-related:
- A DC IN jack connected to AXP803's DCIN pin.
- A Li-Polymer battery connected to AXP803's battery pins.
Storage:
- An eMMC by Foresee on the main board (in the product revision of the
main board it's designed to be switchable).
- An external MicroSD card slot.
Display:
- An eDP LCD panel (1366x768) connected via an ANX6345 RGB-eDP bridge.
- A mini HDMI port.
Misc:
- A Hall sensor designed to detect the status of lid, connected to GPIO PL12.
- A headphone jack connected to the SoC's internal codec.
- A debug UART port muxed with headphone jack.
This commit adds basical support for it.
[vasily: squashed several commits into one, added simplefb node, added usbphy
to ehci0 and ohci0 nodes]
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../dts/allwinner/sun50i-a64-pinebook.dts | 285 ++++++++++++++++++
2 files changed, 286 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 8bebe7da5ed9..a8c6d0c6f2c5 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-nanopi-a64.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinebook.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
new file mode 100644
index 000000000000..d952db217702
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
@@ -0,0 +1,285 @@
+/*
+ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.xyz>
+ * Copyright (C) 2018 Vasily Khoruzhick <anarsoul@gmail.com>
+ *
+ * SPDX-License-Identifier: (GPL-2.0 OR MIT)
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pwm/pwm.h>
+
+/ {
+ model = "Pinebook";
+ compatible = "pine64,pinebook", "allwinner,sun50i-a64";
+
+ aliases {
+ serial0 = &uart0;
+ ethernet0 = &rtl8723cs;
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm 0 50000 0>;
+ brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
+ default-brightness-level = <2>;
+ enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+
+ framebuffer-lcd {
+ panel-supply = <®_dc1sw>;
+ dvdd25-supply = <®_dldo2>;
+ dvdd12-supply = <®_fldo1>;
+ };
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+
+ lid_switch {
+ label = "Lid Switch";
+ gpios = <&r_pio 0 12 GPIO_ACTIVE_LOW>; /* PL12 */
+ linux,input-type = <EV_SW>;
+ linux,code = <SW_LID>;
+ linux,can-disable;
+ };
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+ };
+};
+
+&ehci0 {
+ phys = <&usbphy 0>;
+ phy-names = "usb";
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ vmmc-supply = <®_dcdc1>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
+ cd-inverted;
+ disable-wp;
+ bus-width = <4>;
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vmmc-supply = <®_dldo4>;
+ vqmmc-supply = <®_eldo1>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ rtl8723cs: wifi at 1 {
+ reg = <1>;
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <®_dcdc1>;
+ vqmmc-supply = <®_eldo1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ mmc-hs200-1_8v;
+ status = "okay";
+};
+
+&ohci0 {
+ phys = <&usbphy 0>;
+ phy-names = "usb";
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pin>;
+ status = "okay";
+};
+
+&r_rsb {
+ status = "okay";
+
+ axp803: pmic at 3a3 {
+ compatible = "x-powers,axp803";
+ reg = <0x3a3>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+/* The ANX6345 eDP-bridge is on r_i2c. There is no linux (mainline)
+ * driver for this chip at the moment, the bootloader initializes it.
+ * However it can be accessed with the i2c-dev driver from user space.
+ */
+&r_i2c {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_i2c_pins_a>;
+ status = "okay";
+};
+
+#include "axp803.dtsi"
+
+®_aldo1 {
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "vcc-csi";
+};
+
+®_aldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pl";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <2700000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+®_dc1sw {
+ regulator-name = "vcc-lcd";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-name = "vdd-cpux";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dcdc6 {
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-sys";
+};
+
+®_dldo1 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-hdmi";
+};
+
+®_dldo2 {
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-name = "vcc-edp";
+};
+
+®_dldo3 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "avdd-csi";
+};
+
+®_dldo4 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi";
+};
+
+®_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "cpvdd";
+};
+
+®_eldo3 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vdd-1v8-csi";
+};
+
+®_fldo1 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vcc-1v2-hsic";
+};
+
+®_fldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-cpus";
+};
+
+®_ldo_io0 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-usb";
+ status = "okay";
+};
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+};
+
+&usbphy {
+ usb0_vbus-supply = <®_ldo_io0>;
+ usb1_vbus-supply = <®_ldo_io0>;
+ status = "okay";
+};
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* Re: [PATCH 3/3] arm64: dts: allwinner: add support for Pinebook
2018-06-01 6:29 ` Vasily Khoruzhick
@ 2018-06-01 9:23 ` Maxime Ripard
-1 siblings, 0 replies; 24+ messages in thread
From: Maxime Ripard @ 2018-06-01 9:23 UTC (permalink / raw)
To: Vasily Khoruzhick
Cc: Mark Rutland, devicetree, Catalin Marinas, Will Deacon,
Chen-Yu Tsai, Rob Herring, Icenowy Zheng, linux-arm-kernel
[-- Attachment #1.1: Type: text/plain, Size: 6614 bytes --]
On Thu, May 31, 2018 at 11:29:01PM -0700, Vasily Khoruzhick wrote:
> From: Icenowy Zheng <icenowy@aosc.xyz>
>
> Pinebook is a A64-based laptop produced by Pine64, with the following
> peripherals:
>
> USB:
> - Two external USB ports (one is directly connected to A64's OTG
> controller, the other is under a internal hub connected to the host-only
> controller.)
> - USB HID keyboard and touchpad connected to the internal hub.
> - USB UVC camera connected to the internal hub.
>
> Power-related:
> - A DC IN jack connected to AXP803's DCIN pin.
> - A Li-Polymer battery connected to AXP803's battery pins.
>
> Storage:
> - An eMMC by Foresee on the main board (in the product revision of the
> main board it's designed to be switchable).
> - An external MicroSD card slot.
>
> Display:
> - An eDP LCD panel (1366x768) connected via an ANX6345 RGB-eDP bridge.
> - A mini HDMI port.
>
> Misc:
> - A Hall sensor designed to detect the status of lid, connected to GPIO PL12.
> - A headphone jack connected to the SoC's internal codec.
> - A debug UART port muxed with headphone jack.
>
> This commit adds basical support for it.
>
> [vasily: squashed several commits into one, added simplefb node, added usbphy
> to ehci0 and ohci0 nodes]
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
> ---
> arch/arm64/boot/dts/allwinner/Makefile | 1 +
> .../dts/allwinner/sun50i-a64-pinebook.dts | 285 ++++++++++++++++++
> 2 files changed, 286 insertions(+)
> create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
>
> diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
> index 8bebe7da5ed9..a8c6d0c6f2c5 100644
> --- a/arch/arm64/boot/dts/allwinner/Makefile
> +++ b/arch/arm64/boot/dts/allwinner/Makefile
> @@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-nanopi-a64.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
> +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinebook.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
> new file mode 100644
> index 000000000000..d952db217702
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
> @@ -0,0 +1,285 @@
> +/*
> + * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.xyz>
> + * Copyright (C) 2018 Vasily Khoruzhick <anarsoul@gmail.com>
> + *
> + * SPDX-License-Identifier: (GPL-2.0 OR MIT)
The SPDX tag should be the first one.
> + */
> +
> +/dts-v1/;
> +
> +#include "sun50i-a64.dtsi"
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/pwm/pwm.h>
> +
> +/ {
> + model = "Pinebook";
> + compatible = "pine64,pinebook", "allwinner,sun50i-a64";
> +
> + aliases {
> + serial0 = &uart0;
> + ethernet0 = &rtl8723cs;
> + };
> +
> + backlight: backlight {
> + compatible = "pwm-backlight";
> + pwms = <&pwm 0 50000 0>;
> + brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
The perceived brightness should be increasing linearly. This usually
means that you need an function close to a power of two sequence.
> + default-brightness-level = <2>;
> + enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> +
> + framebuffer-lcd {
> + panel-supply = <®_dc1sw>;
> + dvdd25-supply = <®_dldo2>;
> + dvdd12-supply = <®_fldo1>;
> + };
> + };
> +
> + gpio_keys {
> + compatible = "gpio-keys";
> +
> + lid_switch {
> + label = "Lid Switch";
> + gpios = <&r_pio 0 12 GPIO_ACTIVE_LOW>; /* PL12 */
> + linux,input-type = <EV_SW>;
> + linux,code = <SW_LID>;
> + linux,can-disable;
> + };
> + };
> +
> + reg_vcc3v3: vcc3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + wifi_pwrseq: wifi_pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
> + };
> +};
> +
> +&ehci0 {
> + phys = <&usbphy 0>;
> + phy-names = "usb";
> + status = "okay";
> +};
> +
> +&ehci1 {
> + status = "okay";
> +};
> +
> +&mmc0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc0_pins>;
> + vmmc-supply = <®_dcdc1>;
> + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
> + cd-inverted;
> + disable-wp;
> + bus-width = <4>;
> + status = "okay";
> +};
> +
> +&mmc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc1_pins>;
> + vmmc-supply = <®_dldo4>;
> + vqmmc-supply = <®_eldo1>;
> + mmc-pwrseq = <&wifi_pwrseq>;
> + bus-width = <4>;
> + non-removable;
> + status = "okay";
> +
> + rtl8723cs: wifi@1 {
> + reg = <1>;
> + };
> +};
> +
> +&mmc2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc2_pins>;
> + vmmc-supply = <®_dcdc1>;
> + vqmmc-supply = <®_eldo1>;
> + bus-width = <8>;
> + non-removable;
> + cap-mmc-hw-reset;
> + mmc-hs200-1_8v;
> + status = "okay";
> +};
> +
> +&ohci0 {
> + phys = <&usbphy 0>;
> + phy-names = "usb";
> + status = "okay";
> +};
> +
> +&ohci1 {
> + status = "okay";
> +};
> +
> +&pwm {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pwm_pin>;
> + status = "okay";
> +};
> +
> +&r_rsb {
> + status = "okay";
> +
> + axp803: pmic@3a3 {
> + compatible = "x-powers,axp803";
> + reg = <0x3a3>;
> + interrupt-parent = <&r_intc>;
> + interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
> + };
> +};
> +
> +/* The ANX6345 eDP-bridge is on r_i2c. There is no linux (mainline)
> + * driver for this chip at the moment, the bootloader initializes it.
> + * However it can be accessed with the i2c-dev driver from user space.
> + */
The comment format is wrong, and the part after r_i2c, about i2c-dev
and the mainline support is not really relevant. The DT describes the
hardware, and is used by several different projects that might or
might not have i2c-dev, an interface similar, or might have or not a
driver for the bridge.
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH 3/3] arm64: dts: allwinner: add support for Pinebook
@ 2018-06-01 9:23 ` Maxime Ripard
0 siblings, 0 replies; 24+ messages in thread
From: Maxime Ripard @ 2018-06-01 9:23 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, May 31, 2018 at 11:29:01PM -0700, Vasily Khoruzhick wrote:
> From: Icenowy Zheng <icenowy@aosc.xyz>
>
> Pinebook is a A64-based laptop produced by Pine64, with the following
> peripherals:
>
> USB:
> - Two external USB ports (one is directly connected to A64's OTG
> controller, the other is under a internal hub connected to the host-only
> controller.)
> - USB HID keyboard and touchpad connected to the internal hub.
> - USB UVC camera connected to the internal hub.
>
> Power-related:
> - A DC IN jack connected to AXP803's DCIN pin.
> - A Li-Polymer battery connected to AXP803's battery pins.
>
> Storage:
> - An eMMC by Foresee on the main board (in the product revision of the
> main board it's designed to be switchable).
> - An external MicroSD card slot.
>
> Display:
> - An eDP LCD panel (1366x768) connected via an ANX6345 RGB-eDP bridge.
> - A mini HDMI port.
>
> Misc:
> - A Hall sensor designed to detect the status of lid, connected to GPIO PL12.
> - A headphone jack connected to the SoC's internal codec.
> - A debug UART port muxed with headphone jack.
>
> This commit adds basical support for it.
>
> [vasily: squashed several commits into one, added simplefb node, added usbphy
> to ehci0 and ohci0 nodes]
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
> ---
> arch/arm64/boot/dts/allwinner/Makefile | 1 +
> .../dts/allwinner/sun50i-a64-pinebook.dts | 285 ++++++++++++++++++
> 2 files changed, 286 insertions(+)
> create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
>
> diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
> index 8bebe7da5ed9..a8c6d0c6f2c5 100644
> --- a/arch/arm64/boot/dts/allwinner/Makefile
> +++ b/arch/arm64/boot/dts/allwinner/Makefile
> @@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-nanopi-a64.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
> +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinebook.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
> new file mode 100644
> index 000000000000..d952db217702
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
> @@ -0,0 +1,285 @@
> +/*
> + * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.xyz>
> + * Copyright (C) 2018 Vasily Khoruzhick <anarsoul@gmail.com>
> + *
> + * SPDX-License-Identifier: (GPL-2.0 OR MIT)
The SPDX tag should be the first one.
> + */
> +
> +/dts-v1/;
> +
> +#include "sun50i-a64.dtsi"
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/pwm/pwm.h>
> +
> +/ {
> + model = "Pinebook";
> + compatible = "pine64,pinebook", "allwinner,sun50i-a64";
> +
> + aliases {
> + serial0 = &uart0;
> + ethernet0 = &rtl8723cs;
> + };
> +
> + backlight: backlight {
> + compatible = "pwm-backlight";
> + pwms = <&pwm 0 50000 0>;
> + brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
The perceived brightness should be increasing linearly. This usually
means that you need an function close to a power of two sequence.
> + default-brightness-level = <2>;
> + enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> +
> + framebuffer-lcd {
> + panel-supply = <®_dc1sw>;
> + dvdd25-supply = <®_dldo2>;
> + dvdd12-supply = <®_fldo1>;
> + };
> + };
> +
> + gpio_keys {
> + compatible = "gpio-keys";
> +
> + lid_switch {
> + label = "Lid Switch";
> + gpios = <&r_pio 0 12 GPIO_ACTIVE_LOW>; /* PL12 */
> + linux,input-type = <EV_SW>;
> + linux,code = <SW_LID>;
> + linux,can-disable;
> + };
> + };
> +
> + reg_vcc3v3: vcc3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + wifi_pwrseq: wifi_pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
> + };
> +};
> +
> +&ehci0 {
> + phys = <&usbphy 0>;
> + phy-names = "usb";
> + status = "okay";
> +};
> +
> +&ehci1 {
> + status = "okay";
> +};
> +
> +&mmc0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc0_pins>;
> + vmmc-supply = <®_dcdc1>;
> + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
> + cd-inverted;
> + disable-wp;
> + bus-width = <4>;
> + status = "okay";
> +};
> +
> +&mmc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc1_pins>;
> + vmmc-supply = <®_dldo4>;
> + vqmmc-supply = <®_eldo1>;
> + mmc-pwrseq = <&wifi_pwrseq>;
> + bus-width = <4>;
> + non-removable;
> + status = "okay";
> +
> + rtl8723cs: wifi at 1 {
> + reg = <1>;
> + };
> +};
> +
> +&mmc2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc2_pins>;
> + vmmc-supply = <®_dcdc1>;
> + vqmmc-supply = <®_eldo1>;
> + bus-width = <8>;
> + non-removable;
> + cap-mmc-hw-reset;
> + mmc-hs200-1_8v;
> + status = "okay";
> +};
> +
> +&ohci0 {
> + phys = <&usbphy 0>;
> + phy-names = "usb";
> + status = "okay";
> +};
> +
> +&ohci1 {
> + status = "okay";
> +};
> +
> +&pwm {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pwm_pin>;
> + status = "okay";
> +};
> +
> +&r_rsb {
> + status = "okay";
> +
> + axp803: pmic at 3a3 {
> + compatible = "x-powers,axp803";
> + reg = <0x3a3>;
> + interrupt-parent = <&r_intc>;
> + interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
> + };
> +};
> +
> +/* The ANX6345 eDP-bridge is on r_i2c. There is no linux (mainline)
> + * driver for this chip at the moment, the bootloader initializes it.
> + * However it can be accessed with the i2c-dev driver from user space.
> + */
The comment format is wrong, and the part after r_i2c, about i2c-dev
and the mainline support is not really relevant. The DT describes the
hardware, and is used by several different projects that might or
might not have i2c-dev, an interface similar, or might have or not a
driver for the bridge.
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [PATCH 3/3] arm64: dts: allwinner: add support for Pinebook
2018-06-01 9:23 ` Maxime Ripard
@ 2018-06-01 17:37 ` Vasily Khoruzhick
-1 siblings, 0 replies; 24+ messages in thread
From: Vasily Khoruzhick @ 2018-06-01 17:37 UTC (permalink / raw)
To: Maxime Ripard
Cc: Mark Rutland, devicetree, Catalin Marinas, Will Deacon,
Chen-Yu Tsai, Rob Herring, Icenowy Zheng, arm-linux
On Fri, Jun 1, 2018 at 2:23 AM, Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> On Thu, May 31, 2018 at 11:29:01PM -0700, Vasily Khoruzhick wrote:
>> From: Icenowy Zheng <icenowy@aosc.xyz>
>>
>> Pinebook is a A64-based laptop produced by Pine64, with the following
>> peripherals:
>>
>> USB:
>> - Two external USB ports (one is directly connected to A64's OTG
>> controller, the other is under a internal hub connected to the host-only
>> controller.)
>> - USB HID keyboard and touchpad connected to the internal hub.
>> - USB UVC camera connected to the internal hub.
>>
>> Power-related:
>> - A DC IN jack connected to AXP803's DCIN pin.
>> - A Li-Polymer battery connected to AXP803's battery pins.
>>
>> Storage:
>> - An eMMC by Foresee on the main board (in the product revision of the
>> main board it's designed to be switchable).
>> - An external MicroSD card slot.
>>
>> Display:
>> - An eDP LCD panel (1366x768) connected via an ANX6345 RGB-eDP bridge.
>> - A mini HDMI port.
>>
>> Misc:
>> - A Hall sensor designed to detect the status of lid, connected to GPIO PL12.
>> - A headphone jack connected to the SoC's internal codec.
>> - A debug UART port muxed with headphone jack.
>>
>> This commit adds basical support for it.
>>
>> [vasily: squashed several commits into one, added simplefb node, added usbphy
>> to ehci0 and ohci0 nodes]
>>
>> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
>> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
>> ---
>> arch/arm64/boot/dts/allwinner/Makefile | 1 +
>> .../dts/allwinner/sun50i-a64-pinebook.dts | 285 ++++++++++++++++++
>> 2 files changed, 286 insertions(+)
>> create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
>>
>> diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
>> index 8bebe7da5ed9..a8c6d0c6f2c5 100644
>> --- a/arch/arm64/boot/dts/allwinner/Makefile
>> +++ b/arch/arm64/boot/dts/allwinner/Makefile
>> @@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-nanopi-a64.dtb
>> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino.dtb
>> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
>> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
>> +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinebook.dtb
>> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
>> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb
>> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
>> new file mode 100644
>> index 000000000000..d952db217702
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
>> @@ -0,0 +1,285 @@
>> +/*
>> + * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.xyz>
>> + * Copyright (C) 2018 Vasily Khoruzhick <anarsoul@gmail.com>
>> + *
>> + * SPDX-License-Identifier: (GPL-2.0 OR MIT)
>
> The SPDX tag should be the first one.
OK, but it's not in number of other dts files, e.g.
sun50i-a64-teres-i.dts or sun50i-h5-orangepi-zero-plus.dts
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "sun50i-a64.dtsi"
>> +
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/input/input.h>
>> +#include <dt-bindings/pwm/pwm.h>
>> +
>> +/ {
>> + model = "Pinebook";
>> + compatible = "pine64,pinebook", "allwinner,sun50i-a64";
>> +
>> + aliases {
>> + serial0 = &uart0;
>> + ethernet0 = &rtl8723cs;
>> + };
>> +
>> + backlight: backlight {
>> + compatible = "pwm-backlight";
>> + pwms = <&pwm 0 50000 0>;
>> + brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
>
> The perceived brightness should be increasing linearly. This usually
> means that you need an function close to a power of two sequence.
OK, I'll try, but no one complained so far.
>> + default-brightness-level = <2>;
>> + enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
>> + };
>> +
>> + chosen {
>> + stdout-path = "serial0:115200n8";
>> +
>> + framebuffer-lcd {
>> + panel-supply = <®_dc1sw>;
>> + dvdd25-supply = <®_dldo2>;
>> + dvdd12-supply = <®_fldo1>;
>> + };
>> + };
>> +
>> + gpio_keys {
>> + compatible = "gpio-keys";
>> +
>> + lid_switch {
>> + label = "Lid Switch";
>> + gpios = <&r_pio 0 12 GPIO_ACTIVE_LOW>; /* PL12 */
>> + linux,input-type = <EV_SW>;
>> + linux,code = <SW_LID>;
>> + linux,can-disable;
>> + };
>> + };
>> +
>> + reg_vcc3v3: vcc3v3 {
>> + compatible = "regulator-fixed";
>> + regulator-name = "vcc3v3";
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> + };
>> +
>> + wifi_pwrseq: wifi_pwrseq {
>> + compatible = "mmc-pwrseq-simple";
>> + reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
>> + };
>> +};
>> +
>> +&ehci0 {
>> + phys = <&usbphy 0>;
>> + phy-names = "usb";
>> + status = "okay";
>> +};
>> +
>> +&ehci1 {
>> + status = "okay";
>> +};
>> +
>> +&mmc0 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&mmc0_pins>;
>> + vmmc-supply = <®_dcdc1>;
>> + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
>> + cd-inverted;
>> + disable-wp;
>> + bus-width = <4>;
>> + status = "okay";
>> +};
>> +
>> +&mmc1 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&mmc1_pins>;
>> + vmmc-supply = <®_dldo4>;
>> + vqmmc-supply = <®_eldo1>;
>> + mmc-pwrseq = <&wifi_pwrseq>;
>> + bus-width = <4>;
>> + non-removable;
>> + status = "okay";
>> +
>> + rtl8723cs: wifi@1 {
>> + reg = <1>;
>> + };
>> +};
>> +
>> +&mmc2 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&mmc2_pins>;
>> + vmmc-supply = <®_dcdc1>;
>> + vqmmc-supply = <®_eldo1>;
>> + bus-width = <8>;
>> + non-removable;
>> + cap-mmc-hw-reset;
>> + mmc-hs200-1_8v;
>> + status = "okay";
>> +};
>> +
>> +&ohci0 {
>> + phys = <&usbphy 0>;
>> + phy-names = "usb";
>> + status = "okay";
>> +};
>> +
>> +&ohci1 {
>> + status = "okay";
>> +};
>> +
>> +&pwm {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pwm_pin>;
>> + status = "okay";
>> +};
>> +
>> +&r_rsb {
>> + status = "okay";
>> +
>> + axp803: pmic@3a3 {
>> + compatible = "x-powers,axp803";
>> + reg = <0x3a3>;
>> + interrupt-parent = <&r_intc>;
>> + interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
>> + };
>> +};
>> +
>> +/* The ANX6345 eDP-bridge is on r_i2c. There is no linux (mainline)
>> + * driver for this chip at the moment, the bootloader initializes it.
>> + * However it can be accessed with the i2c-dev driver from user space.
>> + */
>
> The comment format is wrong, and the part after r_i2c, about i2c-dev
> and the mainline support is not really relevant. The DT describes the
> hardware, and is used by several different projects that might or
> might not have i2c-dev, an interface similar, or might have or not a
> driver for the bridge.
Comment is identical to sun50i-a64-teres-i.dts (which was merged few
months ago).
I'll remove everything but first sentence.
>
> Maxime
>
> --
> Maxime Ripard, Bootlin (formerly Free Electrons)
> Embedded Linux and Kernel engineering
> https://bootlin.com
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH 3/3] arm64: dts: allwinner: add support for Pinebook
@ 2018-06-01 17:37 ` Vasily Khoruzhick
0 siblings, 0 replies; 24+ messages in thread
From: Vasily Khoruzhick @ 2018-06-01 17:37 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Jun 1, 2018 at 2:23 AM, Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> On Thu, May 31, 2018 at 11:29:01PM -0700, Vasily Khoruzhick wrote:
>> From: Icenowy Zheng <icenowy@aosc.xyz>
>>
>> Pinebook is a A64-based laptop produced by Pine64, with the following
>> peripherals:
>>
>> USB:
>> - Two external USB ports (one is directly connected to A64's OTG
>> controller, the other is under a internal hub connected to the host-only
>> controller.)
>> - USB HID keyboard and touchpad connected to the internal hub.
>> - USB UVC camera connected to the internal hub.
>>
>> Power-related:
>> - A DC IN jack connected to AXP803's DCIN pin.
>> - A Li-Polymer battery connected to AXP803's battery pins.
>>
>> Storage:
>> - An eMMC by Foresee on the main board (in the product revision of the
>> main board it's designed to be switchable).
>> - An external MicroSD card slot.
>>
>> Display:
>> - An eDP LCD panel (1366x768) connected via an ANX6345 RGB-eDP bridge.
>> - A mini HDMI port.
>>
>> Misc:
>> - A Hall sensor designed to detect the status of lid, connected to GPIO PL12.
>> - A headphone jack connected to the SoC's internal codec.
>> - A debug UART port muxed with headphone jack.
>>
>> This commit adds basical support for it.
>>
>> [vasily: squashed several commits into one, added simplefb node, added usbphy
>> to ehci0 and ohci0 nodes]
>>
>> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
>> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
>> ---
>> arch/arm64/boot/dts/allwinner/Makefile | 1 +
>> .../dts/allwinner/sun50i-a64-pinebook.dts | 285 ++++++++++++++++++
>> 2 files changed, 286 insertions(+)
>> create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
>>
>> diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
>> index 8bebe7da5ed9..a8c6d0c6f2c5 100644
>> --- a/arch/arm64/boot/dts/allwinner/Makefile
>> +++ b/arch/arm64/boot/dts/allwinner/Makefile
>> @@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-nanopi-a64.dtb
>> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino.dtb
>> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
>> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
>> +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinebook.dtb
>> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
>> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb
>> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
>> new file mode 100644
>> index 000000000000..d952db217702
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
>> @@ -0,0 +1,285 @@
>> +/*
>> + * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.xyz>
>> + * Copyright (C) 2018 Vasily Khoruzhick <anarsoul@gmail.com>
>> + *
>> + * SPDX-License-Identifier: (GPL-2.0 OR MIT)
>
> The SPDX tag should be the first one.
OK, but it's not in number of other dts files, e.g.
sun50i-a64-teres-i.dts or sun50i-h5-orangepi-zero-plus.dts
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "sun50i-a64.dtsi"
>> +
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/input/input.h>
>> +#include <dt-bindings/pwm/pwm.h>
>> +
>> +/ {
>> + model = "Pinebook";
>> + compatible = "pine64,pinebook", "allwinner,sun50i-a64";
>> +
>> + aliases {
>> + serial0 = &uart0;
>> + ethernet0 = &rtl8723cs;
>> + };
>> +
>> + backlight: backlight {
>> + compatible = "pwm-backlight";
>> + pwms = <&pwm 0 50000 0>;
>> + brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
>
> The perceived brightness should be increasing linearly. This usually
> means that you need an function close to a power of two sequence.
OK, I'll try, but no one complained so far.
>> + default-brightness-level = <2>;
>> + enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
>> + };
>> +
>> + chosen {
>> + stdout-path = "serial0:115200n8";
>> +
>> + framebuffer-lcd {
>> + panel-supply = <®_dc1sw>;
>> + dvdd25-supply = <®_dldo2>;
>> + dvdd12-supply = <®_fldo1>;
>> + };
>> + };
>> +
>> + gpio_keys {
>> + compatible = "gpio-keys";
>> +
>> + lid_switch {
>> + label = "Lid Switch";
>> + gpios = <&r_pio 0 12 GPIO_ACTIVE_LOW>; /* PL12 */
>> + linux,input-type = <EV_SW>;
>> + linux,code = <SW_LID>;
>> + linux,can-disable;
>> + };
>> + };
>> +
>> + reg_vcc3v3: vcc3v3 {
>> + compatible = "regulator-fixed";
>> + regulator-name = "vcc3v3";
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> + };
>> +
>> + wifi_pwrseq: wifi_pwrseq {
>> + compatible = "mmc-pwrseq-simple";
>> + reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
>> + };
>> +};
>> +
>> +&ehci0 {
>> + phys = <&usbphy 0>;
>> + phy-names = "usb";
>> + status = "okay";
>> +};
>> +
>> +&ehci1 {
>> + status = "okay";
>> +};
>> +
>> +&mmc0 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&mmc0_pins>;
>> + vmmc-supply = <®_dcdc1>;
>> + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
>> + cd-inverted;
>> + disable-wp;
>> + bus-width = <4>;
>> + status = "okay";
>> +};
>> +
>> +&mmc1 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&mmc1_pins>;
>> + vmmc-supply = <®_dldo4>;
>> + vqmmc-supply = <®_eldo1>;
>> + mmc-pwrseq = <&wifi_pwrseq>;
>> + bus-width = <4>;
>> + non-removable;
>> + status = "okay";
>> +
>> + rtl8723cs: wifi at 1 {
>> + reg = <1>;
>> + };
>> +};
>> +
>> +&mmc2 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&mmc2_pins>;
>> + vmmc-supply = <®_dcdc1>;
>> + vqmmc-supply = <®_eldo1>;
>> + bus-width = <8>;
>> + non-removable;
>> + cap-mmc-hw-reset;
>> + mmc-hs200-1_8v;
>> + status = "okay";
>> +};
>> +
>> +&ohci0 {
>> + phys = <&usbphy 0>;
>> + phy-names = "usb";
>> + status = "okay";
>> +};
>> +
>> +&ohci1 {
>> + status = "okay";
>> +};
>> +
>> +&pwm {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pwm_pin>;
>> + status = "okay";
>> +};
>> +
>> +&r_rsb {
>> + status = "okay";
>> +
>> + axp803: pmic at 3a3 {
>> + compatible = "x-powers,axp803";
>> + reg = <0x3a3>;
>> + interrupt-parent = <&r_intc>;
>> + interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
>> + };
>> +};
>> +
>> +/* The ANX6345 eDP-bridge is on r_i2c. There is no linux (mainline)
>> + * driver for this chip at the moment, the bootloader initializes it.
>> + * However it can be accessed with the i2c-dev driver from user space.
>> + */
>
> The comment format is wrong, and the part after r_i2c, about i2c-dev
> and the mainline support is not really relevant. The DT describes the
> hardware, and is used by several different projects that might or
> might not have i2c-dev, an interface similar, or might have or not a
> driver for the bridge.
Comment is identical to sun50i-a64-teres-i.dts (which was merged few
months ago).
I'll remove everything but first sentence.
>
> Maxime
>
> --
> Maxime Ripard, Bootlin (formerly Free Electrons)
> Embedded Linux and Kernel engineering
> https://bootlin.com
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [PATCH 3/3] arm64: dts: allwinner: add support for Pinebook
2018-06-01 17:37 ` Vasily Khoruzhick
@ 2018-06-04 8:49 ` Maxime Ripard
-1 siblings, 0 replies; 24+ messages in thread
From: Maxime Ripard @ 2018-06-04 8:49 UTC (permalink / raw)
To: Vasily Khoruzhick
Cc: Mark Rutland, devicetree, Catalin Marinas, Will Deacon,
Chen-Yu Tsai, Rob Herring, Icenowy Zheng, arm-linux
[-- Attachment #1.1: Type: text/plain, Size: 4350 bytes --]
On Fri, Jun 01, 2018 at 10:37:29AM -0700, Vasily Khoruzhick wrote:
> On Fri, Jun 1, 2018 at 2:23 AM, Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> > On Thu, May 31, 2018 at 11:29:01PM -0700, Vasily Khoruzhick wrote:
> >> From: Icenowy Zheng <icenowy@aosc.xyz>
> >>
> >> Pinebook is a A64-based laptop produced by Pine64, with the following
> >> peripherals:
> >>
> >> USB:
> >> - Two external USB ports (one is directly connected to A64's OTG
> >> controller, the other is under a internal hub connected to the host-only
> >> controller.)
> >> - USB HID keyboard and touchpad connected to the internal hub.
> >> - USB UVC camera connected to the internal hub.
> >>
> >> Power-related:
> >> - A DC IN jack connected to AXP803's DCIN pin.
> >> - A Li-Polymer battery connected to AXP803's battery pins.
> >>
> >> Storage:
> >> - An eMMC by Foresee on the main board (in the product revision of the
> >> main board it's designed to be switchable).
> >> - An external MicroSD card slot.
> >>
> >> Display:
> >> - An eDP LCD panel (1366x768) connected via an ANX6345 RGB-eDP bridge.
> >> - A mini HDMI port.
> >>
> >> Misc:
> >> - A Hall sensor designed to detect the status of lid, connected to GPIO PL12.
> >> - A headphone jack connected to the SoC's internal codec.
> >> - A debug UART port muxed with headphone jack.
> >>
> >> This commit adds basical support for it.
> >>
> >> [vasily: squashed several commits into one, added simplefb node, added usbphy
> >> to ehci0 and ohci0 nodes]
> >>
> >> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
> >> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
> >> ---
> >> arch/arm64/boot/dts/allwinner/Makefile | 1 +
> >> .../dts/allwinner/sun50i-a64-pinebook.dts | 285 ++++++++++++++++++
> >> 2 files changed, 286 insertions(+)
> >> create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
> >>
> >> diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
> >> index 8bebe7da5ed9..a8c6d0c6f2c5 100644
> >> --- a/arch/arm64/boot/dts/allwinner/Makefile
> >> +++ b/arch/arm64/boot/dts/allwinner/Makefile
> >> @@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-nanopi-a64.dtb
> >> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino.dtb
> >> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
> >> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
> >> +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinebook.dtb
> >> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
> >> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb
> >> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
> >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
> >> new file mode 100644
> >> index 000000000000..d952db217702
> >> --- /dev/null
> >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
> >> @@ -0,0 +1,285 @@
> >> +/*
> >> + * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.xyz>
> >> + * Copyright (C) 2018 Vasily Khoruzhick <anarsoul@gmail.com>
> >> + *
> >> + * SPDX-License-Identifier: (GPL-2.0 OR MIT)
> >
> > The SPDX tag should be the first one.
>
> OK, but it's not in number of other dts files, e.g.
> sun50i-a64-teres-i.dts or sun50i-h5-orangepi-zero-plus.dts
I guess we'd have to fix it then
> >> +/* The ANX6345 eDP-bridge is on r_i2c. There is no linux (mainline)
> >> + * driver for this chip at the moment, the bootloader initializes it.
> >> + * However it can be accessed with the i2c-dev driver from user space.
> >> + */
> >
> > The comment format is wrong, and the part after r_i2c, about i2c-dev
> > and the mainline support is not really relevant. The DT describes the
> > hardware, and is used by several different projects that might or
> > might not have i2c-dev, an interface similar, or might have or not a
> > driver for the bridge.
>
> Comment is identical to sun50i-a64-teres-i.dts (which was merged few
> months ago).
> I'll remove everything but first sentence.
We don't notice everything unfortunately. Feel free to fix it in the
TERES-I DTS as well.
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
[-- Attachment #1.2: signature.asc --]
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[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 3/3] arm64: dts: allwinner: add support for Pinebook
@ 2018-06-04 8:49 ` Maxime Ripard
0 siblings, 0 replies; 24+ messages in thread
From: Maxime Ripard @ 2018-06-04 8:49 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Jun 01, 2018 at 10:37:29AM -0700, Vasily Khoruzhick wrote:
> On Fri, Jun 1, 2018 at 2:23 AM, Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> > On Thu, May 31, 2018 at 11:29:01PM -0700, Vasily Khoruzhick wrote:
> >> From: Icenowy Zheng <icenowy@aosc.xyz>
> >>
> >> Pinebook is a A64-based laptop produced by Pine64, with the following
> >> peripherals:
> >>
> >> USB:
> >> - Two external USB ports (one is directly connected to A64's OTG
> >> controller, the other is under a internal hub connected to the host-only
> >> controller.)
> >> - USB HID keyboard and touchpad connected to the internal hub.
> >> - USB UVC camera connected to the internal hub.
> >>
> >> Power-related:
> >> - A DC IN jack connected to AXP803's DCIN pin.
> >> - A Li-Polymer battery connected to AXP803's battery pins.
> >>
> >> Storage:
> >> - An eMMC by Foresee on the main board (in the product revision of the
> >> main board it's designed to be switchable).
> >> - An external MicroSD card slot.
> >>
> >> Display:
> >> - An eDP LCD panel (1366x768) connected via an ANX6345 RGB-eDP bridge.
> >> - A mini HDMI port.
> >>
> >> Misc:
> >> - A Hall sensor designed to detect the status of lid, connected to GPIO PL12.
> >> - A headphone jack connected to the SoC's internal codec.
> >> - A debug UART port muxed with headphone jack.
> >>
> >> This commit adds basical support for it.
> >>
> >> [vasily: squashed several commits into one, added simplefb node, added usbphy
> >> to ehci0 and ohci0 nodes]
> >>
> >> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
> >> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
> >> ---
> >> arch/arm64/boot/dts/allwinner/Makefile | 1 +
> >> .../dts/allwinner/sun50i-a64-pinebook.dts | 285 ++++++++++++++++++
> >> 2 files changed, 286 insertions(+)
> >> create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
> >>
> >> diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
> >> index 8bebe7da5ed9..a8c6d0c6f2c5 100644
> >> --- a/arch/arm64/boot/dts/allwinner/Makefile
> >> +++ b/arch/arm64/boot/dts/allwinner/Makefile
> >> @@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-nanopi-a64.dtb
> >> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino.dtb
> >> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
> >> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
> >> +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinebook.dtb
> >> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
> >> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb
> >> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
> >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
> >> new file mode 100644
> >> index 000000000000..d952db217702
> >> --- /dev/null
> >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
> >> @@ -0,0 +1,285 @@
> >> +/*
> >> + * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.xyz>
> >> + * Copyright (C) 2018 Vasily Khoruzhick <anarsoul@gmail.com>
> >> + *
> >> + * SPDX-License-Identifier: (GPL-2.0 OR MIT)
> >
> > The SPDX tag should be the first one.
>
> OK, but it's not in number of other dts files, e.g.
> sun50i-a64-teres-i.dts or sun50i-h5-orangepi-zero-plus.dts
I guess we'd have to fix it then
> >> +/* The ANX6345 eDP-bridge is on r_i2c. There is no linux (mainline)
> >> + * driver for this chip at the moment, the bootloader initializes it.
> >> + * However it can be accessed with the i2c-dev driver from user space.
> >> + */
> >
> > The comment format is wrong, and the part after r_i2c, about i2c-dev
> > and the mainline support is not really relevant. The DT describes the
> > hardware, and is used by several different projects that might or
> > might not have i2c-dev, an interface similar, or might have or not a
> > driver for the bridge.
>
> Comment is identical to sun50i-a64-teres-i.dts (which was merged few
> months ago).
> I'll remove everything but first sentence.
We don't notice everything unfortunately. Feel free to fix it in the
TERES-I DTS as well.
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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