* [PATCH v5] MIPS: Fix ejtag handler on SMP
@ 2018-06-11 9:01 r
2018-06-20 2:47 ` Paul Burton
0 siblings, 1 reply; 3+ messages in thread
From: r @ 2018-06-11 9:01 UTC (permalink / raw)
To: linux-mips, paul.burton; +Cc: jhogan, ralf, Heiher
From: Heiher <r@hev.cc>
On SMP systems, the shared ejtag debug buffer may be overwritten by
other cores, because every cores can generate ejtag exception at
same time.
Unfortunately, in that context, it's difficult to relax more registers
to access per cpu buffers. so use ll/sc to serialize the access.
Signed-off-by: Heiher <r@hev.cc>
---
arch/mips/kernel/genex.S | 46 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index 37b9383eacd3..6c257b52f57f 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -354,16 +354,56 @@ NESTED(ejtag_debug_handler, PT_SIZE, sp)
sll k0, k0, 30 # Check for SDBBP.
bgez k0, ejtag_return
+#ifdef CONFIG_SMP
+1: PTR_LA k0, ejtag_debug_buffer_spinlock
+ ll k0, 0(k0)
+ bnez k0, 1b
+ PTR_LA k0, ejtag_debug_buffer_spinlock
+ sc k0, 0(k0)
+ beqz k0, 1b
+# ifdef CONFIG_WEAK_REORDERING_BEYOND_LLSC
+ sync
+# endif
+
+ PTR_LA k0, ejtag_debug_buffer
+ LONG_S k1, 0(k0)
+
+ ASM_CPUID_MFC0 k1, ASM_SMP_CPUID_REG
+ PTR_SRL k1, SMP_CPUID_PTRSHIFT
+ PTR_SLL k1, LONGLOG
+ PTR_LA k0, ejtag_debug_buffer_per_cpu
+ PTR_ADDU k0, k1
+
+ PTR_LA k1, ejtag_debug_buffer
+ LONG_L k1, 0(k1)
+ LONG_S k1, 0(k0)
+
+ PTR_LA k0, ejtag_debug_buffer_spinlock
+ sw zero, 0(k0)
+#else
PTR_LA k0, ejtag_debug_buffer
LONG_S k1, 0(k0)
+#endif
+
SAVE_ALL
move a0, sp
jal ejtag_exception_handler
RESTORE_ALL
+
+#ifdef CONFIG_SMP
+ ASM_CPUID_MFC0 k1, ASM_SMP_CPUID_REG
+ PTR_SRL k1, SMP_CPUID_PTRSHIFT
+ PTR_SLL k1, LONGLOG
+ PTR_LA k0, ejtag_debug_buffer_per_cpu
+ PTR_ADDU k0, k1
+ LONG_L k1, 0(k0)
+#else
PTR_LA k0, ejtag_debug_buffer
LONG_L k1, 0(k0)
+#endif
ejtag_return:
+ back_to_back_c0_hazard
MFC0 k0, CP0_DESAVE
.set mips32
deret
@@ -377,6 +417,12 @@ ejtag_return:
.data
EXPORT(ejtag_debug_buffer)
.fill LONGSIZE
+#ifdef CONFIG_SMP
+EXPORT(ejtag_debug_buffer_spinlock)
+ .fill LONGSIZE
+EXPORT(ejtag_debug_buffer_per_cpu)
+ .fill LONGSIZE * NR_CPUS
+#endif
.previous
__INIT
--
2.17.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v5] MIPS: Fix ejtag handler on SMP
@ 2018-06-20 2:47 ` Paul Burton
0 siblings, 0 replies; 3+ messages in thread
From: Paul Burton @ 2018-06-20 2:47 UTC (permalink / raw)
To: r; +Cc: linux-mips, jhogan, ralf
Hi Heiher,
On Mon, Jun 11, 2018 at 05:01:10PM +0800, r@hev.cc wrote:
> From: Heiher <r@hev.cc>
>
> On SMP systems, the shared ejtag debug buffer may be overwritten by
> other cores, because every cores can generate ejtag exception at
> same time.
>
> Unfortunately, in that context, it's difficult to relax more registers
> to access per cpu buffers. so use ll/sc to serialize the access.
>
> Signed-off-by: Heiher <r@hev.cc>
> ---
> arch/mips/kernel/genex.S | 46 ++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 46 insertions(+)
Thanks, applied to mips-next for 4.19.
Paul
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v5] MIPS: Fix ejtag handler on SMP
@ 2018-06-20 2:47 ` Paul Burton
0 siblings, 0 replies; 3+ messages in thread
From: Paul Burton @ 2018-06-20 2:47 UTC (permalink / raw)
To: r; +Cc: linux-mips, jhogan, ralf
Hi Heiher,
On Mon, Jun 11, 2018 at 05:01:10PM +0800, r@hev.cc wrote:
> From: Heiher <r@hev.cc>
>
> On SMP systems, the shared ejtag debug buffer may be overwritten by
> other cores, because every cores can generate ejtag exception at
> same time.
>
> Unfortunately, in that context, it's difficult to relax more registers
> to access per cpu buffers. so use ll/sc to serialize the access.
>
> Signed-off-by: Heiher <r@hev.cc>
> ---
> arch/mips/kernel/genex.S | 46 ++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 46 insertions(+)
Thanks, applied to mips-next for 4.19.
Paul
^ permalink raw reply [flat|nested] 3+ messages in thread
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2018-06-20 2:47 ` Paul Burton
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