[igt-dev] [PATCH i-g-t v2] tools: Add a simple tool to read/write/decode dpcd registers

* [igt-dev] [PATCH i-g-t v2] tools: Add a simple tool to read/write/decode dpcd registers
@ 2018-06-15  6:38 Tarun Vyas
  2018-06-15  7:53 ` [igt-dev] ✓ Fi.CI.BAT: success for tools: Add a simple tool to read/write/decode dpcd registers (rev2) Patchwork
  2018-06-15 11:05 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
  0 siblings, 2 replies; 3+ messages in thread
From: Tarun Vyas @ 2018-06-15  6:38 UTC (permalink / raw)
  To: igt-dev; +Cc: dhinakaran.pandiyan

This tool serves as a wrapper around the constructs provided by the
drm_dpcd_aux_dev kernel module by working on the /dev/drm_dp_aux[n]
devices created by the kernel module.
It supports reading and writing dpcd registers on the connected aux
channels.
In the follow-up patch, support for decoding these registers will be
added to facilate debugging panel related issues.

Suggested-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: Tarun Vyas <tarun.vyas@intel.com>
---
 tools/dpcd_reg.c  | 213 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
 tools/meson.build |   1 +
 2 files changed, 214 insertions(+)
 create mode 100644 tools/dpcd_reg.c

diff --git a/tools/dpcd_reg.c b/tools/dpcd_reg.c
new file mode 100644
index 000000000000..041b0e38b6d9
--- /dev/null
+++ b/tools/dpcd_reg.c
@@ -0,0 +1,213 @@
+/*
+ * Copyright © 2018 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * 		DPCD register read/decode tool
+ * This tool wraps around DRM_DP_AUX_DEV module to provide DPCD register read,
+ * write and decode, so CONFIG_DRM_DP_AUX_DEV needs to be set.
+ */
+
+#include "igt_core.h"
+#include <errno.h>
+#include <fcntl.h>
+
+#define INVALID	0xff
+
+const char aux_dev[] = "/dev/drm_dp_aux";
+
+static void print_usage(char *tool, int help)
+{
+	igt_info("DPCD register rw and decode tool\n\n");
+	igt_info("This tool requires CONFIG_DRM_DP_AUX_CHARDEV\n"
+		 "to be set in the kernel config.\n\n");
+	igt_info("Usage: %s [OPTION ...] COMMAND\n\n", tool);
+	igt_info("COMMAND is one of:\n");
+	igt_info("  read:	Read [count] bytes dpcd reg at an offset\n");
+	igt_info("  write:	Write a dpcd reg at an offset\n\n");
+	igt_info("Options for the above COMMANDS are\n");
+	igt_info(" --device=DEVID 	Aux device id, as listed in /dev/drm_dp_aux_dev[n]\n");
+	igt_info(" --offset=REG_ADDR	DPCD register offset in hex\n");
+	igt_info(" --count=BYTES	For reads, specify # of bytes to be read from the offset\n");
+	igt_info(" --val=BYTE		For writes, specify a BYTE sized value to be writteni\n\n");
+
+	igt_info(" --help: print the usage\n");
+
+	exit((help == 1)? EXIT_SUCCESS : EXIT_FAILURE);
+}
+
+static int dpcd_read(char *device, const uint32_t offset, size_t count)
+{
+	int fd, ret, i;
+	void *buf = malloc(sizeof(uint8_t) * count);
+
+	if(NULL != buf)
+		memset(buf, 0, sizeof(uint8_t) * count);
+	else {
+		igt_warn("Can't allocate read buffer\n");
+		ret = EXIT_FAILURE;
+		goto out;
+	}
+
+	fd = open(device, O_RDONLY);
+	if (fd > 0) {
+		ret = pread(fd, buf, count, offset);
+		close(fd);
+		if (ret != count) {
+			igt_warn("Failed to read from %s aux device - error %s\n", device, strerror(errno));
+			ret = EXIT_FAILURE;
+			goto free_up;
+		}
+
+		igt_info("Read %zu byte(s) starting at offset %x\n\n", count, offset);
+		for (i = 0; i < count; i++)
+			igt_info("%x\n", *(((uint8_t *)(buf)) + i));
+	}
+	else {
+		igt_warn("Failed to open %s aux device - error: %s\n", device, strerror(errno));
+		ret = EXIT_FAILURE;
+	}
+free_up:
+	free(buf);
+out:
+	return ret;
+}
+
+static int dpcd_write(char *device, const uint32_t offset, const uint8_t *val)
+{
+	int fd, ret;
+
+	fd = open(device, O_RDWR);
+	if (fd > 0) {
+		ret = pwrite(fd, (const void *)val, sizeof(uint8_t), offset);
+		close(fd);
+		if (ret < 0) {
+			igt_warn("Failed to write to %s aux device - error %s\n", device, strerror(errno));
+			ret = EXIT_FAILURE;
+			goto out;
+		}
+		ret = dpcd_read(device, offset, sizeof(uint8_t));
+	}
+	else {
+		igt_warn("Failed to open %s aux device - error: %s\n", device, strerror(errno));
+		ret = EXIT_FAILURE;
+	}
+out:
+	return ret;
+}
+
+int main(int argc, char **argv)
+{
+	char dev_name[20];
+	int ret, devid, help_flg;
+	uint32_t offset;
+	uint8_t val;
+	size_t count;
+
+	enum command {
+		INV = -1,
+		READ = 2,
+		WRITE,
+	} cmd = INV;
+
+	struct option longopts [] = {
+		{ "count",      required_argument,      NULL,      'c' },
+		{ "device",	required_argument,	NULL,      'd' },
+		{ "help", 	no_argument, 		&help_flg,  2  },
+		{ "offset",	required_argument,	NULL,	   'o' },
+		{ "spec",	optional_argument,	NULL,	   's' },
+		{ "val",	required_argument,	NULL,	   'v' },
+		{ 0 }
+	};
+
+	offset = val = count = INVALID;
+	devid = -1;
+
+	while ((ret = getopt_long(argc, argv, "-:c:d:o:s::v:", longopts, NULL)) != -1) {
+		switch (ret) {
+		case 'c':
+			count = strtoul(optarg, NULL, 10);
+			break;
+		case 'd':
+			devid = strtoul(optarg, NULL, 10);
+			break;
+		case 'o':
+			offset = strtoul(optarg, NULL, 16);
+			break;
+		case 's':
+			/* TO-DO: Parse --spec version */
+			break;
+		case 'v':
+			val = strtoul(optarg, NULL, 16);
+			break;
+		/* Fall through for --help */
+		case 0:
+			break;
+		/* Command parsing */
+		case 1:
+			if (strcmp(optarg, "read") == 0)
+				cmd = READ;
+			else if (strcmp(optarg, "write") == 0)
+				cmd = WRITE;
+			break;
+		case ':':
+			fprintf(stderr, "The -%c option of %s requires an argument\n", optopt, argv[0]);
+			print_usage(argv[0], 0);
+		case '?':
+		default :
+			printf("%s - option %c is invalid\n", argv[0], optopt);
+			print_usage(argv[0], 0);
+		}
+	}
+
+	if (help_flg == 2)
+		print_usage(argv[0], 1);
+
+	if(devid == -1 || offset == INVALID) {
+		printf("Aux device id and/or offset missing\n");
+		print_usage(argv[0], 0);
+	}
+
+	memset(dev_name, '\0', 20);
+	snprintf(dev_name, sizeof(aux_dev) + 2, "%s%d", aux_dev, devid);
+
+	switch (cmd) {
+		case READ:
+			if (count == INVALID) {
+				igt_warn("Please specify the count in bytes\n");
+				print_usage(argv[0], 0);
+			}
+			ret = dpcd_read(dev_name, offset, count);
+			break;
+		case WRITE:
+			if (val == INVALID) {
+				igt_warn("Write value is missing\n");
+				print_usage(argv[0], 0);
+			}
+			ret = dpcd_write(dev_name, offset, &val);
+			break;
+		case INV:
+		default:
+			igt_warn("Please specify a comand: read/write/decode. See usage\n");
+			print_usage(argv[0], 0);
+	}
+
+	return ret;
+}
diff --git a/tools/meson.build b/tools/meson.build
index 789219d07c3d..1d4833806c16 100644
--- a/tools/meson.build
+++ b/tools/meson.build
@@ -37,6 +37,7 @@ tools_progs = [
 	'intel_watermark',
 	'intel_gem_info',
 	'intel_gvtg_test',
+	'dpcd_reg',
 ]
 tool_deps = igt_deps
 
-- 
2.13.5

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