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* [CI 1/2] drm/i915: Be irqsafe inside reset
@ 2018-06-15  9:31 Chris Wilson
  2018-06-15  9:31 ` [CI 2/2] drm/i915/execlists: Reset the CSB head tracking on reset/sanitization Chris Wilson
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Chris Wilson @ 2018-06-15  9:31 UTC (permalink / raw)
  To: intel-gfx

As we want to be able to call i915_reset_engine and co from a softirq or
timer context, we need to be irqsafe at all times. So we have to forgo
the simple spin_lock_irq for the full spin_lock_irqsave.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 8dd4d35655af..7fe951ad2a8b 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3144,15 +3144,17 @@ i915_gem_reset_request(struct intel_engine_cs *engine,
 		 */
 		request = i915_gem_find_active_request(engine);
 		if (request) {
+			unsigned long flags;
+
 			i915_gem_context_mark_innocent(request->gem_context);
 			dma_fence_set_error(&request->fence, -EAGAIN);
 
 			/* Rewind the engine to replay the incomplete rq */
-			spin_lock_irq(&engine->timeline.lock);
+			spin_lock_irqsave(&engine->timeline.lock, flags);
 			request = list_prev_entry(request, link);
 			if (&request->link == &engine->timeline.requests)
 				request = NULL;
-			spin_unlock_irq(&engine->timeline.lock);
+			spin_unlock_irqrestore(&engine->timeline.lock, flags);
 		}
 	}
 
-- 
2.17.1

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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [CI 2/2] drm/i915/execlists: Reset the CSB head tracking on reset/sanitization
  2018-06-15  9:31 [CI 1/2] drm/i915: Be irqsafe inside reset Chris Wilson
@ 2018-06-15  9:31 ` Chris Wilson
  2018-06-15 10:02 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915: Be irqsafe inside reset Patchwork
  2018-06-15 10:18 ` ✓ Fi.CI.BAT: success " Patchwork
  2 siblings, 0 replies; 4+ messages in thread
From: Chris Wilson @ 2018-06-15  9:31 UTC (permalink / raw)
  To: intel-gfx

We can avoid the mmio read of the CSB pointers after reset based on the
knowledge that the HW always start writing at entry 0 in the CSB buffer.
We need to reset our CSB head tracking after GPU reset (and on
sanitization after resume) so that we are expecting to read from entry
0, hence we reset our head tracking back to the entry before (the last
entry in the ring).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c | 15 ++++++---------
 1 file changed, 6 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 839cb1fc6a01..340c82efed4a 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -970,22 +970,19 @@ static void process_csb(struct intel_engine_cs *engine)
 			&engine->status_page.page_addr[I915_HWS_CSB_BUF0_INDEX];
 		unsigned int head, tail;
 
-		if (unlikely(execlists->csb_use_mmio)) {
-			buf = (u32 * __force)
-				(i915->regs + i915_mmio_reg_offset(RING_CONTEXT_STATUS_BUF_LO(engine, 0)));
-			execlists->csb_head = -1; /* force mmio read of CSB */
-		}
-
 		/* Clear before reading to catch new interrupts */
 		clear_bit(ENGINE_IRQ_EXECLIST, &engine->irq_posted);
 		smp_mb__after_atomic();
 
-		if (unlikely(execlists->csb_head == -1)) { /* after a reset */
+		if (unlikely(execlists->csb_use_mmio)) {
 			if (!fw) {
 				intel_uncore_forcewake_get(i915, execlists->fw_domains);
 				fw = true;
 			}
 
+			buf = (u32 * __force)
+				(i915->regs + i915_mmio_reg_offset(RING_CONTEXT_STATUS_BUF_LO(engine, 0)));
+
 			head = readl(i915->regs + i915_mmio_reg_offset(RING_CONTEXT_STATUS_PTR(engine)));
 			tail = GEN8_CSB_WRITE_PTR(head);
 			head = GEN8_CSB_READ_PTR(head);
@@ -1960,7 +1957,7 @@ static void execlists_reset(struct intel_engine_cs *engine,
 	spin_unlock(&engine->timeline.lock);
 
 	/* Following the reset, we need to reload the CSB read/write pointers */
-	engine->execlists.csb_head = -1;
+	engine->execlists.csb_head = GEN8_CSB_ENTRIES - 1;
 
 	local_irq_restore(flags);
 
@@ -2468,7 +2465,7 @@ static int logical_ring_init(struct intel_engine_cs *engine)
 			upper_32_bits(ce->lrc_desc);
 	}
 
-	engine->execlists.csb_head = -1;
+	engine->execlists.csb_head = GEN8_CSB_ENTRIES - 1;
 
 	return 0;
 
-- 
2.17.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915: Be irqsafe inside reset
  2018-06-15  9:31 [CI 1/2] drm/i915: Be irqsafe inside reset Chris Wilson
  2018-06-15  9:31 ` [CI 2/2] drm/i915/execlists: Reset the CSB head tracking on reset/sanitization Chris Wilson
@ 2018-06-15 10:02 ` Patchwork
  2018-06-15 10:18 ` ✓ Fi.CI.BAT: success " Patchwork
  2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2018-06-15 10:02 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [CI,1/2] drm/i915: Be irqsafe inside reset
URL   : https://patchwork.freedesktop.org/series/44815/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
88cc0c1c5c51 drm/i915: Be irqsafe inside reset
73a559896046 drm/i915/execlists: Reset the CSB head tracking on reset/sanitization
-:43: WARNING:LONG_LINE: line over 100 characters
#43: FILE: drivers/gpu/drm/i915/intel_lrc.c:984:
+				(i915->regs + i915_mmio_reg_offset(RING_CONTEXT_STATUS_BUF_LO(engine, 0)));

total: 0 errors, 1 warnings, 0 checks, 42 lines checked

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 4+ messages in thread

* ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915: Be irqsafe inside reset
  2018-06-15  9:31 [CI 1/2] drm/i915: Be irqsafe inside reset Chris Wilson
  2018-06-15  9:31 ` [CI 2/2] drm/i915/execlists: Reset the CSB head tracking on reset/sanitization Chris Wilson
  2018-06-15 10:02 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915: Be irqsafe inside reset Patchwork
@ 2018-06-15 10:18 ` Patchwork
  2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2018-06-15 10:18 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [CI,1/2] drm/i915: Be irqsafe inside reset
URL   : https://patchwork.freedesktop.org/series/44815/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4323 -> Patchwork_9322 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/44815/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_9322 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_frontbuffer_tracking@basic:
      fi-hsw-peppy:       PASS -> DMESG-FAIL (fdo#106103, fdo#102614)

    igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b:
      fi-glk-j4005:       PASS -> DMESG-WARN (fdo#105719)

    igt@prime_vgem@basic-fence-flip:
      fi-ilk-650:         PASS -> FAIL (fdo#104008)

    
    ==== Possible fixes ====

    igt@kms_flip@basic-plain-flip:
      fi-glk-j4005:       DMESG-WARN (fdo#106097) -> PASS

    
  fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
  fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
  fdo#105719 https://bugs.freedesktop.org/show_bug.cgi?id=105719
  fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097
  fdo#106103 https://bugs.freedesktop.org/show_bug.cgi?id=106103


== Participating hosts (43 -> 38) ==

  Missing    (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u 


== Build changes ==

    * Linux: CI_DRM_4323 -> Patchwork_9322

  CI_DRM_4323: 25d3805133071406ffae77c994f464dbbb3bb34e @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4519: 3381a56be31defb3b5c23a4fbc19ac26a000c35b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9322: 73a55989604679b9f39075543079091a4751fec6 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

73a559896046 drm/i915/execlists: Reset the CSB head tracking on reset/sanitization
88cc0c1c5c51 drm/i915: Be irqsafe inside reset

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9322/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2018-06-15 10:18 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-06-15  9:31 [CI 1/2] drm/i915: Be irqsafe inside reset Chris Wilson
2018-06-15  9:31 ` [CI 2/2] drm/i915/execlists: Reset the CSB head tracking on reset/sanitization Chris Wilson
2018-06-15 10:02 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915: Be irqsafe inside reset Patchwork
2018-06-15 10:18 ` ✓ Fi.CI.BAT: success " Patchwork

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