* [CI 1/3] drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC
@ 2018-06-16 0:05 Paulo Zanoni
2018-06-16 0:05 ` [CI 2/3] drm/i915/icl: Support for TC North Display interrupts Paulo Zanoni
` (3 more replies)
0 siblings, 4 replies; 6+ messages in thread
From: Paulo Zanoni @ 2018-06-16 0:05 UTC (permalink / raw)
To: intel-gfx; +Cc: Paulo Zanoni, Dhinakaran Pandiyan
From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
The Graphics System Event(GSE) interrupt bit has a new location in the
GU_MISC_INTERRUPT_{IIR, ISR, IMR, IER} registers. Since GSE was the only
DE_MISC interrupt that was enabled, with this change we don't enable/handle
any of DE_MISC interrupts for gen11. Credits to Paulo for pointing out
the register change.
v2: from DK
raw_reg_[read/write], branch prediction hint and drop platform check (Mika)
v3: From DK
Early re-enable of master interrupt (Chris)
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
[Paulo: bikesheds and rebases]
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 46 ++++++++++++++++++++++++++++++++++++++++-
drivers/gpu/drm/i915/i915_reg.h | 7 +++++++
2 files changed, 52 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index d5aee0b74f4b..64d5e10a4de8 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2954,11 +2954,44 @@ gen11_gt_irq_handler(struct drm_i915_private * const i915,
spin_unlock(&i915->irq_lock);
}
+static void
+gen11_gu_misc_irq_ack(struct drm_i915_private *dev_priv, const u32 master_ctl,
+ u32 *iir)
+{
+ void __iomem * const regs = dev_priv->regs;
+
+ if (!(master_ctl & GEN11_GU_MISC_IRQ))
+ return;
+
+ *iir = raw_reg_read(regs, GEN11_GU_MISC_IIR);
+ if (likely(*iir))
+ raw_reg_write(regs, GEN11_GU_MISC_IIR, *iir);
+}
+
+static void
+gen11_gu_misc_irq_handler(struct drm_i915_private *dev_priv,
+ const u32 master_ctl, const u32 iir)
+{
+ if (!(master_ctl & GEN11_GU_MISC_IRQ))
+ return;
+
+ if (unlikely(!iir)) {
+ DRM_ERROR("GU_MISC iir blank!\n");
+ return;
+ }
+
+ if (iir & GEN11_GU_MISC_GSE)
+ intel_opregion_asle_intr(dev_priv);
+ else
+ DRM_ERROR("Unexpected GU_MISC interrupt 0x%x\n", iir);
+}
+
static irqreturn_t gen11_irq_handler(int irq, void *arg)
{
struct drm_i915_private * const i915 = to_i915(arg);
void __iomem * const regs = i915->regs;
u32 master_ctl;
+ u32 gu_misc_iir;
if (!intel_irqs_enabled(i915))
return IRQ_NONE;
@@ -2987,9 +3020,13 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
enable_rpm_wakeref_asserts(i915);
}
+ gen11_gu_misc_irq_ack(i915, master_ctl, &gu_misc_iir);
+
/* Acknowledge and enable interrupts. */
raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ | master_ctl);
+ gen11_gu_misc_irq_handler(i915, master_ctl, gu_misc_iir);
+
return IRQ_HANDLED;
}
@@ -3476,6 +3513,7 @@ static void gen11_irq_reset(struct drm_device *dev)
GEN3_IRQ_RESET(GEN8_DE_PORT_);
GEN3_IRQ_RESET(GEN8_DE_MISC_);
+ GEN3_IRQ_RESET(GEN11_GU_MISC_);
GEN3_IRQ_RESET(GEN8_PCU_);
}
@@ -3919,9 +3957,12 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
uint32_t de_pipe_enables;
u32 de_port_masked = GEN8_AUX_CHANNEL_A;
u32 de_port_enables;
- u32 de_misc_masked = GEN8_DE_MISC_GSE | GEN8_DE_EDP_PSR;
+ u32 de_misc_masked = GEN8_DE_EDP_PSR;
enum pipe pipe;
+ if (INTEL_GEN(dev_priv) <= 10)
+ de_misc_masked |= GEN8_DE_MISC_GSE;
+
if (INTEL_GEN(dev_priv) >= 9) {
de_pipe_masked |= GEN9_DE_PIPE_IRQ_FAULT_ERRORS;
de_port_masked |= GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C |
@@ -4018,10 +4059,13 @@ static void gen11_gt_irq_postinstall(struct drm_i915_private *dev_priv)
static int gen11_irq_postinstall(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
+ u32 gu_misc_masked = GEN11_GU_MISC_GSE;
gen11_gt_irq_postinstall(dev_priv);
gen8_de_irq_postinstall(dev_priv);
+ GEN3_IRQ_INIT(GEN11_GU_MISC_, ~gu_misc_masked, gu_misc_masked);
+
I915_WRITE(GEN11_DISPLAY_INT_CTL, GEN11_DISPLAY_IRQ_ENABLE);
I915_WRITE(GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b8c0ebd50889..46a09a694b49 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7053,9 +7053,16 @@ enum {
#define GEN8_PCU_IIR _MMIO(0x444e8)
#define GEN8_PCU_IER _MMIO(0x444ec)
+#define GEN11_GU_MISC_ISR _MMIO(0x444f0)
+#define GEN11_GU_MISC_IMR _MMIO(0x444f4)
+#define GEN11_GU_MISC_IIR _MMIO(0x444f8)
+#define GEN11_GU_MISC_IER _MMIO(0x444fc)
+#define GEN11_GU_MISC_GSE (1 << 27)
+
#define GEN11_GFX_MSTR_IRQ _MMIO(0x190010)
#define GEN11_MASTER_IRQ (1 << 31)
#define GEN11_PCU_IRQ (1 << 30)
+#define GEN11_GU_MISC_IRQ (1 << 29)
#define GEN11_DISPLAY_IRQ (1 << 16)
#define GEN11_GT_DW_IRQ(x) (1 << (x))
#define GEN11_GT_DW1_IRQ (1 << 1)
--
2.14.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [CI 2/3] drm/i915/icl: Support for TC North Display interrupts
2018-06-16 0:05 [CI 1/3] drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC Paulo Zanoni
@ 2018-06-16 0:05 ` Paulo Zanoni
2018-06-16 1:51 ` kbuild test robot
2018-06-16 0:05 ` [CI 3/3] drm/i915/icl: Handle hotplug interrupts for DP over TBT Paulo Zanoni
` (2 subsequent siblings)
3 siblings, 1 reply; 6+ messages in thread
From: Paulo Zanoni @ 2018-06-16 0:05 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula, Dhinakaran Pandiyan, Paulo Zanoni
From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
The hotplug interrupts for the ports can be routed to either North
Display or South Display depending on the output mode. DP Alternate or
DP over TBT outputs will have hotplug interrupts routed to the North
Display while interrupts for legacy modes will be routed to the South
Display in PCH. This patch adds hotplug interrupt handling support for
DP Alternate mode.
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
[Paulo: coding style changes]
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 95 +++++++++++++++++++++++++++++++++++++++--
drivers/gpu/drm/i915/i915_reg.h | 20 +++++++++
2 files changed, 112 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 64d5e10a4de8..40e563eb3a1f 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -115,6 +115,13 @@ static const u32 hpd_bxt[HPD_NUM_PINS] = {
[HPD_PORT_C] = BXT_DE_PORT_HP_DDIC
};
+static const u32 hpd_tc_gen11[HPD_NUM_PINS] = {
+ [HPD_PORT_C] = GEN11_TC1_HOTPLUG,
+ [HPD_PORT_D] = GEN11_TC2_HOTPLUG,
+ [HPD_PORT_E] = GEN11_TC3_HOTPLUG,
+ [HPD_PORT_F] = GEN11_TC4_HOTPLUG
+};
+
/* IIR can theoretically queue up two events. Be paranoid. */
#define GEN8_IRQ_RESET_NDX(type, which) do { \
I915_WRITE(GEN8_##type##_IMR(which), 0xffffffff); \
@@ -1549,6 +1556,22 @@ static void gen8_gt_irq_handler(struct drm_i915_private *i915,
}
}
+static bool gen11_port_hotplug_long_detect(enum port port, u32 val)
+{
+ switch (port) {
+ case PORT_C:
+ return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC1);
+ case PORT_D:
+ return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC2);
+ case PORT_E:
+ return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC3);
+ case PORT_F:
+ return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC4);
+ default:
+ return false;
+ }
+}
+
static bool bxt_port_hotplug_long_detect(enum port port, u32 val)
{
switch (port) {
@@ -2598,6 +2621,25 @@ static void bxt_hpd_irq_handler(struct drm_i915_private *dev_priv,
intel_hpd_irq_handler(dev_priv, pin_mask, long_mask);
}
+static void gen11_hpd_irq_handler(struct drm_i915_private *dev_priv, u32 iir)
+{
+ u32 pin_mask = 0, long_mask = 0;
+ u32 trigger_tc, dig_hotplug_reg;
+
+ trigger_tc = iir & GEN11_DE_TC_HOTPLUG_MASK;
+ if (trigger_tc) {
+ dig_hotplug_reg = I915_READ(GEN11_TC_HOTPLUG_CTL);
+ I915_WRITE(GEN11_TC_HOTPLUG_CTL, dig_hotplug_reg);
+
+ intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask, trigger_tc,
+ dig_hotplug_reg, hpd_tc_gen11,
+ gen11_port_hotplug_long_detect);
+ intel_hpd_irq_handler(dev_priv, pin_mask, long_mask);
+ } else {
+ DRM_ERROR("Unexpected DE HPD interrupt 0x%08x\n", iir);
+ }
+}
+
static irqreturn_t
gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
{
@@ -2633,6 +2675,17 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
DRM_ERROR("The master control interrupt lied (DE MISC)!\n");
}
+ if (INTEL_GEN(dev_priv) >= 11 && (master_ctl & GEN11_DE_HPD_IRQ)) {
+ iir = I915_READ(GEN11_DE_HPD_IIR);
+ if (iir) {
+ I915_WRITE(GEN11_DE_HPD_IIR, iir);
+ ret = IRQ_HANDLED;
+ gen11_hpd_irq_handler(dev_priv, iir);
+ } else {
+ DRM_ERROR("The master control interrupt lied, (DE HPD)!\n");
+ }
+ }
+
if (master_ctl & GEN8_DE_PORT_IRQ) {
iir = I915_READ(GEN8_DE_PORT_IIR);
if (iir) {
@@ -3513,6 +3566,7 @@ static void gen11_irq_reset(struct drm_device *dev)
GEN3_IRQ_RESET(GEN8_DE_PORT_);
GEN3_IRQ_RESET(GEN8_DE_MISC_);
+ GEN3_IRQ_RESET(GEN11_DE_HPD_);
GEN3_IRQ_RESET(GEN11_GU_MISC_);
GEN3_IRQ_RESET(GEN8_PCU_);
}
@@ -3631,6 +3685,34 @@ static void ibx_hpd_irq_setup(struct drm_i915_private *dev_priv)
ibx_hpd_detection_setup(dev_priv);
}
+static void gen11_hpd_detection_setup(struct drm_i915_private *dev_priv)
+{
+ u32 hotplug;
+
+ hotplug = I915_READ(GEN11_TC_HOTPLUG_CTL);
+ hotplug |= GEN11_HOTPLUG_CTL_ENABLE(PORT_TC1) |
+ GEN11_HOTPLUG_CTL_ENABLE(PORT_TC2) |
+ GEN11_HOTPLUG_CTL_ENABLE(PORT_TC3) |
+ GEN11_HOTPLUG_CTL_ENABLE(PORT_TC4);
+ I915_WRITE(GEN11_TC_HOTPLUG_CTL, hotplug);
+}
+
+static void gen11_hpd_irq_setup(struct drm_i915_private *dev_priv)
+{
+ u32 hotplug_irqs, enabled_irqs;
+ u32 val;
+
+ enabled_irqs = intel_hpd_enabled_irqs(dev_priv, hpd_tc_gen11);
+ hotplug_irqs = GEN11_DE_TC_HOTPLUG_MASK;
+
+ val = I915_READ(GEN11_DE_HPD_IMR);
+ val &= ~hotplug_irqs;
+ I915_WRITE(GEN11_DE_HPD_IMR, val);
+ POSTING_READ(GEN11_DE_HPD_IMR);
+
+ gen11_hpd_detection_setup(dev_priv);
+}
+
static void spt_hpd_detection_setup(struct drm_i915_private *dev_priv)
{
u32 val, hotplug;
@@ -4004,10 +4086,17 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
GEN3_IRQ_INIT(GEN8_DE_PORT_, ~de_port_masked, de_port_enables);
GEN3_IRQ_INIT(GEN8_DE_MISC_, ~de_misc_masked, de_misc_masked);
- if (IS_GEN9_LP(dev_priv))
+ if (INTEL_GEN(dev_priv) >= 11) {
+ u32 de_hpd_masked = 0;
+ u32 de_hpd_enables = GEN11_DE_TC_HOTPLUG_MASK;
+
+ GEN3_IRQ_INIT(GEN11_DE_HPD_, ~de_hpd_masked, de_hpd_enables);
+ gen11_hpd_detection_setup(dev_priv);
+ } else if (IS_GEN9_LP(dev_priv)) {
bxt_hpd_detection_setup(dev_priv);
- else if (IS_BROADWELL(dev_priv))
+ } else if (IS_BROADWELL(dev_priv)) {
ilk_hpd_detection_setup(dev_priv);
+ }
}
static int gen8_irq_postinstall(struct drm_device *dev)
@@ -4529,7 +4618,7 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
dev->driver->irq_uninstall = gen11_irq_reset;
dev->driver->enable_vblank = gen8_enable_vblank;
dev->driver->disable_vblank = gen8_disable_vblank;
- dev_priv->display.hpd_irq_setup = spt_hpd_irq_setup;
+ dev_priv->display.hpd_irq_setup = gen11_hpd_irq_setup;
} else if (INTEL_GEN(dev_priv) >= 8) {
dev->driver->irq_handler = gen8_irq_handler;
dev->driver->irq_preinstall = gen8_irq_reset;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 46a09a694b49..6c0199fe9167 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7073,11 +7073,31 @@ enum {
#define GEN11_AUDIO_CODEC_IRQ (1 << 24)
#define GEN11_DE_PCH_IRQ (1 << 23)
#define GEN11_DE_MISC_IRQ (1 << 22)
+#define GEN11_DE_HPD_IRQ (1 << 21)
#define GEN11_DE_PORT_IRQ (1 << 20)
#define GEN11_DE_PIPE_C (1 << 18)
#define GEN11_DE_PIPE_B (1 << 17)
#define GEN11_DE_PIPE_A (1 << 16)
+#define GEN11_DE_HPD_ISR _MMIO(0x44470)
+#define GEN11_DE_HPD_IMR _MMIO(0x44474)
+#define GEN11_DE_HPD_IIR _MMIO(0x44478)
+#define GEN11_DE_HPD_IER _MMIO(0x4447c)
+#define GEN11_TC4_HOTPLUG (1 << 19)
+#define GEN11_TC3_HOTPLUG (1 << 18)
+#define GEN11_TC2_HOTPLUG (1 << 17)
+#define GEN11_TC1_HOTPLUG (1 << 16)
+#define GEN11_DE_TC_HOTPLUG_MASK (GEN11_TC4_HOTPLUG | \
+ GEN11_TC3_HOTPLUG | \
+ GEN11_TC2_HOTPLUG | \
+ GEN11_TC1_HOTPLUG)
+
+#define GEN11_TC_HOTPLUG_CTL _MMIO(0x44038)
+#define GEN11_HOTPLUG_CTL_ENABLE(tc_port) (8 << (tc_port) * 4)
+#define GEN11_HOTPLUG_CTL_LONG_DETECT(tc_port) (2 << (tc_port) * 4)
+#define GEN11_HOTPLUG_CTL_SHORT_DETECT(tc_port) (1 << (tc_port) * 4)
+#define GEN11_HOTPLUG_CTL_NO_DETECT(tc_port) (0 << (tc_port) * 4)
+
#define GEN11_GT_INTR_DW0 _MMIO(0x190018)
#define GEN11_CSME (31)
#define GEN11_GUNIT (28)
--
2.14.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [CI 3/3] drm/i915/icl: Handle hotplug interrupts for DP over TBT
2018-06-16 0:05 [CI 1/3] drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC Paulo Zanoni
2018-06-16 0:05 ` [CI 2/3] drm/i915/icl: Support for TC North Display interrupts Paulo Zanoni
@ 2018-06-16 0:05 ` Paulo Zanoni
2018-06-16 1:04 ` ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC Patchwork
2018-06-16 15:43 ` ✓ Fi.CI.IGT: " Patchwork
3 siblings, 0 replies; 6+ messages in thread
From: Paulo Zanoni @ 2018-06-16 0:05 UTC (permalink / raw)
To: intel-gfx; +Cc: Dhinakaran Pandiyan, Paulo Zanoni
From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
This patch enables hotplug interrupts for DP over TBT output on TC
ports. The TBT interrupts are enabled and handled irrespective of the
actual output type which could be DP Alternate, DP over TBT, native DP
or native HDMI.
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 49 ++++++++++++++++++++++++++++++-----------
drivers/gpu/drm/i915/i915_reg.h | 11 ++++++++-
2 files changed, 46 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 40e563eb3a1f..46aaef5c1851 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -115,11 +115,11 @@ static const u32 hpd_bxt[HPD_NUM_PINS] = {
[HPD_PORT_C] = BXT_DE_PORT_HP_DDIC
};
-static const u32 hpd_tc_gen11[HPD_NUM_PINS] = {
- [HPD_PORT_C] = GEN11_TC1_HOTPLUG,
- [HPD_PORT_D] = GEN11_TC2_HOTPLUG,
- [HPD_PORT_E] = GEN11_TC3_HOTPLUG,
- [HPD_PORT_F] = GEN11_TC4_HOTPLUG
+static const u32 hpd_gen11[HPD_NUM_PINS] = {
+ [HPD_PORT_C] = GEN11_TC1_HOTPLUG | GEN11_TBT1_HOTPLUG,
+ [HPD_PORT_D] = GEN11_TC2_HOTPLUG | GEN11_TBT2_HOTPLUG,
+ [HPD_PORT_E] = GEN11_TC3_HOTPLUG | GEN11_TBT3_HOTPLUG,
+ [HPD_PORT_F] = GEN11_TC4_HOTPLUG | GEN11_TBT4_HOTPLUG
};
/* IIR can theoretically queue up two events. Be paranoid. */
@@ -2624,20 +2624,35 @@ static void bxt_hpd_irq_handler(struct drm_i915_private *dev_priv,
static void gen11_hpd_irq_handler(struct drm_i915_private *dev_priv, u32 iir)
{
u32 pin_mask = 0, long_mask = 0;
- u32 trigger_tc, dig_hotplug_reg;
+ u32 trigger_tc = iir & GEN11_DE_TC_HOTPLUG_MASK;
+ u32 trigger_tbt = iir & GEN11_DE_TBT_HOTPLUG_MASK;
- trigger_tc = iir & GEN11_DE_TC_HOTPLUG_MASK;
if (trigger_tc) {
+ u32 dig_hotplug_reg;
+
dig_hotplug_reg = I915_READ(GEN11_TC_HOTPLUG_CTL);
I915_WRITE(GEN11_TC_HOTPLUG_CTL, dig_hotplug_reg);
intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask, trigger_tc,
- dig_hotplug_reg, hpd_tc_gen11,
+ dig_hotplug_reg, hpd_gen11,
+ gen11_port_hotplug_long_detect);
+ }
+
+ if (trigger_tbt) {
+ u32 dig_hotplug_reg;
+
+ dig_hotplug_reg = I915_READ(GEN11_TBT_HOTPLUG_CTL);
+ I915_WRITE(GEN11_TBT_HOTPLUG_CTL, dig_hotplug_reg);
+
+ intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask, trigger_tbt,
+ dig_hotplug_reg, hpd_gen11,
gen11_port_hotplug_long_detect);
+ }
+
+ if (pin_mask)
intel_hpd_irq_handler(dev_priv, pin_mask, long_mask);
- } else {
+ else
DRM_ERROR("Unexpected DE HPD interrupt 0x%08x\n", iir);
- }
}
static irqreturn_t
@@ -3695,6 +3710,13 @@ static void gen11_hpd_detection_setup(struct drm_i915_private *dev_priv)
GEN11_HOTPLUG_CTL_ENABLE(PORT_TC3) |
GEN11_HOTPLUG_CTL_ENABLE(PORT_TC4);
I915_WRITE(GEN11_TC_HOTPLUG_CTL, hotplug);
+
+ hotplug = I915_READ(GEN11_TBT_HOTPLUG_CTL);
+ hotplug |= GEN11_HOTPLUG_CTL_ENABLE(PORT_TC1) |
+ GEN11_HOTPLUG_CTL_ENABLE(PORT_TC2) |
+ GEN11_HOTPLUG_CTL_ENABLE(PORT_TC3) |
+ GEN11_HOTPLUG_CTL_ENABLE(PORT_TC4);
+ I915_WRITE(GEN11_TBT_HOTPLUG_CTL, hotplug);
}
static void gen11_hpd_irq_setup(struct drm_i915_private *dev_priv)
@@ -3702,8 +3724,8 @@ static void gen11_hpd_irq_setup(struct drm_i915_private *dev_priv)
u32 hotplug_irqs, enabled_irqs;
u32 val;
- enabled_irqs = intel_hpd_enabled_irqs(dev_priv, hpd_tc_gen11);
- hotplug_irqs = GEN11_DE_TC_HOTPLUG_MASK;
+ enabled_irqs = intel_hpd_enabled_irqs(dev_priv, hpd_gen11);
+ hotplug_irqs = GEN11_DE_TC_HOTPLUG_MASK | GEN11_DE_TBT_HOTPLUG_MASK;
val = I915_READ(GEN11_DE_HPD_IMR);
val &= ~hotplug_irqs;
@@ -4088,7 +4110,8 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
if (INTEL_GEN(dev_priv) >= 11) {
u32 de_hpd_masked = 0;
- u32 de_hpd_enables = GEN11_DE_TC_HOTPLUG_MASK;
+ u32 de_hpd_enables = GEN11_DE_TC_HOTPLUG_MASK |
+ GEN11_DE_TBT_HOTPLUG_MASK;
GEN3_IRQ_INIT(GEN11_DE_HPD_, ~de_hpd_masked, de_hpd_enables);
gen11_hpd_detection_setup(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 6c0199fe9167..d423d1b60946 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7091,7 +7091,16 @@ enum {
GEN11_TC3_HOTPLUG | \
GEN11_TC2_HOTPLUG | \
GEN11_TC1_HOTPLUG)
-
+#define GEN11_TBT4_HOTPLUG (1 << 3)
+#define GEN11_TBT3_HOTPLUG (1 << 2)
+#define GEN11_TBT2_HOTPLUG (1 << 1)
+#define GEN11_TBT1_HOTPLUG (1 << 0)
+#define GEN11_DE_TBT_HOTPLUG_MASK (GEN11_TBT4_HOTPLUG | \
+ GEN11_TBT3_HOTPLUG | \
+ GEN11_TBT2_HOTPLUG | \
+ GEN11_TBT1_HOTPLUG)
+
+#define GEN11_TBT_HOTPLUG_CTL _MMIO(0x44030)
#define GEN11_TC_HOTPLUG_CTL _MMIO(0x44038)
#define GEN11_HOTPLUG_CTL_ENABLE(tc_port) (8 << (tc_port) * 4)
#define GEN11_HOTPLUG_CTL_LONG_DETECT(tc_port) (2 << (tc_port) * 4)
--
2.14.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC
2018-06-16 0:05 [CI 1/3] drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC Paulo Zanoni
2018-06-16 0:05 ` [CI 2/3] drm/i915/icl: Support for TC North Display interrupts Paulo Zanoni
2018-06-16 0:05 ` [CI 3/3] drm/i915/icl: Handle hotplug interrupts for DP over TBT Paulo Zanoni
@ 2018-06-16 1:04 ` Patchwork
2018-06-16 15:43 ` ✓ Fi.CI.IGT: " Patchwork
3 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2018-06-16 1:04 UTC (permalink / raw)
To: Paulo Zanoni; +Cc: intel-gfx
== Series Details ==
Series: series starting with [CI,1/3] drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC
URL : https://patchwork.freedesktop.org/series/44874/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4329 -> Patchwork_9341 =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_9341 need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9341, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/44874/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9341:
=== IGT changes ===
==== Warnings ====
igt@gem_exec_gttfill@basic:
fi-pnv-d510: PASS -> SKIP
== Known issues ==
Here are the changes found in Patchwork_9341 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drv_module_reload@basic-reload:
fi-glk-j4005: NOTRUN -> DMESG-WARN (fdo#106725, fdo#106248)
igt@kms_chamelium@dp-edid-read:
fi-kbl-7500u: PASS -> FAIL (fdo#103841)
igt@kms_flip@basic-flip-vs-modeset:
fi-glk-j4005: NOTRUN -> DMESG-WARN (fdo#106000, fdo#106097)
igt@kms_flip@basic-flip-vs-wf_vblank:
fi-cfl-s3: PASS -> FAIL (fdo#100368, fdo#103928)
==== Possible fixes ====
igt@gem_exec_gttfill@basic:
fi-byt-n2820: FAIL (fdo#106744) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
fi-skl-6260u: INCOMPLETE (fdo#104108) -> PASS
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103841 https://bugs.freedesktop.org/show_bug.cgi?id=103841
fdo#103928 https://bugs.freedesktop.org/show_bug.cgi?id=103928
fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000
fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097
fdo#106248 https://bugs.freedesktop.org/show_bug.cgi?id=106248
fdo#106725 https://bugs.freedesktop.org/show_bug.cgi?id=106725
fdo#106744 https://bugs.freedesktop.org/show_bug.cgi?id=106744
== Participating hosts (42 -> 38) ==
Additional (1): fi-glk-j4005
Missing (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4329 -> Patchwork_9341
CI_DRM_4329: 02d8db1a894b0e646b2debd64ce24b8e99fd2ffd @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4521: 4aa49a88acdaafed8235837d85a099ad941fc281 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9341: f6c065b4f0b6418efca8377a6afce2d61a6eff4d @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
f6c065b4f0b6 drm/i915/icl: Handle hotplug interrupts for DP over TBT
6f3e9632a7aa drm/i915/icl: Support for TC North Display interrupts
942fd6f6bf29 drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9341/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [CI 2/3] drm/i915/icl: Support for TC North Display interrupts
2018-06-16 0:05 ` [CI 2/3] drm/i915/icl: Support for TC North Display interrupts Paulo Zanoni
@ 2018-06-16 1:51 ` kbuild test robot
0 siblings, 0 replies; 6+ messages in thread
From: kbuild test robot @ 2018-06-16 1:51 UTC (permalink / raw)
Cc: Jani Nikula, intel-gfx, Paulo Zanoni, kbuild-all, Dhinakaran Pandiyan
[-- Attachment #1: Type: text/plain, Size: 5929 bytes --]
Hi Dhinakaran,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on next-20180615]
[cannot apply to v4.17]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Paulo-Zanoni/drm-i915-icl-GSE-interrupt-moves-from-DE_MISC-to-GU_MISC/20180616-080834
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-x009-201823 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-16) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All errors (new ones prefixed by >>):
In file included from drivers/gpu/drm/i915/i915_drv.h:56:0,
from drivers/gpu/drm/i915/i915_irq.c:36:
drivers/gpu/drm/i915/i915_irq.c: In function 'gen11_port_hotplug_long_detect':
>> drivers/gpu/drm/i915/i915_irq.c:1563:46: error: 'PORT_TC1' undeclared (first use in this function); did you mean 'PORT_C'?
return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC1);
^
drivers/gpu/drm/i915/i915_reg.h:7050:57: note: in definition of macro 'GEN11_HOTPLUG_CTL_LONG_DETECT'
#define GEN11_HOTPLUG_CTL_LONG_DETECT(tc_port) (2 << (tc_port) * 4)
^~~~~~~
drivers/gpu/drm/i915/i915_irq.c:1563:46: note: each undeclared identifier is reported only once for each function it appears in
return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC1);
^
drivers/gpu/drm/i915/i915_reg.h:7050:57: note: in definition of macro 'GEN11_HOTPLUG_CTL_LONG_DETECT'
#define GEN11_HOTPLUG_CTL_LONG_DETECT(tc_port) (2 << (tc_port) * 4)
^~~~~~~
>> drivers/gpu/drm/i915/i915_irq.c:1565:46: error: 'PORT_TC2' undeclared (first use in this function); did you mean 'PORT_TC1'?
return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC2);
^
drivers/gpu/drm/i915/i915_reg.h:7050:57: note: in definition of macro 'GEN11_HOTPLUG_CTL_LONG_DETECT'
#define GEN11_HOTPLUG_CTL_LONG_DETECT(tc_port) (2 << (tc_port) * 4)
^~~~~~~
>> drivers/gpu/drm/i915/i915_irq.c:1567:46: error: 'PORT_TC3' undeclared (first use in this function); did you mean 'PORT_TC2'?
return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC3);
^
drivers/gpu/drm/i915/i915_reg.h:7050:57: note: in definition of macro 'GEN11_HOTPLUG_CTL_LONG_DETECT'
#define GEN11_HOTPLUG_CTL_LONG_DETECT(tc_port) (2 << (tc_port) * 4)
^~~~~~~
>> drivers/gpu/drm/i915/i915_irq.c:1569:46: error: 'PORT_TC4' undeclared (first use in this function); did you mean 'PORT_TC3'?
return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC4);
^
drivers/gpu/drm/i915/i915_reg.h:7050:57: note: in definition of macro 'GEN11_HOTPLUG_CTL_LONG_DETECT'
#define GEN11_HOTPLUG_CTL_LONG_DETECT(tc_port) (2 << (tc_port) * 4)
^~~~~~~
drivers/gpu/drm/i915/i915_irq.c: In function 'gen11_hpd_detection_setup':
drivers/gpu/drm/i915/i915_irq.c:3681:38: error: 'PORT_TC1' undeclared (first use in this function); did you mean 'PORT_C'?
hotplug |= GEN11_HOTPLUG_CTL_ENABLE(PORT_TC1) |
^
drivers/gpu/drm/i915/i915_reg.h:7049:52: note: in definition of macro 'GEN11_HOTPLUG_CTL_ENABLE'
#define GEN11_HOTPLUG_CTL_ENABLE(tc_port) (8 << (tc_port) * 4)
^~~~~~~
drivers/gpu/drm/i915/i915_irq.c:3682:31: error: 'PORT_TC2' undeclared (first use in this function); did you mean 'PORT_TC1'?
GEN11_HOTPLUG_CTL_ENABLE(PORT_TC2) |
^
drivers/gpu/drm/i915/i915_reg.h:7049:52: note: in definition of macro 'GEN11_HOTPLUG_CTL_ENABLE'
#define GEN11_HOTPLUG_CTL_ENABLE(tc_port) (8 << (tc_port) * 4)
^~~~~~~
drivers/gpu/drm/i915/i915_irq.c:3683:31: error: 'PORT_TC3' undeclared (first use in this function); did you mean 'PORT_TC2'?
GEN11_HOTPLUG_CTL_ENABLE(PORT_TC3) |
^
drivers/gpu/drm/i915/i915_reg.h:7049:52: note: in definition of macro 'GEN11_HOTPLUG_CTL_ENABLE'
#define GEN11_HOTPLUG_CTL_ENABLE(tc_port) (8 << (tc_port) * 4)
^~~~~~~
drivers/gpu/drm/i915/i915_irq.c:3684:31: error: 'PORT_TC4' undeclared (first use in this function); did you mean 'PORT_TC3'?
GEN11_HOTPLUG_CTL_ENABLE(PORT_TC4);
^
drivers/gpu/drm/i915/i915_reg.h:7049:52: note: in definition of macro 'GEN11_HOTPLUG_CTL_ENABLE'
#define GEN11_HOTPLUG_CTL_ENABLE(tc_port) (8 << (tc_port) * 4)
^~~~~~~
vim +1563 drivers/gpu/drm/i915/i915_irq.c
1558
1559 static bool gen11_port_hotplug_long_detect(enum port port, u32 val)
1560 {
1561 switch (port) {
1562 case PORT_C:
> 1563 return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC1);
1564 case PORT_D:
> 1565 return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC2);
1566 case PORT_E:
> 1567 return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC3);
1568 case PORT_F:
> 1569 return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC4);
1570 default:
1571 return false;
1572 }
1573 }
1574
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [CI,1/3] drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC
2018-06-16 0:05 [CI 1/3] drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC Paulo Zanoni
` (2 preceding siblings ...)
2018-06-16 1:04 ` ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC Patchwork
@ 2018-06-16 15:43 ` Patchwork
3 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2018-06-16 15:43 UTC (permalink / raw)
To: Paulo Zanoni; +Cc: intel-gfx
== Series Details ==
Series: series starting with [CI,1/3] drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC
URL : https://patchwork.freedesktop.org/series/44874/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4329_full -> Patchwork_9341_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_9341_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9341_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9341_full:
=== IGT changes ===
==== Warnings ====
igt@gem_mocs_settings@mocs-rc6-bsd1:
shard-kbl: SKIP -> PASS
igt@gem_mocs_settings@mocs-rc6-vebox:
shard-kbl: PASS -> SKIP +3
== Known issues ==
Here are the changes found in Patchwork_9341_full that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
shard-glk: PASS -> FAIL (fdo#105363)
igt@kms_setmode@basic:
shard-apl: PASS -> FAIL (fdo#99912)
==== Possible fixes ====
igt@gem_exec_big:
shard-hsw: INCOMPLETE (fdo#103540) -> PASS
igt@kms_atomic_transition@1x-modeset-transitions-nonblocking:
shard-glk: FAIL (fdo#105703) -> PASS
igt@kms_flip@flip-vs-expired-vblank:
shard-glk: FAIL (fdo#105189) -> PASS
igt@kms_flip_tiling@flip-to-x-tiled:
shard-glk: FAIL (fdo#103822, fdo#104724) -> PASS
fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540
fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822
fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724
fdo#105189 https://bugs.freedesktop.org/show_bug.cgi?id=105189
fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
fdo#105703 https://bugs.freedesktop.org/show_bug.cgi?id=105703
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
== Participating hosts (5 -> 5) ==
No changes in participating hosts
== Build changes ==
* Linux: CI_DRM_4329 -> Patchwork_9341
CI_DRM_4329: 02d8db1a894b0e646b2debd64ce24b8e99fd2ffd @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4521: 4aa49a88acdaafed8235837d85a099ad941fc281 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9341: f6c065b4f0b6418efca8377a6afce2d61a6eff4d @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9341/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2018-06-16 15:43 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-06-16 0:05 [CI 1/3] drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC Paulo Zanoni
2018-06-16 0:05 ` [CI 2/3] drm/i915/icl: Support for TC North Display interrupts Paulo Zanoni
2018-06-16 1:51 ` kbuild test robot
2018-06-16 0:05 ` [CI 3/3] drm/i915/icl: Handle hotplug interrupts for DP over TBT Paulo Zanoni
2018-06-16 1:04 ` ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC Patchwork
2018-06-16 15:43 ` ✓ Fi.CI.IGT: " Patchwork
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