* [PATCH v2 1/2] drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc specific init
@ 2018-06-18 10:39 Michal Wajdeczko
2018-06-18 10:39 ` [PATCH v2 2/2] HAX enable GuC for CI Michal Wajdeczko
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Michal Wajdeczko @ 2018-06-18 10:39 UTC (permalink / raw)
To: intel-gfx
We're fetching GuC/HuC firmwares directly from uc level during
init_early stage but this breaks guc/huc struct isolation and
also strict SW-only initialization rule. Move fw fetching to
init phase and do it separately per guc/huc struct.
v2: don't forget to move wopcm_init - Michele
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
---
drivers/gpu/drm/i915/i915_gem.c | 8 ++++----
drivers/gpu/drm/i915/intel_guc.c | 7 ++++++-
drivers/gpu/drm/i915/intel_huc.c | 8 ++++++++
drivers/gpu/drm/i915/intel_huc.h | 6 ++++++
drivers/gpu/drm/i915/intel_uc.c | 37 ++++++++++++++++++++-----------------
5 files changed, 44 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 822abf4..6a0fa53 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -5456,10 +5456,6 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
if (ret)
return ret;
- ret = intel_wopcm_init(&dev_priv->wopcm);
- if (ret)
- return ret;
-
ret = intel_uc_init_misc(dev_priv);
if (ret)
return ret;
@@ -5497,6 +5493,10 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
if (ret)
goto err_pm;
+ ret = intel_wopcm_init(&dev_priv->wopcm);
+ if (ret)
+ goto err_uc_init;
+
ret = i915_gem_init_hw(dev_priv);
if (ret)
goto err_uc_init;
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index 1aff30b..a63a86f 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -167,9 +167,11 @@ int intel_guc_init(struct intel_guc *guc)
struct drm_i915_private *dev_priv = guc_to_i915(guc);
int ret;
+ intel_uc_fw_fetch(dev_priv, &guc->fw);
+
ret = guc_shared_data_create(guc);
if (ret)
- return ret;
+ goto err_fetch;
GEM_BUG_ON(!guc->shared_data);
ret = intel_guc_log_create(&guc->log);
@@ -190,6 +192,8 @@ int intel_guc_init(struct intel_guc *guc)
intel_guc_log_destroy(&guc->log);
err_shared:
guc_shared_data_destroy(guc);
+err_fetch:
+ intel_uc_fw_fini(&guc->fw);
return ret;
}
@@ -201,6 +205,7 @@ void intel_guc_fini(struct intel_guc *guc)
intel_guc_ads_destroy(guc);
intel_guc_log_destroy(&guc->log);
guc_shared_data_destroy(guc);
+ intel_uc_fw_fini(&guc->fw);
}
static u32 guc_ctl_debug_flags(struct intel_guc *guc)
diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c
index 2912852..8a884d7 100644
--- a/drivers/gpu/drm/i915/intel_huc.c
+++ b/drivers/gpu/drm/i915/intel_huc.c
@@ -32,6 +32,14 @@ void intel_huc_init_early(struct intel_huc *huc)
intel_huc_fw_init_early(huc);
}
+int intel_huc_init(struct intel_huc *huc)
+{
+ struct drm_i915_private *i915 = huc_to_i915(huc);
+
+ intel_uc_fw_fetch(i915, &huc->fw);
+ return 0;
+}
+
/**
* intel_huc_auth() - Authenticate HuC uCode
* @huc: intel_huc structure
diff --git a/drivers/gpu/drm/i915/intel_huc.h b/drivers/gpu/drm/i915/intel_huc.h
index aa85490..21e600c 100644
--- a/drivers/gpu/drm/i915/intel_huc.h
+++ b/drivers/gpu/drm/i915/intel_huc.h
@@ -36,9 +36,15 @@ struct intel_huc {
};
void intel_huc_init_early(struct intel_huc *huc);
+int intel_huc_init(struct intel_huc *huc);
int intel_huc_auth(struct intel_huc *huc);
int intel_huc_check_status(struct intel_huc *huc);
+static inline void intel_huc_fini(struct intel_huc *huc)
+{
+ intel_uc_fw_fini(&huc->fw);
+}
+
static inline int intel_huc_sanitize(struct intel_huc *huc)
{
intel_uc_fw_sanitize(&huc->fw);
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 94e8863..ec3c37c 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -171,24 +171,11 @@ void intel_uc_init_early(struct drm_i915_private *i915)
intel_huc_init_early(huc);
sanitize_options_early(i915);
-
- if (USES_GUC(i915))
- intel_uc_fw_fetch(i915, &guc->fw);
-
- if (USES_HUC(i915))
- intel_uc_fw_fetch(i915, &huc->fw);
}
void intel_uc_cleanup_early(struct drm_i915_private *i915)
{
struct intel_guc *guc = &i915->guc;
- struct intel_huc *huc = &i915->huc;
-
- if (USES_HUC(i915))
- intel_uc_fw_fini(&huc->fw);
-
- if (USES_GUC(i915))
- intel_uc_fw_fini(&guc->fw);
guc_free_load_err_log(guc);
}
@@ -279,6 +266,7 @@ void intel_uc_fini_misc(struct drm_i915_private *i915)
int intel_uc_init(struct drm_i915_private *i915)
{
struct intel_guc *guc = &i915->guc;
+ struct intel_huc *huc = &i915->huc;
int ret;
if (!USES_GUC(i915))
@@ -291,24 +279,36 @@ int intel_uc_init(struct drm_i915_private *i915)
if (ret)
return ret;
+ if (USES_HUC(i915)) {
+ ret = intel_huc_init(huc);
+ if (ret)
+ goto err_guc;
+ }
+
if (USES_GUC_SUBMISSION(i915)) {
/*
* This is stuff we need to have available at fw load time
* if we are planning to enable submission later
*/
ret = intel_guc_submission_init(guc);
- if (ret) {
- intel_guc_fini(guc);
- return ret;
- }
+ if (ret)
+ goto err_huc;
}
return 0;
+
+err_huc:
+ if (USES_HUC(i915))
+ intel_huc_fini(huc);
+err_guc:
+ intel_guc_fini(guc);
+ return ret;
}
void intel_uc_fini(struct drm_i915_private *i915)
{
struct intel_guc *guc = &i915->guc;
+ struct intel_huc *huc = &i915->huc;
if (!USES_GUC(i915))
return;
@@ -318,6 +318,9 @@ void intel_uc_fini(struct drm_i915_private *i915)
if (USES_GUC_SUBMISSION(i915))
intel_guc_submission_fini(guc);
+ if (USES_HUC(i915))
+ intel_huc_fini(huc);
+
intel_guc_fini(guc);
}
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v2 2/2] HAX enable GuC for CI
2018-06-18 10:39 [PATCH v2 1/2] drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc specific init Michal Wajdeczko
@ 2018-06-18 10:39 ` Michal Wajdeczko
2018-06-18 11:39 ` ✗ Fi.CI.BAT: failure for series starting with [v2,1/2] drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc specific init Patchwork
2018-06-18 16:02 ` [PATCH v2 1/2] " Michel Thierry
2 siblings, 0 replies; 4+ messages in thread
From: Michal Wajdeczko @ 2018-06-18 10:39 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index aebe046..3e4e128 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -47,7 +47,7 @@
param(int, disable_power_well, -1) \
param(int, enable_ips, 1) \
param(int, invert_brightness, 0) \
- param(int, enable_guc, 0) \
+ param(int, enable_guc, -1) \
param(int, guc_log_level, -1) \
param(char *, guc_firmware_path, NULL) \
param(char *, huc_firmware_path, NULL) \
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
* ✗ Fi.CI.BAT: failure for series starting with [v2,1/2] drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc specific init
2018-06-18 10:39 [PATCH v2 1/2] drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc specific init Michal Wajdeczko
2018-06-18 10:39 ` [PATCH v2 2/2] HAX enable GuC for CI Michal Wajdeczko
@ 2018-06-18 11:39 ` Patchwork
2018-06-18 16:02 ` [PATCH v2 1/2] " Michel Thierry
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2018-06-18 11:39 UTC (permalink / raw)
To: Michal Wajdeczko; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc specific init
URL : https://patchwork.freedesktop.org/series/44930/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4333 -> Patchwork_9349 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_9349 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9349, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/44930/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9349:
=== IGT changes ===
==== Possible regressions ====
igt@debugfs_test@read_all_entries:
fi-cfl-s3: PASS -> DMESG-WARN
fi-skl-6260u: PASS -> DMESG-WARN
fi-skl-gvtdvm: PASS -> DMESG-WARN
fi-skl-6700hq: PASS -> DMESG-WARN
fi-bxt-j4205: PASS -> DMESG-WARN
fi-kbl-7500u: PASS -> DMESG-WARN
fi-skl-guc: PASS -> DMESG-WARN
fi-kbl-7567u: PASS -> DMESG-WARN
fi-skl-6600u: PASS -> DMESG-WARN
fi-cfl-8700k: PASS -> DMESG-WARN
{fi-whl-u}: PASS -> DMESG-WARN
fi-skl-6700k2: PASS -> DMESG-WARN
fi-cfl-guc: PASS -> DMESG-WARN
fi-skl-6770hq: PASS -> DMESG-WARN
igt@gem_exec_basic@gtt-blt:
fi-kbl-guc: PASS -> DMESG-WARN
==== Warnings ====
igt@kms_pipe_crc_basic@hang-read-crc-pipe-b:
fi-glk-j4005: SKIP -> PASS
== Known issues ==
Here are the changes found in Patchwork_9349 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@gem_ctx_create@basic-files:
fi-skl-gvtdvm: PASS -> INCOMPLETE (fdo#105600)
igt@gem_exec_gttfill@basic:
fi-byt-n2820: PASS -> FAIL (fdo#106744)
igt@kms_busy@basic-flip-b:
fi-glk-j4005: PASS -> DMESG-WARN (fdo#106000)
igt@kms_flip@basic-flip-vs-wf_vblank:
fi-glk-j4005: PASS -> FAIL (fdo#100368)
==== Possible fixes ====
igt@gem_ctx_create@basic-files:
fi-kbl-guc: DMESG-WARN -> PASS
igt@kms_flip@basic-flip-vs-dpms:
fi-glk-j4005: DMESG-WARN (fdo#106000) -> PASS
fi-skl-6700hq: DMESG-WARN (fdo#105998) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#105600 https://bugs.freedesktop.org/show_bug.cgi?id=105600
fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998
fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000
fdo#106744 https://bugs.freedesktop.org/show_bug.cgi?id=106744
== Participating hosts (40 -> 34) ==
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-kbl-7560u
== Build changes ==
* Linux: CI_DRM_4333 -> Patchwork_9349
CI_DRM_4333: 5fad115a81a20aa6b4ffd3f7f6663d43c88fa395 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4523: 778497e7965dc8662c770a89ebbd741778feb71e @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9349: 4d9c48c49dcaabd7c580a546be53a1f854b20ce4 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
4d9c48c49dca HAX enable GuC for CI
496058e05dd5 drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc specific init
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9349/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2 1/2] drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc specific init
2018-06-18 10:39 [PATCH v2 1/2] drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc specific init Michal Wajdeczko
2018-06-18 10:39 ` [PATCH v2 2/2] HAX enable GuC for CI Michal Wajdeczko
2018-06-18 11:39 ` ✗ Fi.CI.BAT: failure for series starting with [v2,1/2] drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc specific init Patchwork
@ 2018-06-18 16:02 ` Michel Thierry
2 siblings, 0 replies; 4+ messages in thread
From: Michel Thierry @ 2018-06-18 16:02 UTC (permalink / raw)
To: Michal Wajdeczko, intel-gfx
On 06/18/2018 03:39 AM, Michal Wajdeczko wrote:
> We're fetching GuC/HuC firmwares directly from uc level during
> init_early stage but this breaks guc/huc struct isolation and
> also strict SW-only initialization rule. Move fw fetching to
> init phase and do it separately per guc/huc struct.
>
> v2: don't forget to move wopcm_init - Michele
I'm not Italian ;)
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Michel Thierry <michel.thierry@intel.com>
> ---
> drivers/gpu/drm/i915/i915_gem.c | 8 ++++----
> drivers/gpu/drm/i915/intel_guc.c | 7 ++++++-
> drivers/gpu/drm/i915/intel_huc.c | 8 ++++++++
> drivers/gpu/drm/i915/intel_huc.h | 6 ++++++
> drivers/gpu/drm/i915/intel_uc.c | 37 ++++++++++++++++++++-----------------
> 5 files changed, 44 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 822abf4..6a0fa53 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -5456,10 +5456,6 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
> if (ret)
> return ret;
>
> - ret = intel_wopcm_init(&dev_priv->wopcm);
> - if (ret)
> - return ret;
> -
> ret = intel_uc_init_misc(dev_priv);
> if (ret)
> return ret;
> @@ -5497,6 +5493,10 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
Not visible, but the previous line before this chunk is
ret = intel_uc_init(dev_priv);
> if (ret)
> goto err_pm;
>
> + ret = intel_wopcm_init(&dev_priv->wopcm);
> + if (ret)
> + goto err_uc_init;
> +
> ret = i915_gem_init_hw(dev_priv);
> if (ret)
> goto err_uc_init;
So,
Reviewed-by: Michel Thierry <michel.thierry@intel.com>
> diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
> index 1aff30b..a63a86f 100644
> --- a/drivers/gpu/drm/i915/intel_guc.c
> +++ b/drivers/gpu/drm/i915/intel_guc.c
> @@ -167,9 +167,11 @@ int intel_guc_init(struct intel_guc *guc)
> struct drm_i915_private *dev_priv = guc_to_i915(guc);
> int ret;
>
> + intel_uc_fw_fetch(dev_priv, &guc->fw);
> +
> ret = guc_shared_data_create(guc);
> if (ret)
> - return ret;
> + goto err_fetch;
> GEM_BUG_ON(!guc->shared_data);
>
> ret = intel_guc_log_create(&guc->log);
> @@ -190,6 +192,8 @@ int intel_guc_init(struct intel_guc *guc)
> intel_guc_log_destroy(&guc->log);
> err_shared:
> guc_shared_data_destroy(guc);
> +err_fetch:
> + intel_uc_fw_fini(&guc->fw);
> return ret;
> }
>
> @@ -201,6 +205,7 @@ void intel_guc_fini(struct intel_guc *guc)
> intel_guc_ads_destroy(guc);
> intel_guc_log_destroy(&guc->log);
> guc_shared_data_destroy(guc);
> + intel_uc_fw_fini(&guc->fw);
> }
>
> static u32 guc_ctl_debug_flags(struct intel_guc *guc)
> diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c
> index 2912852..8a884d7 100644
> --- a/drivers/gpu/drm/i915/intel_huc.c
> +++ b/drivers/gpu/drm/i915/intel_huc.c
> @@ -32,6 +32,14 @@ void intel_huc_init_early(struct intel_huc *huc)
> intel_huc_fw_init_early(huc);
> }
>
> +int intel_huc_init(struct intel_huc *huc)
> +{
> + struct drm_i915_private *i915 = huc_to_i915(huc);
> +
> + intel_uc_fw_fetch(i915, &huc->fw);
> + return 0;
> +}
> +
> /**
> * intel_huc_auth() - Authenticate HuC uCode
> * @huc: intel_huc structure
> diff --git a/drivers/gpu/drm/i915/intel_huc.h b/drivers/gpu/drm/i915/intel_huc.h
> index aa85490..21e600c 100644
> --- a/drivers/gpu/drm/i915/intel_huc.h
> +++ b/drivers/gpu/drm/i915/intel_huc.h
> @@ -36,9 +36,15 @@ struct intel_huc {
> };
>
> void intel_huc_init_early(struct intel_huc *huc);
> +int intel_huc_init(struct intel_huc *huc);
> int intel_huc_auth(struct intel_huc *huc);
> int intel_huc_check_status(struct intel_huc *huc);
>
> +static inline void intel_huc_fini(struct intel_huc *huc)
> +{
> + intel_uc_fw_fini(&huc->fw);
> +}
> +
> static inline int intel_huc_sanitize(struct intel_huc *huc)
> {
> intel_uc_fw_sanitize(&huc->fw);
> diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
> index 94e8863..ec3c37c 100644
> --- a/drivers/gpu/drm/i915/intel_uc.c
> +++ b/drivers/gpu/drm/i915/intel_uc.c
> @@ -171,24 +171,11 @@ void intel_uc_init_early(struct drm_i915_private *i915)
> intel_huc_init_early(huc);
>
> sanitize_options_early(i915);
> -
> - if (USES_GUC(i915))
> - intel_uc_fw_fetch(i915, &guc->fw);
> -
> - if (USES_HUC(i915))
> - intel_uc_fw_fetch(i915, &huc->fw);
> }
>
> void intel_uc_cleanup_early(struct drm_i915_private *i915)
> {
> struct intel_guc *guc = &i915->guc;
> - struct intel_huc *huc = &i915->huc;
> -
> - if (USES_HUC(i915))
> - intel_uc_fw_fini(&huc->fw);
> -
> - if (USES_GUC(i915))
> - intel_uc_fw_fini(&guc->fw);
>
> guc_free_load_err_log(guc);
> }
> @@ -279,6 +266,7 @@ void intel_uc_fini_misc(struct drm_i915_private *i915)
> int intel_uc_init(struct drm_i915_private *i915)
> {
> struct intel_guc *guc = &i915->guc;
> + struct intel_huc *huc = &i915->huc;
> int ret;
>
> if (!USES_GUC(i915))
> @@ -291,24 +279,36 @@ int intel_uc_init(struct drm_i915_private *i915)
> if (ret)
> return ret;
>
> + if (USES_HUC(i915)) {
> + ret = intel_huc_init(huc);
> + if (ret)
> + goto err_guc;
> + }
> +
> if (USES_GUC_SUBMISSION(i915)) {
> /*
> * This is stuff we need to have available at fw load time
> * if we are planning to enable submission later
> */
> ret = intel_guc_submission_init(guc);
> - if (ret) {
> - intel_guc_fini(guc);
> - return ret;
> - }
> + if (ret)
> + goto err_huc;
> }
>
> return 0;
> +
> +err_huc:
> + if (USES_HUC(i915))
> + intel_huc_fini(huc);
> +err_guc:
> + intel_guc_fini(guc);
> + return ret;
> }
>
> void intel_uc_fini(struct drm_i915_private *i915)
> {
> struct intel_guc *guc = &i915->guc;
> + struct intel_huc *huc = &i915->huc;
>
> if (!USES_GUC(i915))
> return;
> @@ -318,6 +318,9 @@ void intel_uc_fini(struct drm_i915_private *i915)
> if (USES_GUC_SUBMISSION(i915))
> intel_guc_submission_fini(guc);
>
> + if (USES_HUC(i915))
> + intel_huc_fini(huc);
> +
> intel_guc_fini(guc);
> }
>
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2018-06-18 16:01 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-06-18 10:39 [PATCH v2 1/2] drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc specific init Michal Wajdeczko
2018-06-18 10:39 ` [PATCH v2 2/2] HAX enable GuC for CI Michal Wajdeczko
2018-06-18 11:39 ` ✗ Fi.CI.BAT: failure for series starting with [v2,1/2] drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc specific init Patchwork
2018-06-18 16:02 ` [PATCH v2 1/2] " Michel Thierry
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.