[Qemu-devel] [PATCH] target/arm: Minor cleanup for ARMv6-M 32-bit instructions

[Qemu-devel] [PATCH] target/arm: Minor cleanup for ARMv6-M 32-bit instructions

[Julia Suvorova]

The arrays were made static, "if" was simplified because V7M and V8M
define V6 feature.

Signed-off-by: Julia Suvorova <jusual@mail.ru>
---
 target/arm/translate.c | 27 +++++++++++++--------------
 1 file changed, 13 insertions(+), 14 deletions(-)

diff --git a/target/arm/translate.c b/target/arm/translate.c
index df26035863..e779942e9b 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -10107,18 +10107,18 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn)
         !arm_dc_feature(s, ARM_FEATURE_V7)) {
         int i;
         bool found = false;
-        const uint32_t armv6m_insn[] = {0xf3808000 /* msr */,
-                                        0xf3b08040 /* dsb */,
-                                        0xf3b08050 /* dmb */,
-                                        0xf3b08060 /* isb */,
-                                        0xf3e08000 /* mrs */,
-                                        0xf000d000 /* bl */};
-        const uint32_t armv6m_mask[] = {0xffe0d000,
-                                        0xfff0d0f0,
-                                        0xfff0d0f0,
-                                        0xfff0d0f0,
-                                        0xffe0d000,
-                                        0xf800d000};
+        static const uint32_t armv6m_insn[] = {0xf3808000 /* msr */,
+                                               0xf3b08040 /* dsb */,
+                                               0xf3b08050 /* dmb */,
+                                               0xf3b08060 /* isb */,
+                                               0xf3e08000 /* mrs */,
+                                               0xf000d000 /* bl */};
+        static const uint32_t armv6m_mask[] = {0xffe0d000,
+                                               0xfff0d0f0,
+                                               0xfff0d0f0,
+                                               0xfff0d0f0,
+                                               0xffe0d000,
+                                               0xf800d000};
 
         for (i = 0; i < ARRAY_SIZE(armv6m_insn); i++) {
             if ((insn & armv6m_mask[i]) == armv6m_insn[i]) {
@@ -11051,8 +11051,7 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn)
                         break;
                     case 3: /* Special control operations.  */
                         if (!arm_dc_feature(s, ARM_FEATURE_V7) &&
-                            !(arm_dc_feature(s, ARM_FEATURE_V6) &&
-                              arm_dc_feature(s, ARM_FEATURE_M))) {
+                            !arm_dc_feature(s, ARM_FEATURE_M)) {
                             goto illegal_op;
                         }
                         op = (insn >> 4) & 0xf;
-- 
2.17.0

Re: [Qemu-devel] [PATCH] target/arm: Minor cleanup for ARMv6-M 32-bit instructions

[Stefan Hajnoczi]

On Mon, Jun 18, 2018 at 10:46 PM, Julia Suvorova <jusual@mail.ru> wrote:
> The arrays were made static, "if" was simplified because V7M and V8M
> define V6 feature.
>
> Signed-off-by: Julia Suvorova <jusual@mail.ru>
> ---
>  target/arm/translate.c | 27 +++++++++++++--------------
>  1 file changed, 13 insertions(+), 14 deletions(-)

Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>

Re: [Qemu-devel] [PATCH] target/arm: Minor cleanup for ARMv6-M 32-bit instructions

[Peter Maydell]

On 18 June 2018 at 22:46, Julia Suvorova <jusual@mail.ru> wrote:
> The arrays were made static, "if" was simplified because V7M and V8M
> define V6 feature.
>
> Signed-off-by: Julia Suvorova <jusual@mail.ru>
> ---
>  target/arm/translate.c | 27 +++++++++++++--------------
>  1 file changed, 13 insertions(+), 14 deletions(-)



Applied to target-arm.next, thanks.

-- PMM