* [PATCH i-g-t 1/2] lib: Spin fast, retire early @ 2018-06-20 11:55 ` Chris Wilson 0 siblings, 0 replies; 8+ messages in thread From: Chris Wilson @ 2018-06-20 11:55 UTC (permalink / raw) To: intel-gfx; +Cc: igt-dev When using the pollable spinner, we often want to use it as a means of ensuring the task is running on the GPU before switching to something else. In which case we don't want to add extra delay inside the spinner, but the current 1000 NOPs add on order of 5us, which is often larger than the target latency. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Antonio Argenziano <antonio.argenziano@intel.com> --- lib/igt_dummyload.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c index 3809b4e61..d73b4abd5 100644 --- a/lib/igt_dummyload.c +++ b/lib/igt_dummyload.c @@ -77,6 +77,7 @@ fill_reloc(struct drm_i915_gem_relocation_entry *reloc, #define OUT_FENCE (1 << 0) #define POLL_RUN (1 << 1) +#define SPIN_FAST (1 << 2) static int emit_recursive_batch(igt_spin_t *spin, int fd, uint32_t ctx, unsigned engine, @@ -205,7 +206,8 @@ emit_recursive_batch(igt_spin_t *spin, int fd, uint32_t ctx, unsigned engine, * between function calls, that appears enough to keep SNB out of * trouble. See https://bugs.freedesktop.org/show_bug.cgi?id=102262 */ - batch += 1000; + if (!(flags & SPIN_FAST)) + batch += 1000; /* recurse */ r = &relocs[obj[BATCH].relocation_count++]; @@ -362,7 +364,7 @@ igt_spin_batch_new_fence(int fd, uint32_t ctx, unsigned engine) igt_spin_t * __igt_spin_batch_new_poll(int fd, uint32_t ctx, unsigned engine) { - return ___igt_spin_batch_new(fd, ctx, engine, 0, POLL_RUN); + return ___igt_spin_batch_new(fd, ctx, engine, 0, POLL_RUN | SPIN_FAST); } /** -- 2.18.0.rc2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [igt-dev] [PATCH i-g-t 1/2] lib: Spin fast, retire early @ 2018-06-20 11:55 ` Chris Wilson 0 siblings, 0 replies; 8+ messages in thread From: Chris Wilson @ 2018-06-20 11:55 UTC (permalink / raw) To: intel-gfx; +Cc: igt-dev When using the pollable spinner, we often want to use it as a means of ensuring the task is running on the GPU before switching to something else. In which case we don't want to add extra delay inside the spinner, but the current 1000 NOPs add on order of 5us, which is often larger than the target latency. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Antonio Argenziano <antonio.argenziano@intel.com> --- lib/igt_dummyload.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c index 3809b4e61..d73b4abd5 100644 --- a/lib/igt_dummyload.c +++ b/lib/igt_dummyload.c @@ -77,6 +77,7 @@ fill_reloc(struct drm_i915_gem_relocation_entry *reloc, #define OUT_FENCE (1 << 0) #define POLL_RUN (1 << 1) +#define SPIN_FAST (1 << 2) static int emit_recursive_batch(igt_spin_t *spin, int fd, uint32_t ctx, unsigned engine, @@ -205,7 +206,8 @@ emit_recursive_batch(igt_spin_t *spin, int fd, uint32_t ctx, unsigned engine, * between function calls, that appears enough to keep SNB out of * trouble. See https://bugs.freedesktop.org/show_bug.cgi?id=102262 */ - batch += 1000; + if (!(flags & SPIN_FAST)) + batch += 1000; /* recurse */ r = &relocs[obj[BATCH].relocation_count++]; @@ -362,7 +364,7 @@ igt_spin_batch_new_fence(int fd, uint32_t ctx, unsigned engine) igt_spin_t * __igt_spin_batch_new_poll(int fd, uint32_t ctx, unsigned engine) { - return ___igt_spin_batch_new(fd, ctx, engine, 0, POLL_RUN); + return ___igt_spin_batch_new(fd, ctx, engine, 0, POLL_RUN | SPIN_FAST); } /** -- 2.18.0.rc2 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH i-g-t 2/2] igt/gem_sync: Alternate stress for nop+sync 2018-06-20 11:55 ` [igt-dev] " Chris Wilson @ 2018-06-20 11:55 ` Chris Wilson -1 siblings, 0 replies; 8+ messages in thread From: Chris Wilson @ 2018-06-20 11:55 UTC (permalink / raw) To: intel-gfx; +Cc: igt-dev Apply a different sort of stress by timing how long it takes to sync a second nop batch in the pipeline. We first start a spinner on the engine, then when we know the GPU is active, we submit the second nop; start timing as we then release the spinner and wait for the nop to complete. As with every other gem_sync test, it serves two roles. The first is that it checks that we do not miss a wakeup under common stressful conditions (the more conditions we check, the happier we will be that they do not occur in practice). And the second role it fulfils, is that it provides a very crude estimate for how long it takes for a nop to execute from a running start (we already have a complimentary estimate for an idle start). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> --- tests/gem_sync.c | 90 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/tests/gem_sync.c b/tests/gem_sync.c index 1e2e089a1..4cd97c58b 100644 --- a/tests/gem_sync.c +++ b/tests/gem_sync.c @@ -177,6 +177,92 @@ idle_ring(int fd, unsigned ring, int timeout) gem_close(fd, object.handle); } +static void +wakeup_ring(int fd, unsigned ring, int timeout) +{ + unsigned engines[16]; + const char *names[16]; + int num_engines = 0; + + if (ring == ALL_ENGINES) { + for_each_physical_engine(fd, ring) { + if (!gem_can_store_dword(fd, ring)) + continue; + + names[num_engines] = e__->name; + engines[num_engines++] = ring; + if (num_engines == ARRAY_SIZE(engines)) + break; + } + igt_require(num_engines); + } else { + gem_require_ring(fd, ring); + igt_require(gem_can_store_dword(fd, ring)); + names[num_engines] = NULL; + engines[num_engines++] = ring; + } + + intel_detect_and_clear_missed_interrupts(fd); + igt_fork(child, num_engines) { + const uint32_t bbe = MI_BATCH_BUFFER_END; + struct drm_i915_gem_exec_object2 object; + struct drm_i915_gem_execbuffer2 execbuf; + double end, this, elapsed, now; + unsigned long cycles; + uint32_t cmd; + igt_spin_t *spin; + + memset(&object, 0, sizeof(object)); + object.handle = gem_create(fd, 4096); + gem_write(fd, object.handle, 0, &bbe, sizeof(bbe)); + + memset(&execbuf, 0, sizeof(execbuf)); + execbuf.buffers_ptr = to_user_pointer(&object); + execbuf.buffer_count = 1; + execbuf.flags = engines[child % num_engines]; + + spin = __igt_spin_batch_new_poll(fd, 0, execbuf.flags); + igt_assert(spin->running); + cmd = *spin->batch; + + gem_execbuf(fd, &execbuf); + + igt_spin_batch_end(spin); + gem_sync(fd, object.handle); + + end = gettime() + timeout; + elapsed = 0; + cycles = 0; + do { + *spin->batch = cmd; + *spin->running = 0; + gem_execbuf(fd, &spin->execbuf); + while (!READ_ONCE(*spin->running)) + ; + + gem_execbuf(fd, &execbuf); + + this = gettime(); + igt_spin_batch_end(spin); + gem_sync(fd, object.handle); + now = gettime(); + + elapsed += now - this; + cycles++; + } while (now < end); + + igt_info("%s%sompleted %ld cycles: %.3f us\n", + names[child % num_engines] ?: "", + names[child % num_engines] ? " c" : "C", + cycles, elapsed*1e6/cycles); + + igt_spin_batch_free(fd, spin); + gem_close(fd, object.handle); + } + igt_waitchildren_timeout(timeout+10, NULL); + igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); +} + static void store_ring(int fd, unsigned ring, int num_children, int timeout) { @@ -762,6 +848,8 @@ igt_main sync_ring(fd, e->exec_id | e->flags, 1, 150); igt_subtest_f("idle-%s", e->name) idle_ring(fd, e->exec_id | e->flags, 150); + igt_subtest_f("wakeup-%s", e->name) + wakeup_ring(fd, e->exec_id | e->flags, 150); igt_subtest_f("store-%s", e->name) store_ring(fd, e->exec_id | e->flags, 1, 150); igt_subtest_f("many-%s", e->name) @@ -782,6 +870,8 @@ igt_main sync_ring(fd, ALL_ENGINES, ncpus, 150); igt_subtest("forked-store-each") store_ring(fd, ALL_ENGINES, ncpus, 150); + igt_subtest("wakeup-each") + wakeup_ring(fd, ALL_ENGINES, 150); igt_subtest("basic-all") sync_all(fd, 1, 5); -- 2.18.0.rc2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [igt-dev] [PATCH i-g-t 2/2] igt/gem_sync: Alternate stress for nop+sync @ 2018-06-20 11:55 ` Chris Wilson 0 siblings, 0 replies; 8+ messages in thread From: Chris Wilson @ 2018-06-20 11:55 UTC (permalink / raw) To: intel-gfx; +Cc: igt-dev Apply a different sort of stress by timing how long it takes to sync a second nop batch in the pipeline. We first start a spinner on the engine, then when we know the GPU is active, we submit the second nop; start timing as we then release the spinner and wait for the nop to complete. As with every other gem_sync test, it serves two roles. The first is that it checks that we do not miss a wakeup under common stressful conditions (the more conditions we check, the happier we will be that they do not occur in practice). And the second role it fulfils, is that it provides a very crude estimate for how long it takes for a nop to execute from a running start (we already have a complimentary estimate for an idle start). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> --- tests/gem_sync.c | 90 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/tests/gem_sync.c b/tests/gem_sync.c index 1e2e089a1..4cd97c58b 100644 --- a/tests/gem_sync.c +++ b/tests/gem_sync.c @@ -177,6 +177,92 @@ idle_ring(int fd, unsigned ring, int timeout) gem_close(fd, object.handle); } +static void +wakeup_ring(int fd, unsigned ring, int timeout) +{ + unsigned engines[16]; + const char *names[16]; + int num_engines = 0; + + if (ring == ALL_ENGINES) { + for_each_physical_engine(fd, ring) { + if (!gem_can_store_dword(fd, ring)) + continue; + + names[num_engines] = e__->name; + engines[num_engines++] = ring; + if (num_engines == ARRAY_SIZE(engines)) + break; + } + igt_require(num_engines); + } else { + gem_require_ring(fd, ring); + igt_require(gem_can_store_dword(fd, ring)); + names[num_engines] = NULL; + engines[num_engines++] = ring; + } + + intel_detect_and_clear_missed_interrupts(fd); + igt_fork(child, num_engines) { + const uint32_t bbe = MI_BATCH_BUFFER_END; + struct drm_i915_gem_exec_object2 object; + struct drm_i915_gem_execbuffer2 execbuf; + double end, this, elapsed, now; + unsigned long cycles; + uint32_t cmd; + igt_spin_t *spin; + + memset(&object, 0, sizeof(object)); + object.handle = gem_create(fd, 4096); + gem_write(fd, object.handle, 0, &bbe, sizeof(bbe)); + + memset(&execbuf, 0, sizeof(execbuf)); + execbuf.buffers_ptr = to_user_pointer(&object); + execbuf.buffer_count = 1; + execbuf.flags = engines[child % num_engines]; + + spin = __igt_spin_batch_new_poll(fd, 0, execbuf.flags); + igt_assert(spin->running); + cmd = *spin->batch; + + gem_execbuf(fd, &execbuf); + + igt_spin_batch_end(spin); + gem_sync(fd, object.handle); + + end = gettime() + timeout; + elapsed = 0; + cycles = 0; + do { + *spin->batch = cmd; + *spin->running = 0; + gem_execbuf(fd, &spin->execbuf); + while (!READ_ONCE(*spin->running)) + ; + + gem_execbuf(fd, &execbuf); + + this = gettime(); + igt_spin_batch_end(spin); + gem_sync(fd, object.handle); + now = gettime(); + + elapsed += now - this; + cycles++; + } while (now < end); + + igt_info("%s%sompleted %ld cycles: %.3f us\n", + names[child % num_engines] ?: "", + names[child % num_engines] ? " c" : "C", + cycles, elapsed*1e6/cycles); + + igt_spin_batch_free(fd, spin); + gem_close(fd, object.handle); + } + igt_waitchildren_timeout(timeout+10, NULL); + igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0); +} + static void store_ring(int fd, unsigned ring, int num_children, int timeout) { @@ -762,6 +848,8 @@ igt_main sync_ring(fd, e->exec_id | e->flags, 1, 150); igt_subtest_f("idle-%s", e->name) idle_ring(fd, e->exec_id | e->flags, 150); + igt_subtest_f("wakeup-%s", e->name) + wakeup_ring(fd, e->exec_id | e->flags, 150); igt_subtest_f("store-%s", e->name) store_ring(fd, e->exec_id | e->flags, 1, 150); igt_subtest_f("many-%s", e->name) @@ -782,6 +870,8 @@ igt_main sync_ring(fd, ALL_ENGINES, ncpus, 150); igt_subtest("forked-store-each") store_ring(fd, ALL_ENGINES, ncpus, 150); + igt_subtest("wakeup-each") + wakeup_ring(fd, ALL_ENGINES, 150); igt_subtest("basic-all") sync_all(fd, 1, 5); -- 2.18.0.rc2 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH i-g-t 2/2] igt/gem_sync: Alternate stress for nop+sync 2018-06-20 11:55 ` [igt-dev] " Chris Wilson @ 2018-06-20 11:56 ` Chris Wilson -1 siblings, 0 replies; 8+ messages in thread From: Chris Wilson @ 2018-06-20 11:56 UTC (permalink / raw) To: intel-gfx; +Cc: igt-dev More pebkac. The kettle wasn't working, that's my excuse. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] igt/gem_sync: Alternate stress for nop+sync @ 2018-06-20 11:56 ` Chris Wilson 0 siblings, 0 replies; 8+ messages in thread From: Chris Wilson @ 2018-06-20 11:56 UTC (permalink / raw) To: intel-gfx; +Cc: igt-dev More pebkac. The kettle wasn't working, that's my excuse. -Chris _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 8+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/2] lib: Spin fast, retire early 2018-06-20 11:55 ` [igt-dev] " Chris Wilson (?) (?) @ 2018-06-20 12:53 ` Patchwork -1 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2018-06-20 12:53 UTC (permalink / raw) To: Chris Wilson; +Cc: igt-dev == Series Details == Series: series starting with [i-g-t,1/2] lib: Spin fast, retire early URL : https://patchwork.freedesktop.org/series/45072/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4344 -> IGTPW_1489 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/45072/revisions/1/mbox/ == Known issues == Here are the changes found in IGTPW_1489 that come from known issues: === IGT changes === ==== Issues hit ==== igt@gem_exec_gttfill@basic: fi-byt-n2820: PASS -> FAIL (fdo#106744) igt@kms_flip@basic-flip-vs-wf_vblank: fi-glk-j4005: PASS -> FAIL (fdo#100368) igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b-frame-sequence: fi-glk-j4005: PASS -> DMESG-WARN (fdo#106097, fdo#106000) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-snb-2520m: PASS -> INCOMPLETE (fdo#103713) fi-glk-j4005: PASS -> DMESG-WARN (fdo#106097) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: fi-bxt-dsi: NOTRUN -> INCOMPLETE (fdo#103927) ==== Possible fixes ==== igt@kms_flip@basic-flip-vs-modeset: fi-glk-j4005: DMESG-WARN (fdo#106097) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-bxt-dsi: INCOMPLETE (fdo#103927) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: fi-glk-j4005: DMESG-WARN (fdo#106238) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000 fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097 fdo#106238 https://bugs.freedesktop.org/show_bug.cgi?id=106238 fdo#106744 https://bugs.freedesktop.org/show_bug.cgi?id=106744 == Participating hosts (43 -> 37) == Missing (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-cnl-psr == Build changes == * IGT: IGT_4524 -> IGTPW_1489 CI_DRM_4344: 922a029a1d0ecf5c7e5c86a372a5d3df3fd35483 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_1489: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1489/ IGT_4524: 9ab9268fa7eeda0a7ea6eb2ab02bb6c5b9c91ba0 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools == Testlist changes == +igt@gem_sync@wakeup-blt +igt@gem_sync@wakeup-bsd +igt@gem_sync@wakeup-bsd1 +igt@gem_sync@wakeup-bsd2 +igt@gem_sync@wakeup-default +igt@gem_sync@wakeup-each +igt@gem_sync@wakeup-render +igt@gem_sync@wakeup-vebox == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1489/issues.html _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 8+ messages in thread
* [igt-dev] ✗ Fi.CI.IGT: failure for series starting with [i-g-t,1/2] lib: Spin fast, retire early 2018-06-20 11:55 ` [igt-dev] " Chris Wilson ` (2 preceding siblings ...) (?) @ 2018-06-20 15:00 ` Patchwork -1 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2018-06-20 15:00 UTC (permalink / raw) To: Chris Wilson; +Cc: igt-dev == Series Details == Series: series starting with [i-g-t,1/2] lib: Spin fast, retire early URL : https://patchwork.freedesktop.org/series/45072/ State : failure == Summary == = CI Bug Log - changes from IGT_4524_full -> IGTPW_1489_full = == Summary - FAILURE == Serious unknown changes coming with IGTPW_1489_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in IGTPW_1489_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/45072/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in IGTPW_1489_full: === IGT changes === ==== Possible regressions ==== igt@gem_exec_basic@readonly-render: shard-snb: PASS -> DMESG-FAIL igt@perf_pmu@multi-client-bcs0: shard-snb: PASS -> FAIL +5 == Known issues == Here are the changes found in IGTPW_1489_full that come from known issues: === IGT changes === ==== Issues hit ==== igt@drv_selftest@live_hangcheck: shard-kbl: NOTRUN -> DMESG-FAIL (fdo#106560, fdo#106947) igt@kms_plane_multiple@atomic-pipe-a-tiling-x: shard-snb: PASS -> FAIL (fdo#104724, fdo#103166) igt@kms_rotation_crc@sprite-rotation-180: shard-snb: PASS -> FAIL (fdo#104724, fdo#103925) igt@perf_pmu@busy-hang-bcs0: shard-snb: PASS -> FAIL (fdo#105286) +1 igt@testdisplay: shard-glk: PASS -> INCOMPLETE (k.org#198133, fdo#103359) ==== Possible fixes ==== igt@drv_selftest@live_evict: shard-kbl: INCOMPLETE (fdo#103665) -> PASS igt@drv_selftest@live_gtt: shard-kbl: FAIL (fdo#105347) -> PASS igt@gem_busy@extended-bsd1: shard-snb: INCOMPLETE (fdo#105411) -> SKIP igt@kms_available_modes_crc@available_mode_test_crc: shard-snb: FAIL (fdo#106641) -> PASS igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic: shard-glk: FAIL (fdo#106509, fdo#105454) -> PASS igt@kms_flip@2x-plain-flip-ts-check: shard-glk: FAIL (fdo#100368) -> PASS igt@kms_flip_tiling@flip-y-tiled: shard-glk: FAIL (fdo#103822, fdo#104724) -> PASS igt@kms_rotation_crc@sprite-rotation-270: shard-kbl: FAIL (fdo#104724, fdo#103925) -> PASS ==== Warnings ==== igt@drv_selftest@live_gtt: shard-glk: INCOMPLETE (k.org#198133, fdo#103359) -> FAIL (fdo#105347) fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822 fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925 fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724 fdo#105286 https://bugs.freedesktop.org/show_bug.cgi?id=105286 fdo#105347 https://bugs.freedesktop.org/show_bug.cgi?id=105347 fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411 fdo#105454 https://bugs.freedesktop.org/show_bug.cgi?id=105454 fdo#106509 https://bugs.freedesktop.org/show_bug.cgi?id=106509 fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560 fdo#106641 https://bugs.freedesktop.org/show_bug.cgi?id=106641 fdo#106947 https://bugs.freedesktop.org/show_bug.cgi?id=106947 k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * IGT: IGT_4524 -> IGTPW_1489 * Linux: CI_DRM_4342 -> CI_DRM_4344 CI_DRM_4342: dd55db88fc3f54a96c15467ce534e83a8788ab73 @ git://anongit.freedesktop.org/gfx-ci/linux CI_DRM_4344: 922a029a1d0ecf5c7e5c86a372a5d3df3fd35483 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_1489: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1489/ IGT_4524: 9ab9268fa7eeda0a7ea6eb2ab02bb6c5b9c91ba0 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1489/shards.html _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2018-06-20 15:00 UTC | newest] Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2018-06-20 11:55 [PATCH i-g-t 1/2] lib: Spin fast, retire early Chris Wilson 2018-06-20 11:55 ` [igt-dev] " Chris Wilson 2018-06-20 11:55 ` [PATCH i-g-t 2/2] igt/gem_sync: Alternate stress for nop+sync Chris Wilson 2018-06-20 11:55 ` [igt-dev] " Chris Wilson 2018-06-20 11:56 ` Chris Wilson 2018-06-20 11:56 ` [igt-dev] " Chris Wilson 2018-06-20 12:53 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/2] lib: Spin fast, retire early Patchwork 2018-06-20 15:00 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
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