* [U-Boot] [PATCH v4 1/6] sunxi: R40: add gigabit ethernet clocks
@ 2018-06-26 11:54 Lothar Felten
2018-06-26 11:54 ` [U-Boot] [PATCH v4 2/6] net: sun8i-emac: fix printing NULL character Lothar Felten
` (4 more replies)
0 siblings, 5 replies; 13+ messages in thread
From: Lothar Felten @ 2018-06-26 11:54 UTC (permalink / raw)
To: u-boot
Add clock control entries for the gigabit interface of the Allwinner
R40/V40 CPU
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
---
Changelog:
new in v2
v2->v3->4: none
arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
index 8afeaf872e..016b811de1 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
@@ -60,7 +60,11 @@ struct sunxi_ccm_reg {
u32 reserved11;
u32 sata_clk_cfg; /* 0xc8 SATA clock control (R40 only) */
u32 usb_clk_cfg; /* 0xcc USB clock control */
- u32 gmac_clk_cfg; /* 0xd0 GMAC clock control */
+#ifdef CONFIG_MACH_SUN8I_R40
+ u32 cir0_clk_cfg; /* 0xd0 CIR0 clock control (R40 only) */
+#else
+ u32 gmac_clk_cfg; /* 0xd0 GMAC clock control (not for R40) */
+#endif
u32 reserved12[7];
u32 mdfs_clk_cfg; /* 0xf0 MDFS clock control */
u32 dram_clk_cfg; /* 0xf4 DRAM configuration clock control */
@@ -103,7 +107,11 @@ struct sunxi_ccm_reg {
u32 mtc_clk_cfg; /* 0x158 MTC module clock */
u32 mbus0_clk_cfg; /* 0x15c MBUS0 module clock */
u32 mbus1_clk_cfg; /* 0x160 MBUS1 module clock */
+#ifdef CONFIG_MACH_SUN8I_R40
+ u32 gmac_clk_cfg; /* 0x164 GMAC clock control (R40 only) */
+#else
u32 reserved16;
+#endif
u32 mipi_dsi_clk_cfg; /* 0x168 MIPI DSI clock control */
u32 mipi_csi_clk_cfg; /* 0x16c MIPI CSI clock control */
u32 reserved17[4];
--
2.14.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH v4 2/6] net: sun8i-emac: fix printing NULL character
2018-06-26 11:54 [U-Boot] [PATCH v4 1/6] sunxi: R40: add gigabit ethernet clocks Lothar Felten
@ 2018-06-26 11:54 ` Lothar Felten
2018-06-26 11:57 ` Maxime Ripard
2018-06-26 23:47 ` Joe Hershberger
2018-06-26 11:54 ` [U-Boot] [PATCH v4 3/6] net: sun8i-emac: set mux and clock by driver data Lothar Felten
` (3 subsequent siblings)
4 siblings, 2 replies; 13+ messages in thread
From: Lothar Felten @ 2018-06-26 11:54 UTC (permalink / raw)
To: u-boot
If the variant is not set and therefore NULL, do not attempt to print
the variant.
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
---
Changelog:
new in v4
drivers/net/sun8i_emac.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 1f5c630e02..23c4d68f77 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -843,8 +843,7 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)
priv->variant = dev_get_driver_data(dev);
if (!priv->variant) {
- printf("%s: Missing variant '%s'\n", __func__,
- (char *)priv->variant);
+ printf("%s: Missing variant\n", __func__);
return -EINVAL;
}
--
2.14.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH v4 3/6] net: sun8i-emac: set mux and clock by driver data
2018-06-26 11:54 [U-Boot] [PATCH v4 1/6] sunxi: R40: add gigabit ethernet clocks Lothar Felten
2018-06-26 11:54 ` [U-Boot] [PATCH v4 2/6] net: sun8i-emac: fix printing NULL character Lothar Felten
@ 2018-06-26 11:54 ` Lothar Felten
2018-07-02 20:12 ` Joe Hershberger
2018-06-26 11:54 ` [U-Boot] [PATCH v4 4/6] net: sun8i-emac: support R40 GMAC Lothar Felten
` (2 subsequent siblings)
4 siblings, 1 reply; 13+ messages in thread
From: Lothar Felten @ 2018-06-26 11:54 UTC (permalink / raw)
To: u-boot
Use driver data->variant information to select device specific
pin mux and phy clock settings.
Suggested by Jagan Teki
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
---
Changelog:
new in v3
v3 -> v4 use driver data to distinguish between variants
drivers/net/sun8i_emac.c | 35 ++++++++++++++++++++---------------
1 file changed, 20 insertions(+), 15 deletions(-)
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 23c4d68f77..ee3b2aa7f4 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -65,11 +65,9 @@
#define AHB_GATE_OFFSET_EPHY 0
-#if defined(CONFIG_MACH_SUNXI_H3_H5)
-#define SUN8I_GPD8_GMAC 2
-#else
-#define SUN8I_GPD8_GMAC 4
-#endif
+/* IO mux settings */
+#define SUN8I_IOMUX_H3 2
+#define SUN8I_IOMUX 4
/* H3/A64 EMAC Register's offset */
#define EMAC_CTL0 0x00
@@ -453,6 +451,7 @@ static int _sun8i_emac_eth_init(struct emac_eth_dev *priv, u8 *enetaddr)
static int parse_phy_pins(struct udevice *dev)
{
+ struct emac_eth_dev *priv = dev_get_priv(dev);
int offset;
const char *pin_name;
int drive, pull = SUN4I_PINCTRL_NO_PULL, i;
@@ -494,7 +493,11 @@ static int parse_phy_pins(struct udevice *dev)
if (pin < 0)
continue;
- sunxi_gpio_set_cfgpin(pin, SUN8I_GPD8_GMAC);
+ if (priv->variant == H3_EMAC)
+ sunxi_gpio_set_cfgpin(pin, SUN8I_IOMUX_H3);
+ else
+ sunxi_gpio_set_cfgpin(pin, SUN8I_IOMUX);
+
if (drive != ~0)
sunxi_gpio_set_drv(pin, drive);
if (pull != ~0)
@@ -618,16 +621,18 @@ static void sun8i_emac_board_setup(struct emac_eth_dev *priv)
{
struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
-#ifdef CONFIG_MACH_SUNXI_H3_H5
- /* Only H3/H5 have clock controls for internal EPHY */
- if (priv->use_internal_phy) {
- /* Set clock gating for ephy */
- setbits_le32(&ccm->bus_gate4, BIT(AHB_GATE_OFFSET_EPHY));
-
- /* Deassert EPHY */
- setbits_le32(&ccm->ahb_reset2_cfg, BIT(AHB_RESET_OFFSET_EPHY));
+ if (priv->variant == H3_EMAC) {
+ /* Only H3/H5 have clock controls for internal EPHY */
+ if (priv->use_internal_phy) {
+ /* Set clock gating for ephy */
+ setbits_le32(&ccm->bus_gate4,
+ BIT(AHB_GATE_OFFSET_EPHY));
+
+ /* Deassert EPHY */
+ setbits_le32(&ccm->ahb_reset2_cfg,
+ BIT(AHB_RESET_OFFSET_EPHY));
+ }
}
-#endif
/* Set clock gating for emac */
setbits_le32(&ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_GMAC));
--
2.14.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH v4 4/6] net: sun8i-emac: support R40 GMAC
2018-06-26 11:54 [U-Boot] [PATCH v4 1/6] sunxi: R40: add gigabit ethernet clocks Lothar Felten
2018-06-26 11:54 ` [U-Boot] [PATCH v4 2/6] net: sun8i-emac: fix printing NULL character Lothar Felten
2018-06-26 11:54 ` [U-Boot] [PATCH v4 3/6] net: sun8i-emac: set mux and clock by driver data Lothar Felten
@ 2018-06-26 11:54 ` Lothar Felten
2018-07-02 20:14 ` Joe Hershberger
2018-06-26 11:54 ` [U-Boot] [PATCH v4 5/6] sunxi: R40: add gigabit ethernet devicetree node Lothar Felten
2018-06-26 11:54 ` [U-Boot] [PATCH v4 6/6] configs: Bananapi_M2_Ultra: enable gigabit ethernet Lothar Felten
4 siblings, 1 reply; 13+ messages in thread
From: Lothar Felten @ 2018-06-26 11:54 UTC (permalink / raw)
To: u-boot
Add support for the GMAC found in the Allwinner R40/V40 SoC.
The R40 GMAC interface is not controlled by the syscon register but
has a separate configuration register in the CCU.
The clock gate and reset bits are in a different register compared
to the other SoCs supported by this driver.
The driver uses the -gmac suffix for the R40 because the R40 also
has a different 100 MBit MAC (EMAC).
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
---
Changelog:
new in v3
v3 -> v4 use driver data to distinguish between variants
drivers/net/sun8i_emac.c | 79 ++++++++++++++++++++++++++++++++----------------
1 file changed, 53 insertions(+), 26 deletions(-)
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index ee3b2aa7f4..3ba3a1ff8b 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -67,6 +67,7 @@
/* IO mux settings */
#define SUN8I_IOMUX_H3 2
+#define SUN8I_IOMUX_R40 5
#define SUN8I_IOMUX 4
/* H3/A64 EMAC Register's offset */
@@ -97,6 +98,7 @@ enum emac_variant {
A83T_EMAC = 1,
H3_EMAC,
A64_EMAC,
+ R40_GMAC,
};
struct emac_dma_desc {
@@ -278,6 +280,9 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev *priv)
reg = readl(priv->sysctl_reg + 0x30);
+ if (priv->variant == R40_GMAC)
+ return 0;
+
if (priv->variant == H3_EMAC) {
ret = sun8i_emac_set_syscon_ephy(priv, ®);
if (ret)
@@ -495,6 +500,8 @@ static int parse_phy_pins(struct udevice *dev)
if (priv->variant == H3_EMAC)
sunxi_gpio_set_cfgpin(pin, SUN8I_IOMUX_H3);
+ else if (priv->variant == R40_GMAC)
+ sunxi_gpio_set_cfgpin(pin, SUN8I_IOMUX_R40);
else
sunxi_gpio_set_cfgpin(pin, SUN8I_IOMUX);
@@ -634,11 +641,26 @@ static void sun8i_emac_board_setup(struct emac_eth_dev *priv)
}
}
- /* Set clock gating for emac */
- setbits_le32(&ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_GMAC));
-
- /* De-assert EMAC */
- setbits_le32(&ccm->ahb_reset0_cfg, BIT(AHB_RESET_OFFSET_GMAC));
+ if (priv->variant == R40_GMAC) {
+ /* Set clock gating for emac */
+ setbits_le32(&ccm->ahb_reset1_cfg, BIT(AHB_RESET_OFFSET_GMAC));
+
+ /* De-assert EMAC */
+ setbits_le32(&ccm->ahb_gate1, BIT(AHB_GATE_OFFSET_GMAC));
+
+ /* Select RGMII for R40 */
+ setbits_le32(&ccm->gmac_clk_cfg,
+ CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII |
+ CCM_GMAC_CTRL_GPIT_RGMII);
+ setbits_le32(&ccm->gmac_clk_cfg,
+ CCM_GMAC_CTRL_TX_CLK_DELAY(CONFIG_GMAC_TX_DELAY));
+ } else {
+ /* Set clock gating for emac */
+ setbits_le32(&ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_GMAC));
+
+ /* De-assert EMAC */
+ setbits_le32(&ccm->ahb_reset0_cfg, BIT(AHB_RESET_OFFSET_GMAC));
+ }
}
#if defined(CONFIG_DM_GPIO)
@@ -805,22 +827,32 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)
return -EINVAL;
}
- offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "syscon");
- if (offset < 0) {
- debug("%s: cannot find syscon node\n", __func__);
- return -EINVAL;
- }
- reg = fdt_getprop(gd->fdt_blob, offset, "reg", NULL);
- if (!reg) {
- debug("%s: cannot find reg property in syscon node\n",
- __func__);
+ priv->variant = dev_get_driver_data(dev);
+
+ if (!priv->variant) {
+ printf("%s: Missing variant\n", __func__);
return -EINVAL;
}
- priv->sysctl_reg = fdt_translate_address((void *)gd->fdt_blob,
- offset, reg);
- if (priv->sysctl_reg == FDT_ADDR_T_NONE) {
- debug("%s: Cannot find syscon base address\n", __func__);
- return -EINVAL;
+
+ if (priv->variant != R40_GMAC) {
+ offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "syscon");
+ if (offset < 0) {
+ debug("%s: cannot find syscon node\n", __func__);
+ return -EINVAL;
+ }
+ reg = fdt_getprop(gd->fdt_blob, offset, "reg", NULL);
+ if (!reg) {
+ debug("%s: cannot find reg property in syscon node\n",
+ __func__);
+ return -EINVAL;
+ }
+ priv->sysctl_reg = fdt_translate_address((void *)gd->fdt_blob,
+ offset, reg);
+ if (priv->sysctl_reg == FDT_ADDR_T_NONE) {
+ debug("%s: Cannot find syscon base address\n",
+ __func__);
+ return -EINVAL;
+ }
}
pdata->phy_interface = -1;
@@ -845,13 +877,6 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)
return -EINVAL;
}
- priv->variant = dev_get_driver_data(dev);
-
- if (!priv->variant) {
- printf("%s: Missing variant\n", __func__);
- return -EINVAL;
- }
-
if (priv->variant == H3_EMAC) {
int parent = fdt_parent_offset(gd->fdt_blob, offset);
@@ -892,6 +917,8 @@ static const struct udevice_id sun8i_emac_eth_ids[] = {
.data = (uintptr_t)A64_EMAC },
{.compatible = "allwinner,sun8i-a83t-emac",
.data = (uintptr_t)A83T_EMAC },
+ {.compatible = "allwinner,sun8i-r40-gmac",
+ .data = (uintptr_t)R40_GMAC },
{ }
};
--
2.14.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH v4 5/6] sunxi: R40: add gigabit ethernet devicetree node
2018-06-26 11:54 [U-Boot] [PATCH v4 1/6] sunxi: R40: add gigabit ethernet clocks Lothar Felten
` (2 preceding siblings ...)
2018-06-26 11:54 ` [U-Boot] [PATCH v4 4/6] net: sun8i-emac: support R40 GMAC Lothar Felten
@ 2018-06-26 11:54 ` Lothar Felten
2018-06-26 12:01 ` Maxime Ripard
2018-06-26 12:35 ` Chen-Yu Tsai
2018-06-26 11:54 ` [U-Boot] [PATCH v4 6/6] configs: Bananapi_M2_Ultra: enable gigabit ethernet Lothar Felten
4 siblings, 2 replies; 13+ messages in thread
From: Lothar Felten @ 2018-06-26 11:54 UTC (permalink / raw)
To: u-boot
Add a device tree node for the Allwinner R40/V40 GMAC gigabit
ethernet interface.
The R40 SoC does not use the syscon register for GMAC settings.
The gigabit ethernet interface can only be routed to a fixed set of
pins.
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
---
Changelog:
new in v2
v2 -> v3 omit syscon node for R40
v3 -> v4 remove phy-mode from gmac node
arch/arm/dts/sun8i-r40.dtsi | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi
index 0aa76a2f10..3a0b3ab543 100644
--- a/arch/arm/dts/sun8i-r40.dtsi
+++ b/arch/arm/dts/sun8i-r40.dtsi
@@ -52,6 +52,7 @@
interrupt-parent = <&gic>;
aliases {
+ ethernet0 = &gmac;
};
chosen {
@@ -161,6 +162,15 @@
#interrupt-cells = <3>;
#gpio-cells = <3>;
+ gmac_pins_rgmii: gmac_rgmii {
+ pins = "PA0", "PA1", "PA2",
+ "PA3", "PA4", "PA5", "PA6",
+ "PA7", "PA8", "PA10",
+ "PA11", "PA12", "PA13",
+ "PA15", "PA16";
+ function = "gmac";
+ };
+
i2c0_pins: i2c0_pins {
pins = "PB0", "PB1";
function = "i2c0";
@@ -202,6 +212,26 @@
#size-cells = <0>;
};
+ gmac: ethernet at 01c50000 {
+ compatible = "allwinner,sun8i-r40-gmac";
+ reg = <0x01c50000 0x2000>;
+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ clocks = <&osc24M>, <&osc24M>;
+ clock-names = "stmmaceth", "allwinner_gmac_tx";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac_pins_rgmii>;
+ status = "disabled";
+
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ };
+ };
+
gic: interrupt-controller at 1c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
--
2.14.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH v4 6/6] configs: Bananapi_M2_Ultra: enable gigabit ethernet
2018-06-26 11:54 [U-Boot] [PATCH v4 1/6] sunxi: R40: add gigabit ethernet clocks Lothar Felten
` (3 preceding siblings ...)
2018-06-26 11:54 ` [U-Boot] [PATCH v4 5/6] sunxi: R40: add gigabit ethernet devicetree node Lothar Felten
@ 2018-06-26 11:54 ` Lothar Felten
2018-06-26 12:02 ` Maxime Ripard
4 siblings, 1 reply; 13+ messages in thread
From: Lothar Felten @ 2018-06-26 11:54 UTC (permalink / raw)
To: u-boot
Enable the gigabit ethernet for the Bananapi M2 Ultra board.
Tested on BananaPi M2 Berry (R40), custom board (V40)
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
---
Changelog:
new in v2
v2 -> v3 remove unused CONFIG_SUN7I_GMAC
v3 -> v4 include device tree node, enable ALDO2
arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts | 15 +++++++++++++++
configs/Bananapi_M2_Ultra_defconfig | 5 +++++
2 files changed, 20 insertions(+)
diff --git a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
index ab471ab0bf..c2284aed5a 100644
--- a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
+++ b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
@@ -67,3 +67,18 @@
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
+
+&gmac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac_pins_rgmii>;
+ status = "okay";
+ phy-handle = <&rgmii_phy>;
+ phy-mode = "rgmii";
+};
+
+&mdio {
+ rgmii_phy: ethernet-phy at 1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig
index 37cc2df5dc..4ce1a905ea 100644
--- a/configs/Bananapi_M2_Ultra_defconfig
+++ b/configs/Bananapi_M2_Ultra_defconfig
@@ -14,6 +14,11 @@ CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_FLASH is not set
CONFIG_SCSI_AHCI=y
CONFIG_AXP_DLDO4_VOLT=2500
+CONFIG_AXP_ALDO2_VOLT=2500
CONFIG_AXP_ELDO3_VOLT=1200
CONFIG_SCSI=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
+CONFIG_SUN8I_EMAC=y
+CONFIG_RGMII=y
+CONFIG_MACPWR="PA17"
+CONFIG_DM_GPIO=y
--
2.14.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH v4 2/6] net: sun8i-emac: fix printing NULL character
2018-06-26 11:54 ` [U-Boot] [PATCH v4 2/6] net: sun8i-emac: fix printing NULL character Lothar Felten
@ 2018-06-26 11:57 ` Maxime Ripard
2018-06-26 23:47 ` Joe Hershberger
1 sibling, 0 replies; 13+ messages in thread
From: Maxime Ripard @ 2018-06-26 11:57 UTC (permalink / raw)
To: u-boot
On Tue, Jun 26, 2018 at 01:54:44PM +0200, Lothar Felten wrote:
> If the variant is not set and therefore NULL, do not attempt to print
> the variant.
>
> Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH v4 5/6] sunxi: R40: add gigabit ethernet devicetree node
2018-06-26 11:54 ` [U-Boot] [PATCH v4 5/6] sunxi: R40: add gigabit ethernet devicetree node Lothar Felten
@ 2018-06-26 12:01 ` Maxime Ripard
2018-06-26 12:35 ` Chen-Yu Tsai
1 sibling, 0 replies; 13+ messages in thread
From: Maxime Ripard @ 2018-06-26 12:01 UTC (permalink / raw)
To: u-boot
On Tue, Jun 26, 2018 at 01:54:47PM +0200, Lothar Felten wrote:
> Add a device tree node for the Allwinner R40/V40 GMAC gigabit
> ethernet interface.
> The R40 SoC does not use the syscon register for GMAC settings.
> The gigabit ethernet interface can only be routed to a fixed set of
> pins.
>
> Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH v4 6/6] configs: Bananapi_M2_Ultra: enable gigabit ethernet
2018-06-26 11:54 ` [U-Boot] [PATCH v4 6/6] configs: Bananapi_M2_Ultra: enable gigabit ethernet Lothar Felten
@ 2018-06-26 12:02 ` Maxime Ripard
0 siblings, 0 replies; 13+ messages in thread
From: Maxime Ripard @ 2018-06-26 12:02 UTC (permalink / raw)
To: u-boot
On Tue, Jun 26, 2018 at 01:54:48PM +0200, Lothar Felten wrote:
> Enable the gigabit ethernet for the Bananapi M2 Ultra board.
> Tested on BananaPi M2 Berry (R40), custom board (V40)
>
> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
> Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
> ---
> Changelog:
> new in v2
> v2 -> v3 remove unused CONFIG_SUN7I_GMAC
> v3 -> v4 include device tree node, enable ALDO2
>
> arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts | 15 +++++++++++++++
> configs/Bananapi_M2_Ultra_defconfig | 5 +++++
> 2 files changed, 20 insertions(+)
>
> diff --git a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
> index ab471ab0bf..c2284aed5a 100644
> --- a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
> +++ b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
> @@ -67,3 +67,18 @@
> pinctrl-0 = <&uart0_pb_pins>;
> status = "okay";
> };
> +
> +&gmac {
> + pinctrl-names = "default";
> + pinctrl-0 = <&gmac_pins_rgmii>;
> + status = "okay";
> + phy-handle = <&rgmii_phy>;
> + phy-mode = "rgmii";
> +};
> +
> +&mdio {
> + rgmii_phy: ethernet-phy at 1 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <1>;
> + };
> +};
> diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig
> index 37cc2df5dc..4ce1a905ea 100644
> --- a/configs/Bananapi_M2_Ultra_defconfig
> +++ b/configs/Bananapi_M2_Ultra_defconfig
> @@ -14,6 +14,11 @@ CONFIG_SPL_I2C_SUPPORT=y
> # CONFIG_CMD_FLASH is not set
> CONFIG_SCSI_AHCI=y
> CONFIG_AXP_DLDO4_VOLT=2500
> +CONFIG_AXP_ALDO2_VOLT=2500
> CONFIG_AXP_ELDO3_VOLT=1200
> CONFIG_SCSI=y
> CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
> +CONFIG_SUN8I_EMAC=y
> +CONFIG_RGMII=y
> +CONFIG_MACPWR="PA17"
> +CONFIG_DM_GPIO=y
Why is that option needed?
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH v4 5/6] sunxi: R40: add gigabit ethernet devicetree node
2018-06-26 11:54 ` [U-Boot] [PATCH v4 5/6] sunxi: R40: add gigabit ethernet devicetree node Lothar Felten
2018-06-26 12:01 ` Maxime Ripard
@ 2018-06-26 12:35 ` Chen-Yu Tsai
1 sibling, 0 replies; 13+ messages in thread
From: Chen-Yu Tsai @ 2018-06-26 12:35 UTC (permalink / raw)
To: u-boot
On Tue, Jun 26, 2018 at 7:54 PM, Lothar Felten <lothar.felten@gmail.com> wrote:
> Add a device tree node for the Allwinner R40/V40 GMAC gigabit
> ethernet interface.
> The R40 SoC does not use the syscon register for GMAC settings.
> The gigabit ethernet interface can only be routed to a fixed set of
> pins.
>
> Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
> ---
> Changelog:
> new in v2
> v2 -> v3 omit syscon node for R40
> v3 -> v4 remove phy-mode from gmac node
>
> arch/arm/dts/sun8i-r40.dtsi | 30 ++++++++++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi
> index 0aa76a2f10..3a0b3ab543 100644
> --- a/arch/arm/dts/sun8i-r40.dtsi
> +++ b/arch/arm/dts/sun8i-r40.dtsi
> @@ -52,6 +52,7 @@
> interrupt-parent = <&gic>;
>
> aliases {
> + ethernet0 = &gmac;
> };
>
> chosen {
> @@ -161,6 +162,15 @@
> #interrupt-cells = <3>;
> #gpio-cells = <3>;
>
> + gmac_pins_rgmii: gmac_rgmii {
> + pins = "PA0", "PA1", "PA2",
> + "PA3", "PA4", "PA5", "PA6",
> + "PA7", "PA8", "PA10",
> + "PA11", "PA12", "PA13",
> + "PA15", "PA16";
> + function = "gmac";
> + };
> +
> i2c0_pins: i2c0_pins {
> pins = "PB0", "PB1";
> function = "i2c0";
> @@ -202,6 +212,26 @@
> #size-cells = <0>;
> };
>
> + gmac: ethernet at 01c50000 {
> + compatible = "allwinner,sun8i-r40-gmac";
> + reg = <0x01c50000 0x2000>;
> + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "macirq";
> + clocks = <&osc24M>, <&osc24M>;
> + clock-names = "stmmaceth", "allwinner_gmac_tx";
Where did this second clock come from?
> + #address-cells = <1>;
> + #size-cells = <0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&gmac_pins_rgmii>;
> + status = "disabled";
> +
> + mdio: mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "snps,dwmac-mdio";
> + };
> + };
> +
Also, please have the new nodes match what is in the Linux kernel's
device tree. This would make it easier to sync up without differences
scattered all over.
ChenYu
> gic: interrupt-controller at 1c81000 {
> compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
> reg = <0x01c81000 0x1000>,
> --
> 2.14.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH v4 2/6] net: sun8i-emac: fix printing NULL character
2018-06-26 11:54 ` [U-Boot] [PATCH v4 2/6] net: sun8i-emac: fix printing NULL character Lothar Felten
2018-06-26 11:57 ` Maxime Ripard
@ 2018-06-26 23:47 ` Joe Hershberger
1 sibling, 0 replies; 13+ messages in thread
From: Joe Hershberger @ 2018-06-26 23:47 UTC (permalink / raw)
To: u-boot
On Tue, Jun 26, 2018 at 6:54 AM, Lothar Felten <lothar.felten@gmail.com> wrote:
> If the variant is not set and therefore NULL, do not attempt to print
> the variant.
>
> Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
^ permalink raw reply [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH v4 3/6] net: sun8i-emac: set mux and clock by driver data
2018-06-26 11:54 ` [U-Boot] [PATCH v4 3/6] net: sun8i-emac: set mux and clock by driver data Lothar Felten
@ 2018-07-02 20:12 ` Joe Hershberger
0 siblings, 0 replies; 13+ messages in thread
From: Joe Hershberger @ 2018-07-02 20:12 UTC (permalink / raw)
To: u-boot
On Tue, Jun 26, 2018 at 6:54 AM, Lothar Felten <lothar.felten@gmail.com> wrote:
> Use driver data->variant information to select device specific
> pin mux and phy clock settings.
>
> Suggested by Jagan Teki
>
> Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
> ---
> Changelog:
> new in v3
> v3 -> v4 use driver data to distinguish between variants
>
> drivers/net/sun8i_emac.c | 35 ++++++++++++++++++++---------------
> 1 file changed, 20 insertions(+), 15 deletions(-)
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
^ permalink raw reply [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH v4 4/6] net: sun8i-emac: support R40 GMAC
2018-06-26 11:54 ` [U-Boot] [PATCH v4 4/6] net: sun8i-emac: support R40 GMAC Lothar Felten
@ 2018-07-02 20:14 ` Joe Hershberger
0 siblings, 0 replies; 13+ messages in thread
From: Joe Hershberger @ 2018-07-02 20:14 UTC (permalink / raw)
To: u-boot
On Tue, Jun 26, 2018 at 6:54 AM, Lothar Felten <lothar.felten@gmail.com> wrote:
> Add support for the GMAC found in the Allwinner R40/V40 SoC.
>
> The R40 GMAC interface is not controlled by the syscon register but
> has a separate configuration register in the CCU.
> The clock gate and reset bits are in a different register compared
> to the other SoCs supported by this driver.
> The driver uses the -gmac suffix for the R40 because the R40 also
> has a different 100 MBit MAC (EMAC).
>
> Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2018-07-02 20:14 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-06-26 11:54 [U-Boot] [PATCH v4 1/6] sunxi: R40: add gigabit ethernet clocks Lothar Felten
2018-06-26 11:54 ` [U-Boot] [PATCH v4 2/6] net: sun8i-emac: fix printing NULL character Lothar Felten
2018-06-26 11:57 ` Maxime Ripard
2018-06-26 23:47 ` Joe Hershberger
2018-06-26 11:54 ` [U-Boot] [PATCH v4 3/6] net: sun8i-emac: set mux and clock by driver data Lothar Felten
2018-07-02 20:12 ` Joe Hershberger
2018-06-26 11:54 ` [U-Boot] [PATCH v4 4/6] net: sun8i-emac: support R40 GMAC Lothar Felten
2018-07-02 20:14 ` Joe Hershberger
2018-06-26 11:54 ` [U-Boot] [PATCH v4 5/6] sunxi: R40: add gigabit ethernet devicetree node Lothar Felten
2018-06-26 12:01 ` Maxime Ripard
2018-06-26 12:35 ` Chen-Yu Tsai
2018-06-26 11:54 ` [U-Boot] [PATCH v4 6/6] configs: Bananapi_M2_Ultra: enable gigabit ethernet Lothar Felten
2018-06-26 12:02 ` Maxime Ripard
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