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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 24/32] target/arm: Set page (region) size in get_phys_addr_pmsav7()
Date: Tue, 26 Jun 2018 17:56:50 +0100	[thread overview]
Message-ID: <20180626165658.31394-25-peter.maydell@linaro.org> (raw)
In-Reply-To: <20180626165658.31394-1-peter.maydell@linaro.org>

We want to handle small MPU region sizes for ARMv7M. To do this,
make get_phys_addr_pmsav7() set the page size to the region
size if it is less that TARGET_PAGE_SIZE, rather than working
only in TARGET_PAGE_SIZE chunks.

Since the core TCG code con't handle execution from small
MPU regions, we strip the exec permission from them so that
any execution attempts will cause an MPU exception, rather
than allowing it to end up with a cpu_abort() in
get_page_addr_code().

(The previous code's intention was to make any small page be
treated as having no permissions, but unfortunately errors
in the implementation meant that it didn't behave that way.
It's possible that some binaries using small regions were
accidentally working with our old behaviour and won't now.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180620130619.11362-3-peter.maydell@linaro.org
---
 target/arm/helper.c | 37 ++++++++++++++++++++++++++-----------
 1 file changed, 26 insertions(+), 11 deletions(-)

diff --git a/target/arm/helper.c b/target/arm/helper.c
index 1248d84e6fa..a7edeb66633 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -9596,6 +9596,7 @@ static inline bool m_is_system_region(CPUARMState *env, uint32_t address)
 static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address,
                                  MMUAccessType access_type, ARMMMUIdx mmu_idx,
                                  hwaddr *phys_ptr, int *prot,
+                                 target_ulong *page_size,
                                  ARMMMUFaultInfo *fi)
 {
     ARMCPU *cpu = arm_env_get_cpu(env);
@@ -9603,6 +9604,7 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address,
     bool is_user = regime_is_user(env, mmu_idx);
 
     *phys_ptr = address;
+    *page_size = TARGET_PAGE_SIZE;
     *prot = 0;
 
     if (regime_translation_disabled(env, mmu_idx) ||
@@ -9675,16 +9677,12 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address,
                     rsize++;
                 }
             }
-            if (rsize < TARGET_PAGE_BITS) {
-                qemu_log_mask(LOG_UNIMP,
-                              "DRSR[%d]: No support for MPU (sub)region size of"
-                              " %" PRIu32 " bytes. Minimum is %d.\n",
-                              n, (1 << rsize), TARGET_PAGE_SIZE);
-                continue;
-            }
             if (srdis) {
                 continue;
             }
+            if (rsize < TARGET_PAGE_BITS) {
+                *page_size = 1 << rsize;
+            }
             break;
         }
 
@@ -9765,6 +9763,17 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address,
 
     fi->type = ARMFault_Permission;
     fi->level = 1;
+    /*
+     * Core QEMU code can't handle execution from small pages yet, so
+     * don't try it. This way we'll get an MPU exception, rather than
+     * eventually causing QEMU to exit in get_page_addr_code().
+     */
+    if (*page_size < TARGET_PAGE_SIZE && (*prot & PAGE_EXEC)) {
+        qemu_log_mask(LOG_UNIMP,
+                      "MPU: No support for execution from regions "
+                      "smaller than 1K\n");
+        *prot &= ~PAGE_EXEC;
+    }
     return !(*prot & (1 << access_type));
 }
 
@@ -10334,7 +10343,7 @@ static bool get_phys_addr(CPUARMState *env, target_ulong address,
         } else if (arm_feature(env, ARM_FEATURE_V7)) {
             /* PMSAv7 */
             ret = get_phys_addr_pmsav7(env, address, access_type, mmu_idx,
-                                       phys_ptr, prot, fi);
+                                       phys_ptr, prot, page_size, fi);
         } else {
             /* Pre-v7 MPU */
             ret = get_phys_addr_pmsav5(env, address, access_type, mmu_idx,
@@ -10396,9 +10405,15 @@ bool arm_tlb_fill(CPUState *cs, vaddr address,
                         core_to_arm_mmu_idx(env, mmu_idx), &phys_addr,
                         &attrs, &prot, &page_size, fi, NULL);
     if (!ret) {
-        /* Map a single [sub]page.  */
-        phys_addr &= TARGET_PAGE_MASK;
-        address &= TARGET_PAGE_MASK;
+        /*
+         * Map a single [sub]page. Regions smaller than our declared
+         * target page size are handled specially, so for those we
+         * pass in the exact addresses.
+         */
+        if (page_size >= TARGET_PAGE_SIZE) {
+            phys_addr &= TARGET_PAGE_MASK;
+            address &= TARGET_PAGE_MASK;
+        }
         tlb_set_page_with_attrs(cs, address, phys_addr, attrs,
                                 prot, mmu_idx, page_size);
         return 0;
-- 
2.17.1

  parent reply	other threads:[~2018-06-26 16:57 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-26 16:56 [Qemu-devel] [PULL 00/32] target-arm queue Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 01/32] aspeed/smc: fix dummy cycles count when in dual IO mode Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 02/32] aspeed/smc: fix HW strapping Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 03/32] aspeed/smc: rename aspeed_smc_flash_send_addr() to aspeed_smc_flash_setup() Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 04/32] MAINTAINERS: Adopt the Gumstix computers-on-module machines Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 05/32] xilinx_spips: Make dma transactions as per dma_burst_size Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 06/32] MAINTAINERS: Add ASPEED BMCs Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 07/32] hw/input/pckbd: Use qemu_log_mask(GUEST_ERROR) instead of fprintf Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 08/32] hw/input/tsc2005: " Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 09/32] hw/dma/omap_dma: Use qemu_log_mask(UNIMP) instead of printf Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 10/32] hw/dma/omap_dma: Use qemu_log_mask(GUEST_ERROR) instead of fprintf Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 11/32] hw/ssi/omap_spi: " Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 12/32] hw/sd/omap_mmc: Use qemu_log_mask(UNIMP) instead of printf Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 13/32] hw/i2c/omap_i2c: Use qemu_log_mask(UNIMP) instead of fprintf Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 14/32] hw/arm/omap1: Use qemu_log_mask(GUEST_ERROR) " Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 15/32] hw/arm/omap: " Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 16/32] hw/arm/stellaris: Use qemu_log_mask(UNIMP) " Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 17/32] hw/net/stellaris_enet: Fix a typo Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 18/32] hw/net/stellaris_enet: Use qemu_log_mask(GUEST_ERROR) instead of hw_error Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 19/32] hw/net/smc91c111: " Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 20/32] hw/net/smc91c111: Use qemu_log_mask(UNIMP) instead of fprintf Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 21/32] hw/arm/stellaris: Fix gptm_write() error message Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 22/32] hw/arm/stellaris: Use HWADDR_PRIx to display register address Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 23/32] tcg: Support MMU protection regions smaller than TARGET_PAGE_SIZE Peter Maydell
2018-06-28 13:03   ` Laurent Vivier
2018-06-28 13:23     ` Peter Maydell
2018-06-28 19:23       ` Laurent Vivier
2018-06-28 20:05         ` Peter Maydell
2018-06-28 22:26           ` Laurent Vivier
2018-06-29 12:14             ` Peter Maydell
2018-06-29 14:07               ` Alex Bennée
2018-06-29 15:28             ` Peter Maydell
2018-06-29 15:52               ` Laurent Vivier
2018-06-26 16:56 ` Peter Maydell [this message]
2018-06-26 16:56 ` [Qemu-devel] [PULL 25/32] target/arm: Handle small regions in get_phys_addr_pmsav8() Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 26/32] hw/arm/smmuv3: Fix translate error handling Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 27/32] hw/arm/smmuv3: Cache/invalidate config data Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 28/32] hw/arm/smmuv3: IOTLB emulation Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 29/32] hw/arm/smmuv3: Add notifications on invalidation Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 30/32] aspeed/scu: introduce clock frequencies Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 31/32] aspeed: initialize the SCU controller first Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 32/32] aspeed/timer: use the APB frequency from the SCU Peter Maydell
2018-06-26 18:19 ` [Qemu-devel] [PULL 00/32] target-arm queue Peter Maydell

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