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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 32/32] aspeed/timer: use the APB frequency from the SCU
Date: Tue, 26 Jun 2018 17:56:58 +0100	[thread overview]
Message-ID: <20180626165658.31394-33-peter.maydell@linaro.org> (raw)
In-Reply-To: <20180626165658.31394-1-peter.maydell@linaro.org>

From: Cédric Le Goater <clg@kaod.org>

The timer controller can be driven by either an external 1MHz clock or
by the APB clock. Today, the model makes the assumption that the APB
frequency is always set to 24MHz but this is incorrect.

The AST2400 SoC on the palmetto machines uses a 48MHz input clock
source and the APB can be set to 48MHz. The consequence is a general
system slowdown. The QEMU machines using the AST2500 SoC do not seem
impacted today because the APB frequency is still set to 24MHz.

We fix the timer frequency for all SoCs by linking the Timer model to
the SCU model. The APB frequency driving the timers is now the one
configured for the SoC.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Message-id: 20180622075700.5923-4-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 include/hw/timer/aspeed_timer.h |  4 ++++
 hw/arm/aspeed_soc.c             |  2 ++
 hw/timer/aspeed_timer.c         | 19 +++++++++++++++----
 3 files changed, 21 insertions(+), 4 deletions(-)

diff --git a/include/hw/timer/aspeed_timer.h b/include/hw/timer/aspeed_timer.h
index bd6c1a7f960..040a0887343 100644
--- a/include/hw/timer/aspeed_timer.h
+++ b/include/hw/timer/aspeed_timer.h
@@ -24,6 +24,8 @@
 
 #include "qemu/timer.h"
 
+typedef struct AspeedSCUState AspeedSCUState;
+
 #define ASPEED_TIMER(obj) \
     OBJECT_CHECK(AspeedTimerCtrlState, (obj), TYPE_ASPEED_TIMER);
 #define TYPE_ASPEED_TIMER "aspeed.timer"
@@ -55,6 +57,8 @@ typedef struct AspeedTimerCtrlState {
     uint32_t ctrl;
     uint32_t ctrl2;
     AspeedTimer timers[ASPEED_TIMER_NR_TIMERS];
+
+    AspeedSCUState *scu;
 } AspeedTimerCtrlState;
 
 #endif /* ASPEED_TIMER_H */
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index 7cc05ee27ea..e68911af0f9 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_soc.c
@@ -127,6 +127,8 @@ static void aspeed_soc_init(Object *obj)
 
     object_initialize(&s->timerctrl, sizeof(s->timerctrl), TYPE_ASPEED_TIMER);
     object_property_add_child(obj, "timerctrl", OBJECT(&s->timerctrl), NULL);
+    object_property_add_const_link(OBJECT(&s->timerctrl), "scu",
+                                   OBJECT(&s->scu), &error_abort);
     qdev_set_parent_bus(DEVICE(&s->timerctrl), sysbus_get_default());
 
     object_initialize(&s->i2c, sizeof(s->i2c), TYPE_ASPEED_I2C);
diff --git a/hw/timer/aspeed_timer.c b/hw/timer/aspeed_timer.c
index 1e31e22b6f1..5e3f51b66b4 100644
--- a/hw/timer/aspeed_timer.c
+++ b/hw/timer/aspeed_timer.c
@@ -10,8 +10,10 @@
  */
 
 #include "qemu/osdep.h"
+#include "qapi/error.h"
 #include "hw/sysbus.h"
 #include "hw/timer/aspeed_timer.h"
+#include "hw/misc/aspeed_scu.h"
 #include "qemu-common.h"
 #include "qemu/bitops.h"
 #include "qemu/timer.h"
@@ -26,7 +28,6 @@
 #define TIMER_CLOCK_USE_EXT true
 #define TIMER_CLOCK_EXT_HZ 1000000
 #define TIMER_CLOCK_USE_APB false
-#define TIMER_CLOCK_APB_HZ 24000000
 
 #define TIMER_REG_STATUS 0
 #define TIMER_REG_RELOAD 1
@@ -80,11 +81,11 @@ static inline bool timer_external_clock(AspeedTimer *t)
     return timer_ctrl_status(t, op_external_clock);
 }
 
-static uint32_t clock_rates[] = { TIMER_CLOCK_APB_HZ, TIMER_CLOCK_EXT_HZ };
-
 static inline uint32_t calculate_rate(struct AspeedTimer *t)
 {
-    return clock_rates[timer_external_clock(t)];
+    AspeedTimerCtrlState *s = timer_to_ctrl(t);
+
+    return timer_external_clock(t) ? TIMER_CLOCK_EXT_HZ : s->scu->apb_freq;
 }
 
 static inline uint32_t calculate_ticks(struct AspeedTimer *t, uint64_t now_ns)
@@ -449,6 +450,16 @@ static void aspeed_timer_realize(DeviceState *dev, Error **errp)
     int i;
     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
     AspeedTimerCtrlState *s = ASPEED_TIMER(dev);
+    Object *obj;
+    Error *err = NULL;
+
+    obj = object_property_get_link(OBJECT(dev), "scu", &err);
+    if (!obj) {
+        error_propagate(errp, err);
+        error_prepend(errp, "required link 'scu' not found: ");
+        return;
+    }
+    s->scu = ASPEED_SCU(obj);
 
     for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) {
         aspeed_init_one_timer(s, i);
-- 
2.17.1

  parent reply	other threads:[~2018-06-26 16:57 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-26 16:56 [Qemu-devel] [PULL 00/32] target-arm queue Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 01/32] aspeed/smc: fix dummy cycles count when in dual IO mode Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 02/32] aspeed/smc: fix HW strapping Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 03/32] aspeed/smc: rename aspeed_smc_flash_send_addr() to aspeed_smc_flash_setup() Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 04/32] MAINTAINERS: Adopt the Gumstix computers-on-module machines Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 05/32] xilinx_spips: Make dma transactions as per dma_burst_size Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 06/32] MAINTAINERS: Add ASPEED BMCs Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 07/32] hw/input/pckbd: Use qemu_log_mask(GUEST_ERROR) instead of fprintf Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 08/32] hw/input/tsc2005: " Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 09/32] hw/dma/omap_dma: Use qemu_log_mask(UNIMP) instead of printf Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 10/32] hw/dma/omap_dma: Use qemu_log_mask(GUEST_ERROR) instead of fprintf Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 11/32] hw/ssi/omap_spi: " Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 12/32] hw/sd/omap_mmc: Use qemu_log_mask(UNIMP) instead of printf Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 13/32] hw/i2c/omap_i2c: Use qemu_log_mask(UNIMP) instead of fprintf Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 14/32] hw/arm/omap1: Use qemu_log_mask(GUEST_ERROR) " Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 15/32] hw/arm/omap: " Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 16/32] hw/arm/stellaris: Use qemu_log_mask(UNIMP) " Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 17/32] hw/net/stellaris_enet: Fix a typo Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 18/32] hw/net/stellaris_enet: Use qemu_log_mask(GUEST_ERROR) instead of hw_error Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 19/32] hw/net/smc91c111: " Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 20/32] hw/net/smc91c111: Use qemu_log_mask(UNIMP) instead of fprintf Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 21/32] hw/arm/stellaris: Fix gptm_write() error message Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 22/32] hw/arm/stellaris: Use HWADDR_PRIx to display register address Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 23/32] tcg: Support MMU protection regions smaller than TARGET_PAGE_SIZE Peter Maydell
2018-06-28 13:03   ` Laurent Vivier
2018-06-28 13:23     ` Peter Maydell
2018-06-28 19:23       ` Laurent Vivier
2018-06-28 20:05         ` Peter Maydell
2018-06-28 22:26           ` Laurent Vivier
2018-06-29 12:14             ` Peter Maydell
2018-06-29 14:07               ` Alex Bennée
2018-06-29 15:28             ` Peter Maydell
2018-06-29 15:52               ` Laurent Vivier
2018-06-26 16:56 ` [Qemu-devel] [PULL 24/32] target/arm: Set page (region) size in get_phys_addr_pmsav7() Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 25/32] target/arm: Handle small regions in get_phys_addr_pmsav8() Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 26/32] hw/arm/smmuv3: Fix translate error handling Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 27/32] hw/arm/smmuv3: Cache/invalidate config data Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 28/32] hw/arm/smmuv3: IOTLB emulation Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 29/32] hw/arm/smmuv3: Add notifications on invalidation Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 30/32] aspeed/scu: introduce clock frequencies Peter Maydell
2018-06-26 16:56 ` [Qemu-devel] [PULL 31/32] aspeed: initialize the SCU controller first Peter Maydell
2018-06-26 16:56 ` Peter Maydell [this message]
2018-06-26 18:19 ` [Qemu-devel] [PULL 00/32] target-arm queue Peter Maydell

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