* [PATCH v3 1/3] drm/i915/guc: Use intel_guc_init_misc to hide GuC internals
@ 2018-06-28 14:15 Michal Wajdeczko
2018-06-28 14:15 ` [PATCH v3 2/3] drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc specific init Michal Wajdeczko
` (4 more replies)
0 siblings, 5 replies; 10+ messages in thread
From: Michal Wajdeczko @ 2018-06-28 14:15 UTC (permalink / raw)
To: intel-gfx
We will add more init steps to misc phase and there is no need
to expose them separately for use in uc_init_misc function.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
---
drivers/gpu/drm/i915/intel_guc.c | 28 ++++++++++++++++++++++++----
drivers/gpu/drm/i915/intel_guc.h | 5 ++---
drivers/gpu/drm/i915/intel_uc.c | 6 ++----
3 files changed, 28 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index f651e57..0b06f27 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -27,6 +27,8 @@
#include "intel_guc_submission.h"
#include "i915_drv.h"
+static void guc_init_ggtt_pin_bias(struct intel_guc *guc);
+
static void gen8_guc_raise_irq(struct intel_guc *guc)
{
struct drm_i915_private *dev_priv = guc_to_i915(guc);
@@ -73,7 +75,7 @@ void intel_guc_init_early(struct intel_guc *guc)
guc->notify = gen8_guc_raise_irq;
}
-int intel_guc_init_wq(struct intel_guc *guc)
+static int guc_init_wq(struct intel_guc *guc)
{
struct drm_i915_private *dev_priv = guc_to_i915(guc);
@@ -124,7 +126,7 @@ int intel_guc_init_wq(struct intel_guc *guc)
return 0;
}
-void intel_guc_fini_wq(struct intel_guc *guc)
+static void guc_fini_wq(struct intel_guc *guc)
{
struct drm_i915_private *dev_priv = guc_to_i915(guc);
@@ -135,6 +137,24 @@ void intel_guc_fini_wq(struct intel_guc *guc)
destroy_workqueue(guc->log.relay.flush_wq);
}
+int intel_guc_init_misc(struct intel_guc *guc)
+{
+ int ret;
+
+ guc_init_ggtt_pin_bias(guc);
+
+ ret = guc_init_wq(guc);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+void intel_guc_fini_misc(struct intel_guc *guc)
+{
+ guc_fini_wq(guc);
+}
+
static int guc_shared_data_create(struct intel_guc *guc)
{
struct i915_vma *vma;
@@ -582,13 +602,13 @@ int intel_guc_resume(struct intel_guc *guc)
*/
/**
- * intel_guc_init_ggtt_pin_bias() - Initialize the GuC ggtt_pin_bias value.
+ * guc_init_ggtt_pin_bias() - Initialize the GuC ggtt_pin_bias value.
* @guc: intel_guc structure.
*
* This function will calculate and initialize the ggtt_pin_bias value based on
* overall WOPCM size and GuC WOPCM size.
*/
-void intel_guc_init_ggtt_pin_bias(struct intel_guc *guc)
+static void guc_init_ggtt_pin_bias(struct intel_guc *guc)
{
struct drm_i915_private *i915 = guc_to_i915(guc);
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index f1265e1..4121928 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -151,11 +151,10 @@ static inline u32 intel_guc_ggtt_offset(struct intel_guc *guc,
void intel_guc_init_early(struct intel_guc *guc);
void intel_guc_init_send_regs(struct intel_guc *guc);
void intel_guc_init_params(struct intel_guc *guc);
-void intel_guc_init_ggtt_pin_bias(struct intel_guc *guc);
-int intel_guc_init_wq(struct intel_guc *guc);
-void intel_guc_fini_wq(struct intel_guc *guc);
+int intel_guc_init_misc(struct intel_guc *guc);
int intel_guc_init(struct intel_guc *guc);
void intel_guc_fini(struct intel_guc *guc);
+void intel_guc_fini_misc(struct intel_guc *guc);
int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len,
u32 *response_buf, u32 response_buf_size);
int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len,
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 94e8863..cd49b4f 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -257,9 +257,7 @@ int intel_uc_init_misc(struct drm_i915_private *i915)
if (!USES_GUC(i915))
return 0;
- intel_guc_init_ggtt_pin_bias(guc);
-
- ret = intel_guc_init_wq(guc);
+ ret = intel_guc_init_misc(guc);
if (ret)
return ret;
@@ -273,7 +271,7 @@ void intel_uc_fini_misc(struct drm_i915_private *i915)
if (!USES_GUC(i915))
return;
- intel_guc_fini_wq(guc);
+ intel_guc_fini_misc(guc);
}
int intel_uc_init(struct drm_i915_private *i915)
--
1.9.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v3 2/3] drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc specific init
2018-06-28 14:15 [PATCH v3 1/3] drm/i915/guc: Use intel_guc_init_misc to hide GuC internals Michal Wajdeczko
@ 2018-06-28 14:15 ` Michal Wajdeczko
2018-06-28 21:56 ` Michel Thierry
2018-06-28 14:15 ` [PATCH v3 3/3] HAX enable GuC for CI Michal Wajdeczko
` (3 subsequent siblings)
4 siblings, 1 reply; 10+ messages in thread
From: Michal Wajdeczko @ 2018-06-28 14:15 UTC (permalink / raw)
To: intel-gfx
We're fetching GuC/HuC firmwares directly from uc level during
init_early stage but this breaks guc/huc struct isolation and
also strict SW-only initialization rule for init_early. Move fw
fetching to init phase and do it separately per guc/huc struct.
v2: don't forget to move wopcm_init - Michele
v3: fetch in init_misc phase - Michal
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Michel Thierry <michel.thierry@intel.com> #2
---
drivers/gpu/drm/i915/i915_gem.c | 7 ++++---
drivers/gpu/drm/i915/intel_guc.c | 9 ++++++++-
drivers/gpu/drm/i915/intel_huc.c | 8 ++++++++
drivers/gpu/drm/i915/intel_huc.h | 6 ++++++
drivers/gpu/drm/i915/intel_uc.c | 28 +++++++++++++++-------------
5 files changed, 41 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 5a9cae6..8954db6 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -5459,13 +5459,13 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
if (ret)
return ret;
- ret = intel_wopcm_init(&dev_priv->wopcm);
+ ret = intel_uc_init_misc(dev_priv);
if (ret)
return ret;
- ret = intel_uc_init_misc(dev_priv);
+ ret = intel_wopcm_init(&dev_priv->wopcm);
if (ret)
- return ret;
+ goto err_uc_misc;
/* This is just a security blanket to placate dragons.
* On some systems, we very sporadically observe that the first TLBs
@@ -5563,6 +5563,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
mutex_unlock(&dev_priv->drm.struct_mutex);
+err_uc_misc:
intel_uc_fini_misc(dev_priv);
if (ret != -EIO)
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index 0b06f27..53b43bc 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -139,6 +139,7 @@ static void guc_fini_wq(struct intel_guc *guc)
int intel_guc_init_misc(struct intel_guc *guc)
{
+ struct drm_i915_private *i915 = guc_to_i915(guc);
int ret;
guc_init_ggtt_pin_bias(guc);
@@ -147,11 +148,14 @@ int intel_guc_init_misc(struct intel_guc *guc)
if (ret)
return ret;
+ intel_uc_fw_fetch(i915, &guc->fw);
+
return 0;
}
void intel_guc_fini_misc(struct intel_guc *guc)
{
+ intel_uc_fw_fini(&guc->fw);
guc_fini_wq(guc);
}
@@ -189,7 +193,7 @@ int intel_guc_init(struct intel_guc *guc)
ret = guc_shared_data_create(guc);
if (ret)
- return ret;
+ goto err_fetch;
GEM_BUG_ON(!guc->shared_data);
ret = intel_guc_log_create(&guc->log);
@@ -210,6 +214,8 @@ int intel_guc_init(struct intel_guc *guc)
intel_guc_log_destroy(&guc->log);
err_shared:
guc_shared_data_destroy(guc);
+err_fetch:
+ intel_uc_fw_fini(&guc->fw);
return ret;
}
@@ -221,6 +227,7 @@ void intel_guc_fini(struct intel_guc *guc)
intel_guc_ads_destroy(guc);
intel_guc_log_destroy(&guc->log);
guc_shared_data_destroy(guc);
+ intel_uc_fw_fini(&guc->fw);
}
static u32 guc_ctl_debug_flags(struct intel_guc *guc)
diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c
index 2912852..ffcad5f 100644
--- a/drivers/gpu/drm/i915/intel_huc.c
+++ b/drivers/gpu/drm/i915/intel_huc.c
@@ -32,6 +32,14 @@ void intel_huc_init_early(struct intel_huc *huc)
intel_huc_fw_init_early(huc);
}
+int intel_huc_init_misc(struct intel_huc *huc)
+{
+ struct drm_i915_private *i915 = huc_to_i915(huc);
+
+ intel_uc_fw_fetch(i915, &huc->fw);
+ return 0;
+}
+
/**
* intel_huc_auth() - Authenticate HuC uCode
* @huc: intel_huc structure
diff --git a/drivers/gpu/drm/i915/intel_huc.h b/drivers/gpu/drm/i915/intel_huc.h
index aa85490..7e41d87 100644
--- a/drivers/gpu/drm/i915/intel_huc.h
+++ b/drivers/gpu/drm/i915/intel_huc.h
@@ -36,9 +36,15 @@ struct intel_huc {
};
void intel_huc_init_early(struct intel_huc *huc);
+int intel_huc_init_misc(struct intel_huc *huc);
int intel_huc_auth(struct intel_huc *huc);
int intel_huc_check_status(struct intel_huc *huc);
+static inline void intel_huc_fini_misc(struct intel_huc *huc)
+{
+ intel_uc_fw_fini(&huc->fw);
+}
+
static inline int intel_huc_sanitize(struct intel_huc *huc)
{
intel_uc_fw_sanitize(&huc->fw);
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index cd49b4f..7c95697 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -171,24 +171,11 @@ void intel_uc_init_early(struct drm_i915_private *i915)
intel_huc_init_early(huc);
sanitize_options_early(i915);
-
- if (USES_GUC(i915))
- intel_uc_fw_fetch(i915, &guc->fw);
-
- if (USES_HUC(i915))
- intel_uc_fw_fetch(i915, &huc->fw);
}
void intel_uc_cleanup_early(struct drm_i915_private *i915)
{
struct intel_guc *guc = &i915->guc;
- struct intel_huc *huc = &i915->huc;
-
- if (USES_HUC(i915))
- intel_uc_fw_fini(&huc->fw);
-
- if (USES_GUC(i915))
- intel_uc_fw_fini(&guc->fw);
guc_free_load_err_log(guc);
}
@@ -252,6 +239,7 @@ static void guc_disable_communication(struct intel_guc *guc)
int intel_uc_init_misc(struct drm_i915_private *i915)
{
struct intel_guc *guc = &i915->guc;
+ struct intel_huc *huc = &i915->huc;
int ret;
if (!USES_GUC(i915))
@@ -261,16 +249,30 @@ int intel_uc_init_misc(struct drm_i915_private *i915)
if (ret)
return ret;
+ if (USES_HUC(i915)) {
+ ret = intel_huc_init_misc(huc);
+ if (ret)
+ goto err_guc;
+ }
+
return 0;
+
+err_guc:
+ intel_guc_fini_misc(guc);
+ return ret;
}
void intel_uc_fini_misc(struct drm_i915_private *i915)
{
struct intel_guc *guc = &i915->guc;
+ struct intel_huc *huc = &i915->huc;
if (!USES_GUC(i915))
return;
+ if (USES_HUC(i915))
+ intel_huc_fini_misc(huc);
+
intel_guc_fini_misc(guc);
}
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v3 3/3] HAX enable GuC for CI
2018-06-28 14:15 [PATCH v3 1/3] drm/i915/guc: Use intel_guc_init_misc to hide GuC internals Michal Wajdeczko
2018-06-28 14:15 ` [PATCH v3 2/3] drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc specific init Michal Wajdeczko
@ 2018-06-28 14:15 ` Michal Wajdeczko
2018-06-28 15:28 ` ✓ Fi.CI.BAT: success for series starting with [v3,1/3] drm/i915/guc: Use intel_guc_init_misc to hide GuC internals Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 10+ messages in thread
From: Michal Wajdeczko @ 2018-06-28 14:15 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index aebe046..3e4e128 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -47,7 +47,7 @@
param(int, disable_power_well, -1) \
param(int, enable_ips, 1) \
param(int, invert_brightness, 0) \
- param(int, enable_guc, 0) \
+ param(int, enable_guc, -1) \
param(int, guc_log_level, -1) \
param(char *, guc_firmware_path, NULL) \
param(char *, huc_firmware_path, NULL) \
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [v3,1/3] drm/i915/guc: Use intel_guc_init_misc to hide GuC internals
2018-06-28 14:15 [PATCH v3 1/3] drm/i915/guc: Use intel_guc_init_misc to hide GuC internals Michal Wajdeczko
2018-06-28 14:15 ` [PATCH v3 2/3] drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc specific init Michal Wajdeczko
2018-06-28 14:15 ` [PATCH v3 3/3] HAX enable GuC for CI Michal Wajdeczko
@ 2018-06-28 15:28 ` Patchwork
2018-06-28 18:20 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-06-28 21:44 ` [PATCH v3 1/3] " Michel Thierry
4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2018-06-28 15:28 UTC (permalink / raw)
To: Michal Wajdeczko; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v3,1/3] drm/i915/guc: Use intel_guc_init_misc to hide GuC internals
URL : https://patchwork.freedesktop.org/series/45593/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4397 -> Patchwork_9474 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/45593/revisions/1/mbox/
== Known issues ==
Here are the changes found in Patchwork_9474 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@gem_exec_gttfill@basic:
fi-byt-n2820: PASS -> FAIL (fdo#106744)
fdo#106744 https://bugs.freedesktop.org/show_bug.cgi?id=106744
== Participating hosts (44 -> 39) ==
Missing (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4397 -> Patchwork_9474
CI_DRM_4397: 7306233935b0e426454e8adcf09a8022faa03cbc @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9474: ccc231a5581546d05cf86d310ea71136487aeb73 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
ccc231a55815 HAX enable GuC for CI
9ebca05a1d0e drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc specific init
b30e7336f54d drm/i915/guc: Use intel_guc_init_misc to hide GuC internals
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9474/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✗ Fi.CI.IGT: failure for series starting with [v3,1/3] drm/i915/guc: Use intel_guc_init_misc to hide GuC internals
2018-06-28 14:15 [PATCH v3 1/3] drm/i915/guc: Use intel_guc_init_misc to hide GuC internals Michal Wajdeczko
` (2 preceding siblings ...)
2018-06-28 15:28 ` ✓ Fi.CI.BAT: success for series starting with [v3,1/3] drm/i915/guc: Use intel_guc_init_misc to hide GuC internals Patchwork
@ 2018-06-28 18:20 ` Patchwork
2018-06-28 21:19 ` Michal Wajdeczko
2018-06-28 21:44 ` [PATCH v3 1/3] " Michel Thierry
4 siblings, 1 reply; 10+ messages in thread
From: Patchwork @ 2018-06-28 18:20 UTC (permalink / raw)
To: Michal Wajdeczko; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v3,1/3] drm/i915/guc: Use intel_guc_init_misc to hide GuC internals
URL : https://patchwork.freedesktop.org/series/45593/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4397_full -> Patchwork_9474_full =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_9474_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9474_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9474_full:
=== IGT changes ===
==== Possible regressions ====
igt@drv_selftest@mock_contexts:
shard-apl: PASS -> DMESG-FAIL
shard-kbl: PASS -> DMESG-FAIL
shard-snb: PASS -> DMESG-FAIL
shard-hsw: PASS -> DMESG-FAIL
shard-glk: PASS -> DMESG-FAIL
igt@pm_rpm@debugfs-read:
shard-kbl: PASS -> DMESG-WARN +3
==== Warnings ====
igt@drv_selftest@live_evict:
shard-snb: PASS -> SKIP +13
igt@drv_selftest@live_execlists:
shard-hsw: PASS -> SKIP +13
igt@drv_selftest@live_objects:
shard-glk: PASS -> SKIP +6
igt@drv_selftest@live_requests:
shard-kbl: PASS -> SKIP +17
igt@drv_selftest@live_workarounds:
shard-apl: PASS -> SKIP +18
== Known issues ==
Here are the changes found in Patchwork_9474_full that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drv_suspend@shrink:
shard-apl: PASS -> FAIL (fdo#106886)
igt@gem_eio@execbuf:
shard-apl: PASS -> INCOMPLETE (fdo#103927) +1
igt@gem_exec_big:
shard-hsw: PASS -> INCOMPLETE (fdo#103540)
igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
shard-hsw: PASS -> FAIL (fdo#105767)
igt@kms_flip@flip-vs-expired-vblank:
shard-hsw: PASS -> FAIL (fdo#102887, fdo#105363)
igt@kms_flip@plain-flip-fb-recreate:
shard-glk: PASS -> FAIL (fdo#100368)
igt@perf_pmu@busy-accuracy-98-vcs1:
shard-snb: NOTRUN -> INCOMPLETE (fdo#105411)
igt@prime_busy@wait-hang-vebox:
shard-kbl: PASS -> INCOMPLETE (fdo#103665) +3
==== Possible fixes ====
igt@drv_selftest@live_gtt:
shard-glk: INCOMPLETE (k.org#198133, fdo#103359) -> SKIP
igt@gem_exec_schedule@preemptive-hang-render:
shard-snb: INCOMPLETE (fdo#105411) -> SKIP
igt@kms_flip@2x-flip-vs-expired-vblank:
shard-glk: FAIL (fdo#105363) -> PASS
igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
shard-glk: FAIL (fdo#100368) -> PASS
igt@kms_flip@flip-vs-expired-vblank:
shard-glk: FAIL (fdo#105189) -> PASS
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540
fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#105189 https://bugs.freedesktop.org/show_bug.cgi?id=105189
fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411
fdo#105767 https://bugs.freedesktop.org/show_bug.cgi?id=105767
fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886
k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133
== Participating hosts (5 -> 5) ==
No changes in participating hosts
== Build changes ==
* Linux: CI_DRM_4397 -> Patchwork_9474
CI_DRM_4397: 7306233935b0e426454e8adcf09a8022faa03cbc @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9474: ccc231a5581546d05cf86d310ea71136487aeb73 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9474/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: ✗ Fi.CI.IGT: failure for series starting with [v3,1/3] drm/i915/guc: Use intel_guc_init_misc to hide GuC internals
2018-06-28 18:20 ` ✗ Fi.CI.IGT: failure " Patchwork
@ 2018-06-28 21:19 ` Michal Wajdeczko
2018-06-28 21:42 ` Chris Wilson
0 siblings, 1 reply; 10+ messages in thread
From: Michal Wajdeczko @ 2018-06-28 21:19 UTC (permalink / raw)
To: Patchwork, intel-gfx
On Thu, 28 Jun 2018 20:20:11 +0200, Patchwork
<patchwork@emeril.freedesktop.org> wrote:
> == Series Details ==
>
> Series: series starting with [v3,1/3] drm/i915/guc: Use
> intel_guc_init_misc to hide GuC internals
> URL : https://patchwork.freedesktop.org/series/45593/
> State : failure
>
> == Summary ==
>
> = CI Bug Log - changes from CI_DRM_4397_full -> Patchwork_9474_full =
>
> == Summary - FAILURE ==
>
> Serious unknown changes coming with Patchwork_9474_full absolutely
> need to be
> verified manually.
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_9474_full, please notify your bug team to
> allow them
> to document this new failure mode, which will reduce false positives
> in CI.
>
>
> == Possible new issues ==
>
> Here are the unknown changes that may have been introduced in
> Patchwork_9474_full:
>
> === IGT changes ===
>
> ==== Possible regressions ====
>
> igt@drv_selftest@mock_contexts:
> shard-apl: PASS -> DMESG-FAIL
> shard-kbl: PASS -> DMESG-FAIL
> shard-snb: PASS -> DMESG-FAIL
> shard-hsw: PASS -> DMESG-FAIL
> shard-glk: PASS -> DMESG-FAIL
>
> igt@pm_rpm@debugfs-read:
> shard-kbl: PASS -> DMESG-WARN +3
>
all these issues are the same as with HAX alone - see [1]
[1] https://patchwork.freedesktop.org/series/40112/
> ==== Warnings ====
>
> igt@drv_selftest@live_evict:
> shard-snb: PASS -> SKIP +13
>
> igt@drv_selftest@live_execlists:
> shard-hsw: PASS -> SKIP +13
>
> igt@drv_selftest@live_objects:
> shard-glk: PASS -> SKIP +6
>
> igt@drv_selftest@live_requests:
> shard-kbl: PASS -> SKIP +17
>
> igt@drv_selftest@live_workarounds:
> shard-apl: PASS -> SKIP +18
>
> == Known issues ==
>
> Here are the changes found in Patchwork_9474_full that come from known
> issues:
>
> === IGT changes ===
>
> ==== Issues hit ====
>
> igt@drv_suspend@shrink:
> shard-apl: PASS -> FAIL (fdo#106886)
>
> igt@gem_eio@execbuf:
> shard-apl: PASS -> INCOMPLETE (fdo#103927) +1
>
> igt@gem_exec_big:
> shard-hsw: PASS -> INCOMPLETE (fdo#103540)
>
> igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
> shard-hsw: PASS -> FAIL (fdo#105767)
>
> igt@kms_flip@flip-vs-expired-vblank:
> shard-hsw: PASS -> FAIL (fdo#102887, fdo#105363)
>
> igt@kms_flip@plain-flip-fb-recreate:
> shard-glk: PASS -> FAIL (fdo#100368)
>
> igt@perf_pmu@busy-accuracy-98-vcs1:
> shard-snb: NOTRUN -> INCOMPLETE (fdo#105411)
>
> igt@prime_busy@wait-hang-vebox:
> shard-kbl: PASS -> INCOMPLETE (fdo#103665) +3
>
> ==== Possible fixes ====
>
> igt@drv_selftest@live_gtt:
> shard-glk: INCOMPLETE (k.org#198133, fdo#103359) -> SKIP
>
> igt@gem_exec_schedule@preemptive-hang-render:
> shard-snb: INCOMPLETE (fdo#105411) -> SKIP
>
> igt@kms_flip@2x-flip-vs-expired-vblank:
> shard-glk: FAIL (fdo#105363) -> PASS
>
> igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
> shard-glk: FAIL (fdo#100368) -> PASS
>
> igt@kms_flip@flip-vs-expired-vblank:
> shard-glk: FAIL (fdo#105189) -> PASS
>
> fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
> fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
> fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
> fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540
> fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
> fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
> fdo#105189 https://bugs.freedesktop.org/show_bug.cgi?id=105189
> fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
> fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411
> fdo#105767 https://bugs.freedesktop.org/show_bug.cgi?id=105767
> fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886
> k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133
>
>
> == Participating hosts (5 -> 5) ==
>
> No changes in participating hosts
>
>
> == Build changes ==
>
> * Linux: CI_DRM_4397 -> Patchwork_9474
>
> CI_DRM_4397: 7306233935b0e426454e8adcf09a8022faa03cbc @
> git://anongit.freedesktop.org/gfx-ci/linux
> IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @
> git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
> Patchwork_9474: ccc231a5581546d05cf86d310ea71136487aeb73 @
> git://anongit.freedesktop.org/gfx-ci/linux
> piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @
> git://anongit.freedesktop.org/piglit
>
> == Logs ==
>
> For more details see:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9474/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: ✗ Fi.CI.IGT: failure for series starting with [v3,1/3] drm/i915/guc: Use intel_guc_init_misc to hide GuC internals
2018-06-28 21:19 ` Michal Wajdeczko
@ 2018-06-28 21:42 ` Chris Wilson
0 siblings, 0 replies; 10+ messages in thread
From: Chris Wilson @ 2018-06-28 21:42 UTC (permalink / raw)
To: Michal Wajdeczko, Patchwork, intel-gfx
Quoting Michal Wajdeczko (2018-06-28 22:19:31)
> On Thu, 28 Jun 2018 20:20:11 +0200, Patchwork
> <patchwork@emeril.freedesktop.org> wrote:
>
> > == Series Details ==
> >
> > Series: series starting with [v3,1/3] drm/i915/guc: Use
> > intel_guc_init_misc to hide GuC internals
> > URL : https://patchwork.freedesktop.org/series/45593/
> > State : failure
> >
> > == Summary ==
> >
> > = CI Bug Log - changes from CI_DRM_4397_full -> Patchwork_9474_full =
> >
> > == Summary - FAILURE ==
> >
> > Serious unknown changes coming with Patchwork_9474_full absolutely
> > need to be
> > verified manually.
> > If you think the reported changes have nothing to do with the changes
> > introduced in Patchwork_9474_full, please notify your bug team to
> > allow them
> > to document this new failure mode, which will reduce false positives
> > in CI.
> >
> >
> > == Possible new issues ==
> >
> > Here are the unknown changes that may have been introduced in
> > Patchwork_9474_full:
> >
> > === IGT changes ===
> >
> > ==== Possible regressions ====
> >
> > igt@drv_selftest@mock_contexts:
> > shard-apl: PASS -> DMESG-FAIL
> > shard-kbl: PASS -> DMESG-FAIL
> > shard-snb: PASS -> DMESG-FAIL
> > shard-hsw: PASS -> DMESG-FAIL
> > shard-glk: PASS -> DMESG-FAIL
> >
> > igt@pm_rpm@debugfs-read:
> > shard-kbl: PASS -> DMESG-WARN +3
> >
>
> all these issues are the same as with HAX alone - see [1]
And still waiting for the fix ;)
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v3 1/3] drm/i915/guc: Use intel_guc_init_misc to hide GuC internals
2018-06-28 14:15 [PATCH v3 1/3] drm/i915/guc: Use intel_guc_init_misc to hide GuC internals Michal Wajdeczko
` (3 preceding siblings ...)
2018-06-28 18:20 ` ✗ Fi.CI.IGT: failure " Patchwork
@ 2018-06-28 21:44 ` Michel Thierry
2018-06-28 21:54 ` Chris Wilson
4 siblings, 1 reply; 10+ messages in thread
From: Michel Thierry @ 2018-06-28 21:44 UTC (permalink / raw)
To: Michal Wajdeczko, intel-gfx
On 6/28/2018 7:15 AM, Michal Wajdeczko wrote:
> We will add more init steps to misc phase and there is no need
> to expose them separately for use in uc_init_misc function.
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Michel Thierry <michel.thierry@intel.com>
> ---
> drivers/gpu/drm/i915/intel_guc.c | 28 ++++++++++++++++++++++++----
> drivers/gpu/drm/i915/intel_guc.h | 5 ++---
> drivers/gpu/drm/i915/intel_uc.c | 6 ++----
> 3 files changed, 28 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
> index f651e57..0b06f27 100644
> --- a/drivers/gpu/drm/i915/intel_guc.c
> +++ b/drivers/gpu/drm/i915/intel_guc.c
> @@ -27,6 +27,8 @@
> #include "intel_guc_submission.h"
> #include "i915_drv.h"
>
> +static void guc_init_ggtt_pin_bias(struct intel_guc *guc);
> +
> static void gen8_guc_raise_irq(struct intel_guc *guc)
> {
> struct drm_i915_private *dev_priv = guc_to_i915(guc);
> @@ -73,7 +75,7 @@ void intel_guc_init_early(struct intel_guc *guc)
> guc->notify = gen8_guc_raise_irq;
> }
>
> -int intel_guc_init_wq(struct intel_guc *guc)
> +static int guc_init_wq(struct intel_guc *guc)
> {
> struct drm_i915_private *dev_priv = guc_to_i915(guc);
>
> @@ -124,7 +126,7 @@ int intel_guc_init_wq(struct intel_guc *guc)
> return 0;
> }
>
> -void intel_guc_fini_wq(struct intel_guc *guc)
> +static void guc_fini_wq(struct intel_guc *guc)
> {
> struct drm_i915_private *dev_priv = guc_to_i915(guc);
>
> @@ -135,6 +137,24 @@ void intel_guc_fini_wq(struct intel_guc *guc)
> destroy_workqueue(guc->log.relay.flush_wq);
> }
>
> +int intel_guc_init_misc(struct intel_guc *guc)
So the pattern is to name static functions "guc_*" and non-static
functions "intel_guc_*"?
Reviewed-by: Michel Thierry <michel.thierry@intel.com>
> +{
> + int ret;
> +
> + guc_init_ggtt_pin_bias(guc);
> +
> + ret = guc_init_wq(guc);
> + if (ret)
> + return ret;
> +
> + return 0;
> +}
> +
> +void intel_guc_fini_misc(struct intel_guc *guc)
> +{
> + guc_fini_wq(guc);
> +}
> +
> static int guc_shared_data_create(struct intel_guc *guc)
> {
> struct i915_vma *vma;
> @@ -582,13 +602,13 @@ int intel_guc_resume(struct intel_guc *guc)
> */
>
> /**
> - * intel_guc_init_ggtt_pin_bias() - Initialize the GuC ggtt_pin_bias value.
> + * guc_init_ggtt_pin_bias() - Initialize the GuC ggtt_pin_bias value.
> * @guc: intel_guc structure.
> *
> * This function will calculate and initialize the ggtt_pin_bias value based on
> * overall WOPCM size and GuC WOPCM size.
> */
> -void intel_guc_init_ggtt_pin_bias(struct intel_guc *guc)
> +static void guc_init_ggtt_pin_bias(struct intel_guc *guc)
> {
> struct drm_i915_private *i915 = guc_to_i915(guc);
>
> diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
> index f1265e1..4121928 100644
> --- a/drivers/gpu/drm/i915/intel_guc.h
> +++ b/drivers/gpu/drm/i915/intel_guc.h
> @@ -151,11 +151,10 @@ static inline u32 intel_guc_ggtt_offset(struct intel_guc *guc,
> void intel_guc_init_early(struct intel_guc *guc);
> void intel_guc_init_send_regs(struct intel_guc *guc);
> void intel_guc_init_params(struct intel_guc *guc);
> -void intel_guc_init_ggtt_pin_bias(struct intel_guc *guc);
> -int intel_guc_init_wq(struct intel_guc *guc);
> -void intel_guc_fini_wq(struct intel_guc *guc);
> +int intel_guc_init_misc(struct intel_guc *guc);
> int intel_guc_init(struct intel_guc *guc);
> void intel_guc_fini(struct intel_guc *guc);
> +void intel_guc_fini_misc(struct intel_guc *guc);
> int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len,
> u32 *response_buf, u32 response_buf_size);
> int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len,
> diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
> index 94e8863..cd49b4f 100644
> --- a/drivers/gpu/drm/i915/intel_uc.c
> +++ b/drivers/gpu/drm/i915/intel_uc.c
> @@ -257,9 +257,7 @@ int intel_uc_init_misc(struct drm_i915_private *i915)
> if (!USES_GUC(i915))
> return 0;
>
> - intel_guc_init_ggtt_pin_bias(guc);
> -
> - ret = intel_guc_init_wq(guc);
> + ret = intel_guc_init_misc(guc);
> if (ret)
> return ret;
>
> @@ -273,7 +271,7 @@ void intel_uc_fini_misc(struct drm_i915_private *i915)
> if (!USES_GUC(i915))
> return;
>
> - intel_guc_fini_wq(guc);
> + intel_guc_fini_misc(guc);
> }
>
> int intel_uc_init(struct drm_i915_private *i915)
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v3 1/3] drm/i915/guc: Use intel_guc_init_misc to hide GuC internals
2018-06-28 21:44 ` [PATCH v3 1/3] " Michel Thierry
@ 2018-06-28 21:54 ` Chris Wilson
0 siblings, 0 replies; 10+ messages in thread
From: Chris Wilson @ 2018-06-28 21:54 UTC (permalink / raw)
To: Michel Thierry, Michal Wajdeczko, intel-gfx
Quoting Michel Thierry (2018-06-28 22:44:43)
> On 6/28/2018 7:15 AM, Michal Wajdeczko wrote:
> > We will add more init steps to misc phase and there is no need
> > to expose them separately for use in uc_init_misc function.
> >
> > Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> > Cc: Michel Thierry <michel.thierry@intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_guc.c | 28 ++++++++++++++++++++++++----
> > drivers/gpu/drm/i915/intel_guc.h | 5 ++---
> > drivers/gpu/drm/i915/intel_uc.c | 6 ++----
> > 3 files changed, 28 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
> > index f651e57..0b06f27 100644
> > --- a/drivers/gpu/drm/i915/intel_guc.c
> > +++ b/drivers/gpu/drm/i915/intel_guc.c
> > @@ -27,6 +27,8 @@
> > #include "intel_guc_submission.h"
> > #include "i915_drv.h"
> >
> > +static void guc_init_ggtt_pin_bias(struct intel_guc *guc);
> > +
> > static void gen8_guc_raise_irq(struct intel_guc *guc)
> > {
> > struct drm_i915_private *dev_priv = guc_to_i915(guc);
> > @@ -73,7 +75,7 @@ void intel_guc_init_early(struct intel_guc *guc)
> > guc->notify = gen8_guc_raise_irq;
> > }
> >
> > -int intel_guc_init_wq(struct intel_guc *guc)
> > +static int guc_init_wq(struct intel_guc *guc)
> > {
> > struct drm_i915_private *dev_priv = guc_to_i915(guc);
> >
> > @@ -124,7 +126,7 @@ int intel_guc_init_wq(struct intel_guc *guc)
> > return 0;
> > }
> >
> > -void intel_guc_fini_wq(struct intel_guc *guc)
> > +static void guc_fini_wq(struct intel_guc *guc)
> > {
> > struct drm_i915_private *dev_priv = guc_to_i915(guc);
> >
> > @@ -135,6 +137,24 @@ void intel_guc_fini_wq(struct intel_guc *guc)
> > destroy_workqueue(guc->log.relay.flush_wq);
> > }
> >
> > +int intel_guc_init_misc(struct intel_guc *guc)
>
> So the pattern is to name static functions "guc_*" and non-static
> functions "intel_guc_*"?
Yup, seems to be working out reasonably around the place.
> Reviewed-by: Michel Thierry <michel.thierry@intel.com>
Thanks for the review and patches, pushed.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v3 2/3] drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc specific init
2018-06-28 14:15 ` [PATCH v3 2/3] drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc specific init Michal Wajdeczko
@ 2018-06-28 21:56 ` Michel Thierry
0 siblings, 0 replies; 10+ messages in thread
From: Michel Thierry @ 2018-06-28 21:56 UTC (permalink / raw)
To: Michal Wajdeczko, intel-gfx
On 6/28/2018 7:15 AM, Michal Wajdeczko wrote:
> We're fetching GuC/HuC firmwares directly from uc level during
> init_early stage but this breaks guc/huc struct isolation and
> also strict SW-only initialization rule for init_early. Move fw
> fetching to init phase and do it separately per guc/huc struct.
>
> v2: don't forget to move wopcm_init - Michele
> v3: fetch in init_misc phase - Michal
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Michel Thierry <michel.thierry@intel.com>
> Reviewed-by: Michel Thierry <michel.thierry@intel.com> #2
R-b stands for v3
> ---
> drivers/gpu/drm/i915/i915_gem.c | 7 ++++---
> drivers/gpu/drm/i915/intel_guc.c | 9 ++++++++-
> drivers/gpu/drm/i915/intel_huc.c | 8 ++++++++
> drivers/gpu/drm/i915/intel_huc.h | 6 ++++++
> drivers/gpu/drm/i915/intel_uc.c | 28 +++++++++++++++-------------
> 5 files changed, 41 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 5a9cae6..8954db6 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -5459,13 +5459,13 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
> if (ret)
> return ret;
>
> - ret = intel_wopcm_init(&dev_priv->wopcm);
> + ret = intel_uc_init_misc(dev_priv);
> if (ret)
> return ret;
>
> - ret = intel_uc_init_misc(dev_priv);
> + ret = intel_wopcm_init(&dev_priv->wopcm);
> if (ret)
> - return ret;
> + goto err_uc_misc;
>
> /* This is just a security blanket to placate dragons.
> * On some systems, we very sporadically observe that the first TLBs
> @@ -5563,6 +5563,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
> intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
> mutex_unlock(&dev_priv->drm.struct_mutex);
>
> +err_uc_misc:
> intel_uc_fini_misc(dev_priv);
>
> if (ret != -EIO)
> diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
> index 0b06f27..53b43bc 100644
> --- a/drivers/gpu/drm/i915/intel_guc.c
> +++ b/drivers/gpu/drm/i915/intel_guc.c
> @@ -139,6 +139,7 @@ static void guc_fini_wq(struct intel_guc *guc)
>
> int intel_guc_init_misc(struct intel_guc *guc)
> {
> + struct drm_i915_private *i915 = guc_to_i915(guc);
> int ret;
>
> guc_init_ggtt_pin_bias(guc);
> @@ -147,11 +148,14 @@ int intel_guc_init_misc(struct intel_guc *guc)
> if (ret)
> return ret;
>
> + intel_uc_fw_fetch(i915, &guc->fw);
> +
> return 0;
> }
>
> void intel_guc_fini_misc(struct intel_guc *guc)
> {
> + intel_uc_fw_fini(&guc->fw);
> guc_fini_wq(guc);
> }
>
> @@ -189,7 +193,7 @@ int intel_guc_init(struct intel_guc *guc)
>
> ret = guc_shared_data_create(guc);
> if (ret)
> - return ret;
> + goto err_fetch;
> GEM_BUG_ON(!guc->shared_data);
>
> ret = intel_guc_log_create(&guc->log);
> @@ -210,6 +214,8 @@ int intel_guc_init(struct intel_guc *guc)
> intel_guc_log_destroy(&guc->log);
> err_shared:
> guc_shared_data_destroy(guc);
> +err_fetch:
> + intel_uc_fw_fini(&guc->fw);
> return ret;
> }
>
> @@ -221,6 +227,7 @@ void intel_guc_fini(struct intel_guc *guc)
> intel_guc_ads_destroy(guc);
> intel_guc_log_destroy(&guc->log);
> guc_shared_data_destroy(guc);
> + intel_uc_fw_fini(&guc->fw);
> }
>
> static u32 guc_ctl_debug_flags(struct intel_guc *guc)
> diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c
> index 2912852..ffcad5f 100644
> --- a/drivers/gpu/drm/i915/intel_huc.c
> +++ b/drivers/gpu/drm/i915/intel_huc.c
> @@ -32,6 +32,14 @@ void intel_huc_init_early(struct intel_huc *huc)
> intel_huc_fw_init_early(huc);
> }
>
> +int intel_huc_init_misc(struct intel_huc *huc)
> +{
> + struct drm_i915_private *i915 = huc_to_i915(huc);
> +
> + intel_uc_fw_fetch(i915, &huc->fw);
> + return 0;
> +}
> +
> /**
> * intel_huc_auth() - Authenticate HuC uCode
> * @huc: intel_huc structure
> diff --git a/drivers/gpu/drm/i915/intel_huc.h b/drivers/gpu/drm/i915/intel_huc.h
> index aa85490..7e41d87 100644
> --- a/drivers/gpu/drm/i915/intel_huc.h
> +++ b/drivers/gpu/drm/i915/intel_huc.h
> @@ -36,9 +36,15 @@ struct intel_huc {
> };
>
> void intel_huc_init_early(struct intel_huc *huc);
> +int intel_huc_init_misc(struct intel_huc *huc);
> int intel_huc_auth(struct intel_huc *huc);
> int intel_huc_check_status(struct intel_huc *huc);
>
> +static inline void intel_huc_fini_misc(struct intel_huc *huc)
> +{
> + intel_uc_fw_fini(&huc->fw);
> +}
> +
> static inline int intel_huc_sanitize(struct intel_huc *huc)
> {
> intel_uc_fw_sanitize(&huc->fw);
> diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
> index cd49b4f..7c95697 100644
> --- a/drivers/gpu/drm/i915/intel_uc.c
> +++ b/drivers/gpu/drm/i915/intel_uc.c
> @@ -171,24 +171,11 @@ void intel_uc_init_early(struct drm_i915_private *i915)
> intel_huc_init_early(huc);
>
> sanitize_options_early(i915);
> -
> - if (USES_GUC(i915))
> - intel_uc_fw_fetch(i915, &guc->fw);
> -
> - if (USES_HUC(i915))
> - intel_uc_fw_fetch(i915, &huc->fw);
> }
>
> void intel_uc_cleanup_early(struct drm_i915_private *i915)
> {
> struct intel_guc *guc = &i915->guc;
> - struct intel_huc *huc = &i915->huc;
> -
> - if (USES_HUC(i915))
> - intel_uc_fw_fini(&huc->fw);
> -
> - if (USES_GUC(i915))
> - intel_uc_fw_fini(&guc->fw);
>
> guc_free_load_err_log(guc);
> }
> @@ -252,6 +239,7 @@ static void guc_disable_communication(struct intel_guc *guc)
> int intel_uc_init_misc(struct drm_i915_private *i915)
> {
> struct intel_guc *guc = &i915->guc;
> + struct intel_huc *huc = &i915->huc;
> int ret;
>
> if (!USES_GUC(i915))
> @@ -261,16 +249,30 @@ int intel_uc_init_misc(struct drm_i915_private *i915)
> if (ret)
> return ret;
>
> + if (USES_HUC(i915)) {
> + ret = intel_huc_init_misc(huc);
> + if (ret)
> + goto err_guc;
> + }
> +
> return 0;
> +
> +err_guc:
> + intel_guc_fini_misc(guc);
> + return ret;
> }
>
> void intel_uc_fini_misc(struct drm_i915_private *i915)
> {
> struct intel_guc *guc = &i915->guc;
> + struct intel_huc *huc = &i915->huc;
>
> if (!USES_GUC(i915))
> return;
>
> + if (USES_HUC(i915))
> + intel_huc_fini_misc(huc);
> +
> intel_guc_fini_misc(guc);
> }
>
>
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^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2018-06-28 21:56 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-06-28 14:15 [PATCH v3 1/3] drm/i915/guc: Use intel_guc_init_misc to hide GuC internals Michal Wajdeczko
2018-06-28 14:15 ` [PATCH v3 2/3] drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc specific init Michal Wajdeczko
2018-06-28 21:56 ` Michel Thierry
2018-06-28 14:15 ` [PATCH v3 3/3] HAX enable GuC for CI Michal Wajdeczko
2018-06-28 15:28 ` ✓ Fi.CI.BAT: success for series starting with [v3,1/3] drm/i915/guc: Use intel_guc_init_misc to hide GuC internals Patchwork
2018-06-28 18:20 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-06-28 21:19 ` Michal Wajdeczko
2018-06-28 21:42 ` Chris Wilson
2018-06-28 21:44 ` [PATCH v3 1/3] " Michel Thierry
2018-06-28 21:54 ` Chris Wilson
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