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From: Patchwork <patchwork@emeril.freedesktop.org>
To: Manasi Navare <manasi.d.navare@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/2] drm/i915/icl: Add remaining registers and bitfields for MG PHY DDI
Date: Thu, 28 Jun 2018 23:26:13 -0000	[thread overview]
Message-ID: <20180628232613.19698.66595@emeril.freedesktop.org> (raw)
In-Reply-To: <1530225344-20373-1-git-send-email-manasi.d.navare@intel.com>

== Series Details ==

Series: series starting with [v2,1/2] drm/i915/icl: Add remaining registers and bitfields for MG PHY DDI
URL   : https://patchwork.freedesktop.org/series/45623/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
d33376c8e4f5 drm/i915/icl: Add remaining registers and bitfields for MG PHY DDI
-:33: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'ln0p1' - possible side-effects?
#33: FILE: drivers/gpu/drm/i915/i915_reg.h:1875:
+#define MG_PHY_PORT_LN(port, ln, ln0p1, ln0p2, ln1p1) \
 	_MMIO(_PORT((port) - PORT_C, ln0p1, ln0p2) + (ln) * ((ln1p1) - (ln0p1)))

total: 0 errors, 0 warnings, 1 checks, 266 lines checked
8ab9898f17b1 drm/i915/icl: Implement voltage swing programming sequence for MG PHY DDI
-:79: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#79: FILE: drivers/gpu/drm/i915/intel_ddi.c:2496:
+		val |= CRI_TXDEEMPH_OVERRIDE_17_12(

-:85: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#85: FILE: drivers/gpu/drm/i915/intel_ddi.c:2502:
+		val |= CRI_TXDEEMPH_OVERRIDE_17_12(

-:95: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#95: FILE: drivers/gpu/drm/i915/intel_ddi.c:2512:
+		val |= CRI_TXDEEMPH_OVERRIDE_5_0(

-:97: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#97: FILE: drivers/gpu/drm/i915/intel_ddi.c:2514:
+			CRI_TXDEEMPH_OVERRIDE_11_6(

-:105: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#105: FILE: drivers/gpu/drm/i915/intel_ddi.c:2522:
+		val |= CRI_TXDEEMPH_OVERRIDE_5_0(

-:107: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#107: FILE: drivers/gpu/drm/i915/intel_ddi.c:2524:
+			CRI_TXDEEMPH_OVERRIDE_11_6(

total: 0 errors, 0 warnings, 6 checks, 165 lines checked

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  parent reply	other threads:[~2018-06-28 23:26 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-28 22:35 [PATCH v2 1/2] drm/i915/icl: Add remaining registers and bitfields for MG PHY DDI Manasi Navare
2018-06-28 22:35 ` [PATCH v2 2/2] drm/i915/icl: Implement voltage swing programming sequence " Manasi Navare
2018-07-16 23:48   ` Paulo Zanoni
2018-06-28 23:26 ` Patchwork [this message]
2018-06-28 23:42 ` ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915/icl: Add remaining registers and bitfields " Patchwork
2018-06-29  5:46 ` ✓ Fi.CI.IGT: " Patchwork
2018-06-29 20:47 ` [PATCH v2 1/2] " Srivatsa, Anusha
2018-06-29 21:33 ` ✗ Fi.CI.BAT: failure for series starting with [v2,1/2] drm/i915/icl: Add remaining registers and bitfields for MG PHY DDI (rev2) Patchwork
2018-07-03 18:07 ` [PATCH v2 1/2] drm/i915/icl: Add remaining registers and bitfields for MG PHY DDI Srivatsa, Anusha
2018-07-13  0:00 ` Paulo Zanoni
2018-07-13 18:44   ` Manasi Navare
2018-07-13 19:43 ` [PATCH v3] " Manasi Navare
2018-07-16 21:01   ` Paulo Zanoni
2018-07-13 19:50 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3] drm/i915/icl: Add remaining registers and bitfields for MG PHY DDI (rev3) Patchwork
2018-07-13 20:06 ` ✓ Fi.CI.BAT: success " Patchwork

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