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From: Patchwork <patchwork@emeril.freedesktop.org>
To: Manasi Navare <manasi.d.navare@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915/icl: Add remaining registers and bitfields for MG PHY DDI
Date: Thu, 28 Jun 2018 23:42:17 -0000	[thread overview]
Message-ID: <20180628234217.19700.44605@emeril.freedesktop.org> (raw)
In-Reply-To: <1530225344-20373-1-git-send-email-manasi.d.navare@intel.com>

== Series Details ==

Series: series starting with [v2,1/2] drm/i915/icl: Add remaining registers and bitfields for MG PHY DDI
URL   : https://patchwork.freedesktop.org/series/45623/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4402 -> Patchwork_9478 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/45623/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_9478 that come from known issues:

  === IGT changes ===

    ==== Possible fixes ====

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      fi-snb-2520m:       INCOMPLETE (fdo#103713) -> PASS

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
      fi-bxt-dsi:         INCOMPLETE (fdo#103927) -> PASS

    
  fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
  fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927


== Participating hosts (43 -> 39) ==

  Missing    (4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u 


== Build changes ==

    * Linux: CI_DRM_4402 -> Patchwork_9478

  CI_DRM_4402: 5897aa5f98a6519589af4ef97ef7e599209f91ad @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4531: a14bc8b4d69eaca189665de505e6b10cbfbb7730 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9478: 8ab9898f17b129bc287b09c4bc0400510cee5523 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

8ab9898f17b1 drm/i915/icl: Implement voltage swing programming sequence for MG PHY DDI
d33376c8e4f5 drm/i915/icl: Add remaining registers and bitfields for MG PHY DDI

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9478/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2018-06-28 23:42 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-28 22:35 [PATCH v2 1/2] drm/i915/icl: Add remaining registers and bitfields for MG PHY DDI Manasi Navare
2018-06-28 22:35 ` [PATCH v2 2/2] drm/i915/icl: Implement voltage swing programming sequence " Manasi Navare
2018-07-16 23:48   ` Paulo Zanoni
2018-06-28 23:26 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/2] drm/i915/icl: Add remaining registers and bitfields " Patchwork
2018-06-28 23:42 ` Patchwork [this message]
2018-06-29  5:46 ` ✓ Fi.CI.IGT: success " Patchwork
2018-06-29 20:47 ` [PATCH v2 1/2] " Srivatsa, Anusha
2018-06-29 21:33 ` ✗ Fi.CI.BAT: failure for series starting with [v2,1/2] drm/i915/icl: Add remaining registers and bitfields for MG PHY DDI (rev2) Patchwork
2018-07-03 18:07 ` [PATCH v2 1/2] drm/i915/icl: Add remaining registers and bitfields for MG PHY DDI Srivatsa, Anusha
2018-07-13  0:00 ` Paulo Zanoni
2018-07-13 18:44   ` Manasi Navare
2018-07-13 19:43 ` [PATCH v3] " Manasi Navare
2018-07-16 21:01   ` Paulo Zanoni
2018-07-13 19:50 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3] drm/i915/icl: Add remaining registers and bitfields for MG PHY DDI (rev3) Patchwork
2018-07-13 20:06 ` ✓ Fi.CI.BAT: success " Patchwork

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