* [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze
@ 2018-06-30 6:09 Paolo Bonzini
2018-06-30 6:09 ` [Qemu-devel] [PULL 01/47] i386/kvm: add support for Hyper-V TLB flush Paolo Bonzini
` (47 more replies)
0 siblings, 48 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:09 UTC (permalink / raw)
To: qemu-devel
The following changes since commit 109b25045b3651f9c5d02c3766c0b3ff63e6d193:
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging (2018-06-29 12:30:29 +0100)
are available in the git repository at:
git://github.com/bonzini/qemu.git tags/for-upstream
for you to fetch changes up to 633e23f138f04ce776feaef78042901af883eafe:
serial: Open non-block (2018-06-29 17:31:08 +0200)
----------------------------------------------------------------
* IEC units series (Philippe)
* Hyper-V PV TLB flush (Vitaly)
* git archive detection (Daniel)
* host serial passthrough fix (David)
----------------------------------------------------------------
Daniel P. Berrangé (1):
configure: add sanity check to catch builds from "git archive"
Dr. David Alan Gilbert (1):
serial: Open non-block
Paolo Bonzini (1):
hw/i386: Use the IEC binary prefix definitions
Philippe Mathieu-Daudé (43):
include: Add IEC binary prefixes in "qemu/units.h"
vdi: Use definitions from "qemu/units.h"
x86/cpu: Use definitions from "qemu/units.h"
checkpatch: Recognize IEC binary prefix definitions
hw: Use IEC binary prefix definitions from "qemu/units.h"
hw: Directly use "qemu/units.h" instead of "qemu/cutils.h"
hw/ivshmem: Use the IEC binary prefix definitions
hw/ipack: Use the IEC binary prefix definitions
hw/scsi: Use the IEC binary prefix definitions
hw/smbios: Use the IEC binary prefix definitions
hw/xen: Use the IEC binary prefix definitions
hw/tpm: Use the IEC binary prefix definitions
hw/block: Use the IEC binary prefix definitions
hw/display: Use the IEC binary prefix definitions
hw/misc: Use the IEC binary prefix definitions
hw/riscv: Use the IEC binary prefix definitions
hw/m68k: Use the IEC binary prefix definitions
hw/sparc: Use the IEC binary prefix definitions
hw/s390x: Use the IEC binary prefix definitions
hw/hppa: Use the IEC binary prefix definitions
hw/xtensa: Use the IEC binary prefix definitions
hw/alpha: Use the IEC binary prefix definitions
hw/tricore: Use the IEC binary prefix definitions
hw/microblaze: Use the IEC binary prefix definitions
hw/nios2: Use the IEC binary prefix definitions
hw/cris: Use the IEC binary prefix definitions
hw/lm32: Use the IEC binary prefix definitions
hw/sh4: Use the IEC binary prefix definitions
hw/mips/r4k: Constify params_size
hw/mips: Use the IEC binary prefix definitions
hw/ppc: Use the IEC binary prefix definitions
hw/net: Use the IEC binary prefix definitions
hw/usb: Use the IEC binary prefix definitions
hw/sd: Use the IEC binary prefix definitions
hw/vfio: Use the IEC binary prefix definitions
hw/virtio: Use the IEC binary prefix definitions
hw/rdma: Use the IEC binary prefix definitions
cutils: Do not include "qemu/units.h" directly
monitor: Use the IEC binary prefix definitions
vl: Use the IEC binary prefix definitions
tests/crypto: Use the IEC binary prefix definitions
linux-user: Use the IEC binary prefix definitions
bsd-user: Use the IEC binary prefix definitions
Vitaly Kuznetsov (1):
i386/kvm: add support for Hyper-V TLB flush
block/vdi.c | 7 +++----
bsd-user/main.c | 5 +++--
chardev/char-serial.c | 3 ++-
configure | 18 ++++++++++++++++++
hw/alpha/typhoon.c | 17 ++++++++---------
hw/arm/msf2-soc.c | 6 +++---
hw/arm/msf2-som.c | 8 ++++----
hw/block/m25p80.c | 5 +++--
hw/block/nvme.c | 3 ++-
hw/block/tc58128.c | 3 ++-
hw/block/xen_disk.c | 3 ++-
hw/core/loader-fit.c | 3 ++-
hw/core/machine.c | 4 ++--
hw/cris/axis_dev88.c | 3 ++-
hw/display/bochs-display.c | 9 +++++----
hw/display/cirrus_vga.c | 10 +++++-----
hw/display/g364fb.c | 4 ++--
hw/display/qxl.c | 30 ++++++++++++++----------------
hw/display/sm501.c | 16 ++++++++--------
hw/display/vga-isa-mm.c | 5 +++--
hw/display/vga.c | 5 +++--
hw/display/virtio-gpu.c | 4 ++--
hw/display/vmware_vga.c | 3 ++-
hw/display/xenfb.c | 3 ++-
hw/hppa/dino.c | 3 ++-
hw/hppa/machine.c | 12 ++++++------
hw/i386/acpi-build.c | 4 ++--
hw/i386/pc.c | 23 ++++++++++++-----------
hw/i386/pc_piix.c | 3 ++-
hw/i386/pc_q35.c | 3 ++-
hw/i386/pc_sysfw.c | 10 ++++------
hw/i386/xen/xen-mapcache.c | 3 ++-
hw/ipack/tpci200.c | 5 +++--
hw/lm32/lm32_boards.c | 13 +++++++------
hw/lm32/milkymist.c | 10 +++++-----
hw/m68k/mcf5208.c | 3 ++-
hw/microblaze/petalogix_ml605_mmu.c | 7 ++++---
hw/microblaze/petalogix_s3adsp1800_mmu.c | 7 ++++---
hw/mips/boston.c | 30 +++++++++++++++---------------
hw/mips/mips_fulong2e.c | 7 ++++---
hw/mips/mips_malta.c | 25 ++++++++++++++-----------
hw/mips/mips_r4k.c | 15 ++++++++-------
hw/misc/auxbus.c | 3 ++-
hw/misc/edu.c | 3 ++-
hw/misc/ivshmem.c | 3 ++-
hw/misc/mips_itu.c | 3 ++-
hw/net/e1000e.c | 7 ++++---
hw/net/e1000x_common.c | 3 ++-
hw/net/eepro100.c | 3 +--
hw/net/ne2000.h | 5 +++--
hw/nios2/boot.c | 6 +++---
hw/nvram/spapr_nvram.c | 11 +++++++----
hw/pci-host/prep.c | 3 ++-
hw/pci-host/xilinx-pcie.c | 5 +++--
hw/ppc/e500.c | 13 +++++++------
hw/ppc/e500plat.c | 3 ++-
hw/ppc/mac.h | 3 ++-
hw/ppc/mac_newworld.c | 1 -
hw/ppc/mac_oldworld.c | 9 ++++-----
hw/ppc/pnv.c | 6 +++---
hw/ppc/ppc405_boards.c | 9 +++++----
hw/ppc/ppc405_uc.c | 7 ++++---
hw/ppc/ppc440_bamboo.c | 5 +++--
hw/ppc/ppc440_uc.c | 28 ++++++++++++++--------------
hw/ppc/ppc4xx_devs.c | 22 ++++++++++++----------
hw/ppc/ppce500_spin.c | 3 ++-
hw/ppc/prep.c | 6 +++---
hw/ppc/rs6000_mc.c | 13 +++++++------
hw/ppc/sam460ex.c | 18 +++++++++---------
hw/ppc/spapr.c | 18 +++++++++---------
hw/ppc/spapr_rtas.c | 4 ++--
hw/ppc/virtex_ml507.c | 7 ++++---
hw/rdma/vmw/pvrdma.h | 3 ++-
hw/riscv/virt.c | 3 ++-
hw/s390x/s390-skeys.c | 3 ++-
hw/s390x/s390-stattrib.c | 3 ++-
hw/s390x/sclp.c | 3 ++-
hw/scsi/scsi-disk.c | 9 +++++----
hw/sd/sd.c | 8 ++++----
hw/sd/sdhci.c | 8 ++++----
hw/sh4/r2d.c | 3 ++-
hw/smbios/smbios.c | 15 ++++++---------
hw/sparc/leon3.c | 10 ++++++----
hw/sparc/sun4m.c | 10 +++++-----
hw/sparc64/niagara.c | 3 ++-
hw/sparc64/sun4u.c | 4 ++--
hw/tricore/tricore_testboard.c | 13 +++++++------
hw/usb/ccid-card-passthru.c | 9 +++++----
hw/usb/combined-packet.c | 3 ++-
hw/usb/dev-smartcard-reader.c | 3 ++-
hw/usb/redirect.c | 3 ++-
hw/vfio/pci-quirks.c | 9 +++++----
hw/vfio/pci.c | 3 ++-
hw/xenpv/xen_domainbuild.c | 13 +++++++------
hw/xtensa/xtfpga.c | 9 +++++----
include/hw/acpi/tpm.h | 3 ++-
include/hw/display/xlnx_dp.h | 5 +++--
include/hw/intc/mips_gic.h | 3 ++-
include/hw/mips/bios.h | 3 ++-
include/hw/net/allwinner_emac.h | 5 +++--
include/hw/ppc/spapr.h | 5 +++--
include/hw/virtio/virtio-net.h | 3 ++-
include/qemu/cutils.h | 7 -------
include/qemu/units.h | 20 ++++++++++++++++++++
linux-user/main.c | 5 +++--
monitor.c | 3 ++-
scripts/checkpatch.pl | 1 +
target/i386/cpu.c | 5 ++---
target/i386/cpu.h | 1 +
target/i386/hyperv-proto.h | 1 +
target/i386/kvm.c | 15 ++++++++++++++-
target/ppc/mmu_helper.c | 8 ++++----
target/xtensa/helper.c | 5 +++--
tests/benchmark-crypto-cipher.c | 6 +++---
tests/benchmark-crypto-hash.c | 5 +++--
tests/benchmark-crypto-hmac.c | 6 +++---
tests/test-cutils.c | 19 ++++++++++---------
tests/test-keyval.c | 6 +++---
tests/test-qemu-opts.c | 7 +++----
vl.c | 5 +++--
120 files changed, 504 insertions(+), 388 deletions(-)
create mode 100644 include/qemu/units.h
--
1.8.3.1
^ permalink raw reply [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 01/47] i386/kvm: add support for Hyper-V TLB flush
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
@ 2018-06-30 6:09 ` Paolo Bonzini
2018-06-30 6:09 ` [Qemu-devel] [PULL 02/47] configure: add sanity check to catch builds from "git archive" Paolo Bonzini
` (46 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:09 UTC (permalink / raw)
To: qemu-devel; +Cc: Vitaly Kuznetsov
From: Vitaly Kuznetsov <vkuznets@redhat.com>
Add support for Hyper-V TLB flush which recently got added to KVM.
Just like regular Hyper-V we announce HV_EX_PROCESSOR_MASKS_RECOMMENDED
regardless of how many vCPUs we have. Windows is 'smart' and uses less
expensive non-EX Hypercall whenever possible (when it wants to flush TLB
for all vCPUs or the maximum vCPU index in the vCPU set requires flushing
is less than 64).
Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Message-Id: <20180610184927.19309-1-vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/cpu.c | 1 +
target/i386/cpu.h | 1 +
target/i386/hyperv-proto.h | 1 +
target/i386/kvm.c | 15 ++++++++++++++-
4 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 1e6a7d0..d57f310 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -5415,6 +5415,7 @@ static Property x86_cpu_properties[] = {
DEFINE_PROP_BOOL("hv-stimer", X86CPU, hyperv_stimer, false),
DEFINE_PROP_BOOL("hv-frequencies", X86CPU, hyperv_frequencies, false),
DEFINE_PROP_BOOL("hv-reenlightenment", X86CPU, hyperv_reenlightenment, false),
+ DEFINE_PROP_BOOL("hv-tlbflush", X86CPU, hyperv_tlbflush, false),
DEFINE_PROP_BOOL("check", X86CPU, check_cpuid, true),
DEFINE_PROP_BOOL("enforce", X86CPU, enforce_cpuid, false),
DEFINE_PROP_BOOL("kvm", X86CPU, expose_kvm, true),
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 8eaefee..8b1ddfe 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1367,6 +1367,7 @@ struct X86CPU {
bool hyperv_stimer;
bool hyperv_frequencies;
bool hyperv_reenlightenment;
+ bool hyperv_tlbflush;
bool check_cpuid;
bool enforce_cpuid;
bool expose_kvm;
diff --git a/target/i386/hyperv-proto.h b/target/i386/hyperv-proto.h
index 93352eb..d6d5a79 100644
--- a/target/i386/hyperv-proto.h
+++ b/target/i386/hyperv-proto.h
@@ -58,6 +58,7 @@
#define HV_APIC_ACCESS_RECOMMENDED (1u << 3)
#define HV_SYSTEM_RESET_RECOMMENDED (1u << 4)
#define HV_RELAXED_TIMING_RECOMMENDED (1u << 5)
+#define HV_EX_PROCESSOR_MASKS_RECOMMENDED (1u << 11)
/*
* Basic virtualized MSRs
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index 032f0ad..ebb2d23 100644
--- a/target/i386/kvm.c
+++ b/target/i386/kvm.c
@@ -601,7 +601,8 @@ static bool hyperv_enabled(X86CPU *cpu)
cpu->hyperv_runtime ||
cpu->hyperv_synic ||
cpu->hyperv_stimer ||
- cpu->hyperv_reenlightenment);
+ cpu->hyperv_reenlightenment ||
+ cpu->hyperv_tlbflush);
}
static int kvm_arch_set_tsc_khz(CPUState *cs)
@@ -839,6 +840,18 @@ int kvm_arch_init_vcpu(CPUState *cs)
if (cpu->hyperv_vapic) {
c->eax |= HV_APIC_ACCESS_RECOMMENDED;
}
+ if (cpu->hyperv_tlbflush) {
+ if (kvm_check_extension(cs->kvm_state,
+ KVM_CAP_HYPERV_TLBFLUSH) <= 0) {
+ fprintf(stderr, "Hyper-V TLB flush support "
+ "(requested by 'hv-tlbflush' cpu flag) "
+ " is not supported by kernel\n");
+ return -ENOSYS;
+ }
+ c->eax |= HV_REMOTE_TLB_FLUSH_RECOMMENDED;
+ c->eax |= HV_EX_PROCESSOR_MASKS_RECOMMENDED;
+ }
+
c->ebx = cpu->hyperv_spinlock_attempts;
c = &cpuid_data.entries[cpuid_i++];
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 02/47] configure: add sanity check to catch builds from "git archive"
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
2018-06-30 6:09 ` [Qemu-devel] [PULL 01/47] i386/kvm: add support for Hyper-V TLB flush Paolo Bonzini
@ 2018-06-30 6:09 ` Paolo Bonzini
2018-06-30 6:09 ` [Qemu-devel] [PULL 03/47] include: Add IEC binary prefixes in "qemu/units.h" Paolo Bonzini
` (45 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:09 UTC (permalink / raw)
To: qemu-devel
From: Daniel P. Berrangé <berrange@redhat.com>
The "git archive" feature creates tarballs which are missing all
submodule content. GitHub unhelpfully provides users with "Download"
links that claim to give them valid source release tarballs. These
GitHub archives will not be buildable as they are created by the
"git archive" feature and so are missing content. The user gets
unhelpful messages from make such as:
fatal error: ui/input-keymap-atset1-to-qcode.c: No such file or directory
By adding a sanity check we can give users an informative message about
what they've done wrong.
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20180418171151.5263-1-berrange@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
configure | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/configure b/configure
index ca7de4f..4b489fe 100755
--- a/configure
+++ b/configure
@@ -300,6 +300,24 @@ then
else
git_update=no
git_submodules=""
+
+ if ! test -f "$source_path/ui/keycodemapdb/README"
+ then
+ echo
+ echo "ERROR: missing file $source_path/ui/keycodemapdb/README"
+ echo
+ echo "This is not a GIT checkout but module content appears to"
+ echo "be missing. Do not use 'git archive' or GitHub download links"
+ echo "to acquire QEMU source archives. Non-GIT builds are only"
+ echo "supported with source archives linked from:"
+ echo
+ echo " https://www.qemu.org/download/"
+ echo
+ echo "Developers working with GIT can use scripts/archive-source.sh"
+ echo "if they need to create valid source archives."
+ echo
+ exit 1
+ fi
fi
git="git"
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 03/47] include: Add IEC binary prefixes in "qemu/units.h"
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
2018-06-30 6:09 ` [Qemu-devel] [PULL 01/47] i386/kvm: add support for Hyper-V TLB flush Paolo Bonzini
2018-06-30 6:09 ` [Qemu-devel] [PULL 02/47] configure: add sanity check to catch builds from "git archive" Paolo Bonzini
@ 2018-06-30 6:09 ` Paolo Bonzini
2018-06-30 6:09 ` [Qemu-devel] [PULL 04/47] vdi: Use definitions from "qemu/units.h" Paolo Bonzini
` (44 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:09 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
Loosely based on 076b35b5a56.
Suggested-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-2-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
include/qemu/units.h | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
create mode 100644 include/qemu/units.h
diff --git a/include/qemu/units.h b/include/qemu/units.h
new file mode 100644
index 0000000..692db3f
--- /dev/null
+++ b/include/qemu/units.h
@@ -0,0 +1,20 @@
+/*
+ * IEC binary prefixes definitions
+ *
+ * Copyright (C) 2015 Nikunj A Dadhania, IBM Corporation
+ * Copyright (C) 2018 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef QEMU_UNITS_H
+#define QEMU_UNITS_H
+
+#define KiB (INT64_C(1) << 10)
+#define MiB (INT64_C(1) << 20)
+#define GiB (INT64_C(1) << 30)
+#define TiB (INT64_C(1) << 40)
+#define PiB (INT64_C(1) << 50)
+#define EiB (INT64_C(1) << 60)
+
+#endif
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 04/47] vdi: Use definitions from "qemu/units.h"
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (2 preceding siblings ...)
2018-06-30 6:09 ` [Qemu-devel] [PULL 03/47] include: Add IEC binary prefixes in "qemu/units.h" Paolo Bonzini
@ 2018-06-30 6:09 ` Paolo Bonzini
2018-06-30 6:09 ` [Qemu-devel] [PULL 05/47] x86/cpu: " Paolo Bonzini
` (43 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:09 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Message-Id: <20180625124238.25339-3-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
block/vdi.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/block/vdi.c b/block/vdi.c
index 1d8ed67..6555cff 100644
--- a/block/vdi.c
+++ b/block/vdi.c
@@ -50,6 +50,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qapi/qobject-input-visitor.h"
#include "qapi/qapi-visit-block-core.h"
@@ -83,9 +84,6 @@
/* Command line option for static images. */
#define BLOCK_OPT_STATIC "static"
-#define KiB 1024
-#define MiB (KiB * KiB)
-
#define SECTOR_SIZE 512
#define DEFAULT_CLUSTER_SIZE (1 * MiB)
@@ -434,7 +432,8 @@ static int vdi_open(BlockDriverState *bs, QDict *options, int flags,
goto fail;
} else if (header.block_size != DEFAULT_CLUSTER_SIZE) {
error_setg(errp, "unsupported VDI image (block size %" PRIu32
- " is not %u)", header.block_size, DEFAULT_CLUSTER_SIZE);
+ " is not %" PRIu64 ")",
+ header.block_size, DEFAULT_CLUSTER_SIZE);
ret = -ENOTSUP;
goto fail;
} else if (header.disk_size >
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 05/47] x86/cpu: Use definitions from "qemu/units.h"
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (3 preceding siblings ...)
2018-06-30 6:09 ` [Qemu-devel] [PULL 04/47] vdi: Use definitions from "qemu/units.h" Paolo Bonzini
@ 2018-06-30 6:09 ` Paolo Bonzini
2018-06-30 6:09 ` [Qemu-devel] [PULL 06/47] checkpatch: Recognize IEC binary prefix definitions Paolo Bonzini
` (42 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:09 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <20180625124238.25339-4-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/cpu.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index d57f310..bdbd446 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/cutils.h"
#include "qemu/bitops.h"
@@ -65,9 +66,6 @@ struct CPUID2CacheDescriptorInfo {
int associativity;
};
-#define KiB 1024
-#define MiB (1024 * 1024)
-
/*
* Known CPUID 2 cache descriptors.
* From Intel SDM Volume 2A, CPUID instruction
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 06/47] checkpatch: Recognize IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (4 preceding siblings ...)
2018-06-30 6:09 ` [Qemu-devel] [PULL 05/47] x86/cpu: " Paolo Bonzini
@ 2018-06-30 6:09 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 07/47] hw: Use IEC binary prefix definitions from "qemu/units.h" Paolo Bonzini
` (41 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:09 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
Do not match the IEC binary prefix as camelcase typedefs.
This fixes:
ERROR: "foo * bar" should be "foo *bar"
#310: FILE: hw/ppc/ppc440_uc.c:564:
+ size = 8 * MiB * sh;
total: 1 errors, 0 warnings, 433 lines checked
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-5-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
scripts/checkpatch.pl | 1 +
1 file changed, 1 insertion(+)
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index e3d8c2c..223681b 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -242,6 +242,7 @@ our $UTF8 = qr{
# There are still some false positives, but this catches most
# common cases.
our $typeTypedefs = qr{(?x:
+ (?![KMGTPE]iB) # IEC binary prefix (do not match)
[A-Z][A-Z\d_]*[a-z][A-Za-z\d_]* # camelcase
| [A-Z][A-Z\d_]*AIOCB # all uppercase
| [A-Z][A-Z\d_]*CPU # all uppercase
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 07/47] hw: Use IEC binary prefix definitions from "qemu/units.h"
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (5 preceding siblings ...)
2018-06-30 6:09 ` [Qemu-devel] [PULL 06/47] checkpatch: Recognize IEC binary prefix definitions Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 08/47] hw: Directly use "qemu/units.h" instead of "qemu/cutils.h" Paolo Bonzini
` (40 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
Code change produced with:
$ git ls-files | egrep '\.[ch]$' | \
xargs sed -i -e 's/\(\W[KMGTPE]\)_BYTE/\1iB/g'
Suggested-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au> (ppc parts)
Message-Id: <20180625124238.25339-6-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/arm/msf2-soc.c | 4 ++--
hw/arm/msf2-som.c | 6 +++---
hw/core/loader-fit.c | 3 ++-
hw/core/machine.c | 2 +-
hw/display/sm501.c | 14 +++++++-------
hw/hppa/machine.c | 2 +-
hw/mips/boston.c | 28 ++++++++++++++--------------
hw/ppc/pnv.c | 4 ++--
hw/ppc/ppc440_uc.c | 26 +++++++++++++-------------
hw/ppc/prep.c | 2 +-
hw/ppc/sam460ex.c | 2 +-
hw/ppc/spapr.c | 10 +++++-----
hw/ppc/spapr_rtas.c | 2 +-
hw/sd/sd.c | 4 ++--
hw/sd/sdhci.c | 2 +-
include/qemu/cutils.h | 8 +-------
tests/test-cutils.c | 19 ++++++++++---------
tests/test-keyval.c | 6 +++---
tests/test-qemu-opts.c | 7 +++----
19 files changed, 73 insertions(+), 78 deletions(-)
diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
index 75c44ad..530e461 100644
--- a/hw/arm/msf2-soc.c
+++ b/hw/arm/msf2-soc.c
@@ -40,14 +40,14 @@
#define SRAM_BASE_ADDRESS 0x20000000
-#define MSF2_ENVM_MAX_SIZE (512 * K_BYTE)
+#define MSF2_ENVM_MAX_SIZE (512 * KiB)
/*
* eSRAM max size is 80k without SECDED(Single error correction and
* dual error detection) feature and 64k with SECDED.
* We do not support SECDED now.
*/
-#define MSF2_ESRAM_MAX_SIZE (80 * K_BYTE)
+#define MSF2_ESRAM_MAX_SIZE (80 * KiB)
static const uint32_t spi_addr[MSF2_NUM_SPIS] = { 0x40001000 , 0x40011000 };
static const uint32_t uart_addr[MSF2_NUM_UARTS] = { 0x40000000 , 0x40010000 };
diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c
index 0795a3a..ed533bb 100644
--- a/hw/arm/msf2-som.c
+++ b/hw/arm/msf2-som.c
@@ -33,10 +33,10 @@
#include "cpu.h"
#define DDR_BASE_ADDRESS 0xA0000000
-#define DDR_SIZE (64 * M_BYTE)
+#define DDR_SIZE (64 * MiB)
-#define M2S010_ENVM_SIZE (256 * K_BYTE)
-#define M2S010_ESRAM_SIZE (64 * K_BYTE)
+#define M2S010_ENVM_SIZE (256 * KiB)
+#define M2S010_ESRAM_SIZE (64 * KiB)
static void emcraft_sf2_s2s010_init(MachineState *machine)
{
diff --git a/hw/core/loader-fit.c b/hw/core/loader-fit.c
index 6387854..447f608 100644
--- a/hw/core/loader-fit.c
+++ b/hw/core/loader-fit.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "exec/memory.h"
#include "hw/loader.h"
#include "hw/loader-fit.h"
@@ -194,7 +195,7 @@ static int fit_load_fdt(const struct fit_loader *ldr, const void *itb,
err = fit_image_addr(itb, img_off, "load", &load_addr);
if (err == -ENOENT) {
- load_addr = ROUND_UP(kernel_end, 64 * K_BYTE) + (10 * M_BYTE);
+ load_addr = ROUND_UP(kernel_end, 64 * KiB) + (10 * MiB);
} else if (err) {
ret = err;
goto out;
diff --git a/hw/core/machine.c b/hw/core/machine.c
index 617e5f8..ccf3a4b 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -522,7 +522,7 @@ static void machine_class_init(ObjectClass *oc, void *data)
MachineClass *mc = MACHINE_CLASS(oc);
/* Default 128 MB as guest ram size */
- mc->default_ram_size = 128 * M_BYTE;
+ mc->default_ram_size = 128 * MiB;
mc->rom_file_has_mr = true;
/* numa node memory size aligned on 8MB by default.
diff --git a/hw/display/sm501.c b/hw/display/sm501.c
index 8206ae8..3bd8716 100644
--- a/hw/display/sm501.c
+++ b/hw/display/sm501.c
@@ -452,12 +452,12 @@
/* SM501 local memory size taken from "linux/drivers/mfd/sm501.c" */
static const uint32_t sm501_mem_local_size[] = {
- [0] = 4 * M_BYTE,
- [1] = 8 * M_BYTE,
- [2] = 16 * M_BYTE,
- [3] = 32 * M_BYTE,
- [4] = 64 * M_BYTE,
- [5] = 2 * M_BYTE,
+ [0] = 4 * MiB,
+ [1] = 8 * MiB,
+ [2] = 16 * MiB,
+ [3] = 32 * MiB,
+ [4] = 64 * MiB,
+ [5] = 2 * MiB,
};
#define get_local_mem_size(s) sm501_mem_local_size[(s)->local_mem_size_index]
@@ -1829,7 +1829,7 @@ static void sm501_realize_pci(PCIDevice *dev, Error **errp)
}
static Property sm501_pci_properties[] = {
- DEFINE_PROP_UINT32("vram-size", SM501PCIState, vram_size, 64 * M_BYTE),
+ DEFINE_PROP_UINT32("vram-size", SM501PCIState, vram_size, 64 * MiB),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index aba269b..2ba2696 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -275,7 +275,7 @@ static void machine_hppa_machine_init(MachineClass *mc)
mc->max_cpus = HPPA_MAX_CPUS;
mc->default_cpus = 1;
mc->is_default = 1;
- mc->default_ram_size = 512 * M_BYTE;
+ mc->default_ram_size = 512 * MiB;
mc->default_boot_order = "cd";
}
diff --git a/hw/mips/boston.c b/hw/mips/boston.c
index 14e6f95..939cef5 100644
--- a/hw/mips/boston.c
+++ b/hw/mips/boston.c
@@ -200,7 +200,7 @@ static uint64_t boston_platreg_read(void *opaque, hwaddr addr,
val |= PLAT_BUILD_CFG_PCIE2_EN;
return val;
case PLAT_DDR_CFG:
- val = s->mach->ram_size / G_BYTE;
+ val = s->mach->ram_size / GiB;
assert(!(val & ~PLAT_DDR_CFG_SIZE));
val |= PLAT_DDR_CFG_MHZ;
return val;
@@ -355,7 +355,7 @@ static const void *boston_fdt_filter(void *opaque, const void *fdt_orig,
return NULL;
}
- ram_low_sz = MIN(256 * M_BYTE, machine->ram_size);
+ ram_low_sz = MIN(256 * MiB, machine->ram_size);
ram_high_sz = machine->ram_size - ram_low_sz;
qemu_fdt_setprop_sized_cells(fdt, "/memory@0", "reg",
1, 0x00000000, 1, ram_low_sz,
@@ -436,8 +436,8 @@ static void boston_mach_init(MachineState *machine)
int fw_size, fit_err;
bool is_64b;
- if ((machine->ram_size % G_BYTE) ||
- (machine->ram_size > (2 * G_BYTE))) {
+ if ((machine->ram_size % GiB) ||
+ (machine->ram_size > (2 * GiB))) {
error_report("Memory size must be 1GB or 2GB");
exit(1);
}
@@ -471,7 +471,7 @@ static void boston_mach_init(MachineState *machine)
sysbus_mmio_map_overlap(SYS_BUS_DEVICE(s->cps), 0, 0, 1);
flash = g_new(MemoryRegion, 1);
- memory_region_init_rom(flash, NULL, "boston.flash", 128 * M_BYTE, &err);
+ memory_region_init_rom(flash, NULL, "boston.flash", 128 * MiB, &err);
memory_region_add_subregion_overlap(sys_mem, 0x18000000, flash, 0);
ddr = g_new(MemoryRegion, 1);
@@ -481,22 +481,22 @@ static void boston_mach_init(MachineState *machine)
ddr_low_alias = g_new(MemoryRegion, 1);
memory_region_init_alias(ddr_low_alias, NULL, "boston_low.ddr",
- ddr, 0, MIN(machine->ram_size, (256 * M_BYTE)));
+ ddr, 0, MIN(machine->ram_size, (256 * MiB)));
memory_region_add_subregion_overlap(sys_mem, 0, ddr_low_alias, 0);
xilinx_pcie_init(sys_mem, 0,
- 0x10000000, 32 * M_BYTE,
- 0x40000000, 1 * G_BYTE,
+ 0x10000000, 32 * MiB,
+ 0x40000000, 1 * GiB,
get_cps_irq(s->cps, 2), false);
xilinx_pcie_init(sys_mem, 1,
- 0x12000000, 32 * M_BYTE,
- 0x20000000, 512 * M_BYTE,
+ 0x12000000, 32 * MiB,
+ 0x20000000, 512 * MiB,
get_cps_irq(s->cps, 1), false);
pcie2 = xilinx_pcie_init(sys_mem, 2,
- 0x14000000, 32 * M_BYTE,
- 0x16000000, 1 * M_BYTE,
+ 0x14000000, 32 * MiB,
+ 0x16000000, 1 * MiB,
get_cps_irq(s->cps, 0), true);
platreg = g_new(MemoryRegion, 1);
@@ -526,7 +526,7 @@ static void boston_mach_init(MachineState *machine)
if (machine->firmware) {
fw_size = load_image_targphys(machine->firmware,
- 0x1fc00000, 4 * M_BYTE);
+ 0x1fc00000, 4 * MiB);
if (fw_size == -1) {
error_printf("unable to load firmware image '%s'\n",
machine->firmware);
@@ -552,7 +552,7 @@ static void boston_mach_class_init(MachineClass *mc)
mc->desc = "MIPS Boston";
mc->init = boston_mach_init;
mc->block_default_type = IF_IDE;
- mc->default_ram_size = 1 * G_BYTE;
+ mc->default_ram_size = 1 * GiB;
mc->max_cpus = 16;
mc->default_cpu_type = MIPS_CPU_TYPE_NAME("I6400");
}
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 7401ffe..5fdac62 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -556,7 +556,7 @@ static void pnv_init(MachineState *machine)
char *chip_typename;
/* allocate RAM */
- if (machine->ram_size < (1 * G_BYTE)) {
+ if (machine->ram_size < (1 * GiB)) {
warn_report("skiboot may not work with < 1GB of RAM");
}
@@ -1174,7 +1174,7 @@ static void pnv_machine_class_init(ObjectClass *oc, void *data)
* storage */
mc->no_parallel = 1;
mc->default_boot_order = NULL;
- mc->default_ram_size = 1 * G_BYTE;
+ mc->default_ram_size = 1 * GiB;
xic->icp_get = pnv_icp_get;
xic->ics_get = pnv_ics_get;
xic->ics_resend = pnv_ics_resend;
diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c
index 123f4ac..b5b31b4 100644
--- a/hw/ppc/ppc440_uc.c
+++ b/hw/ppc/ppc440_uc.c
@@ -215,13 +215,13 @@ void ppc4xx_l2sram_init(CPUPPCState *env)
l2sram = g_malloc0(sizeof(*l2sram));
/* XXX: Size is 4*64kB for 460ex, cf. U-Boot, ppc4xx-isram.h */
memory_region_init_ram(&l2sram->bank[0], NULL, "ppc4xx.l2sram_bank0",
- 64 * K_BYTE, &error_abort);
+ 64 * KiB, &error_abort);
memory_region_init_ram(&l2sram->bank[1], NULL, "ppc4xx.l2sram_bank1",
- 64 * K_BYTE, &error_abort);
+ 64 * KiB, &error_abort);
memory_region_init_ram(&l2sram->bank[2], NULL, "ppc4xx.l2sram_bank2",
- 64 * K_BYTE, &error_abort);
+ 64 * KiB, &error_abort);
memory_region_init_ram(&l2sram->bank[3], NULL, "ppc4xx.l2sram_bank3",
- 64 * K_BYTE, &error_abort);
+ 64 * KiB, &error_abort);
qemu_register_reset(&l2sram_reset, l2sram);
ppc_dcr_register(env, DCR_L2CACHE_CFG,
l2sram, &dcr_read_l2sram, &dcr_write_l2sram);
@@ -513,28 +513,28 @@ static uint32_t sdram_bcr(hwaddr ram_base, hwaddr ram_size)
uint32_t bcr;
switch (ram_size) {
- case (8 * M_BYTE):
+ case (8 * MiB):
bcr = 0xffc0;
break;
- case (16 * M_BYTE):
+ case (16 * MiB):
bcr = 0xff80;
break;
- case (32 * M_BYTE):
+ case (32 * MiB):
bcr = 0xff00;
break;
- case (64 * M_BYTE):
+ case (64 * MiB):
bcr = 0xfe00;
break;
- case (128 * M_BYTE):
+ case (128 * MiB):
bcr = 0xfc00;
break;
- case (256 * M_BYTE):
+ case (256 * MiB):
bcr = 0xf800;
break;
- case (512 * M_BYTE):
+ case (512 * MiB):
bcr = 0xf000;
break;
- case (1 * G_BYTE):
+ case (1 * GiB):
bcr = 0xe000;
break;
default:
@@ -561,7 +561,7 @@ static target_ulong sdram_size(uint32_t bcr)
if (sh == 0) {
size = -1;
} else {
- size = 8 * M_BYTE * sh;
+ size = 8 * MiB * sh;
}
return size;
diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
index 5ed0bcd..25ae533 100644
--- a/hw/ppc/prep.c
+++ b/hw/ppc/prep.c
@@ -884,7 +884,7 @@ static void ibm_40p_machine_init(MachineClass *mc)
mc->desc = "IBM RS/6000 7020 (40p)",
mc->init = ibm_40p_init;
mc->max_cpus = 1;
- mc->default_ram_size = 128 * M_BYTE;
+ mc->default_ram_size = 128 * MiB;
mc->block_default_type = IF_SCSI;
mc->default_boot_order = "c";
mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("604");
diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
index bdc53d2..2a98c10 100644
--- a/hw/ppc/sam460ex.c
+++ b/hw/ppc/sam460ex.c
@@ -597,7 +597,7 @@ static void sam460ex_machine_init(MachineClass *mc)
mc->desc = "aCube Sam460ex";
mc->init = sam460ex_init;
mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("460exb");
- mc->default_ram_size = 512 * M_BYTE;
+ mc->default_ram_size = 512 * MiB;
}
DEFINE_MACHINE("sam460ex", sam460ex_machine_init)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index b32b971..7dbdb4e 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -2324,7 +2324,7 @@ static void spapr_validate_node_memory(MachineState *machine, Error **errp)
error_setg(errp, "Memory size 0x" RAM_ADDR_FMT
" is not aligned to %llu MiB",
machine->ram_size,
- SPAPR_MEMORY_BLOCK_SIZE / M_BYTE);
+ SPAPR_MEMORY_BLOCK_SIZE / MiB);
return;
}
@@ -2332,7 +2332,7 @@ static void spapr_validate_node_memory(MachineState *machine, Error **errp)
error_setg(errp, "Maximum memory size 0x" RAM_ADDR_FMT
" is not aligned to %llu MiB",
machine->ram_size,
- SPAPR_MEMORY_BLOCK_SIZE / M_BYTE);
+ SPAPR_MEMORY_BLOCK_SIZE / MiB);
return;
}
@@ -2342,7 +2342,7 @@ static void spapr_validate_node_memory(MachineState *machine, Error **errp)
"Node %d memory size 0x%" PRIx64
" is not aligned to %llu MiB",
i, numa_info[i].node_mem,
- SPAPR_MEMORY_BLOCK_SIZE / M_BYTE);
+ SPAPR_MEMORY_BLOCK_SIZE / MiB);
return;
}
}
@@ -3209,7 +3209,7 @@ static void spapr_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
if (size % SPAPR_MEMORY_BLOCK_SIZE) {
error_setg(errp, "Hotplugged memory size must be a multiple of "
- "%lld MB", SPAPR_MEMORY_BLOCK_SIZE / M_BYTE);
+ "%lld MB", SPAPR_MEMORY_BLOCK_SIZE / MiB);
return;
}
@@ -3961,7 +3961,7 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data)
mc->max_cpus = 1024;
mc->no_parallel = 1;
mc->default_boot_order = "";
- mc->default_ram_size = 512 * M_BYTE;
+ mc->default_ram_size = 512 * MiB;
mc->kvm_type = spapr_kvm_type;
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_SPAPR_PCI_HOST_BRIDGE);
mc->pci_allow_0_address = true;
diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
index 7f9738d..f32740b 100644
--- a/hw/ppc/spapr_rtas.c
+++ b/hw/ppc/spapr_rtas.c
@@ -241,7 +241,7 @@ static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
"DesProcs=%d,"
"MaxPlatProcs=%d",
max_cpus,
- current_machine->ram_size / M_BYTE,
+ current_machine->ram_size / MiB,
smp_cpus,
max_cpus);
ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1);
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 540bccb..9a16b76 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -305,7 +305,7 @@ static void sd_ocr_powerup(void *opaque)
/* card power-up OK */
sd->ocr = FIELD_DP32(sd->ocr, OCR, CARD_POWER_UP, 1);
- if (sd->size > 1 * G_BYTE) {
+ if (sd->size > 1 * GiB) {
sd->ocr = FIELD_DP32(sd->ocr, OCR, CARD_CAPACITY, 1);
}
}
@@ -377,7 +377,7 @@ static void sd_set_csd(SDState *sd, uint64_t size)
uint32_t sectsize = (1 << (SECTOR_SHIFT + 1)) - 1;
uint32_t wpsize = (1 << (WPGROUP_SHIFT + 1)) - 1;
- if (size <= 1 * G_BYTE) { /* Standard Capacity SD */
+ if (size <= 1 * GiB) { /* Standard Capacity SD */
sd->csd[0] = 0x00; /* CSD structure */
sd->csd[1] = 0x26; /* Data read access-time-1 */
sd->csd[2] = 0x00; /* Data read access-time-2 */
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 3017e5a..a11e802 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -414,7 +414,7 @@ static void sdhci_end_transfer(SDHCIState *s)
/*
* Programmed i/o data transfer
*/
-#define BLOCK_SIZE_MASK (4 * K_BYTE - 1)
+#define BLOCK_SIZE_MASK (4 * KiB - 1)
/* Fill host controller's read buffer with BLKSIZE bytes of data from card */
static void sdhci_read_block_from_card(SDHCIState *s)
diff --git a/include/qemu/cutils.h b/include/qemu/cutils.h
index a663340..056e662 100644
--- a/include/qemu/cutils.h
+++ b/include/qemu/cutils.h
@@ -2,6 +2,7 @@
#define QEMU_CUTILS_H
#include "qemu/fprintf-fn.h"
+#include "qemu/units.h"
/**
* pstrcpy:
@@ -147,13 +148,6 @@ int qemu_strtosz(const char *nptr, char **end, uint64_t *result);
int qemu_strtosz_MiB(const char *nptr, char **end, uint64_t *result);
int qemu_strtosz_metric(const char *nptr, char **end, uint64_t *result);
-#define K_BYTE (1ULL << 10)
-#define M_BYTE (1ULL << 20)
-#define G_BYTE (1ULL << 30)
-#define T_BYTE (1ULL << 40)
-#define P_BYTE (1ULL << 50)
-#define E_BYTE (1ULL << 60)
-
/* used to print char* safely */
#define STR_OR_NULL(str) ((str) ? (str) : "null")
diff --git a/tests/test-cutils.c b/tests/test-cutils.c
index 64a489c..a6e5fe4 100644
--- a/tests/test-cutils.c
+++ b/tests/test-cutils.c
@@ -28,6 +28,7 @@
#include "qemu/osdep.h"
#include "qemu/cutils.h"
+#include "qemu/units.h"
static void test_parse_uint_null(void)
{
@@ -2022,7 +2023,7 @@ static void test_qemu_strtosz_units(void)
/* default is M */
err = qemu_strtosz_MiB(none, &endptr, &res);
g_assert_cmpint(err, ==, 0);
- g_assert_cmpint(res, ==, M_BYTE);
+ g_assert_cmpint(res, ==, MiB);
g_assert(endptr == none + 1);
err = qemu_strtosz(b, &endptr, &res);
@@ -2032,32 +2033,32 @@ static void test_qemu_strtosz_units(void)
err = qemu_strtosz(k, &endptr, &res);
g_assert_cmpint(err, ==, 0);
- g_assert_cmpint(res, ==, K_BYTE);
+ g_assert_cmpint(res, ==, KiB);
g_assert(endptr == k + 2);
err = qemu_strtosz(m, &endptr, &res);
g_assert_cmpint(err, ==, 0);
- g_assert_cmpint(res, ==, M_BYTE);
+ g_assert_cmpint(res, ==, MiB);
g_assert(endptr == m + 2);
err = qemu_strtosz(g, &endptr, &res);
g_assert_cmpint(err, ==, 0);
- g_assert_cmpint(res, ==, G_BYTE);
+ g_assert_cmpint(res, ==, GiB);
g_assert(endptr == g + 2);
err = qemu_strtosz(t, &endptr, &res);
g_assert_cmpint(err, ==, 0);
- g_assert_cmpint(res, ==, T_BYTE);
+ g_assert_cmpint(res, ==, TiB);
g_assert(endptr == t + 2);
err = qemu_strtosz(p, &endptr, &res);
g_assert_cmpint(err, ==, 0);
- g_assert_cmpint(res, ==, P_BYTE);
+ g_assert_cmpint(res, ==, PiB);
g_assert(endptr == p + 2);
err = qemu_strtosz(e, &endptr, &res);
g_assert_cmpint(err, ==, 0);
- g_assert_cmpint(res, ==, E_BYTE);
+ g_assert_cmpint(res, ==, EiB);
g_assert(endptr == e + 2);
}
@@ -2070,7 +2071,7 @@ static void test_qemu_strtosz_float(void)
err = qemu_strtosz(str, &endptr, &res);
g_assert_cmpint(err, ==, 0);
- g_assert_cmpint(res, ==, 12.345 * M_BYTE);
+ g_assert_cmpint(res, ==, 12.345 * MiB);
g_assert(endptr == str + 7);
}
@@ -2106,7 +2107,7 @@ static void test_qemu_strtosz_trailing(void)
str = "123xxx";
err = qemu_strtosz_MiB(str, &endptr, &res);
- g_assert_cmpint(res, ==, 123 * M_BYTE);
+ g_assert_cmpint(res, ==, 123 * MiB);
g_assert(endptr == str + 3);
err = qemu_strtosz(str, NULL, &res);
diff --git a/tests/test-keyval.c b/tests/test-keyval.c
index 63cb146..92d8e9f 100644
--- a/tests/test-keyval.c
+++ b/tests/test-keyval.c
@@ -457,11 +457,11 @@ static void test_keyval_visit_size(void)
visit_type_size(v, "sz2", &sz, &error_abort);
g_assert_cmpuint(sz, ==, 1536);
visit_type_size(v, "sz3", &sz, &error_abort);
- g_assert_cmphex(sz, ==, 2 * M_BYTE);
+ g_assert_cmphex(sz, ==, 2 * MiB);
visit_type_size(v, "sz4", &sz, &error_abort);
- g_assert_cmphex(sz, ==, G_BYTE / 10);
+ g_assert_cmphex(sz, ==, GiB / 10);
visit_type_size(v, "sz5", &sz, &error_abort);
- g_assert_cmphex(sz, ==, 16777215 * T_BYTE);
+ g_assert_cmphex(sz, ==, 16777215 * TiB);
visit_check_struct(v, &error_abort);
visit_end_struct(v, NULL);
visit_free(v);
diff --git a/tests/test-qemu-opts.c b/tests/test-qemu-opts.c
index 7092e21..fd4d848 100644
--- a/tests/test-qemu-opts.c
+++ b/tests/test-qemu-opts.c
@@ -704,13 +704,12 @@ static void test_opts_parse_size(void)
g_assert_cmpuint(opts_count(opts), ==, 3);
g_assert_cmphex(qemu_opt_get_size(opts, "size1", 0), ==, 8);
g_assert_cmphex(qemu_opt_get_size(opts, "size2", 0), ==, 1536);
- g_assert_cmphex(qemu_opt_get_size(opts, "size3", 0), ==, 2 * M_BYTE);
+ g_assert_cmphex(qemu_opt_get_size(opts, "size3", 0), ==, 2 * MiB);
opts = qemu_opts_parse(&opts_list_02, "size1=0.1G,size2=16777215T",
false, &error_abort);
g_assert_cmpuint(opts_count(opts), ==, 2);
- g_assert_cmphex(qemu_opt_get_size(opts, "size1", 0), ==, G_BYTE / 10);
- g_assert_cmphex(qemu_opt_get_size(opts, "size2", 0),
- ==, 16777215 * T_BYTE);
+ g_assert_cmphex(qemu_opt_get_size(opts, "size1", 0), ==, GiB / 10);
+ g_assert_cmphex(qemu_opt_get_size(opts, "size2", 0), ==, 16777215U * TiB);
/* Beyond limit with suffix */
opts = qemu_opts_parse(&opts_list_02, "size1=16777216T",
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 08/47] hw: Directly use "qemu/units.h" instead of "qemu/cutils.h"
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (6 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 07/47] hw: Use IEC binary prefix definitions from "qemu/units.h" Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 09/47] hw/ivshmem: Use the IEC binary prefix definitions Paolo Bonzini
` (39 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
These files don't use anything exposed by "qemu/cutils.h",
simplify preprocessing including directly "qemu/units.h".
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au> (ppc parts)
Message-Id: <20180625124238.25339-7-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/arm/msf2-soc.c | 2 +-
hw/arm/msf2-som.c | 2 +-
hw/core/machine.c | 2 +-
hw/display/sm501.c | 2 +-
hw/mips/boston.c | 2 +-
hw/ppc/pnv.c | 2 +-
hw/ppc/ppc440_uc.c | 2 +-
7 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
index 530e461..edb3ba8 100644
--- a/hw/arm/msf2-soc.c
+++ b/hw/arm/msf2-soc.c
@@ -23,13 +23,13 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "hw/arm/arm.h"
#include "exec/address-spaces.h"
#include "hw/char/serial.h"
#include "hw/boards.h"
-#include "qemu/cutils.h"
#include "hw/arm/msf2-soc.h"
#include "hw/misc/unimp.h"
diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c
index ed533bb..2432b5e 100644
--- a/hw/arm/msf2-som.c
+++ b/hw/arm/msf2-som.c
@@ -23,12 +23,12 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "hw/boards.h"
#include "hw/arm/arm.h"
#include "exec/address-spaces.h"
-#include "qemu/cutils.h"
#include "hw/arm/msf2-soc.h"
#include "cpu.h"
diff --git a/hw/core/machine.c b/hw/core/machine.c
index ccf3a4b..2077328 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -11,6 +11,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/boards.h"
#include "qapi/error.h"
#include "qapi/qapi-visit-common.h"
@@ -19,7 +20,6 @@
#include "sysemu/sysemu.h"
#include "sysemu/numa.h"
#include "qemu/error-report.h"
-#include "qemu/cutils.h"
#include "sysemu/qtest.h"
static char *machine_get_accel(Object *obj, Error **errp)
diff --git a/hw/display/sm501.c b/hw/display/sm501.c
index 3bd8716..9dec0d3 100644
--- a/hw/display/sm501.c
+++ b/hw/display/sm501.c
@@ -24,7 +24,7 @@
*/
#include "qemu/osdep.h"
-#include "qemu/cutils.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
diff --git a/hw/mips/boston.c b/hw/mips/boston.c
index 939cef5..6c9c20a 100644
--- a/hw/mips/boston.c
+++ b/hw/mips/boston.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-common.h"
#include "exec/address-spaces.h"
@@ -32,7 +33,6 @@
#include "hw/mips/cpudevs.h"
#include "hw/pci-host/xilinx-pcie.h"
#include "qapi/error.h"
-#include "qemu/cutils.h"
#include "qemu/error-report.h"
#include "qemu/log.h"
#include "chardev/char.h"
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 5fdac62..346f5e7 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "sysemu/sysemu.h"
#include "sysemu/numa.h"
@@ -31,7 +32,6 @@
#include "hw/ppc/pnv_core.h"
#include "hw/loader.h"
#include "exec/address-spaces.h"
-#include "qemu/cutils.h"
#include "qapi/visitor.h"
#include "monitor/monitor.h"
#include "hw/intc/intc.h"
diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c
index b5b31b4..1ab2235 100644
--- a/hw/ppc/ppc440_uc.c
+++ b/hw/ppc/ppc440_uc.c
@@ -9,8 +9,8 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-common.h"
-#include "qemu/cutils.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "cpu.h"
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 09/47] hw/ivshmem: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (7 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 08/47] hw: Directly use "qemu/units.h" instead of "qemu/cutils.h" Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 10/47] hw/ipack: " Paolo Bonzini
` (38 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20180625124238.25339-8-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/misc/ivshmem.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c
index ee01c5e..6febbab 100644
--- a/hw/misc/ivshmem.c
+++ b/hw/misc/ivshmem.c
@@ -17,6 +17,7 @@
* GNU GPL, version 2 or (at your option) any later version.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu/cutils.h"
#include "hw/hw.h"
@@ -1301,7 +1302,7 @@ static void ivshmem_realize(PCIDevice *dev, Error **errp)
}
if (s->sizearg == NULL) {
- s->legacy_size = 4 << 20; /* 4 MB default */
+ s->legacy_size = 4 * MiB; /* 4 MB default */
} else {
int ret;
uint64_t size;
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 10/47] hw/ipack: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (8 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 09/47] hw/ivshmem: Use the IEC binary prefix definitions Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 11/47] hw/scsi: " Paolo Bonzini
` (37 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alberto Garcia <berto@igalia.com>
Message-Id: <20180625124238.25339-9-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/ipack/tpci200.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/ipack/tpci200.c b/hw/ipack/tpci200.c
index da05c85..cd3e791 100644
--- a/hw/ipack/tpci200.c
+++ b/hw/ipack/tpci200.c
@@ -9,6 +9,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/ipack/ipack.h"
#include "hw/pci/pci.h"
#include "qemu/bitops.h"
@@ -597,9 +598,9 @@ static void tpci200_realize(PCIDevice *pci_dev, Error **errp)
memory_region_init_io(&s->las1, OBJECT(s), &tpci200_las1_ops,
s, "tpci200_las1", 1024);
memory_region_init_io(&s->las2, OBJECT(s), &tpci200_las2_ops,
- s, "tpci200_las2", 1024*1024*32);
+ s, "tpci200_las2", 32 * MiB);
memory_region_init_io(&s->las3, OBJECT(s), &tpci200_las3_ops,
- s, "tpci200_las3", 1024*1024*16);
+ s, "tpci200_las3", 16 * MiB);
pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mmio);
pci_register_bar(&s->dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->io);
pci_register_bar(&s->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->las0);
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 11/47] hw/scsi: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (9 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 10/47] hw/ipack: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 12/47] hw/smbios: " Paolo Bonzini
` (36 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-10-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/scsi/scsi-disk.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c
index 55a34b3..32f3f96 100644
--- a/hw/scsi/scsi-disk.c
+++ b/hw/scsi/scsi-disk.c
@@ -29,6 +29,7 @@ do { printf("scsi-disk: " fmt , ## __VA_ARGS__); } while (0)
#endif
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "hw/scsi/scsi.h"
@@ -44,13 +45,13 @@ do { printf("scsi-disk: " fmt , ## __VA_ARGS__); } while (0)
#include <scsi/sg.h>
#endif
-#define SCSI_WRITE_SAME_MAX 524288
-#define SCSI_DMA_BUF_SIZE 131072
+#define SCSI_WRITE_SAME_MAX (512 * KiB)
+#define SCSI_DMA_BUF_SIZE (128 * KiB)
#define SCSI_MAX_INQUIRY_LEN 256
#define SCSI_MAX_MODE_LEN 256
-#define DEFAULT_DISCARD_GRANULARITY 4096
-#define DEFAULT_MAX_UNMAP_SIZE (1 << 30) /* 1 GB */
+#define DEFAULT_DISCARD_GRANULARITY (4 * KiB)
+#define DEFAULT_MAX_UNMAP_SIZE (1 * GiB)
#define DEFAULT_MAX_IO_SIZE INT_MAX /* 2 GB - 1 block */
#define TYPE_SCSI_DISK_BASE "scsi-disk-base"
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 12/47] hw/smbios: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (10 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 11/47] hw/scsi: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 13/47] hw/xen: " Paolo Bonzini
` (35 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-11-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/smbios/smbios.c | 15 ++++++---------
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c
index 27a07e9..a27e54b 100644
--- a/hw/smbios/smbios.c
+++ b/hw/smbios/smbios.c
@@ -16,6 +16,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu/config-file.h"
#include "qemu/error-report.h"
@@ -625,10 +626,6 @@ static void smbios_build_type_11_table(void)
SMBIOS_BUILD_TABLE_POST;
}
-#define ONE_KB ((ram_addr_t)1 << 10)
-#define ONE_MB ((ram_addr_t)1 << 20)
-#define ONE_GB ((ram_addr_t)1 << 30)
-
#define MAX_T16_STD_SZ 0x80000000 /* 2T in Kilobytes */
static void smbios_build_type_16_table(unsigned dimm_cnt)
@@ -640,7 +637,7 @@ static void smbios_build_type_16_table(unsigned dimm_cnt)
t->location = 0x01; /* Other */
t->use = 0x03; /* System memory */
t->error_correction = 0x06; /* Multi-bit ECC (for Microsoft, per SeaBIOS) */
- size_kb = QEMU_ALIGN_UP(ram_size, ONE_KB) / ONE_KB;
+ size_kb = QEMU_ALIGN_UP(ram_size, KiB) / KiB;
if (size_kb < MAX_T16_STD_SZ) {
t->maximum_capacity = cpu_to_le32(size_kb);
t->extended_maximum_capacity = cpu_to_le64(0);
@@ -668,7 +665,7 @@ static void smbios_build_type_17_table(unsigned instance, uint64_t size)
t->memory_error_information_handle = cpu_to_le16(0xFFFE); /* Not provided */
t->total_width = cpu_to_le16(0xFFFF); /* Unknown */
t->data_width = cpu_to_le16(0xFFFF); /* Unknown */
- size_mb = QEMU_ALIGN_UP(size, ONE_MB) / ONE_MB;
+ size_mb = QEMU_ALIGN_UP(size, MiB) / MiB;
if (size_mb < MAX_T17_STD_SZ) {
t->size = cpu_to_le16(size_mb);
t->extended_size = cpu_to_le32(0);
@@ -707,8 +704,8 @@ static void smbios_build_type_19_table(unsigned instance,
end = start + size - 1;
assert(end > start);
- start_kb = start / ONE_KB;
- end_kb = end / ONE_KB;
+ start_kb = start / KiB;
+ end_kb = end / KiB;
if (start_kb < UINT32_MAX && end_kb < UINT32_MAX) {
t->starting_address = cpu_to_le32(start_kb);
t->ending_address = cpu_to_le32(end_kb);
@@ -869,7 +866,7 @@ void smbios_get_tables(const struct smbios_phys_mem_area *mem_array,
smbios_build_type_11_table();
-#define MAX_DIMM_SZ (16ll * ONE_GB)
+#define MAX_DIMM_SZ (16 * GiB)
#define GET_DIMM_SZ ((i < dimm_cnt - 1) ? MAX_DIMM_SZ \
: ((ram_size - 1) % MAX_DIMM_SZ) + 1)
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 13/47] hw/xen: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (11 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 12/47] hw/smbios: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 14/47] hw/tpm: " Paolo Bonzini
` (34 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alan Robinson <Alan.Robinson@ts.fujitsu.com>
Message-Id: <20180625124238.25339-12-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/block/xen_disk.c | 3 ++-
hw/i386/xen/xen-mapcache.c | 3 ++-
hw/xenpv/xen_domainbuild.c | 13 +++++++------
3 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/hw/block/xen_disk.c b/hw/block/xen_disk.c
index 9fbc0cd..36eff94 100644
--- a/hw/block/xen_disk.c
+++ b/hw/block/xen_disk.c
@@ -20,6 +20,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include <sys/ioctl.h>
#include <sys/uio.h>
@@ -814,7 +815,7 @@ static int blk_connect(struct XenDevice *xendev)
xen_pv_printf(xendev, 1, "type \"%s\", fileproto \"%s\", filename \"%s\","
" size %" PRId64 " (%" PRId64 " MB)\n",
blkdev->type, blkdev->fileproto, blkdev->filename,
- blkdev->file_size, blkdev->file_size >> 20);
+ blkdev->file_size, blkdev->file_size / MiB);
/* Fill in number of sector size and number of sectors */
xenstore_write_be_int(xendev, "sector-size", blkdev->file_blk);
diff --git a/hw/i386/xen/xen-mapcache.c b/hw/i386/xen/xen-mapcache.c
index 628b813..4e4f069 100644
--- a/hw/i386/xen/xen-mapcache.c
+++ b/hw/i386/xen/xen-mapcache.c
@@ -9,6 +9,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/error-report.h"
#include <sys/resource.h>
@@ -46,7 +47,7 @@
* From empirical tests I observed that qemu use 75MB more than the
* max_mcache_size.
*/
-#define NON_MCACHE_MEMORY_SIZE (80 * 1024 * 1024)
+#define NON_MCACHE_MEMORY_SIZE (80 * MiB)
typedef struct MapCacheEntry {
hwaddr paddr_index;
diff --git a/hw/xenpv/xen_domainbuild.c b/hw/xenpv/xen_domainbuild.c
index 027f76f..188acac 100644
--- a/hw/xenpv/xen_domainbuild.c
+++ b/hw/xenpv/xen_domainbuild.c
@@ -1,4 +1,5 @@
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/xen/xen_backend.h"
#include "xen_domainbuild.h"
#include "qemu/timer.h"
@@ -75,9 +76,9 @@ int xenstore_domain_init1(const char *kernel, const char *ramdisk,
xenstore_write_str(dom, "vm", vm);
/* memory */
- xenstore_write_int(dom, "memory/target", ram_size >> 10); // kB
- xenstore_write_int(vm, "memory", ram_size >> 20); // MB
- xenstore_write_int(vm, "maxmem", ram_size >> 20); // MB
+ xenstore_write_int(dom, "memory/target", ram_size / KiB);
+ xenstore_write_int(vm, "memory", ram_size / MiB);
+ xenstore_write_int(vm, "maxmem", ram_size / MiB);
/* cpus */
for (i = 0; i < smp_cpus; i++) {
@@ -113,7 +114,7 @@ int xenstore_domain_init2(int xenstore_port, int xenstore_mfn,
/* console */
xenstore_write_str(dom, "console/type", "ioemu");
- xenstore_write_int(dom, "console/limit", 128 * 1024);
+ xenstore_write_int(dom, "console/limit", 128 * KiB);
xenstore_write_int(dom, "console/ring-ref", console_mfn);
xenstore_write_int(dom, "console/port", console_port);
xen_config_dev_console(0);
@@ -260,7 +261,7 @@ int xen_domain_build_pv(const char *kernel, const char *ramdisk,
}
#endif
- rc = xc_domain_setmaxmem(xen_xc, xen_domid, ram_size >> 10);
+ rc = xc_domain_setmaxmem(xen_xc, xen_domid, ram_size / KiB);
if (rc < 0) {
fprintf(stderr, "xen: xc_domain_setmaxmem() failed\n");
goto err;
@@ -269,7 +270,7 @@ int xen_domain_build_pv(const char *kernel, const char *ramdisk,
xenstore_port = xc_evtchn_alloc_unbound(xen_xc, xen_domid, 0);
console_port = xc_evtchn_alloc_unbound(xen_xc, xen_domid, 0);
- rc = xc_linux_build(xen_xc, xen_domid, ram_size >> 20,
+ rc = xc_linux_build(xen_xc, xen_domid, ram_size / MiB,
kernel, ramdisk, cmdline,
0, flags,
xenstore_port, &xenstore_mfn,
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 14/47] hw/tpm: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (12 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 13/47] hw/xen: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 15/47] hw/block: " Paolo Bonzini
` (33 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20180625124238.25339-13-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
include/hw/acpi/tpm.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/hw/acpi/tpm.h b/include/hw/acpi/tpm.h
index 46ac4dc..3580ffd 100644
--- a/include/hw/acpi/tpm.h
+++ b/include/hw/acpi/tpm.h
@@ -16,6 +16,7 @@
#ifndef HW_ACPI_TPM_H
#define HW_ACPI_TPM_H
+#include "qemu/units.h"
#include "hw/registerfields.h"
#define TPM_TIS_ADDR_BASE 0xFED40000
@@ -176,7 +177,7 @@ REG32(CRB_DATA_BUFFER, 0x80)
#define TPM_CRB_ADDR_CTRL (TPM_CRB_ADDR_BASE + A_CRB_CTRL_REQ)
#define TPM_CRB_R_MAX R_CRB_DATA_BUFFER
-#define TPM_LOG_AREA_MINIMUM_SIZE (64 * 1024)
+#define TPM_LOG_AREA_MINIMUM_SIZE (64 * KiB)
#define TPM_TCPA_ACPI_CLASS_CLIENT 0
#define TPM_TCPA_ACPI_CLASS_SERVER 1
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 15/47] hw/block: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (13 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 14/47] hw/tpm: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 16/47] hw/display: " Paolo Bonzini
` (32 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-14-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/block/m25p80.c | 5 +++--
hw/block/nvme.c | 3 ++-
hw/block/tc58128.c | 3 ++-
3 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index b0ed8fa..e8dfa14 100644
--- a/hw/block/m25p80.c
+++ b/hw/block/m25p80.c
@@ -22,6 +22,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "sysemu/block-backend.h"
#include "hw/ssi/ssi.h"
@@ -541,12 +542,12 @@ static void flash_erase(Flash *s, int offset, FlashCMD cmd)
switch (cmd) {
case ERASE_4K:
case ERASE4_4K:
- len = 4 << 10;
+ len = 4 * KiB;
capa_to_assert = ER_4K;
break;
case ERASE_32K:
case ERASE4_32K:
- len = 32 << 10;
+ len = 32 * KiB;
capa_to_assert = ER_32K;
break;
case ERASE_SECTOR:
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index d5bf95b..65c84e7 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -25,6 +25,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/block/block.h"
#include "hw/hw.h"
#include "hw/pci/msix.h"
@@ -648,7 +649,7 @@ static uint16_t nvme_identify_ns(NvmeCtrl *n, NvmeIdentify *c)
static uint16_t nvme_identify_nslist(NvmeCtrl *n, NvmeIdentify *c)
{
- static const int data_len = 4096;
+ static const int data_len = 4 * KiB;
uint32_t min_nsid = le32_to_cpu(c->nsid);
uint64_t prp1 = le64_to_cpu(c->prp1);
uint64_t prp2 = le64_to_cpu(c->prp2);
diff --git a/hw/block/tc58128.c b/hw/block/tc58128.c
index 1d9f7ee..808ad76 100644
--- a/hw/block/tc58128.c
+++ b/hw/block/tc58128.c
@@ -1,4 +1,5 @@
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "hw/sh4/sh.h"
#include "hw/loader.h"
@@ -26,7 +27,7 @@ typedef struct {
static tc58128_dev tc58128_devs[2];
-#define FLASH_SIZE (16*1024*1024)
+#define FLASH_SIZE (16 * MiB)
static void init_dev(tc58128_dev * dev, const char *filename)
{
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 16/47] hw/display: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (14 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 15/47] hw/block: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 17/47] hw/misc: " Paolo Bonzini
` (31 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20180625124238.25339-15-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/display/bochs-display.c | 9 +++++----
hw/display/cirrus_vga.c | 10 +++++-----
hw/display/g364fb.c | 4 ++--
hw/display/qxl.c | 30 ++++++++++++++----------------
hw/display/vga-isa-mm.c | 5 +++--
hw/display/vga.c | 5 +++--
hw/display/virtio-gpu.c | 4 ++--
hw/display/vmware_vga.c | 3 ++-
hw/display/xenfb.c | 3 ++-
include/hw/display/xlnx_dp.h | 5 +++--
10 files changed, 41 insertions(+), 37 deletions(-)
diff --git a/hw/display/bochs-display.c b/hw/display/bochs-display.c
index 1187d77..5e0c1f1 100644
--- a/hw/display/bochs-display.c
+++ b/hw/display/bochs-display.c
@@ -5,6 +5,7 @@
* See the COPYING file in the top-level directory.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "hw/pci/pci.h"
#include "hw/display/bochs-vbe.h"
@@ -70,7 +71,7 @@ static uint64_t bochs_display_vbe_read(void *ptr, hwaddr addr,
case VBE_DISPI_INDEX_ID:
return VBE_DISPI_ID5;
case VBE_DISPI_INDEX_VIDEO_MEMORY_64K:
- return s->vgamem / (64 * 1024);
+ return s->vgamem / (64 * KiB);
}
if (index >= ARRAY_SIZE(s->vbe_regs)) {
@@ -258,10 +259,10 @@ static void bochs_display_realize(PCIDevice *dev, Error **errp)
s->con = graphic_console_init(DEVICE(dev), 0, &bochs_display_gfx_ops, s);
- if (s->vgamem < (4 * 1024 * 1024)) {
+ if (s->vgamem < 4 * MiB) {
error_setg(errp, "bochs-display: video memory too small");
}
- if (s->vgamem > (256 * 1024 * 1024)) {
+ if (s->vgamem > 256 * MiB) {
error_setg(errp, "bochs-display: video memory too big");
}
s->vgamem = pow2ceil(s->vgamem);
@@ -323,7 +324,7 @@ static void bochs_display_exit(PCIDevice *dev)
}
static Property bochs_display_properties[] = {
- DEFINE_PROP_SIZE("vgamem", BochsDisplayState, vgamem, 16 * 1024 * 1024),
+ DEFINE_PROP_SIZE("vgamem", BochsDisplayState, vgamem, 16 * MiB),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c
index 138ae96..5e44f00 100644
--- a/hw/display/cirrus_vga.c
+++ b/hw/display/cirrus_vga.c
@@ -27,6 +27,7 @@
* available at http://home.worldonline.dk/~finth/
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "trace.h"
#include "hw/hw.h"
@@ -2218,7 +2219,7 @@ static inline void cirrus_cursor_compute_yrange(CirrusVGAState *s)
uint32_t content;
int y, y_min, y_max;
- src = s->vga.vram_ptr + s->real_vram_size - 16 * 1024;
+ src = s->vga.vram_ptr + s->real_vram_size - 16 * KiB;
if (s->vga.sr[0x12] & CIRRUS_CURSOR_LARGE) {
src += (s->vga.sr[0x13] & 0x3c) * 256;
y_min = 64;
@@ -2347,7 +2348,7 @@ static void cirrus_cursor_draw_line(VGACommonState *s1, uint8_t *d1, int scr_y)
return;
}
- src = s->vga.vram_ptr + s->real_vram_size - 16 * 1024;
+ src = s->vga.vram_ptr + s->real_vram_size - 16 * KiB;
if (s->vga.sr[0x12] & CIRRUS_CURSOR_LARGE) {
src += (s->vga.sr[0x13] & 0x3c) * 256;
src += (scr_y - s->vga.hw_cursor_y) * 16;
@@ -2995,8 +2996,7 @@ static void cirrus_init_common(CirrusVGAState *s, Object *owner,
/* I/O handler for LFB */
memory_region_init_io(&s->cirrus_linear_io, owner, &cirrus_linear_io_ops, s,
- "cirrus-linear-io", s->vga.vram_size_mb
- * 1024 * 1024);
+ "cirrus-linear-io", s->vga.vram_size_mb * MiB);
memory_region_set_flush_coalesced(&s->cirrus_linear_io);
/* I/O handler for LFB */
@@ -3013,7 +3013,7 @@ static void cirrus_init_common(CirrusVGAState *s, Object *owner,
memory_region_set_flush_coalesced(&s->cirrus_mmio_io);
s->real_vram_size =
- (s->device_id == CIRRUS_ID_CLGD5446) ? 4096 * 1024 : 2048 * 1024;
+ (s->device_id == CIRRUS_ID_CLGD5446) ? 4 * MiB : 2 * MiB;
/* XXX: s->vga.vram_size must be a power of two */
s->cirrus_addr_mask = s->real_vram_size - 1;
diff --git a/hw/display/g364fb.c b/hw/display/g364fb.c
index 3d75394..fbc2b24 100644
--- a/hw/display/g364fb.c
+++ b/hw/display/g364fb.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "qemu/error-report.h"
#include "ui/console.h"
@@ -510,8 +511,7 @@ static void g364fb_sysbus_reset(DeviceState *d)
}
static Property g364fb_sysbus_properties[] = {
- DEFINE_PROP_UINT32("vram_size", G364SysBusState, g364.vram_size,
- 8 * 1024 * 1024),
+ DEFINE_PROP_UINT32("vram_size", G364SysBusState, g364.vram_size, 8 * MiB),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/display/qxl.c b/hw/display/qxl.c
index a71714c..b09a039 100644
--- a/hw/display/qxl.c
+++ b/hw/display/qxl.c
@@ -19,6 +19,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include <zlib.h>
#include "qapi/error.h"
@@ -2012,11 +2013,11 @@ static void qxl_init_ramsize(PCIQXLDevice *qxl)
if (qxl->vgamem_size_mb > 256) {
qxl->vgamem_size_mb = 256;
}
- qxl->vgamem_size = qxl->vgamem_size_mb * 1024 * 1024;
+ qxl->vgamem_size = qxl->vgamem_size_mb * MiB;
/* vga ram (bar 0, total) */
if (qxl->ram_size_mb != -1) {
- qxl->vga.vram_size = qxl->ram_size_mb * 1024 * 1024;
+ qxl->vga.vram_size = qxl->ram_size_mb * MiB;
}
if (qxl->vga.vram_size < qxl->vgamem_size * 2) {
qxl->vga.vram_size = qxl->vgamem_size * 2;
@@ -2024,7 +2025,7 @@ static void qxl_init_ramsize(PCIQXLDevice *qxl)
/* vram32 (surfaces, 32bit, bar 1) */
if (qxl->vram32_size_mb != -1) {
- qxl->vram32_size = qxl->vram32_size_mb * 1024 * 1024;
+ qxl->vram32_size = qxl->vram32_size_mb * MiB;
}
if (qxl->vram32_size < 4096) {
qxl->vram32_size = 4096;
@@ -2032,7 +2033,7 @@ static void qxl_init_ramsize(PCIQXLDevice *qxl)
/* vram (surfaces, 64bit, bar 4+5) */
if (qxl->vram_size_mb != -1) {
- qxl->vram_size = (uint64_t)qxl->vram_size_mb * 1024 * 1024;
+ qxl->vram_size = (uint64_t)qxl->vram_size_mb * MiB;
}
if (qxl->vram_size < qxl->vram32_size) {
qxl->vram_size = qxl->vram32_size;
@@ -2134,13 +2135,12 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp)
}
/* print pci bar details */
- dprint(qxl, 1, "ram/%s: %d MB [region 0]\n",
- qxl->id == 0 ? "pri" : "sec",
- qxl->vga.vram_size / (1024*1024));
- dprint(qxl, 1, "vram/32: %" PRIx64 "d MB [region 1]\n",
- qxl->vram32_size / (1024*1024));
- dprint(qxl, 1, "vram/64: %" PRIx64 "d MB %s\n",
- qxl->vram_size / (1024*1024),
+ dprint(qxl, 1, "ram/%s: %" PRId64 " MB [region 0]\n",
+ qxl->id == 0 ? "pri" : "sec", qxl->vga.vram_size / MiB);
+ dprint(qxl, 1, "vram/32: %" PRIx64 " MB [region 1]\n",
+ qxl->vram32_size / MiB);
+ dprint(qxl, 1, "vram/64: %" PRIx64 " MB %s\n",
+ qxl->vram_size / MiB,
qxl->vram32_size < qxl->vram_size ? "[region 4]" : "[unmapped]");
qxl->ssd.qxl.base.sif = &qxl_interface.base;
@@ -2167,7 +2167,7 @@ static void qxl_realize_primary(PCIDevice *dev, Error **errp)
qxl->id = 0;
qxl_init_ramsize(qxl);
vga->vbe_size = qxl->vgamem_size;
- vga->vram_size_mb = qxl->vga.vram_size >> 20;
+ vga->vram_size_mb = qxl->vga.vram_size / MiB;
vga_common_init(vga, OBJECT(dev), true);
vga_init(vga, OBJECT(dev),
pci_address_space(dev), pci_address_space_io(dev), false);
@@ -2391,10 +2391,8 @@ static VMStateDescription qxl_vmstate = {
};
static Property qxl_properties[] = {
- DEFINE_PROP_UINT32("ram_size", PCIQXLDevice, vga.vram_size,
- 64 * 1024 * 1024),
- DEFINE_PROP_UINT64("vram_size", PCIQXLDevice, vram32_size,
- 64 * 1024 * 1024),
+ DEFINE_PROP_UINT32("ram_size", PCIQXLDevice, vga.vram_size, 64 * MiB),
+ DEFINE_PROP_UINT64("vram_size", PCIQXLDevice, vram32_size, 64 * MiB),
DEFINE_PROP_UINT32("revision", PCIQXLDevice, revision,
QXL_DEFAULT_REVISION),
DEFINE_PROP_UINT32("debug", PCIQXLDevice, debug, 0),
diff --git a/hw/display/vga-isa-mm.c b/hw/display/vga-isa-mm.c
index e887b45..bd58141 100644
--- a/hw/display/vga-isa-mm.c
+++ b/hw/display/vga-isa-mm.c
@@ -22,12 +22,13 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "hw/display/vga.h"
#include "vga_int.h"
#include "ui/pixel_ops.h"
-#define VGA_RAM_SIZE (8192 * 1024)
+#define VGA_RAM_SIZE (8 * MiB)
typedef struct ISAVGAMMState {
VGACommonState vga;
@@ -130,7 +131,7 @@ int isa_vga_mm_init(hwaddr vram_base,
s = g_malloc0(sizeof(*s));
- s->vga.vram_size_mb = VGA_RAM_SIZE >> 20;
+ s->vga.vram_size_mb = VGA_RAM_SIZE / MiB;
vga_common_init(&s->vga, NULL, true);
vga_mm_init(s, vram_base, ctrl_base, it_shift, address_space);
diff --git a/hw/display/vga.c b/hw/display/vga.c
index ed476e4..d759918 100644
--- a/hw/display/vga.c
+++ b/hw/display/vga.c
@@ -22,6 +22,7 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "hw/hw.h"
#include "hw/display/vga.h"
@@ -721,7 +722,7 @@ uint32_t vbe_ioport_read_data(void *opaque, uint32_t addr)
val = s->vbe_regs[s->vbe_index];
}
} else if (s->vbe_index == VBE_DISPI_INDEX_VIDEO_MEMORY_64K) {
- val = s->vbe_size / (64 * 1024);
+ val = s->vbe_size / (64 * KiB);
} else {
val = 0;
}
@@ -2192,7 +2193,7 @@ void vga_common_init(VGACommonState *s, Object *obj, bool global_vmstate)
s->vram_size_mb = uint_clamp(s->vram_size_mb, 1, 512);
s->vram_size_mb = pow2ceil(s->vram_size_mb);
- s->vram_size = s->vram_size_mb << 20;
+ s->vram_size = s->vram_size_mb * MiB;
if (!s->vbe_size) {
s->vbe_size = s->vram_size;
diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c
index 2dd3c34..71a0071 100644
--- a/hw/display/virtio-gpu.c
+++ b/hw/display/virtio-gpu.c
@@ -12,6 +12,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-common.h"
#include "qemu/iov.h"
#include "ui/console.h"
@@ -1314,8 +1315,7 @@ static const VMStateDescription vmstate_virtio_gpu = {
static Property virtio_gpu_properties[] = {
DEFINE_PROP_UINT32("max_outputs", VirtIOGPU, conf.max_outputs, 1),
- DEFINE_PROP_SIZE("max_hostmem", VirtIOGPU, conf.max_hostmem,
- 256 * 1024 * 1024),
+ DEFINE_PROP_SIZE("max_hostmem", VirtIOGPU, conf.max_hostmem, 256 * MiB),
#ifdef CONFIG_VIRGL
DEFINE_PROP_BIT("virgl", VirtIOGPU, conf.flags,
VIRTIO_GPU_FLAG_VIRGL_ENABLED, true),
diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c
index bd3e8b3..08deb08 100644
--- a/hw/display/vmware_vga.c
+++ b/hw/display/vmware_vga.c
@@ -22,6 +22,7 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "hw/hw.h"
#include "hw/loader.h"
@@ -565,7 +566,7 @@ static inline int vmsvga_fifo_length(struct vmsvga_state_s *s)
s->fifo_next >= SVGA_FIFO_SIZE) {
return 0;
}
- if (s->fifo_max < s->fifo_min + 10 * 1024) {
+ if (s->fifo_max < s->fifo_min + 10 * KiB) {
return 0;
}
diff --git a/hw/display/xenfb.c b/hw/display/xenfb.c
index 911291c..0330dc6 100644
--- a/hw/display/xenfb.c
+++ b/hw/display/xenfb.c
@@ -25,6 +25,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "ui/input.h"
@@ -889,7 +890,7 @@ static int fb_initialise(struct XenDevice *xendev)
return rc;
fb_page = fb->c.page;
- rc = xenfb_configure_fb(fb, videoram * 1024 * 1024U,
+ rc = xenfb_configure_fb(fb, videoram * MiB,
fb_page->width, fb_page->height, fb_page->depth,
fb_page->mem_length, 0, fb_page->line_length);
if (rc != 0)
diff --git a/include/hw/display/xlnx_dp.h b/include/hw/display/xlnx_dp.h
index ee046a5..26b759c 100644
--- a/include/hw/display/xlnx_dp.h
+++ b/include/hw/display/xlnx_dp.h
@@ -29,14 +29,15 @@
#include "hw/display/dpcd.h"
#include "hw/i2c/i2c-ddc.h"
#include "qemu/fifo8.h"
+#include "qemu/units.h"
#include "hw/dma/xlnx_dpdma.h"
#include "audio/audio.h"
#ifndef XLNX_DP_H
#define XLNX_DP_H
-#define AUD_CHBUF_MAX_DEPTH 32768
-#define MAX_QEMU_BUFFER_SIZE 4096
+#define AUD_CHBUF_MAX_DEPTH (32 * KiB)
+#define MAX_QEMU_BUFFER_SIZE (4 * KiB)
#define DP_CORE_REG_ARRAY_SIZE (0x3AF >> 2)
#define DP_AVBUF_REG_ARRAY_SIZE (0x238 >> 2)
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 17/47] hw/misc: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (15 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 16/47] hw/display: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 18/47] hw/riscv: " Paolo Bonzini
` (30 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-16-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/misc/auxbus.c | 3 ++-
hw/misc/edu.c | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c
index b4cacd6..b8a8721 100644
--- a/hw/misc/auxbus.c
+++ b/hw/misc/auxbus.c
@@ -27,6 +27,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/log.h"
#include "hw/misc/auxbus.h"
#include "hw/i2c/i2c.h"
@@ -68,7 +69,7 @@ AUXBus *aux_init_bus(DeviceState *parent, const char *name)
/* Memory related. */
bus->aux_io = g_malloc(sizeof(*bus->aux_io));
- memory_region_init(bus->aux_io, OBJECT(bus), "aux-io", (1 << 20));
+ memory_region_init(bus->aux_io, OBJECT(bus), "aux-io", 1 * MiB);
address_space_init(&bus->aux_addr_space, bus->aux_io, "aux-io");
return bus;
}
diff --git a/hw/misc/edu.c b/hw/misc/edu.c
index 34eb05d..df26a4d 100644
--- a/hw/misc/edu.c
+++ b/hw/misc/edu.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/pci/pci.h"
#include "hw/pci/msi.h"
#include "qemu/timer.h"
@@ -357,7 +358,7 @@ static void pci_edu_realize(PCIDevice *pdev, Error **errp)
edu, QEMU_THREAD_JOINABLE);
memory_region_init_io(&edu->mmio, OBJECT(edu), &edu_mmio_ops, edu,
- "edu-mmio", 1 << 20);
+ "edu-mmio", 1 * MiB);
pci_register_bar(pdev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &edu->mmio);
}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 18/47] hw/riscv: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (16 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 17/47] hw/misc: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 19/47] hw/m68k: " Paolo Bonzini
` (29 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Michael Clark <mjc@sifive.com>
Message-Id: <20180625124238.25339-17-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/riscv/virt.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index ad03113..34d4899 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -19,6 +19,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/log.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
@@ -84,7 +85,7 @@ static hwaddr load_initrd(const char *filename, uint64_t mem_size,
* halfway into RAM, and for boards with 256MB of RAM or more we put
* the initrd at 128MB.
*/
- *start = kernel_entry + MIN(mem_size / 2, 128 * 1024 * 1024);
+ *start = kernel_entry + MIN(mem_size / 2, 128 * MiB);
size = load_ramdisk(filename, *start, mem_size - *start);
if (size == -1) {
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 19/47] hw/m68k: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (17 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 18/47] hw/riscv: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 20/47] hw/sparc: " Paolo Bonzini
` (28 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Thomas Huth <thuth@tuxfamily.org>
Message-Id: <20180625124238.25339-18-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/m68k/mcf5208.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c
index ae3dcc9..0f2245d 100644
--- a/hw/m68k/mcf5208.c
+++ b/hw/m68k/mcf5208.c
@@ -6,6 +6,7 @@
* This code is licensed under the GPL
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "qemu-common.h"
@@ -241,7 +242,7 @@ static void mcf5208evb_init(MachineState *machine)
memory_region_add_subregion(address_space_mem, 0x40000000, ram);
/* Internal SRAM. */
- memory_region_init_ram(sram, NULL, "mcf5208.sram", 16384, &error_fatal);
+ memory_region_init_ram(sram, NULL, "mcf5208.sram", 16 * KiB, &error_fatal);
memory_region_add_subregion(address_space_mem, 0x80000000, sram);
/* Internal peripherals. */
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 20/47] hw/sparc: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (18 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 19/47] hw/m68k: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 21/47] hw/s390x: " Paolo Bonzini
` (27 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-19-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/sparc/leon3.c | 10 ++++++----
hw/sparc/sun4m.c | 10 +++++-----
hw/sparc64/niagara.c | 3 ++-
hw/sparc64/sun4u.c | 4 ++--
4 files changed, 15 insertions(+), 12 deletions(-)
diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c
index 98fa6ad..fa98ab8 100644
--- a/hw/sparc/leon3.c
+++ b/hw/sparc/leon3.c
@@ -22,6 +22,7 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "qemu-common.h"
@@ -139,9 +140,10 @@ static void leon3_generic_hw_init(MachineState *machine)
env->qemu_irq_ack = leon3_irq_manager;
/* Allocate RAM */
- if ((uint64_t)ram_size > (1UL << 30)) {
- error_report("Too much memory for this machine: %d, maximum 1G",
- (unsigned int)(ram_size / (1024 * 1024)));
+ if (ram_size > 1 * GiB) {
+ error_report("Too much memory for this machine: %" PRId64 "MB,"
+ " maximum 1G",
+ ram_size / MiB);
exit(1);
}
@@ -149,7 +151,7 @@ static void leon3_generic_hw_init(MachineState *machine)
memory_region_add_subregion(address_space_mem, 0x40000000, ram);
/* Allocate BIOS */
- prom_size = 8 * 1024 * 1024; /* 8Mb */
+ prom_size = 8 * MiB;
memory_region_init_ram(prom, NULL, "Leon3.bios", prom_size, &error_fatal);
memory_region_set_readonly(prom, true);
memory_region_add_subregion(address_space_mem, 0x00000000, prom);
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index b984d2d..a9d4775 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@ -22,6 +22,7 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -45,7 +46,6 @@
#include "hw/loader.h"
#include "elf.h"
#include "trace.h"
-#include "qemu/cutils.h"
/*
* Sun4m architecture was used in the following machines:
@@ -66,7 +66,7 @@
#define KERNEL_LOAD_ADDR 0x00004000
#define CMDLINE_ADDR 0x007ff000
#define INITRD_LOAD_ADDR 0x00800000
-#define PROM_SIZE_MAX (1024 * 1024)
+#define PROM_SIZE_MAX (1 * MiB)
#define PROM_VADDR 0xffd00000
#define PROM_FILENAME "openbios-sparc32"
#define CFG_ADDR 0xd00000510ULL
@@ -774,9 +774,9 @@ static void ram_init(hwaddr addr, ram_addr_t RAM_size,
/* allocate RAM */
if ((uint64_t)RAM_size > max_mem) {
- error_report("Too much memory for this machine: %d, maximum %d",
- (unsigned int)(RAM_size / (1024 * 1024)),
- (unsigned int)(max_mem / (1024 * 1024)));
+ error_report("Too much memory for this machine: %" PRId64 ","
+ " maximum %" PRId64,
+ RAM_size / MiB, max_mem / MiB);
exit(1);
}
dev = qdev_create(NULL, "memory");
diff --git a/hw/sparc64/niagara.c b/hw/sparc64/niagara.c
index 22c4655..4fa8cb2 100644
--- a/hw/sparc64/niagara.c
+++ b/hw/sparc64/niagara.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-common.h"
#include "cpu.h"
#include "hw/hw.h"
@@ -84,7 +85,7 @@ typedef struct NiagaraBoardState {
#define NIAGARA_PROM_BASE 0xfff0000000ULL
#define NIAGARA_Q_OFFSET 0x10000ULL
#define NIAGARA_OBP_OFFSET 0x80000ULL
-#define PROM_SIZE_MAX (4 * 1024 * 1024)
+#define PROM_SIZE_MAX (4 * MiB)
static void add_rom_or_fail(const char *file, const hwaddr addr)
{
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index 3975a7b..97d1269 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -22,6 +22,7 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "qemu-common.h"
@@ -52,11 +53,10 @@
#include "hw/loader.h"
#include "elf.h"
#include "trace.h"
-#include "qemu/cutils.h"
#define KERNEL_LOAD_ADDR 0x00404000
#define CMDLINE_ADDR 0x003ff000
-#define PROM_SIZE_MAX (4 * 1024 * 1024)
+#define PROM_SIZE_MAX (4 * MiB)
#define PROM_VADDR 0x000ffd00000ULL
#define PBM_SPECIAL_BASE 0x1fe00000000ULL
#define PBM_MEM_BASE 0x1ff00000000ULL
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 21/47] hw/s390x: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (19 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 20/47] hw/sparc: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 22/47] hw/hppa: " Paolo Bonzini
` (26 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <20180625124238.25339-20-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/s390x/s390-skeys.c | 3 ++-
hw/s390x/s390-stattrib.c | 3 ++-
hw/s390x/sclp.c | 3 ++-
3 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/hw/s390x/s390-skeys.c b/hw/s390x/s390-skeys.c
index 76241c2..15f7ab0 100644
--- a/hw/s390x/s390-skeys.c
+++ b/hw/s390x/s390-skeys.c
@@ -10,6 +10,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/boards.h"
#include "hw/s390x/storage-keys.h"
#include "qapi/error.h"
@@ -19,7 +20,7 @@
#include "sysemu/kvm.h"
#include "migration/register.h"
-#define S390_SKEYS_BUFFER_SIZE 131072 /* Room for 128k storage keys */
+#define S390_SKEYS_BUFFER_SIZE (128 * KiB) /* Room for 128k storage keys */
#define S390_SKEYS_SAVE_FLAG_EOS 0x01
#define S390_SKEYS_SAVE_FLAG_SKEYS 0x02
#define S390_SKEYS_SAVE_FLAG_ERROR 0x04
diff --git a/hw/s390x/s390-stattrib.c b/hw/s390x/s390-stattrib.c
index 70b9555..5161a16 100644
--- a/hw/s390x/s390-stattrib.c
+++ b/hw/s390x/s390-stattrib.c
@@ -10,6 +10,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/boards.h"
#include "cpu.h"
#include "migration/qemu-file.h"
@@ -20,7 +21,7 @@
#include "qapi/error.h"
#include "qapi/qmp/qdict.h"
-#define CMMA_BLOCK_SIZE (1 << 10)
+#define CMMA_BLOCK_SIZE (1 * KiB)
#define STATTR_FLAG_EOS 0x01ULL
#define STATTR_FLAG_MORE 0x02ULL
diff --git a/hw/s390x/sclp.c b/hw/s390x/sclp.c
index 047d577..bd2a024 100644
--- a/hw/s390x/sclp.c
+++ b/hw/s390x/sclp.c
@@ -13,6 +13,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "cpu.h"
#include "sysemu/sysemu.h"
@@ -289,7 +290,7 @@ static void sclp_realize(DeviceState *dev, Error **errp)
ret = s390_set_memory_limit(machine->maxram_size, &hw_limit);
if (ret == -E2BIG) {
error_setg(&err, "host supports a maximum of %" PRIu64 " GB",
- hw_limit >> 30);
+ hw_limit / GiB);
} else if (ret) {
error_setg(&err, "setting the guest size failed");
}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 22/47] hw/hppa: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (20 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 21/47] hw/s390x: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 23/47] hw/xtensa: " Paolo Bonzini
` (25 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <20180625124238.25339-20-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/hppa/dino.c | 3 ++-
hw/hppa/machine.c | 10 +++++-----
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/hw/hppa/dino.c b/hw/hppa/dino.c
index 26f2704..564b938 100644
--- a/hw/hppa/dino.c
+++ b/hw/hppa/dino.c
@@ -11,6 +11,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "cpu.h"
#include "hw/hw.h"
@@ -76,7 +77,7 @@
/* #define xxx 0x200 - bit 9 not used */
#define RS232INT 0x400
-#define DINO_MEM_CHUNK_SIZE (8 * 1024 * 1024) /* 8MB */
+#define DINO_MEM_CHUNK_SIZE (8 * MiB)
#define DINO_PCI_HOST_BRIDGE(obj) \
OBJECT_CHECK(DinoState, (obj), TYPE_DINO_PCI_HOST_BRIDGE)
diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index 2ba2696..cf7c61c 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -17,7 +17,7 @@
#include "hw/timer/i8254.h"
#include "hw/char/serial.h"
#include "hppa_sys.h"
-#include "qemu/cutils.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu/log.h"
@@ -178,8 +178,8 @@ static void machine_hppa_init(MachineState *machine)
}
qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64
"-0x%08" PRIx64 ", entry at 0x%08" PRIx64
- ", size %ld kB.\n",
- kernel_low, kernel_high, kernel_entry, size / 1024);
+ ", size %" PRIu64 " kB\n",
+ kernel_low, kernel_high, kernel_entry, size / KiB);
if (kernel_cmdline) {
cpu[0]->env.gr[24] = 0x4000;
@@ -203,8 +203,8 @@ static void machine_hppa_init(MachineState *machine)
(1) Due to sign-extension problems and PDC,
put the initrd no higher than 1G.
(2) Reserve 64k for stack. */
- initrd_base = MIN(ram_size, 1024 * 1024 * 1024);
- initrd_base = initrd_base - 64 * 1024;
+ initrd_base = MIN(ram_size, 1 * GiB);
+ initrd_base = initrd_base - 64 * KiB;
initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK;
if (initrd_base < kernel_high) {
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 23/47] hw/xtensa: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (21 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 22/47] hw/hppa: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 24/47] hw/alpha: " Paolo Bonzini
` (24 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
$ git grep -n '[<>][<>]= ?[1-5]0'
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
Message-Id: <20180625124238.25339-22-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/xtensa/xtfpga.c | 9 +++++----
target/xtensa/helper.c | 5 +++--
2 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c
index 5dc1303..b3161de 100644
--- a/hw/xtensa/xtfpga.c
+++ b/hw/xtensa/xtfpga.c
@@ -26,6 +26,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "cpu.h"
#include "sysemu/sysemu.h"
@@ -152,7 +153,7 @@ static void xtfpga_net_init(MemoryRegion *address_space,
sysbus_mmio_get_region(s, 1));
ram = g_malloc(sizeof(*ram));
- memory_region_init_ram_nomigrate(ram, OBJECT(s), "open_eth.ram", 16384,
+ memory_region_init_ram_nomigrate(ram, OBJECT(s), "open_eth.ram", 16 * KiB,
&error_fatal);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space, buffers, ram);
@@ -229,7 +230,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine)
const char *kernel_cmdline = qemu_opt_get(machine_opts, "append");
const char *dtb_filename = qemu_opt_get(machine_opts, "dtb");
const char *initrd_filename = qemu_opt_get(machine_opts, "initrd");
- const unsigned system_io_size = 224 * 1024 * 1024;
+ const unsigned system_io_size = 224 * MiB;
int n;
for (n = 0; n < smp_cpus; n++) {
@@ -342,7 +343,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine)
cpu_physical_memory_write(cur_lowmem, fdt, fdt_size);
cur_tagptr = put_tag(cur_tagptr, BP_TAG_FDT,
sizeof(dtb_addr), &dtb_addr);
- cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + fdt_size, 4096);
+ cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + fdt_size, 4 * KiB);
}
#else
if (dtb_filename) {
@@ -370,7 +371,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine)
initrd_location.end = tswap32(cur_lowmem + initrd_size);
cur_tagptr = put_tag(cur_tagptr, BP_TAG_INITRD,
sizeof(initrd_location), &initrd_location);
- cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + initrd_size, 4096);
+ cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + initrd_size, 4 * KiB);
}
cur_tagptr = put_tag(cur_tagptr, BP_TAG_LAST, 0, NULL);
env->regs[2] = tagptr;
diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
index 34844ee..c9a6132 100644
--- a/target/xtensa/helper.c
+++ b/target/xtensa/helper.c
@@ -26,6 +26,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "cpu.h"
#include "exec/exec-all.h"
#include "exec/gdbstub.h"
@@ -726,10 +727,10 @@ static void dump_tlb(FILE *f, fprintf_function cpu_fprintf,
bool print_header = true;
if (sz >= 0x100000) {
- sz >>= 20;
+ sz /= MiB;
sz_text = "MB";
} else {
- sz >>= 10;
+ sz /= KiB;
sz_text = "KB";
}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 24/47] hw/alpha: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (22 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 23/47] hw/xtensa: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 25/47] hw/tricore: " Paolo Bonzini
` (23 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-23-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/alpha/typhoon.c | 17 ++++++++---------
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c
index d3ed7cd..d74b5b5 100644
--- a/hw/alpha/typhoon.c
+++ b/hw/alpha/typhoon.c
@@ -7,6 +7,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "cpu.h"
#include "hw/hw.h"
@@ -813,8 +814,6 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
qemu_irq *p_rtc_irq,
AlphaCPU *cpus[4], pci_map_irq_fn sys_map_irq)
{
- const uint64_t MB = 1024 * 1024;
- const uint64_t GB = 1024 * MB;
MemoryRegion *addr_space = get_system_memory();
DeviceState *dev;
TyphoonState *s;
@@ -855,30 +854,30 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
/* Pchip0 CSRs, 0x801.8000.0000, 256MB. */
memory_region_init_io(&s->pchip.region, OBJECT(s), &pchip_ops, s, "pchip0",
- 256*MB);
+ 256 * MiB);
memory_region_add_subregion(addr_space, 0x80180000000ULL,
&s->pchip.region);
/* Cchip CSRs, 0x801.A000.0000, 256MB. */
memory_region_init_io(&s->cchip.region, OBJECT(s), &cchip_ops, s, "cchip0",
- 256*MB);
+ 256 * MiB);
memory_region_add_subregion(addr_space, 0x801a0000000ULL,
&s->cchip.region);
/* Dchip CSRs, 0x801.B000.0000, 256MB. */
memory_region_init_io(&s->dchip_region, OBJECT(s), &dchip_ops, s, "dchip0",
- 256*MB);
+ 256 * MiB);
memory_region_add_subregion(addr_space, 0x801b0000000ULL,
&s->dchip_region);
/* Pchip0 PCI memory, 0x800.0000.0000, 4GB. */
- memory_region_init(&s->pchip.reg_mem, OBJECT(s), "pci0-mem", 4*GB);
+ memory_region_init(&s->pchip.reg_mem, OBJECT(s), "pci0-mem", 4 * GiB);
memory_region_add_subregion(addr_space, 0x80000000000ULL,
&s->pchip.reg_mem);
/* Pchip0 PCI I/O, 0x801.FC00.0000, 32MB. */
memory_region_init_io(&s->pchip.reg_io, OBJECT(s), &alpha_pci_ignore_ops,
- NULL, "pci0-io", 32*MB);
+ NULL, "pci0-io", 32 * MiB);
memory_region_add_subregion(addr_space, 0x801fc000000ULL,
&s->pchip.reg_io);
@@ -899,13 +898,13 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
/* Pchip0 PCI special/interrupt acknowledge, 0x801.F800.0000, 64MB. */
memory_region_init_io(&s->pchip.reg_iack, OBJECT(s), &alpha_pci_iack_ops,
- b, "pci0-iack", 64*MB);
+ b, "pci0-iack", 64 * MiB);
memory_region_add_subregion(addr_space, 0x801f8000000ULL,
&s->pchip.reg_iack);
/* Pchip0 PCI configuration, 0x801.FE00.0000, 16MB. */
memory_region_init_io(&s->pchip.reg_conf, OBJECT(s), &alpha_pci_conf1_ops,
- b, "pci0-conf", 16*MB);
+ b, "pci0-conf", 16 * MiB);
memory_region_add_subregion(addr_space, 0x801fe000000ULL,
&s->pchip.reg_conf);
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 25/47] hw/tricore: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (23 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 24/47] hw/alpha: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 26/47] hw/microblaze: " Paolo Bonzini
` (22 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <20180625124238.25339-24-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/tricore/tricore_testboard.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/hw/tricore/tricore_testboard.c b/hw/tricore/tricore_testboard.c
index 8e61dfc..a58096f 100644
--- a/hw/tricore/tricore_testboard.c
+++ b/hw/tricore/tricore_testboard.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -72,17 +73,17 @@ static void tricore_testboard_init(MachineState *machine, int board_id)
cpu = TRICORE_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
memory_region_init_ram(ext_cram, NULL, "powerlink_ext_c.ram",
- 2 * 1024 * 1024, &error_fatal);
+ 2 * MiB, &error_fatal);
memory_region_init_ram(ext_dram, NULL, "powerlink_ext_d.ram",
- 4 * 1024 * 1024, &error_fatal);
- memory_region_init_ram(int_cram, NULL, "powerlink_int_c.ram", 48 * 1024,
+ 4 * MiB, &error_fatal);
+ memory_region_init_ram(int_cram, NULL, "powerlink_int_c.ram", 48 * KiB,
&error_fatal);
- memory_region_init_ram(int_dram, NULL, "powerlink_int_d.ram", 48 * 1024,
+ memory_region_init_ram(int_dram, NULL, "powerlink_int_d.ram", 48 * KiB,
&error_fatal);
memory_region_init_ram(pcp_data, NULL, "powerlink_pcp_data.ram",
- 16 * 1024, &error_fatal);
+ 16 * KiB, &error_fatal);
memory_region_init_ram(pcp_text, NULL, "powerlink_pcp_text.ram",
- 32 * 1024, &error_fatal);
+ 32 * KiB, &error_fatal);
memory_region_add_subregion(sysmem, 0x80000000, ext_cram);
memory_region_add_subregion(sysmem, 0xa1000000, ext_dram);
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 26/47] hw/microblaze: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (24 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 25/47] hw/tricore: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 27/47] hw/nios2: " Paolo Bonzini
` (21 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-25-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/microblaze/petalogix_ml605_mmu.c | 7 ++++---
hw/microblaze/petalogix_s3adsp1800_mmu.c | 7 ++++---
2 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c
index 6c4a544..c730878 100644
--- a/hw/microblaze/petalogix_ml605_mmu.c
+++ b/hw/microblaze/petalogix_ml605_mmu.c
@@ -26,6 +26,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -44,8 +45,8 @@
#include "hw/stream.h"
-#define LMB_BRAM_SIZE (128 * 1024)
-#define FLASH_SIZE (32 * 1024 * 1024)
+#define LMB_BRAM_SIZE (128 * KiB)
+#define FLASH_SIZE (32 * MiB)
#define BINARY_DEVICE_TREE_FILE "petalogix-ml605.dtb"
@@ -109,7 +110,7 @@ petalogix_ml605_init(MachineState *machine)
pflash_cfi01_register(FLASH_BASEADDR,
NULL, "petalogix_ml605.flash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- (64 * 1024), FLASH_SIZE >> 16,
+ 64 * KiB, FLASH_SIZE >> 16,
2, 0x89, 0x18, 0x0000, 0x0, 0);
diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petalogix_s3adsp1800_mmu.c
index 0da3e62..5cf7b84 100644
--- a/hw/microblaze/petalogix_s3adsp1800_mmu.c
+++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c
@@ -24,6 +24,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -39,8 +40,8 @@
#include "boot.h"
-#define LMB_BRAM_SIZE (128 * 1024)
-#define FLASH_SIZE (16 * 1024 * 1024)
+#define LMB_BRAM_SIZE (128 * KiB)
+#define FLASH_SIZE (16 * MiB)
#define BINARY_DEVICE_TREE_FILE "petalogix-s3adsp1800.dtb"
@@ -87,7 +88,7 @@ petalogix_s3adsp1800_init(MachineState *machine)
pflash_cfi01_register(FLASH_BASEADDR,
NULL, "petalogix_s3adsp1800.flash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- (64 * 1024), FLASH_SIZE >> 16,
+ 64 * KiB, FLASH_SIZE >> 16,
1, 0x89, 0x18, 0x0000, 0x0, 1);
dev = qdev_create(NULL, "xlnx.xps-intc");
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 27/47] hw/nios2: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (25 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 26/47] hw/microblaze: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 28/47] hw/cris: " Paolo Bonzini
` (20 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-26-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/nios2/boot.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/nios2/boot.c b/hw/nios2/boot.c
index 94f436e..4bb5b60 100644
--- a/hw/nios2/boot.c
+++ b/hw/nios2/boot.c
@@ -29,6 +29,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-common.h"
#include "cpu.h"
#include "qemu/option.h"
@@ -38,7 +39,6 @@
#include "sysemu/sysemu.h"
#include "hw/loader.h"
#include "elf.h"
-#include "qemu/cutils.h"
#include "boot.h"
@@ -177,7 +177,7 @@ void nios2_load_kernel(Nios2CPU *cpu, hwaddr ddr_base,
high = ddr_base + kernel_size;
}
- high = ROUND_UP(high, 1024 * 1024);
+ high = ROUND_UP(high, 1 * MiB);
/* If initrd is available, it goes after the kernel, aligned to 1M. */
if (initrd_filename) {
@@ -213,7 +213,7 @@ void nios2_load_kernel(Nios2CPU *cpu, hwaddr ddr_base,
high += fdt_size;
/* Kernel command is at the end, 4k aligned. */
- boot_info.cmdline = ROUND_UP(high, 4096);
+ boot_info.cmdline = ROUND_UP(high, 4 * KiB);
if (kernel_cmdline && strlen(kernel_cmdline)) {
pstrcpy_targphys("cmdline", boot_info.cmdline, 256, kernel_cmdline);
}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 28/47] hw/cris: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (26 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 27/47] hw/nios2: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 29/47] hw/lm32: " Paolo Bonzini
` (19 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-27-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/cris/axis_dev88.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/cris/axis_dev88.c b/hw/cris/axis_dev88.c
index 56ee398..191292e 100644
--- a/hw/cris/axis_dev88.c
+++ b/hw/cris/axis_dev88.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -242,7 +243,7 @@ static const MemoryRegionOps gpio_ops = {
},
};
-#define INTMEM_SIZE (128 * 1024)
+#define INTMEM_SIZE (128 * KiB)
static struct cris_load_info li;
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 29/47] hw/lm32: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (27 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 28/47] hw/cris: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 30/47] hw/sh4: " Paolo Bonzini
` (18 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Michael Walle <michael@walle.cc>
Message-Id: <20180625124238.25339-28-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/lm32/lm32_boards.c | 13 +++++++------
hw/lm32/milkymist.c | 10 +++++-----
2 files changed, 12 insertions(+), 11 deletions(-)
diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c
index 1670583..fd8eccc 100644
--- a/hw/lm32/lm32_boards.c
+++ b/hw/lm32/lm32_boards.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/error-report.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -87,10 +88,10 @@ static void lm32_evr_init(MachineState *machine)
/* memory map */
hwaddr flash_base = 0x04000000;
- size_t flash_sector_size = 256 * 1024;
- size_t flash_size = 32 * 1024 * 1024;
+ size_t flash_sector_size = 256 * KiB;
+ size_t flash_size = 32 * MiB;
hwaddr ram_base = 0x08000000;
- size_t ram_size = 64 * 1024 * 1024;
+ size_t ram_size = 64 * MiB;
hwaddr timer0_base = 0x80002000;
hwaddr uart0_base = 0x80006000;
hwaddr timer1_base = 0x8000a000;
@@ -173,10 +174,10 @@ static void lm32_uclinux_init(MachineState *machine)
/* memory map */
hwaddr flash_base = 0x04000000;
- size_t flash_sector_size = 256 * 1024;
- size_t flash_size = 32 * 1024 * 1024;
+ size_t flash_sector_size = 256 * KiB;
+ size_t flash_size = 32 * MiB;
hwaddr ram_base = 0x08000000;
- size_t ram_size = 64 * 1024 * 1024;
+ size_t ram_size = 64 * MiB;
hwaddr uart0_base = 0x80000000;
hwaddr timer0_base = 0x80002000;
hwaddr timer1_base = 0x80010000;
diff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c
index c36bbc4..321f184 100644
--- a/hw/lm32/milkymist.c
+++ b/hw/lm32/milkymist.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/error-report.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -33,11 +34,10 @@
#include "milkymist-hw.h"
#include "lm32.h"
#include "exec/address-spaces.h"
-#include "qemu/cutils.h"
#define BIOS_FILENAME "mmone-bios.bin"
#define BIOS_OFFSET 0x00860000
-#define BIOS_SIZE (512*1024)
+#define BIOS_SIZE (512 * KiB)
#define KERNEL_LOAD_ADDR 0x40000000
typedef struct {
@@ -96,10 +96,10 @@ milkymist_init(MachineState *machine)
/* memory map */
hwaddr flash_base = 0x00000000;
- size_t flash_sector_size = 128 * 1024;
- size_t flash_size = 32 * 1024 * 1024;
+ size_t flash_sector_size = 128 * KiB;
+ size_t flash_size = 32 * MiB;
hwaddr sdram_base = 0x40000000;
- size_t sdram_size = 128 * 1024 * 1024;
+ size_t sdram_size = 128 * MiB;
hwaddr initrd_base = sdram_base + 0x1002000;
hwaddr cmdline_base = sdram_base + 0x1000000;
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 30/47] hw/sh4: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (28 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 29/47] hw/lm32: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 31/47] hw/mips/r4k: Constify params_size Paolo Bonzini
` (17 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-29-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/sh4/r2d.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
index 8fe8766..6a5fc46 100644
--- a/hw/sh4/r2d.c
+++ b/hw/sh4/r2d.c
@@ -24,6 +24,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -291,7 +292,7 @@ static void r2d_init(MachineState *machine)
dinfo = drive_get(IF_PFLASH, 0, 0);
pflash_cfi02_register(0x0, NULL, "r2d.flash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- (16 * 1024), FLASH_SIZE >> 16,
+ 16 * KiB, FLASH_SIZE >> 16,
1, 4, 0x0000, 0x0000, 0x0000, 0x0000,
0x555, 0x2aa, 0);
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 31/47] hw/mips/r4k: Constify params_size
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (29 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 30/47] hw/sh4: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 32/47] hw/mips: Use the IEC binary prefix definitions Paolo Bonzini
` (16 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-30-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/mips/mips_r4k.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c
index e5cf8ed..fc38b4b 100644
--- a/hw/mips/mips_r4k.c
+++ b/hw/mips/mips_r4k.c
@@ -79,8 +79,9 @@ typedef struct ResetData {
static int64_t load_kernel(void)
{
+ const size_t params_size = 264;
int64_t entry, kernel_high;
- long kernel_size, initrd_size, params_size;
+ long kernel_size, initrd_size;
ram_addr_t initrd_offset;
uint32_t *params_buf;
int big_endian;
@@ -128,7 +129,6 @@ static int64_t load_kernel(void)
}
/* Store command line. */
- params_size = 264;
params_buf = g_malloc(params_size);
params_buf[0] = tswap32(ram_size);
@@ -143,7 +143,7 @@ static int64_t load_kernel(void)
}
rom_add_blob_fixed("params", params_buf, params_size,
- (16 << 20) - 264);
+ (16 << 20) - params_size);
g_free(params_buf);
return entry;
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 32/47] hw/mips: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (30 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 31/47] hw/mips/r4k: Constify params_size Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 33/47] hw/ppc: " Paolo Bonzini
` (15 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
$ git grep -n '[<>][<>]= ?[1-5]0'
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20180625124238.25339-31-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/mips/mips_fulong2e.c | 7 ++++---
hw/mips/mips_malta.c | 25 ++++++++++++++-----------
hw/mips/mips_r4k.c | 11 ++++++-----
hw/misc/mips_itu.c | 3 ++-
hw/pci-host/xilinx-pcie.c | 5 +++--
include/hw/intc/mips_gic.h | 3 ++-
include/hw/mips/bios.h | 3 ++-
7 files changed, 33 insertions(+), 24 deletions(-)
diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
index 02fb2fd..c1694c8 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/mips_fulong2e.c
@@ -19,6 +19,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "hw/hw.h"
#include "hw/i386/pc.h"
@@ -159,7 +160,7 @@ static int64_t load_kernel (CPUMIPSState *env)
/* Setup minimum environment variables */
prom_set(prom_buf, index++, "busclock=33000000");
prom_set(prom_buf, index++, "cpuclock=100000000");
- prom_set(prom_buf, index++, "memsize=%i", loaderparams.ram_size/1024/1024);
+ prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
prom_set(prom_buf, index++, "modetty0=38400n8r");
prom_set(prom_buf, index++, NULL);
@@ -303,10 +304,10 @@ static void mips_fulong2e_init(MachineState *machine)
qemu_register_reset(main_cpu_reset, cpu);
/* fulong 2e has 256M ram. */
- ram_size = 256 * 1024 * 1024;
+ ram_size = 256 * MiB;
/* fulong 2e has a 1M flash.Winbond W39L040AP70Z */
- bios_size = 1024 * 1024;
+ bios_size = 1 * MiB;
/* allocate RAM */
memory_region_allocate_system_memory(ram, NULL, "fulong2e.ram", ram_size);
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index b9d92bf..1603f9a 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-common.h"
#include "cpu.h"
#include "hw/hw.h"
@@ -191,7 +192,7 @@ static void generate_eeprom_spd(uint8_t *eeprom, ram_addr_t ram_size)
int i;
/* work in terms of MB */
- ram_size >>= 20;
+ ram_size /= MiB;
while ((ram_size >= 4) && (nbanks <= 2)) {
int sz_log2 = MIN(31 - clz32(ram_size), 14);
@@ -843,7 +844,8 @@ static int64_t load_kernel (void)
/* The kernel allocates the bootmap memory in the low memory after
the initrd. It takes at most 128kiB for 2GB RAM and 4kiB
pages. */
- initrd_offset = (loaderparams.ram_low_size - initrd_size - 131072
+ initrd_offset = (loaderparams.ram_low_size - initrd_size
+ - (128 * KiB)
- ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
if (kernel_high >= initrd_offset) {
error_report("memory too small for initial ram disk '%s'",
@@ -1021,9 +1023,9 @@ void mips_malta_init(MachineState *machine)
mips_create_cpu(s, machine->cpu_type, &cbus_irq, &i8259_irq);
/* allocate RAM */
- if (ram_size > (2048u << 20)) {
- error_report("Too much memory for this machine: %dMB, maximum 2048MB",
- ((unsigned int)ram_size / (1 << 20)));
+ if (ram_size > 2 * GiB) {
+ error_report("Too much memory for this machine: %" PRId64 "MB,"
+ " maximum 2048MB", ram_size / MiB);
exit(1);
}
@@ -1034,17 +1036,18 @@ void mips_malta_init(MachineState *machine)
/* alias for pre IO hole access */
memory_region_init_alias(ram_low_preio, NULL, "mips_malta_low_preio.ram",
- ram_high, 0, MIN(ram_size, (256 << 20)));
+ ram_high, 0, MIN(ram_size, 256 * MiB));
memory_region_add_subregion(system_memory, 0, ram_low_preio);
/* alias for post IO hole access, if there is enough RAM */
- if (ram_size > (512 << 20)) {
+ if (ram_size > 512 * MiB) {
ram_low_postio = g_new(MemoryRegion, 1);
memory_region_init_alias(ram_low_postio, NULL,
"mips_malta_low_postio.ram",
- ram_high, 512 << 20,
- ram_size - (512 << 20));
- memory_region_add_subregion(system_memory, 512 << 20, ram_low_postio);
+ ram_high, 512 * MiB,
+ ram_size - 512 * MiB);
+ memory_region_add_subregion(system_memory, 512 * MiB,
+ ram_low_postio);
}
#ifdef TARGET_WORDS_BIGENDIAN
@@ -1076,7 +1079,7 @@ void mips_malta_init(MachineState *machine)
bios = pflash_cfi01_get_memory(fl);
fl_idx++;
if (kernel_filename) {
- ram_low_size = MIN(ram_size, 256 << 20);
+ ram_low_size = MIN(ram_size, 256 * MiB);
/* For KVM we reserve 1MB of RAM for running bootloader */
if (kvm_enabled()) {
ram_low_size -= 0x100000;
diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c
index fc38b4b..d5725d0 100644
--- a/hw/mips/mips_r4k.c
+++ b/hw/mips/mips_r4k.c
@@ -8,6 +8,7 @@
* the standard PC ISA addresses.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -143,7 +144,7 @@ static int64_t load_kernel(void)
}
rom_add_blob_fixed("params", params_buf, params_size,
- (16 << 20) - params_size);
+ 16 * MiB - params_size);
g_free(params_buf);
return entry;
@@ -158,7 +159,7 @@ static void main_cpu_reset(void *opaque)
env->active_tc.PC = s->vector;
}
-static const int sector_len = 32 * 1024;
+static const int sector_len = 32 * KiB;
static
void mips_r4k_init(MachineState *machine)
{
@@ -194,9 +195,9 @@ void mips_r4k_init(MachineState *machine)
qemu_register_reset(main_cpu_reset, reset_info);
/* allocate RAM */
- if (ram_size > (256 << 20)) {
- error_report("Too much memory for this machine: %dMB, maximum 256MB",
- ((unsigned int)ram_size / (1 << 20)));
+ if (ram_size > 256 * MiB) {
+ error_report("Too much memory for this machine: %" PRId64 "MB,"
+ " maximum 256MB", ram_size / MiB);
exit(1);
}
memory_region_allocate_system_memory(ram, NULL, "mips_r4k.ram", ram_size);
diff --git a/hw/misc/mips_itu.c b/hw/misc/mips_itu.c
index ccc4c7d..43bbec4 100644
--- a/hw/misc/mips_itu.c
+++ b/hw/misc/mips_itu.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/log.h"
#include "qapi/error.h"
#include "cpu.h"
@@ -80,7 +81,7 @@ static void itc_reconfigure(MIPSITUState *tag)
uint64_t *am = &tag->ITCAddressMap[0];
MemoryRegion *mr = &tag->storage_io;
hwaddr address = am[0] & ITC_AM0_BASE_ADDRESS_MASK;
- uint64_t size = (1 << 10) + (am[1] & ITC_AM1_ADDR_MASK_MASK);
+ uint64_t size = (1 * KiB) + (am[1] & ITC_AM1_ADDR_MASK_MASK);
bool is_enabled = (am[0] & ITC_AM0_EN_MASK) != 0;
memory_region_transaction_begin();
diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c
index b0a31b9..60309af 100644
--- a/hw/pci-host/xilinx-pcie.c
+++ b/hw/pci-host/xilinx-pcie.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "hw/pci/pci_bridge.h"
#include "hw/pci-host/xilinx-pcie.h"
@@ -157,9 +158,9 @@ static void xilinx_pcie_host_init(Object *obj)
static Property xilinx_pcie_host_props[] = {
DEFINE_PROP_UINT32("bus_nr", XilinxPCIEHost, bus_nr, 0),
DEFINE_PROP_SIZE("cfg_base", XilinxPCIEHost, cfg_base, 0),
- DEFINE_PROP_SIZE("cfg_size", XilinxPCIEHost, cfg_size, 32 << 20),
+ DEFINE_PROP_SIZE("cfg_size", XilinxPCIEHost, cfg_size, 32 * MiB),
DEFINE_PROP_SIZE("mmio_base", XilinxPCIEHost, mmio_base, 0),
- DEFINE_PROP_SIZE("mmio_size", XilinxPCIEHost, mmio_size, 1 << 20),
+ DEFINE_PROP_SIZE("mmio_size", XilinxPCIEHost, mmio_size, 1 * MiB),
DEFINE_PROP_BOOL("link_up", XilinxPCIEHost, link_up, true),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/include/hw/intc/mips_gic.h b/include/hw/intc/mips_gic.h
index b98d500..902a12b 100644
--- a/include/hw/intc/mips_gic.h
+++ b/include/hw/intc/mips_gic.h
@@ -11,6 +11,7 @@
#ifndef MIPS_GIC_H
#define MIPS_GIC_H
+#include "qemu/units.h"
#include "hw/timer/mips_gictimer.h"
#include "cpu.h"
/*
@@ -19,7 +20,7 @@
/* The MIPS default location */
#define GIC_BASE_ADDR 0x1bdc0000ULL
-#define GIC_ADDRSPACE_SZ (128 * 1024)
+#define GIC_ADDRSPACE_SZ (128 * KiB)
/* Constants */
#define GIC_POL_POS 1
diff --git a/include/hw/mips/bios.h b/include/hw/mips/bios.h
index b4b88ac..d67ef33 100644
--- a/include/hw/mips/bios.h
+++ b/include/hw/mips/bios.h
@@ -1,6 +1,7 @@
+#include "qemu/units.h"
#include "cpu.h"
-#define BIOS_SIZE (4 * 1024 * 1024)
+#define BIOS_SIZE (4 * MiB)
#ifdef TARGET_WORDS_BIGENDIAN
#define BIOS_FILENAME "mips_bios.bin"
#else
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 33/47] hw/ppc: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (31 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 32/47] hw/mips: Use the IEC binary prefix definitions Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 34/47] hw/i386: " Paolo Bonzini
` (14 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20180625124238.25339-33-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/nvram/spapr_nvram.c | 11 +++++++----
hw/pci-host/prep.c | 3 ++-
hw/ppc/e500.c | 13 +++++++------
hw/ppc/e500plat.c | 3 ++-
hw/ppc/mac.h | 3 ++-
hw/ppc/mac_newworld.c | 1 -
hw/ppc/mac_oldworld.c | 9 ++++-----
hw/ppc/ppc405_boards.c | 9 +++++----
hw/ppc/ppc405_uc.c | 7 ++++---
hw/ppc/ppc440_bamboo.c | 5 +++--
hw/ppc/ppc4xx_devs.c | 22 ++++++++++++----------
hw/ppc/ppce500_spin.c | 3 ++-
hw/ppc/prep.c | 4 ++--
hw/ppc/rs6000_mc.c | 13 +++++++------
hw/ppc/sam460ex.c | 16 ++++++++--------
hw/ppc/spapr.c | 10 +++++-----
hw/ppc/spapr_rtas.c | 2 +-
hw/ppc/virtex_ml507.c | 7 ++++---
include/hw/ppc/spapr.h | 5 +++--
target/ppc/mmu_helper.c | 8 ++++----
20 files changed, 84 insertions(+), 70 deletions(-)
diff --git a/hw/nvram/spapr_nvram.c b/hw/nvram/spapr_nvram.c
index 4a0aec8..bed1557 100644
--- a/hw/nvram/spapr_nvram.c
+++ b/hw/nvram/spapr_nvram.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -47,9 +48,9 @@ typedef struct sPAPRNVRAM {
#define VIO_SPAPR_NVRAM(obj) \
OBJECT_CHECK(sPAPRNVRAM, (obj), TYPE_VIO_SPAPR_NVRAM)
-#define MIN_NVRAM_SIZE 8192
-#define DEFAULT_NVRAM_SIZE 65536
-#define MAX_NVRAM_SIZE 1048576
+#define MIN_NVRAM_SIZE (8 * KiB)
+#define DEFAULT_NVRAM_SIZE (64 * KiB)
+#define MAX_NVRAM_SIZE (1 * MiB)
static void rtas_nvram_fetch(PowerPCCPU *cpu, sPAPRMachineState *spapr,
uint32_t token, uint32_t nargs,
@@ -167,7 +168,9 @@ static void spapr_nvram_realize(VIOsPAPRDevice *dev, Error **errp)
nvram->buf = g_malloc0(nvram->size);
if ((nvram->size < MIN_NVRAM_SIZE) || (nvram->size > MAX_NVRAM_SIZE)) {
- error_setg(errp, "spapr-nvram must be between %d and %d bytes in size",
+ error_setg(errp,
+ "spapr-nvram must be between %" PRId64
+ " and %" PRId64 " bytes in size",
MIN_NVRAM_SIZE, MAX_NVRAM_SIZE);
return;
}
diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c
index 01f67f9..88f035c 100644
--- a/hw/pci-host/prep.c
+++ b/hw/pci-host/prep.c
@@ -24,6 +24,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "hw/hw.h"
#include "hw/pci/pci.h"
@@ -70,7 +71,7 @@ typedef struct PRePPCIState {
int contiguous_map;
} PREPPCIState;
-#define BIOS_SIZE (1024 * 1024)
+#define BIOS_SIZE (1 * MiB)
static inline uint32_t raven_pci_io_config(hwaddr addr)
{
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index 826053e..7d19b14 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -15,6 +15,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "e500.h"
#include "e500-ccsr.h"
@@ -46,11 +47,11 @@
#define BINARY_DEVICE_TREE_FILE "mpc8544ds.dtb"
#define DTC_LOAD_PAD 0x1800000
#define DTC_PAD_MASK 0xFFFFF
-#define DTB_MAX_SIZE (8 * 1024 * 1024)
+#define DTB_MAX_SIZE (8 * MiB)
#define INITRD_LOAD_PAD 0x2000000
#define INITRD_PAD_MASK 0xFFFFFF
-#define RAM_SIZES_ALIGN (64UL << 20)
+#define RAM_SIZES_ALIGN (64 * MiB)
/* TODO: parameterize */
#define MPC8544_CCSRBAR_SIZE 0x00100000ULL
@@ -603,7 +604,7 @@ static int ppce500_prep_device_tree(PPCE500MachineState *machine,
/* Create -kernel TLB entries for BookE. */
hwaddr booke206_page_size_to_tlb(uint64_t size)
{
- return 63 - clz64(size >> 10);
+ return 63 - clz64(size / KiB);
}
static int booke206_initial_map_tsize(CPUPPCState *env)
@@ -671,7 +672,7 @@ static void ppce500_cpu_reset(void *opaque)
/* Set initial guest state. */
cs->halted = 0;
- env->gpr[1] = (16<<20) - 8;
+ env->gpr[1] = (16 * MiB) - 8;
env->gpr[3] = bi->dt_base;
env->gpr[4] = 0;
env->gpr[5] = 0;
@@ -1012,9 +1013,9 @@ void ppce500_init(MachineState *machine)
}
cur_base = loadaddr + payload_size;
- if (cur_base < (32 * 1024 * 1024)) {
+ if (cur_base < 32 * MiB) {
/* u-boot occupies memory up to 32MB, so load blobs above */
- cur_base = (32 * 1024 * 1024);
+ cur_base = 32 * MiB;
}
/* Load bare kernel only if no bios/u-boot has been provided */
diff --git a/hw/ppc/e500plat.c b/hw/ppc/e500plat.c
index d8e3f20..963d429 100644
--- a/hw/ppc/e500plat.c
+++ b/hw/ppc/e500plat.c
@@ -10,6 +10,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-common.h"
#include "e500.h"
#include "hw/net/fsl_etsec/etsec.h"
@@ -85,7 +86,7 @@ static void e500plat_machine_class_init(ObjectClass *oc, void *data)
pmc->has_mpc8xxx_gpio = true;
pmc->has_platform_bus = true;
pmc->platform_bus_base = 0xf00000000ULL;
- pmc->platform_bus_size = (128ULL * 1024 * 1024);
+ pmc->platform_bus_size = 128 * MiB;
pmc->platform_bus_first_irq = 5;
pmc->platform_bus_num_irqs = 10;
pmc->ccsrbar_base = 0xFE0000000ULL;
diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h
index c0217e6..41fd289 100644
--- a/hw/ppc/mac.h
+++ b/hw/ppc/mac.h
@@ -26,6 +26,7 @@
#ifndef PPC_MAC_H
#define PPC_MAC_H
+#include "qemu/units.h"
#include "exec/memory.h"
#include "hw/boards.h"
#include "hw/sysbus.h"
@@ -38,7 +39,7 @@
/* SMP is not enabled, for now */
#define MAX_CPUS 1
-#define BIOS_SIZE (1024 * 1024)
+#define BIOS_SIZE (1 * MiB)
#define NVRAM_SIZE 0x2000
#define PROM_FILENAME "openbios-ppc"
#define PROM_ADDR 0xfff00000
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index ff715ff..84355b2 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -71,7 +71,6 @@
#include "hw/usb.h"
#include "exec/address-spaces.h"
#include "hw/sysbus.h"
-#include "qemu/cutils.h"
#include "trace.h"
#define MAX_IDE_BUS 2
diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
index 4608bab..06ed6f6 100644
--- a/hw/ppc/mac_oldworld.c
+++ b/hw/ppc/mac_oldworld.c
@@ -24,6 +24,7 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "hw/hw.h"
#include "hw/ppc/ppc.h"
@@ -46,7 +47,6 @@
#include "sysemu/kvm.h"
#include "kvm_ppc.h"
#include "exec/address-spaces.h"
-#include "qemu/cutils.h"
#define MAX_IDE_BUS 2
#define CFG_ADDR 0xf0000510
@@ -118,10 +118,9 @@ static void ppc_heathrow_init(MachineState *machine)
}
/* allocate RAM */
- if (ram_size > (2047 << 20)) {
- fprintf(stderr,
- "qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n",
- ((unsigned int)ram_size / (1 << 20)));
+ if (ram_size > 2047 * MiB) {
+ error_report("Too much memory for this machine: %" PRId64 " MB, "
+ "maximum 2047 MB", ram_size / MiB);
exit(1);
}
diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c
index d301067..7011107 100644
--- a/hw/ppc/ppc405_boards.c
+++ b/hw/ppc/ppc405_boards.c
@@ -22,6 +22,7 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -40,7 +41,7 @@
#include "exec/address-spaces.h"
#define BIOS_FILENAME "ppc405_rom.bin"
-#define BIOS_SIZE (2048 * 1024)
+#define BIOS_SIZE (2 * MiB)
#define KERNEL_LOAD_ADDR 0x00000000
#define INITRD_LOAD_ADDR 0x01800000
@@ -216,14 +217,14 @@ static void ref405ep_init(MachineState *machine)
memory_region_init(&ram_memories[1], NULL, "ef405ep.ram1", 0);
ram_bases[1] = 0x00000000;
ram_sizes[1] = 0x00000000;
- ram_size = 128 * 1024 * 1024;
+ ram_size = 128 * MiB;
#ifdef DEBUG_BOARD_INIT
printf("%s: register cpu\n", __func__);
#endif
env = ppc405ep_init(sysmem, ram_memories, ram_bases, ram_sizes,
33333333, &pic, kernel_filename == NULL ? 0 : 1);
/* allocate SRAM */
- sram_size = 512 * 1024;
+ sram_size = 512 * KiB;
memory_region_init_ram(sram, NULL, "ef405ep.sram", sram_size,
&error_fatal);
memory_region_add_subregion(sysmem, 0xFFF00000, sram);
@@ -589,7 +590,7 @@ static void taihu_405ep_init(MachineState *machine)
bios_size = blk_getlength(blk);
/* XXX: should check that size is 32MB */
- bios_size = 32 * 1024 * 1024;
+ bios_size = 32 * MiB;
fl_sectors = (bios_size + 65535) >> 16;
#ifdef DEBUG_BOARD_INIT
printf("Register parallel flash %d size %lx"
diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c
index 34f8d57..4bd9fbc 100644
--- a/hw/ppc/ppc405_uc.c
+++ b/hw/ppc/ppc405_uc.c
@@ -22,6 +22,7 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
@@ -983,10 +984,10 @@ static void ppc405_ocm_init(CPUPPCState *env)
ocm = g_malloc0(sizeof(ppc405_ocm_t));
/* XXX: Size is 4096 or 0x04000000 */
- memory_region_init_ram(&ocm->isarc_ram, NULL, "ppc405.ocm", 4096,
+ memory_region_init_ram(&ocm->isarc_ram, NULL, "ppc405.ocm", 4 * KiB,
&error_fatal);
- memory_region_init_alias(&ocm->dsarc_ram, NULL, "ppc405.dsarc", &ocm->isarc_ram,
- 0, 4096);
+ memory_region_init_alias(&ocm->dsarc_ram, NULL, "ppc405.dsarc",
+ &ocm->isarc_ram, 0, 4 * KiB);
qemu_register_reset(&ocm_reset, ocm);
ppc_dcr_register(env, OCM0_ISARC,
ocm, &dcr_read_ocm, &dcr_write_ocm);
diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c
index 44e6a0c..3d4c43b 100644
--- a/hw/ppc/ppc440_bamboo.c
+++ b/hw/ppc/ppc440_bamboo.c
@@ -12,6 +12,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/error-report.h"
#include "qemu-common.h"
#include "qemu/error-report.h"
@@ -49,7 +50,7 @@
#define PPC440EP_SDRAM_NR_BANKS 4
static const unsigned int ppc440ep_sdram_bank_sizes[] = {
- 256<<20, 128<<20, 64<<20, 32<<20, 16<<20, 8<<20, 0
+ 256 * MiB, 128 * MiB, 64 * MiB, 32 * MiB, 16 * MiB, 8 * MiB, 0
};
static hwaddr entry;
@@ -151,7 +152,7 @@ static void main_cpu_reset(void *opaque)
CPUPPCState *env = &cpu->env;
cpu_reset(CPU(cpu));
- env->gpr[1] = (16<<20) - 8;
+ env->gpr[1] = (16 * MiB) - 8;
env->gpr[3] = FDT_ADDR;
env->nip = entry;
diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c
index 2e96389..8c6f3c9 100644
--- a/hw/ppc/ppc4xx_devs.c
+++ b/hw/ppc/ppc4xx_devs.c
@@ -22,6 +22,7 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "cpu.h"
#include "hw/hw.h"
#include "hw/ppc/ppc.h"
@@ -29,6 +30,7 @@
#include "hw/boards.h"
#include "qemu/log.h"
#include "exec/address-spaces.h"
+#include "qemu/error-report.h"
#define DEBUG_UIC
@@ -353,25 +355,25 @@ static uint32_t sdram_bcr (hwaddr ram_base,
uint32_t bcr;
switch (ram_size) {
- case (4 * 1024 * 1024):
+ case 4 * MiB:
bcr = 0x00000000;
break;
- case (8 * 1024 * 1024):
+ case 8 * MiB:
bcr = 0x00020000;
break;
- case (16 * 1024 * 1024):
+ case 16 * MiB:
bcr = 0x00040000;
break;
- case (32 * 1024 * 1024):
+ case 32 * MiB:
bcr = 0x00060000;
break;
- case (64 * 1024 * 1024):
+ case 64 * MiB:
bcr = 0x00080000;
break;
- case (128 * 1024 * 1024):
+ case 128 * MiB:
bcr = 0x000A0000;
break;
- case (256 * 1024 * 1024):
+ case 256 * MiB:
bcr = 0x000C0000;
break;
default:
@@ -399,7 +401,7 @@ static target_ulong sdram_size (uint32_t bcr)
if (sh == 7)
size = -1;
else
- size = (4 * 1024 * 1024) << sh;
+ size = (4 * MiB) << sh;
return size;
}
@@ -702,8 +704,8 @@ ram_addr_t ppc4xx_sdram_adjust(ram_addr_t ram_size, int nr_banks,
ram_size -= size_left;
if (size_left) {
- printf("Truncating memory to %d MiB to fit SDRAM controller limits.\n",
- (int)(ram_size >> 20));
+ error_report("Truncating memory to %" PRId64 " MiB to fit SDRAM"
+ " controller limits", ram_size / MiB);
}
memory_region_allocate_system_memory(ram, NULL, "ppc4xx.sdram", ram_size);
diff --git a/hw/ppc/ppce500_spin.c b/hw/ppc/ppce500_spin.c
index 69ca2d0..c45fc85 100644
--- a/hw/ppc/ppce500_spin.c
+++ b/hw/ppc/ppce500_spin.c
@@ -28,6 +28,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "hw/sysbus.h"
#include "sysemu/hw_accel.h"
@@ -89,7 +90,7 @@ static void spin_kick(CPUState *cs, run_on_cpu_data data)
PowerPCCPU *cpu = POWERPC_CPU(cs);
CPUPPCState *env = &cpu->env;
SpinInfo *curspin = data.host_ptr;
- hwaddr map_size = 64 * 1024 * 1024;
+ hwaddr map_size = 64 * MiB;
hwaddr map_start;
cpu_synchronize_state(cs);
diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
index 25ae533..6689407 100644
--- a/hw/ppc/prep.c
+++ b/hw/ppc/prep.c
@@ -50,7 +50,7 @@
#include "exec/address-spaces.h"
#include "trace.h"
#include "elf.h"
-#include "qemu/cutils.h"
+#include "qemu/units.h"
#include "kvm_ppc.h"
/* SMP is not enabled, for now */
@@ -60,7 +60,7 @@
#define CFG_ADDR 0xf0000510
-#define BIOS_SIZE (1024 * 1024)
+#define BIOS_SIZE (1 * MiB)
#define BIOS_FILENAME "ppc_rom.bin"
#define KERNEL_LOAD_ADDR 0x01000000
#define INITRD_LOAD_ADDR 0x01800000
diff --git a/hw/ppc/rs6000_mc.c b/hw/ppc/rs6000_mc.c
index b613565..45cb95e 100644
--- a/hw/ppc/rs6000_mc.c
+++ b/hw/ppc/rs6000_mc.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/isa/isa.h"
#include "exec/address-spaces.h"
#include "hw/boards.h"
@@ -109,7 +110,7 @@ static void rs6000mc_port0820_write(void *opaque, uint32_t addr, uint32_t val)
size = end_address - start_address;
memory_region_set_enabled(&s->simm[socket - 1], size != 0);
memory_region_set_address(&s->simm[socket - 1],
- start_address * 8 * 1024 * 1024);
+ start_address * 8 * MiB);
}
}
}
@@ -140,7 +141,7 @@ static void rs6000mc_realize(DeviceState *dev, Error **errp)
{
RS6000MCState *s = RS6000MC_DEVICE(dev);
int socket = 0;
- unsigned int ram_size = s->ram_size / (1024 * 1024);
+ unsigned int ram_size = s->ram_size / MiB;
while (socket < 6) {
if (ram_size >= 64) {
@@ -163,8 +164,8 @@ static void rs6000mc_realize(DeviceState *dev, Error **errp)
char name[] = "simm.?";
name[5] = socket + '0';
memory_region_allocate_system_memory(&s->simm[socket], OBJECT(dev),
- name, s->simm_size[socket]
- * 1024 * 1024);
+ name,
+ s->simm_size[socket] * MiB);
memory_region_add_subregion_overlap(get_system_memory(), 0,
&s->simm[socket], socket);
}
@@ -172,8 +173,8 @@ static void rs6000mc_realize(DeviceState *dev, Error **errp)
if (ram_size) {
/* unable to push all requested RAM in SIMMs */
error_setg(errp, "RAM size incompatible with this board. "
- "Try again with something else, like %d MB",
- s->ram_size / 1024 / 1024 - ram_size);
+ "Try again with something else, like %" PRId64 " MB",
+ s->ram_size / MiB - ram_size);
return;
}
diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
index 2a98c10..c7c799b 100644
--- a/hw/ppc/sam460ex.c
+++ b/hw/ppc/sam460ex.c
@@ -12,8 +12,8 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-common.h"
-#include "qemu/cutils.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "hw/hw.h"
@@ -46,7 +46,7 @@
/* from Sam460 U-Boot include/configs/Sam460ex.h */
#define FLASH_BASE 0xfff00000
#define FLASH_BASE_H 0x4
-#define FLASH_SIZE (1 << 20)
+#define FLASH_SIZE (1 * MiB)
#define UBOOT_LOAD_BASE 0xfff80000
#define UBOOT_SIZE 0x00080000
#define UBOOT_ENTRY 0xfffffffc
@@ -71,7 +71,7 @@
/* FIXME: See u-boot.git 8ac41e, also fix in ppc440_uc.c */
static const unsigned int ppc460ex_sdram_bank_sizes[] = {
- 1024 << 20, 512 << 20, 256 << 20, 128 << 20, 64 << 20, 32 << 20, 0
+ 1 * GiB, 512 * MiB, 256 * MiB, 128 * MiB, 64 * MiB, 32 * MiB, 0
};
struct boot_info {
@@ -126,7 +126,7 @@ static void generate_eeprom_spd(uint8_t *eeprom, ram_addr_t ram_size)
int i;
/* work in terms of MB */
- ram_size >>= 20;
+ ram_size /= MiB;
while ((ram_size >= 4) && (nbanks <= 2)) {
int sz_log2 = MIN(31 - clz32(ram_size), 14);
@@ -225,7 +225,7 @@ static int sam460ex_load_uboot(void)
fl_sectors = (bios_size + 65535) >> 16;
if (!pflash_cfi01_register(base, NULL, "sam460ex.flash", bios_size,
- blk, (64 * 1024), fl_sectors,
+ blk, 64 * KiB, fl_sectors,
1, 0x89, 0x18, 0x0000, 0x0, 1)) {
error_report("qemu: Error registering flash memory.");
/* XXX: return an error instead? */
@@ -359,14 +359,14 @@ static void main_cpu_reset(void *opaque)
/* either we have a kernel to boot or we jump to U-Boot */
if (bi->entry != UBOOT_ENTRY) {
- env->gpr[1] = (16 << 20) - 8;
+ env->gpr[1] = (16 * MiB) - 8;
env->gpr[3] = FDT_ADDR;
env->nip = bi->entry;
/* Create a mapping for the kernel. */
mmubooke_create_initial_mapping(env, 0, 0);
env->gpr[6] = tswap32(EPAPR_MAGIC);
- env->gpr[7] = (16 << 20) - 8; /*bi->ima_size;*/
+ env->gpr[7] = (16 * MiB) - 8; /* bi->ima_size; */
} else {
env->nip = UBOOT_ENTRY;
@@ -479,7 +479,7 @@ static void sam460ex_init(MachineState *machine)
/* 256K of L2 cache as memory */
ppc4xx_l2sram_init(env);
/* FIXME: remove this after fixing l2sram mapping in ppc440_uc.c? */
- memory_region_init_ram(l2cache_ram, NULL, "ppc440.l2cache_ram", 256 << 10,
+ memory_region_init_ram(l2cache_ram, NULL, "ppc440.l2cache_ram", 256 * KiB,
&error_abort);
memory_region_add_subregion(address_space_mem, 0x400000000LL, l2cache_ram);
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 7dbdb4e..1602472 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -2322,7 +2322,7 @@ static void spapr_validate_node_memory(MachineState *machine, Error **errp)
if (machine->ram_size % SPAPR_MEMORY_BLOCK_SIZE) {
error_setg(errp, "Memory size 0x" RAM_ADDR_FMT
- " is not aligned to %llu MiB",
+ " is not aligned to %" PRIu64 " MiB",
machine->ram_size,
SPAPR_MEMORY_BLOCK_SIZE / MiB);
return;
@@ -2330,7 +2330,7 @@ static void spapr_validate_node_memory(MachineState *machine, Error **errp)
if (machine->maxram_size % SPAPR_MEMORY_BLOCK_SIZE) {
error_setg(errp, "Maximum memory size 0x" RAM_ADDR_FMT
- " is not aligned to %llu MiB",
+ " is not aligned to %" PRIu64 " MiB",
machine->ram_size,
SPAPR_MEMORY_BLOCK_SIZE / MiB);
return;
@@ -2340,7 +2340,7 @@ static void spapr_validate_node_memory(MachineState *machine, Error **errp)
if (numa_info[i].node_mem % SPAPR_MEMORY_BLOCK_SIZE) {
error_setg(errp,
"Node %d memory size 0x%" PRIx64
- " is not aligned to %llu MiB",
+ " is not aligned to %" PRIu64 " MiB",
i, numa_info[i].node_mem,
SPAPR_MEMORY_BLOCK_SIZE / MiB);
return;
@@ -2763,7 +2763,7 @@ static void spapr_machine_init(MachineState *machine)
}
}
- if (spapr->rma_size < (MIN_RMA_SLOF << 20)) {
+ if (spapr->rma_size < (MIN_RMA_SLOF * MiB)) {
error_report(
"pSeries SLOF firmware requires >= %ldM guest RMA (Real Mode Area memory)",
MIN_RMA_SLOF);
@@ -3209,7 +3209,7 @@ static void spapr_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
if (size % SPAPR_MEMORY_BLOCK_SIZE) {
error_setg(errp, "Hotplugged memory size must be a multiple of "
- "%lld MB", SPAPR_MEMORY_BLOCK_SIZE / MiB);
+ "%" PRIu64 " MB", SPAPR_MEMORY_BLOCK_SIZE / MiB);
return;
}
diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
index f32740b..4ac96bc 100644
--- a/hw/ppc/spapr_rtas.c
+++ b/hw/ppc/spapr_rtas.c
@@ -237,7 +237,7 @@ static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
switch (parameter) {
case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: {
char *param_val = g_strdup_printf("MaxEntCap=%d,"
- "DesMem=%llu,"
+ "DesMem=%" PRIu64 ","
"DesProcs=%d,"
"MaxPlatProcs=%d",
max_cpus,
diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c
index b4bb90d..7891464 100644
--- a/hw/ppc/virtex_ml507.c
+++ b/hw/ppc/virtex_ml507.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "cpu.h"
#include "hw/sysbus.h"
#include "hw/hw.h"
@@ -45,7 +46,7 @@
#include "ppc405.h"
#define EPAPR_MAGIC (0x45504150)
-#define FLASH_SIZE (16 * 1024 * 1024)
+#define FLASH_SIZE (16 * MiB)
#define INTC_BASEADDR 0x81800000
#define UART16550_BASEADDR 0x83e01003
@@ -127,7 +128,7 @@ static void main_cpu_reset(void *opaque)
* r8: 0
* r9: 0
*/
- env->gpr[1] = (16<<20) - 8;
+ env->gpr[1] = (16 * MiB) - 8;
/* Provide a device-tree. */
env->gpr[3] = bi->fdt;
env->nip = bi->bootstrap_pc;
@@ -235,7 +236,7 @@ static void virtex_init(MachineState *machine)
dinfo = drive_get(IF_PFLASH, 0, 0);
pflash_cfi01_register(PFLASH_BASEADDR, NULL, "virtex.flash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- (64 * 1024), FLASH_SIZE >> 16,
+ 64 * KiB, FLASH_SIZE >> 16,
1, 0x89, 0x18, 0x0000, 0x0, 1);
cpu_irq = (qemu_irq *) &env->irq_inputs[PPC40x_INPUT_INT];
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 7e02816..7e5de1a 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -1,6 +1,7 @@
#ifndef HW_SPAPR_H
#define HW_SPAPR_H
+#include "qemu/units.h"
#include "sysemu/dma.h"
#include "hw/boards.h"
#include "hw/ppc/xics.h"
@@ -749,8 +750,8 @@ int spapr_rng_populate_dt(void *fdt);
*/
#define SPAPR_MAX_RAM_SLOTS 32
-/* 1GB alignment for device memory region */
-#define SPAPR_DEVICE_MEM_ALIGN (1ULL << 30)
+/* 1GB alignment for hotplug memory region */
+#define SPAPR_DEVICE_MEM_ALIGN (1 * GiB)
/*
* Number of 32 bit words in each LMB list entry in ibm,dynamic-memory
diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
index 98ce179..e6739e6 100644
--- a/target/ppc/mmu_helper.c
+++ b/target/ppc/mmu_helper.c
@@ -17,6 +17,7 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "cpu.h"
#include "exec/helper-proto.h"
#include "sysemu/kvm.h"
@@ -1090,11 +1091,10 @@ static void mmubooke_dump_mmu(FILE *f, fprintf_function cpu_fprintf,
pa = entry->RPN & mask;
/* Extend the physical address to 36 bits */
pa |= (hwaddr)(entry->RPN & 0xF) << 32;
- size /= 1024;
- if (size >= 1024) {
- snprintf(size_buf, sizeof(size_buf), "%3" PRId64 "M", size / 1024);
+ if (size >= 1 * MiB) {
+ snprintf(size_buf, sizeof(size_buf), "%3" PRId64 "M", size / MiB);
} else {
- snprintf(size_buf, sizeof(size_buf), "%3" PRId64 "k", size);
+ snprintf(size_buf, sizeof(size_buf), "%3" PRId64 "k", size / KiB);
}
cpu_fprintf(f, "0x%016" PRIx64 " 0x%016" PRIx64 " %s %-5u %08x %08x\n",
(uint64_t)ea, (uint64_t)pa, size_buf, (uint32_t)entry->PID,
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 34/47] hw/i386: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (32 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 33/47] hw/ppc: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 35/47] hw/net: " Paolo Bonzini
` (13 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '[<>][<>]=? ?[1-5]0' hw/ include/hw/
and modified manually.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/i386/acpi-build.c | 4 ++--
hw/i386/pc.c | 23 ++++++++++++-----------
hw/i386/pc_piix.c | 3 ++-
hw/i386/pc_q35.c | 3 ++-
hw/i386/pc_sysfw.c | 10 ++++------
5 files changed, 22 insertions(+), 21 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 9bc6d97..796de91 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -2248,8 +2248,8 @@ build_tpm2(GArray *table_data, BIOSLinker *linker, GArray *tcpalog)
(void *)tpm2_ptr, "TPM2", sizeof(*tpm2_ptr), 4, NULL, NULL);
}
-#define HOLE_640K_START (640 * 1024)
-#define HOLE_640K_END (1024 * 1024)
+#define HOLE_640K_START (640 * KiB)
+#define HOLE_640K_END (1 * MiB)
static void build_srat_hotpluggable_memory(GArray *table_data, uint64_t base,
uint64_t len, int default_node)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index f310040..50d5553 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "hw/i386/pc.h"
#include "hw/char/serial.h"
@@ -448,12 +449,12 @@ void pc_cmos_init(PCMachineState *pcms,
/* memory size */
/* base memory (first MiB) */
- val = MIN(pcms->below_4g_mem_size / 1024, 640);
+ val = MIN(pcms->below_4g_mem_size / KiB, 640);
rtc_set_memory(s, 0x15, val);
rtc_set_memory(s, 0x16, val >> 8);
/* extended memory (next 64MiB) */
- if (pcms->below_4g_mem_size > 1024 * 1024) {
- val = (pcms->below_4g_mem_size - 1024 * 1024) / 1024;
+ if (pcms->below_4g_mem_size > 1 * MiB) {
+ val = (pcms->below_4g_mem_size - 1 * MiB) / KiB;
} else {
val = 0;
}
@@ -464,8 +465,8 @@ void pc_cmos_init(PCMachineState *pcms,
rtc_set_memory(s, 0x30, val);
rtc_set_memory(s, 0x31, val >> 8);
/* memory between 16MiB and 4GiB */
- if (pcms->below_4g_mem_size > 16 * 1024 * 1024) {
- val = (pcms->below_4g_mem_size - 16 * 1024 * 1024) / 65536;
+ if (pcms->below_4g_mem_size > 16 * MiB) {
+ val = (pcms->below_4g_mem_size - 16 * MiB) / (64 * KiB);
} else {
val = 0;
}
@@ -1392,11 +1393,11 @@ void pc_memory_init(PCMachineState *pcms,
}
machine->device_memory->base =
- ROUND_UP(0x100000000ULL + pcms->above_4g_mem_size, 1ULL << 30);
+ ROUND_UP(0x100000000ULL + pcms->above_4g_mem_size, 1 * GiB);
if (pcmc->enforce_aligned_dimm) {
/* size device region assuming 1G page max alignment per slot */
- device_mem_size += (1ULL << 30) * machine->ram_slots;
+ device_mem_size += (1 * GiB) * machine->ram_slots;
}
if ((machine->device_memory->base + device_mem_size) <
@@ -1438,7 +1439,7 @@ void pc_memory_init(PCMachineState *pcms,
if (!pcmc->broken_reserved_end) {
res_mem_end += memory_region_size(&machine->device_memory->mr);
}
- *val = cpu_to_le64(ROUND_UP(res_mem_end, 0x1ULL << 30));
+ *val = cpu_to_le64(ROUND_UP(res_mem_end, 1 * GiB));
fw_cfg_add_file(fw_cfg, "etc/reserved-memory-end", val, sizeof(*val));
}
@@ -1475,7 +1476,7 @@ uint64_t pc_pci_hole64_start(void)
hole64_start = 0x100000000ULL + pcms->above_4g_mem_size;
}
- return ROUND_UP(hole64_start, 1ULL << 30);
+ return ROUND_UP(hole64_start, 1 * GiB);
}
qemu_irq pc_allocate_cpu_irq(void)
@@ -2095,7 +2096,7 @@ static void pc_machine_set_max_ram_below_4g(Object *obj, Visitor *v,
error_propagate(errp, error);
return;
}
- if (value > (1ULL << 32)) {
+ if (value > 4 * GiB) {
error_setg(&error,
"Machine option 'max-ram-below-4g=%"PRIu64
"' expects size less than or equal to 4G", value);
@@ -2103,7 +2104,7 @@ static void pc_machine_set_max_ram_below_4g(Object *obj, Visitor *v,
return;
}
- if (value < (1ULL << 20)) {
+ if (value < 1 * MiB) {
warn_report("Only %" PRIu64 " bytes of RAM below the 4GiB boundary,"
"BIOS may not work with less than 1MiB", value);
}
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index d357907..dc09466 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -24,6 +24,7 @@
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "hw/loader.h"
#include "hw/i386/pc.h"
@@ -131,7 +132,7 @@ static void pc_init1(MachineState *machine,
if (lowmem > 0xc0000000) {
lowmem = 0xc0000000;
}
- if (lowmem & ((1ULL << 30) - 1)) {
+ if (lowmem & (1 * GiB - 1)) {
warn_report("Large machine and max_ram_below_4g "
"(%" PRIu64 ") not a multiple of 1G; "
"possible bad performance.",
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 1a73e18..532241e 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -29,6 +29,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "hw/loader.h"
#include "sysemu/arch_init.h"
@@ -105,7 +106,7 @@ static void pc_q35_init(MachineState *machine)
if (lowmem > pcms->max_ram_below_4g) {
lowmem = pcms->max_ram_below_4g;
if (machine->ram_size - lowmem > lowmem &&
- lowmem & ((1ULL << 30) - 1)) {
+ lowmem & (1 * GiB - 1)) {
warn_report("There is possibly poor performance as the ram size "
" (0x%" PRIx64 ") is more then twice the size of"
" max-ram-below-4g (%"PRIu64") and"
diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c
index 73ac783..091e22d 100644
--- a/hw/i386/pc_sysfw.c
+++ b/hw/i386/pc_sysfw.c
@@ -28,6 +28,7 @@
#include "sysemu/block-backend.h"
#include "qemu/error-report.h"
#include "qemu/option.h"
+#include "qemu/units.h"
#include "hw/sysbus.h"
#include "hw/hw.h"
#include "hw/i386/pc.h"
@@ -56,7 +57,7 @@ static void pc_isa_bios_init(MemoryRegion *rom_memory,
flash_size = memory_region_size(flash_mem);
/* map the last 128KB of the BIOS in ISA space */
- isa_bios_size = MIN(flash_size, 128 * 1024);
+ isa_bios_size = MIN(flash_size, 128 * KiB);
isa_bios = g_malloc(sizeof(*isa_bios));
memory_region_init_ram(isa_bios, NULL, "isa-bios", isa_bios_size,
&error_fatal);
@@ -83,7 +84,7 @@ static void pc_isa_bios_init(MemoryRegion *rom_memory,
* only 18MB-4KB below 4G. For now, restrict the cumulative mapping to 8MB in
* size.
*/
-#define FLASH_MAP_BASE_MIN ((hwaddr)(0x100000000ULL - 8*1024*1024))
+#define FLASH_MAP_BASE_MIN ((hwaddr)(4 * GiB - 8 * MiB))
/* This function maps flash drives from 4G downward, in order of their unit
* numbers. The mapping starts at unit#0, with unit number increments of 1, and
@@ -221,10 +222,7 @@ static void old_pc_system_rom_init(MemoryRegion *rom_memory, bool isapc_ram_fw)
g_free(filename);
/* map the last 128KB of the BIOS in ISA space */
- isa_bios_size = bios_size;
- if (isa_bios_size > (128 * 1024)) {
- isa_bios_size = 128 * 1024;
- }
+ isa_bios_size = MIN(bios_size, 128 * KiB);
isa_bios = g_malloc(sizeof(*isa_bios));
memory_region_init_alias(isa_bios, NULL, "isa-bios", bios,
bios_size - isa_bios_size, isa_bios_size);
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 35/47] hw/net: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (33 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 34/47] hw/i386: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 36/47] hw/usb: " Paolo Bonzini
` (12 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Message-Id: <20180625124238.25339-35-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/net/e1000e.c | 7 ++++---
hw/net/e1000x_common.c | 3 ++-
hw/net/eepro100.c | 3 +--
hw/net/ne2000.h | 5 +++--
include/hw/net/allwinner_emac.h | 5 +++--
5 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/hw/net/e1000e.c b/hw/net/e1000e.c
index cda8d48..510ddb3 100644
--- a/hw/net/e1000e.c
+++ b/hw/net/e1000e.c
@@ -34,6 +34,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "net/net.h"
#include "net/tap.h"
#include "qemu/range.h"
@@ -81,10 +82,10 @@ typedef struct E1000EState {
#define E1000E_IO_IDX 2
#define E1000E_MSIX_IDX 3
-#define E1000E_MMIO_SIZE (128 * 1024)
-#define E1000E_FLASH_SIZE (128 * 1024)
+#define E1000E_MMIO_SIZE (128 * KiB)
+#define E1000E_FLASH_SIZE (128 * KiB)
#define E1000E_IO_SIZE (32)
-#define E1000E_MSIX_SIZE (16 * 1024)
+#define E1000E_MSIX_SIZE (16 * KiB)
#define E1000E_MSIX_TABLE (0x0000)
#define E1000E_MSIX_PBA (0x2000)
diff --git a/hw/net/e1000x_common.c b/hw/net/e1000x_common.c
index eb0e097..0904780 100644
--- a/hw/net/e1000x_common.c
+++ b/hw/net/e1000x_common.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "hw/pci/pci.h"
#include "net/net.h"
@@ -111,7 +112,7 @@ bool e1000x_is_oversized(uint32_t *mac, size_t size)
static const int maximum_ethernet_vlan_size = 1522;
/* this is the size past which hardware will
drop packets when setting LPE=1 */
- static const int maximum_ethernet_lpe_size = 16384;
+ static const int maximum_ethernet_lpe_size = 16 * KiB;
if ((size > maximum_ethernet_lpe_size ||
(size > maximum_ethernet_vlan_size
diff --git a/hw/net/eepro100.c b/hw/net/eepro100.c
index a07a632..e761daf 100644
--- a/hw/net/eepro100.c
+++ b/hw/net/eepro100.c
@@ -41,6 +41,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "hw/pci/pci.h"
#include "net/net.h"
@@ -60,8 +61,6 @@
* changed to pad short packets itself. */
#define CONFIG_PAD_RECEIVED_FRAMES
-#define KiB 1024
-
/* Debug EEPRO100 card. */
#if 0
# define DEBUG_EEPRO100
diff --git a/hw/net/ne2000.h b/hw/net/ne2000.h
index adb8021..2cd193e 100644
--- a/hw/net/ne2000.h
+++ b/hw/net/ne2000.h
@@ -1,11 +1,12 @@
#ifndef HW_NE2000_H
#define HW_NE2000_H
+#include "qemu/units.h"
#include "hw/hw.h"
#include "net/net.h"
-#define NE2000_PMEM_SIZE (32*1024)
-#define NE2000_PMEM_START (16*1024)
+#define NE2000_PMEM_SIZE (32 * KiB)
+#define NE2000_PMEM_START (16 * KiB)
#define NE2000_PMEM_END (NE2000_PMEM_SIZE+NE2000_PMEM_START)
#define NE2000_MEM_SIZE NE2000_PMEM_END
diff --git a/include/hw/net/allwinner_emac.h b/include/hw/net/allwinner_emac.h
index 4cc8aab..905a43d 100644
--- a/include/hw/net/allwinner_emac.h
+++ b/include/hw/net/allwinner_emac.h
@@ -23,6 +23,7 @@
#ifndef ALLWINNER_EMAC_H
#define ALLWINNER_EMAC_H
+#include "qemu/units.h"
#include "net/net.h"
#include "qemu/fifo8.h"
#include "hw/net/mii.h"
@@ -125,8 +126,8 @@
#define EMAC_INT_RX (1 << 8)
/* Due to lack of specifications, size of fifos is chosen arbitrarily */
-#define TX_FIFO_SIZE (4 * 1024)
-#define RX_FIFO_SIZE (32 * 1024)
+#define TX_FIFO_SIZE (4 * KiB)
+#define RX_FIFO_SIZE (32 * KiB)
#define NUM_TX_FIFOS 2
#define RX_HDR_SIZE 8
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 36/47] hw/usb: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (34 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 35/47] hw/net: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 37/47] hw/sd: " Paolo Bonzini
` (11 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-36-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/usb/ccid-card-passthru.c | 9 +++++----
hw/usb/combined-packet.c | 3 ++-
hw/usb/dev-smartcard-reader.c | 3 ++-
hw/usb/redirect.c | 3 ++-
4 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/hw/usb/ccid-card-passthru.c b/hw/usb/ccid-card-passthru.c
index 25fb19b..0a6c657 100644
--- a/hw/usb/ccid-card-passthru.c
+++ b/hw/usb/ccid-card-passthru.c
@@ -9,6 +9,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include <libcacard.h>
#include "chardev/char-fe.h"
#include "qemu/error-report.h"
@@ -40,7 +41,7 @@ static const uint8_t DEFAULT_ATR[] = {
0x13, 0x08
};
-#define VSCARD_IN_SIZE 65536
+#define VSCARD_IN_SIZE (64 * KiB)
/* maximum size of ATR - from 7816-3 */
#define MAX_ATR_SIZE 40
@@ -275,9 +276,9 @@ static void ccid_card_vscard_read(void *opaque, const uint8_t *buf, int size)
VSCMsgHeader *hdr;
if (card->vscard_in_pos + size > VSCARD_IN_SIZE) {
- error_report(
- "no room for data: pos %d + size %d > %d. dropping connection.",
- card->vscard_in_pos, size, VSCARD_IN_SIZE);
+ error_report("no room for data: pos %u + size %d > %" PRId64 "."
+ " dropping connection.",
+ card->vscard_in_pos, size, VSCARD_IN_SIZE);
ccid_card_vscard_drop_connection(card);
return;
}
diff --git a/hw/usb/combined-packet.c b/hw/usb/combined-packet.c
index 48cac87..01a7ed0 100644
--- a/hw/usb/combined-packet.c
+++ b/hw/usb/combined-packet.c
@@ -20,6 +20,7 @@
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-common.h"
#include "hw/usb.h"
#include "qemu/iov.h"
@@ -171,7 +172,7 @@ void usb_ep_combine_input_packets(USBEndpoint *ep)
if ((p->iov.size % ep->max_packet_size) != 0 || !p->short_not_ok ||
next == NULL ||
/* Work around for Linux usbfs bulk splitting + migration */
- (totalsize == 16348 && p->int_req)) {
+ (totalsize == (16 * KiB - 36) && p->int_req)) {
usb_device_handle_data(ep->dev, first);
assert(first->status == USB_RET_ASYNC);
if (first->combined) {
diff --git a/hw/usb/dev-smartcard-reader.c b/hw/usb/dev-smartcard-reader.c
index 13d0bef..8f716fc 100644
--- a/hw/usb/dev-smartcard-reader.c
+++ b/hw/usb/dev-smartcard-reader.c
@@ -35,6 +35,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "qemu/error-report.h"
@@ -63,7 +64,7 @@ do { \
* or handle the migration complexity - VMState doesn't handle this case.
* sizes are expected never to be exceeded, unless guest misbehaves.
*/
-#define BULK_OUT_DATA_SIZE 65536
+#define BULK_OUT_DATA_SIZE (64 * KiB)
#define PENDING_ANSWERS_NUM 128
#define BULK_IN_BUF_SIZE 384
diff --git a/hw/usb/redirect.c b/hw/usb/redirect.c
index 58e8f7f..99094a7 100644
--- a/hw/usb/redirect.c
+++ b/hw/usb/redirect.c
@@ -26,6 +26,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "qemu/timer.h"
@@ -1298,7 +1299,7 @@ static int usbredir_chardev_can_read(void *opaque)
}
/* usbredir_parser_do_read will consume *all* data we give it */
- return 1024 * 1024;
+ return 1 * MiB;
}
static void usbredir_chardev_read(void *opaque, const uint8_t *buf, int size)
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 37/47] hw/sd: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (35 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 36/47] hw/usb: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 38/47] hw/vfio: " Paolo Bonzini
` (10 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-37-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/sd/sd.c | 4 ++--
hw/sd/sdhci.c | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 9a16b76..d4356e9 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -31,6 +31,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/qdev.h"
#include "hw/hw.h"
#include "hw/registerfields.h"
@@ -38,7 +39,6 @@
#include "hw/sd/sd.h"
#include "qapi/error.h"
#include "qemu/bitmap.h"
-#include "qemu/cutils.h"
#include "hw/qdev-properties.h"
#include "qemu/error-report.h"
#include "qemu/timer.h"
@@ -403,7 +403,7 @@ static void sd_set_csd(SDState *sd, uint64_t size)
((HWBLOCK_SHIFT << 6) & 0xc0);
sd->csd[14] = 0x00; /* File format group */
} else { /* SDHC */
- size /= 512 * 1024;
+ size /= 512 * KiB;
size -= 1;
sd->csd[0] = 0x40;
sd->csd[1] = 0x0e;
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index a11e802..643b39d 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "hw/hw.h"
@@ -32,7 +33,6 @@
#include "hw/sd/sdhci.h"
#include "sdhci-internal.h"
#include "qemu/log.h"
-#include "qemu/cutils.h"
#include "trace.h"
#define TYPE_SDHCI_BUS "sdhci-bus"
@@ -742,7 +742,7 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr)
if ((dscr->attr & SDHC_ADMA_ATTR_ACT_MASK) == SDHC_ADMA_ATTR_SET_LEN) {
dscr->length = (uint16_t)extract32(adma1, 12, 16);
} else {
- dscr->length = 4096;
+ dscr->length = 4 * KiB;
}
break;
case SDHC_CTRL_ADMA2_64:
@@ -790,7 +790,7 @@ static void sdhci_do_adma(SDHCIState *s)
return;
}
- length = dscr.length ? dscr.length : 65536;
+ length = dscr.length ? dscr.length : 64 * KiB;
switch (dscr.attr & SDHC_ADMA_ATTR_ACT_MASK) {
case SDHC_ADMA_ATTR_ACT_TRAN: /* data transfer */
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 38/47] hw/vfio: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (36 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 37/47] hw/sd: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 39/47] hw/virtio: " Paolo Bonzini
` (9 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-38-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/vfio/pci-quirks.c | 9 +++++----
hw/vfio/pci.c | 3 ++-
2 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/hw/vfio/pci-quirks.c b/hw/vfio/pci-quirks.c
index 061259b..481fd08 100644
--- a/hw/vfio/pci-quirks.c
+++ b/hw/vfio/pci-quirks.c
@@ -11,6 +11,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/error-report.h"
#include "qemu/main-loop.h"
#include "qemu/range.h"
@@ -1448,9 +1449,9 @@ static int vfio_igd_gtt_max(VFIOPCIDevice *vdev)
ggms = 1 << ggms;
}
- ggms *= 1024 * 1024;
+ ggms *= MiB;
- return (ggms / (4 * 1024)) * (gen < 8 ? 4 : 8);
+ return (ggms / (4 * KiB)) * (gen < 8 ? 4 : 8);
}
/*
@@ -1705,7 +1706,7 @@ static void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, int nr)
igd->vdev = vdev;
igd->index = ~0;
igd->bdsm = vfio_pci_read_config(&vdev->pdev, IGD_BDSM, 4);
- igd->bdsm &= ~((1 << 20) - 1); /* 1MB aligned */
+ igd->bdsm &= ~((1 * MiB) - 1); /* 1MB aligned */
memory_region_init_io(&quirk->mem[0], OBJECT(vdev), &vfio_igd_index_quirk,
igd, "vfio-igd-index-quirk", 4);
@@ -1752,7 +1753,7 @@ static void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, int nr)
* config offset 0x5C.
*/
bdsm_size = g_malloc(sizeof(*bdsm_size));
- *bdsm_size = cpu_to_le64((ggms_mb + gms_mb) * 1024 * 1024);
+ *bdsm_size = cpu_to_le64((ggms_mb + gms_mb) * MiB);
fw_cfg_add_file(fw_cfg_find(), "etc/igd-bdsm-size",
bdsm_size, sizeof(*bdsm_size));
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 18c493b..a1577de 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -28,6 +28,7 @@
#include "qemu/error-report.h"
#include "qemu/option.h"
#include "qemu/range.h"
+#include "qemu/units.h"
#include "sysemu/kvm.h"
#include "sysemu/sysemu.h"
#include "pci.h"
@@ -1417,7 +1418,7 @@ static void vfio_pci_relocate_msix(VFIOPCIDevice *vdev, Error **errp)
}
/* 2GB max size for 32-bit BARs, cannot double if already > 1G */
- if (vdev->bars[target_bar].size > (1 * 1024 * 1024 * 1024) &&
+ if (vdev->bars[target_bar].size > 1 * GiB &&
!vdev->bars[target_bar].mem64) {
error_setg(errp, "Invalid MSI-X relocation BAR %d, "
"no space to extend 32-bit BAR", target_bar);
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 39/47] hw/virtio: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (37 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 38/47] hw/vfio: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 40/47] hw/rdma: " Paolo Bonzini
` (8 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-39-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
include/hw/virtio/virtio-net.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/hw/virtio/virtio-net.h b/include/hw/virtio/virtio-net.h
index 02484dc..4d7f3c8 100644
--- a/include/hw/virtio/virtio-net.h
+++ b/include/hw/virtio/virtio-net.h
@@ -14,6 +14,7 @@
#ifndef QEMU_VIRTIO_NET_H
#define QEMU_VIRTIO_NET_H
+#include "qemu/units.h"
#include "standard-headers/linux/virtio_net.h"
#include "hw/virtio/virtio.h"
@@ -44,7 +45,7 @@ typedef struct virtio_net_conf
} virtio_net_conf;
/* Maximum packet size we can receive from tap device: header + 64k */
-#define VIRTIO_NET_MAX_BUFSIZE (sizeof(struct virtio_net_hdr) + (64 << 10))
+#define VIRTIO_NET_MAX_BUFSIZE (sizeof(struct virtio_net_hdr) + (64 * KiB))
typedef struct VirtIONetQueue {
VirtQueue *rx_vq;
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 40/47] hw/rdma: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (38 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 39/47] hw/virtio: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 41/47] cutils: Do not include "qemu/units.h" directly Paolo Bonzini
` (7 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
Reviewed-by: Yuval Shaia <yuval.shaia@oracle.com>
Message-Id: <20180625124238.25339-40-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/rdma/vmw/pvrdma.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/rdma/vmw/pvrdma.h b/hw/rdma/vmw/pvrdma.h
index 0b46dc5..81e0e0e 100644
--- a/hw/rdma/vmw/pvrdma.h
+++ b/hw/rdma/vmw/pvrdma.h
@@ -16,6 +16,7 @@
#ifndef PVRDMA_PVRDMA_H
#define PVRDMA_PVRDMA_H
+#include "qemu/units.h"
#include "hw/pci/pci.h"
#include "hw/pci/msix.h"
@@ -30,7 +31,7 @@
#define RDMA_MSIX_BAR_IDX 0
#define RDMA_REG_BAR_IDX 1
#define RDMA_UAR_BAR_IDX 2
-#define RDMA_BAR0_MSIX_SIZE (16 * 1024)
+#define RDMA_BAR0_MSIX_SIZE (16 * KiB)
#define RDMA_BAR1_REGS_SIZE 64
#define RDMA_BAR2_UAR_SIZE (0x1000 * MAX_UCS) /* each uc gets page */
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 41/47] cutils: Do not include "qemu/units.h" directly
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (39 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 40/47] hw/rdma: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 42/47] monitor: Use the IEC binary prefix definitions Paolo Bonzini
` (6 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
All files using "qemu/units.h" definitions already include it directly,
we can now remove it from "qemu/cutils.h".
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
Message-Id: <20180625124238.25339-41-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
include/qemu/cutils.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/qemu/cutils.h b/include/qemu/cutils.h
index 056e662..cdb0f0d 100644
--- a/include/qemu/cutils.h
+++ b/include/qemu/cutils.h
@@ -2,7 +2,6 @@
#define QEMU_CUTILS_H
#include "qemu/fprintf-fn.h"
-#include "qemu/units.h"
/**
* pstrcpy:
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 42/47] monitor: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (40 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 41/47] cutils: Do not include "qemu/units.h" directly Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 43/47] vl: " Paolo Bonzini
` (5 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -n '[<>][<>]= ?[1-5]0'
and modified manually.
Suggested-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-43-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
monitor.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/monitor.c b/monitor.c
index 0988eb4..61b727a 100644
--- a/monitor.c
+++ b/monitor.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include <dirent.h>
#include "cpu.h"
#include "hw/hw.h"
@@ -3288,7 +3289,7 @@ static QDict *monitor_parse_arguments(Monitor *mon,
monitor_printf(mon, "enter a positive value\n");
goto fail;
}
- val <<= 20;
+ val *= MiB;
}
qdict_put_int(qdict, key, val);
}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 43/47] vl: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (41 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 42/47] monitor: Use the IEC binary prefix definitions Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 44/47] tests/crypto: " Paolo Bonzini
` (4 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -n '[<>][<>]= ?[1-5]0'
and modified manually.
Suggested-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-44-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
vl.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/vl.c b/vl.c
index ef6cfce..93795c1 100644
--- a/vl.c
+++ b/vl.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu-version.h"
#include "qemu/cutils.h"
@@ -2808,8 +2809,8 @@ static void set_memory_options(uint64_t *ram_slots, ram_addr_t *maxram_size,
if (g_ascii_isdigit(mem_str[strlen(mem_str) - 1])) {
uint64_t overflow_check = sz;
- sz <<= 20;
- if ((sz >> 20) != overflow_check) {
+ sz *= MiB;
+ if (sz / MiB != overflow_check) {
error_report("too large 'size' option value");
exit(EXIT_FAILURE);
}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 44/47] tests/crypto: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (42 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 43/47] vl: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 45/47] linux-user: " Paolo Bonzini
` (3 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -n '[<>][<>]= ?[1-5]0'
and modified manually.
Suggested-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-45-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
tests/benchmark-crypto-cipher.c | 6 +++---
tests/benchmark-crypto-hash.c | 5 +++--
tests/benchmark-crypto-hmac.c | 6 +++---
3 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/tests/benchmark-crypto-cipher.c b/tests/benchmark-crypto-cipher.c
index cf98443..f5a0d0b 100644
--- a/tests/benchmark-crypto-cipher.c
+++ b/tests/benchmark-crypto-cipher.c
@@ -11,6 +11,7 @@
* top-level directory.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "crypto/init.h"
#include "crypto/cipher.h"
@@ -56,8 +57,7 @@ static void test_cipher_speed(const void *opaque)
total += chunk_size;
} while (g_test_timer_elapsed() < 5.0);
- total /= 1024 * 1024; /* to MB */
-
+ total /= MiB;
g_print("cbc(aes128): ");
g_print("Testing chunk_size %zu bytes ", chunk_size);
g_print("done: %.2f MB in %.2f secs: ", total, g_test_timer_last());
@@ -78,7 +78,7 @@ int main(int argc, char **argv)
g_test_init(&argc, &argv, NULL);
g_assert(qcrypto_init(NULL) == 0);
- for (i = 512; i <= (64 * 1204); i *= 2) {
+ for (i = 512; i <= 64 * KiB; i *= 2) {
memset(name, 0 , sizeof(name));
snprintf(name, sizeof(name), "/crypto/cipher/speed-%zu", i);
g_test_add_data_func(name, (void *)i, test_cipher_speed);
diff --git a/tests/benchmark-crypto-hash.c b/tests/benchmark-crypto-hash.c
index 122bfb6..9b6f7a9 100644
--- a/tests/benchmark-crypto-hash.c
+++ b/tests/benchmark-crypto-hash.c
@@ -11,6 +11,7 @@
* top-level directory.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "crypto/init.h"
#include "crypto/hash.h"
@@ -39,7 +40,7 @@ static void test_hash_speed(const void *opaque)
total += chunk_size;
} while (g_test_timer_elapsed() < 5.0);
- total /= 1024 * 1024; /* to MB */
+ total /= MiB;
g_print("sha256: ");
g_print("Testing chunk_size %zu bytes ", chunk_size);
g_print("done: %.2f MB in %.2f secs: ", total, g_test_timer_last());
@@ -57,7 +58,7 @@ int main(int argc, char **argv)
g_test_init(&argc, &argv, NULL);
g_assert(qcrypto_init(NULL) == 0);
- for (i = 512; i <= (64 * 1204); i *= 2) {
+ for (i = 512; i <= 64 * KiB; i *= 2) {
memset(name, 0 , sizeof(name));
snprintf(name, sizeof(name), "/crypto/hash/speed-%zu", i);
g_test_add_data_func(name, (void *)i, test_hash_speed);
diff --git a/tests/benchmark-crypto-hmac.c b/tests/benchmark-crypto-hmac.c
index c30250d..f1dfa24 100644
--- a/tests/benchmark-crypto-hmac.c
+++ b/tests/benchmark-crypto-hmac.c
@@ -11,6 +11,7 @@
* top-level directory.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "crypto/init.h"
#include "crypto/hmac.h"
@@ -53,8 +54,7 @@ static void test_hmac_speed(const void *opaque)
total += chunk_size;
} while (g_test_timer_elapsed() < 5.0);
- total /= 1024 * 1024; /* to MB */
-
+ total /= MiB;
g_print("hmac(sha256): ");
g_print("Testing chunk_size %zu bytes ", chunk_size);
g_print("done: %.2f MB in %.2f secs: ", total, g_test_timer_last());
@@ -72,7 +72,7 @@ int main(int argc, char **argv)
g_test_init(&argc, &argv, NULL);
g_assert(qcrypto_init(NULL) == 0);
- for (i = 512; i <= (64 * 1204); i *= 2) {
+ for (i = 512; i <= 64 * KiB; i *= 2) {
memset(name, 0 , sizeof(name));
snprintf(name, sizeof(name), "/crypto/hmac/speed-%zu", i);
g_test_add_data_func(name, (void *)i, test_hmac_speed);
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 45/47] linux-user: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (43 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 44/47] tests/crypto: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 46/47] bsd-user: " Paolo Bonzini
` (2 subsequent siblings)
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -n '[<>][<>]= ?[1-5]0'
and modified manually.
Suggested-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-46-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
linux-user/main.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/linux-user/main.c b/linux-user/main.c
index 84e9ec9..52b5a61 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -17,6 +17,7 @@
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-version.h"
#include <sys/syscall.h>
#include <sys/resource.h>
@@ -274,9 +275,9 @@ static void handle_arg_stack_size(const char *arg)
}
if (*p == 'M') {
- guest_stack_size *= 1024 * 1024;
+ guest_stack_size *= MiB;
} else if (*p == 'k' || *p == 'K') {
- guest_stack_size *= 1024;
+ guest_stack_size *= KiB;
}
}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 46/47] bsd-user: Use the IEC binary prefix definitions
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (44 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 45/47] linux-user: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 47/47] serial: Open non-block Paolo Bonzini
2018-06-30 15:39 ` [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Peter Maydell
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
It eases code review, unit is explicit.
Patch generated using:
$ git grep -n '[<>][<>]= ?[1-5]0'
and modified manually.
Suggested-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180625124238.25339-47-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
bsd-user/main.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/bsd-user/main.c b/bsd-user/main.c
index da3b833..0d31569 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -17,6 +17,7 @@
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-version.h"
#include <machine/trap.h>
@@ -795,9 +796,9 @@ int main(int argc, char **argv)
if (x86_stack_size <= 0)
usage();
if (*r == 'M')
- x86_stack_size *= 1024 * 1024;
+ x86_stack_size *= MiB;
else if (*r == 'k' || *r == 'K')
- x86_stack_size *= 1024;
+ x86_stack_size *= KiB;
} else if (!strcmp(r, "L")) {
interp_prefix = argv[optind++];
} else if (!strcmp(r, "p")) {
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* [Qemu-devel] [PULL 47/47] serial: Open non-block
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (45 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 46/47] bsd-user: " Paolo Bonzini
@ 2018-06-30 6:10 ` Paolo Bonzini
2018-06-30 15:39 ` [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Peter Maydell
47 siblings, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 6:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Dr. David Alan Gilbert
From: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
On a real serial device, the open can block if the handshake
lines are in a particular state. If a QEMU is passing the serial
device to the guest, the QEMU startup is blocked opening the device
(with a symptom seen as a timeout from libvirt).
Open the serial port with O_NONBLOCK.
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
chardev/char-serial.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/chardev/char-serial.c b/chardev/char-serial.c
index ae548d2..3299b46 100644
--- a/chardev/char-serial.c
+++ b/chardev/char-serial.c
@@ -265,7 +265,8 @@ static void qmp_chardev_open_serial(Chardev *chr,
ChardevHostdev *serial = backend->u.serial.data;
int fd;
- fd = qmp_chardev_open_file_source(serial->device, O_RDWR, errp);
+ fd = qmp_chardev_open_file_source(serial->device, O_RDWR | O_NONBLOCK,
+ errp);
if (fd < 0) {
return;
}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 53+ messages in thread
* Re: [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
` (46 preceding siblings ...)
2018-06-30 6:10 ` [Qemu-devel] [PULL 47/47] serial: Open non-block Paolo Bonzini
@ 2018-06-30 15:39 ` Peter Maydell
2018-06-30 15:51 ` Paolo Bonzini
47 siblings, 1 reply; 53+ messages in thread
From: Peter Maydell @ 2018-06-30 15:39 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: QEMU Developers
On 30 June 2018 at 07:09, Paolo Bonzini <pbonzini@redhat.com> wrote:
> The following changes since commit 109b25045b3651f9c5d02c3766c0b3ff63e6d193:
>
> Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging (2018-06-29 12:30:29 +0100)
>
> are available in the git repository at:
>
>
> git://github.com/bonzini/qemu.git tags/for-upstream
>
> for you to fetch changes up to 633e23f138f04ce776feaef78042901af883eafe:
>
> serial: Open non-block (2018-06-29 17:31:08 +0200)
>
> ----------------------------------------------------------------
> * IEC units series (Philippe)
> * Hyper-V PV TLB flush (Vitaly)
> * git archive detection (Daniel)
> * host serial passthrough fix (David)
>
Compile failures I'm afraid:
/root/qemu/tests/test-qemu-opts.c:707:66: error: use of undeclared
identifier 'MiB'
g_assert_cmphex(qemu_opt_get_size(opts, "size3", 0), ==, 2 * MiB);
^
/root/qemu/tests/test-qemu-opts.c:711:62: error: use of undeclared
identifier 'GiB'
g_assert_cmphex(qemu_opt_get_size(opts, "size1", 0), ==, GiB / 10);
^
/root/qemu/tests/test-qemu-opts.c:712:74: error: use of undeclared
identifier 'TiB'
g_assert_cmphex(qemu_opt_get_size(opts, "size2", 0), ==, 16777215U * TiB);
^
/home/petmay01/linaro/qemu-for-merges/tests/test-keyval.c: In function
‘test_keyval_visit_size’:
/home/petmay01/linaro/qemu-for-merges/tests/test-keyval.c:460:43:
error: ‘MiB’ undeclared (first use in this function)
/home/petmay01/linaro/qemu-for-merges/tests/test-keyval.c:460:43:
note: each undeclared identifier is reported only once for each
function it appears in
/home/petmay01/linaro/qemu-for-merges/tests/test-keyval.c:462:39:
error: ‘GiB’ undeclared (first use in this function)
/home/petmay01/linaro/qemu-for-merges/tests/test-keyval.c:464:50:
error: ‘TiB’ undeclared (first use in this function)
thanks
-- PMM
^ permalink raw reply [flat|nested] 53+ messages in thread
* Re: [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze
2018-06-30 15:39 ` [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Peter Maydell
@ 2018-06-30 15:51 ` Paolo Bonzini
2018-06-30 16:50 ` [Qemu-devel] [PATCH] !fixup 052f529eb3d07170b18b8d0920bc8c450e389a2f Philippe Mathieu-Daudé
0 siblings, 1 reply; 53+ messages in thread
From: Paolo Bonzini @ 2018-06-30 15:51 UTC (permalink / raw)
To: Maydell, Peter; +Cc: qemu-devel
Hmm, must have sent a stale branch.
Thanks,
Paolo
Il sab 30 giu 2018, 17:40 Peter Maydell <peter.maydell@linaro.org> ha
scritto:
> On 30 June 2018 at 07:09, Paolo Bonzini <pbonzini@redhat.com> wrote:
> > The following changes since commit
> 109b25045b3651f9c5d02c3766c0b3ff63e6d193:
> >
> > Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into
> staging (2018-06-29 12:30:29 +0100)
> >
> > are available in the git repository at:
> >
> >
> > git://github.com/bonzini/qemu.git tags/for-upstream
> >
> > for you to fetch changes up to 633e23f138f04ce776feaef78042901af883eafe:
> >
> > serial: Open non-block (2018-06-29 17:31:08 +0200)
> >
> > ----------------------------------------------------------------
> > * IEC units series (Philippe)
> > * Hyper-V PV TLB flush (Vitaly)
> > * git archive detection (Daniel)
> > * host serial passthrough fix (David)
> >
>
> Compile failures I'm afraid:
>
> /root/qemu/tests/test-qemu-opts.c:707:66: error: use of undeclared
> identifier 'MiB'
> g_assert_cmphex(qemu_opt_get_size(opts, "size3", 0), ==, 2 * MiB);
> ^
> /root/qemu/tests/test-qemu-opts.c:711:62: error: use of undeclared
> identifier 'GiB'
> g_assert_cmphex(qemu_opt_get_size(opts, "size1", 0), ==, GiB / 10);
> ^
> /root/qemu/tests/test-qemu-opts.c:712:74: error: use of undeclared
> identifier 'TiB'
> g_assert_cmphex(qemu_opt_get_size(opts, "size2", 0), ==, 16777215U *
> TiB);
> ^
> /home/petmay01/linaro/qemu-for-merges/tests/test-keyval.c: In function
> ‘test_keyval_visit_size’:
> /home/petmay01/linaro/qemu-for-merges/tests/test-keyval.c:460:43:
> error: ‘MiB’ undeclared (first use in this function)
> /home/petmay01/linaro/qemu-for-merges/tests/test-keyval.c:460:43:
> note: each undeclared identifier is reported only once for each
> function it appears in
> /home/petmay01/linaro/qemu-for-merges/tests/test-keyval.c:462:39:
> error: ‘GiB’ undeclared (first use in this function)
> /home/petmay01/linaro/qemu-for-merges/tests/test-keyval.c:464:50:
> error: ‘TiB’ undeclared (first use in this function)
>
> thanks
> -- PMM
>
>
^ permalink raw reply [flat|nested] 53+ messages in thread
* [Qemu-devel] [PATCH] !fixup 052f529eb3d07170b18b8d0920bc8c450e389a2f
2018-06-30 15:51 ` Paolo Bonzini
@ 2018-06-30 16:50 ` Philippe Mathieu-Daudé
2018-07-02 8:37 ` Paolo Bonzini
2018-07-02 13:32 ` Paolo Bonzini
0 siblings, 2 replies; 53+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-06-30 16:50 UTC (permalink / raw)
To: Paolo Bonzini
Cc: Philippe Mathieu-Daudé,
qemu-devel, Peter Maydell, Markus Armbruster
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
This was in e9dd993d-875f-4173-f68e-e6b4e75e3aa1@amsat.org but I can't
find it on the list...
tests/test-cutils.c | 2 +-
tests/test-qemu-opts.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/tests/test-cutils.c b/tests/test-cutils.c
index a6e5fe4984..d85c3e0f6d 100644
--- a/tests/test-cutils.c
+++ b/tests/test-cutils.c
@@ -26,7 +26,7 @@
*/
#include "qemu/osdep.h"
-
+#include "qemu/units.h"
#include "qemu/cutils.h"
#include "qemu/units.h"
diff --git a/tests/test-qemu-opts.c b/tests/test-qemu-opts.c
index fd4d848f66..43869cb754 100644
--- a/tests/test-qemu-opts.c
+++ b/tests/test-qemu-opts.c
@@ -8,7 +8,7 @@
*/
#include "qemu/osdep.h"
-#include "qemu/cutils.h"
+#include "qemu/units.h"
#include "qemu/option.h"
#include "qemu/option_int.h"
#include "qapi/error.h"
--
2.18.0
^ permalink raw reply related [flat|nested] 53+ messages in thread
* Re: [Qemu-devel] [PATCH] !fixup 052f529eb3d07170b18b8d0920bc8c450e389a2f
2018-06-30 16:50 ` [Qemu-devel] [PATCH] !fixup 052f529eb3d07170b18b8d0920bc8c450e389a2f Philippe Mathieu-Daudé
@ 2018-07-02 8:37 ` Paolo Bonzini
2018-07-02 13:32 ` Paolo Bonzini
1 sibling, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-07-02 8:37 UTC (permalink / raw)
To: Philippe Mathieu-Daudé; +Cc: Peter Maydell, Markus Armbruster, qemu-devel
On 30/06/2018 18:50, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> This was in e9dd993d-875f-4173-f68e-e6b4e75e3aa1@amsat.org but I can't
> find it on the list...
>
> tests/test-cutils.c | 2 +-
> tests/test-qemu-opts.c | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/tests/test-cutils.c b/tests/test-cutils.c
> index a6e5fe4984..d85c3e0f6d 100644
> --- a/tests/test-cutils.c
> +++ b/tests/test-cutils.c
> @@ -26,7 +26,7 @@
> */
>
> #include "qemu/osdep.h"
> -
> +#include "qemu/units.h"
> #include "qemu/cutils.h"
> #include "qemu/units.h"
>
> diff --git a/tests/test-qemu-opts.c b/tests/test-qemu-opts.c
> index fd4d848f66..43869cb754 100644
> --- a/tests/test-qemu-opts.c
> +++ b/tests/test-qemu-opts.c
> @@ -8,7 +8,7 @@
> */
>
> #include "qemu/osdep.h"
> -#include "qemu/cutils.h"
> +#include "qemu/units.h"
> #include "qemu/option.h"
> #include "qemu/option_int.h"
> #include "qapi/error.h"
>
Squashed, thanks.
Paolo
^ permalink raw reply [flat|nested] 53+ messages in thread
* Re: [Qemu-devel] [PATCH] !fixup 052f529eb3d07170b18b8d0920bc8c450e389a2f
2018-06-30 16:50 ` [Qemu-devel] [PATCH] !fixup 052f529eb3d07170b18b8d0920bc8c450e389a2f Philippe Mathieu-Daudé
2018-07-02 8:37 ` Paolo Bonzini
@ 2018-07-02 13:32 ` Paolo Bonzini
1 sibling, 0 replies; 53+ messages in thread
From: Paolo Bonzini @ 2018-07-02 13:32 UTC (permalink / raw)
To: Philippe Mathieu-Daudé; +Cc: Peter Maydell, Markus Armbruster, qemu-devel
On 30/06/2018 18:50, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> This was in e9dd993d-875f-4173-f68e-e6b4e75e3aa1@amsat.org but I can't
> find it on the list...
>
> tests/test-cutils.c | 2 +-
> tests/test-qemu-opts.c | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/tests/test-cutils.c b/tests/test-cutils.c
> index a6e5fe4984..d85c3e0f6d 100644
> --- a/tests/test-cutils.c
> +++ b/tests/test-cutils.c
> @@ -26,7 +26,7 @@
> */
>
> #include "qemu/osdep.h"
> -
> +#include "qemu/units.h"
> #include "qemu/cutils.h"
> #include "qemu/units.h"
>
> diff --git a/tests/test-qemu-opts.c b/tests/test-qemu-opts.c
> index fd4d848f66..43869cb754 100644
> --- a/tests/test-qemu-opts.c
> +++ b/tests/test-qemu-opts.c
> @@ -8,7 +8,7 @@
> */
>
> #include "qemu/osdep.h"
> -#include "qemu/cutils.h"
> +#include "qemu/units.h"
> #include "qemu/option.h"
> #include "qemu/option_int.h"
> #include "qapi/error.h"
>
Not enough, this is needed too in order to avoid integer overflows in constant expressions:
diff --git a/tests/test-keyval.c b/tests/test-keyval.c
index dce9f7a..09b0ae3 100644
--- a/tests/test-keyval.c
+++ b/tests/test-keyval.c
@@ -462,7 +462,7 @@ static void test_keyval_visit_size(void)
visit_type_size(v, "sz4", &sz, &error_abort);
g_assert_cmphex(sz, ==, GiB / 10);
visit_type_size(v, "sz5", &sz, &error_abort);
- g_assert_cmphex(sz, ==, 16777215 * TiB);
+ g_assert_cmphex(sz, ==, 16777215ULL * TiB);
visit_check_struct(v, &error_abort);
visit_end_struct(v, NULL);
visit_free(v);
Stage this hunk [y,n,q,a,d,/,e,?]? y
diff --git a/tests/test-qemu-opts.c b/tests/test-qemu-opts.c
index 43869cb..ef96e84 100644
--- a/tests/test-qemu-opts.c
+++ b/tests/test-qemu-opts.c
@@ -709,7 +709,7 @@ static void test_opts_parse_size(void)
false, &error_abort);
g_assert_cmpuint(opts_count(opts), ==, 2);
g_assert_cmphex(qemu_opt_get_size(opts, "size1", 0), ==, GiB / 10);
- g_assert_cmphex(qemu_opt_get_size(opts, "size2", 0), ==, 16777215U * TiB);
+ g_assert_cmphex(qemu_opt_get_size(opts, "size2", 0), ==, 16777215ULL * TiB);
/* Beyond limit with suffix */
opts = qemu_opts_parse(&opts_list_02, "size1=16777216T",
Paolo
^ permalink raw reply related [flat|nested] 53+ messages in thread
end of thread, other threads:[~2018-07-02 13:32 UTC | newest]
Thread overview: 53+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-06-30 6:09 [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Paolo Bonzini
2018-06-30 6:09 ` [Qemu-devel] [PULL 01/47] i386/kvm: add support for Hyper-V TLB flush Paolo Bonzini
2018-06-30 6:09 ` [Qemu-devel] [PULL 02/47] configure: add sanity check to catch builds from "git archive" Paolo Bonzini
2018-06-30 6:09 ` [Qemu-devel] [PULL 03/47] include: Add IEC binary prefixes in "qemu/units.h" Paolo Bonzini
2018-06-30 6:09 ` [Qemu-devel] [PULL 04/47] vdi: Use definitions from "qemu/units.h" Paolo Bonzini
2018-06-30 6:09 ` [Qemu-devel] [PULL 05/47] x86/cpu: " Paolo Bonzini
2018-06-30 6:09 ` [Qemu-devel] [PULL 06/47] checkpatch: Recognize IEC binary prefix definitions Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 07/47] hw: Use IEC binary prefix definitions from "qemu/units.h" Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 08/47] hw: Directly use "qemu/units.h" instead of "qemu/cutils.h" Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 09/47] hw/ivshmem: Use the IEC binary prefix definitions Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 10/47] hw/ipack: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 11/47] hw/scsi: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 12/47] hw/smbios: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 13/47] hw/xen: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 14/47] hw/tpm: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 15/47] hw/block: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 16/47] hw/display: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 17/47] hw/misc: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 18/47] hw/riscv: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 19/47] hw/m68k: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 20/47] hw/sparc: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 21/47] hw/s390x: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 22/47] hw/hppa: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 23/47] hw/xtensa: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 24/47] hw/alpha: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 25/47] hw/tricore: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 26/47] hw/microblaze: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 27/47] hw/nios2: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 28/47] hw/cris: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 29/47] hw/lm32: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 30/47] hw/sh4: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 31/47] hw/mips/r4k: Constify params_size Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 32/47] hw/mips: Use the IEC binary prefix definitions Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 33/47] hw/ppc: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 34/47] hw/i386: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 35/47] hw/net: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 36/47] hw/usb: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 37/47] hw/sd: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 38/47] hw/vfio: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 39/47] hw/virtio: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 40/47] hw/rdma: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 41/47] cutils: Do not include "qemu/units.h" directly Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 42/47] monitor: Use the IEC binary prefix definitions Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 43/47] vl: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 44/47] tests/crypto: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 45/47] linux-user: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 46/47] bsd-user: " Paolo Bonzini
2018-06-30 6:10 ` [Qemu-devel] [PULL 47/47] serial: Open non-block Paolo Bonzini
2018-06-30 15:39 ` [Qemu-devel] [PULL 00/47] More misc patches for 3.0 soft freeze Peter Maydell
2018-06-30 15:51 ` Paolo Bonzini
2018-06-30 16:50 ` [Qemu-devel] [PATCH] !fixup 052f529eb3d07170b18b8d0920bc8c450e389a2f Philippe Mathieu-Daudé
2018-07-02 8:37 ` Paolo Bonzini
2018-07-02 13:32 ` Paolo Bonzini
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