* [PATCH] drm/i915/psr: Prevent DC5/6 entry when reading pipe CRCs
@ 2018-07-01 21:46 Dhinakaran Pandiyan
2018-07-01 22:08 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-07-02 8:21 ` ✗ Fi.CI.IGT: failure " Patchwork
0 siblings, 2 replies; 3+ messages in thread
From: Dhinakaran Pandiyan @ 2018-07-01 21:46 UTC (permalink / raw)
To: intel-gfx; +Cc: Dhinakaran Pandiyan, Paulo Zanoni
We've seen pipe CRC related failures in CI when PSR is enabled. Since
pipe A can be disabled by DMC when PSR is enabled, it is likely that CRCs
aren't available. Grab a power domain reference to enable DC_OFF power well
to handle this. It might well be possible that CRC's are wrong or
unavailable with PSR irrespective of DMC, but let's start with this.
References: https://bugs.freedesktop.org/show_bug.cgi?id=106103
References: https://bugs.freedesktop.org/show_bug.cgi?id=105750
Cc: Imre Deak <imre.deak@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
---
drivers/gpu/drm/i915/intel_display.h | 1 +
drivers/gpu/drm/i915/intel_pipe_crc.c | 9 +++++++++
drivers/gpu/drm/i915/intel_runtime_pm.c | 7 +++++++
3 files changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h
index a77dd29db2ec..5cbdf9a7846d 100644
--- a/drivers/gpu/drm/i915/intel_display.h
+++ b/drivers/gpu/drm/i915/intel_display.h
@@ -204,6 +204,7 @@ enum intel_display_power_domain {
POWER_DOMAIN_AUX_TBT3,
POWER_DOMAIN_AUX_TBT4,
POWER_DOMAIN_GMBUS,
+ POWER_DOMAIN_PIPE_A_CRC,
POWER_DOMAIN_MODESET,
POWER_DOMAIN_GT_IRQ,
POWER_DOMAIN_INIT,
diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c b/drivers/gpu/drm/i915/intel_pipe_crc.c
index 39a4e4edda07..5888d8d511ef 100644
--- a/drivers/gpu/drm/i915/intel_pipe_crc.c
+++ b/drivers/gpu/drm/i915/intel_pipe_crc.c
@@ -922,6 +922,7 @@ int intel_crtc_set_crc_source(struct drm_crtc *crtc, const char *source_name,
enum intel_pipe_crc_source source;
u32 val = 0; /* shut up gcc */
int ret = 0;
+ bool dc_off = false;
if (display_crc_ctl_parse_source(source_name, &source) < 0) {
DRM_DEBUG_DRIVER("unknown source %s\n", source_name);
@@ -938,11 +939,19 @@ int intel_crtc_set_crc_source(struct drm_crtc *crtc, const char *source_name,
if (ret != 0)
goto out;
+ dc_off = dev_priv->csr.dmc_payload && power_domain == POWER_DOMAIN_PIPE_A;
+ if (dc_off && source)
+ intel_display_power_get(dev_priv, POWER_DOMAIN_PIPE_A_CRC);
+
pipe_crc->source = source;
I915_WRITE(PIPE_CRC_CTL(crtc->index), val);
POSTING_READ(PIPE_CRC_CTL(crtc->index));
if (!source) {
+ if (dc_off)
+ intel_display_power_put(dev_priv,
+ POWER_DOMAIN_PIPE_A_CRC);
+
if (IS_G4X(dev_priv))
g4x_undo_pipe_scramble_reset(dev_priv, crtc->index);
else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index d81b2cfe1c5e..fd12bba1be3b 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -144,6 +144,8 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
return "AUX_TBT4";
case POWER_DOMAIN_GMBUS:
return "GMBUS";
+ case POWER_DOMAIN_PIPE_A_CRC:
+ return "PIPE_A_CRC:";
case POWER_DOMAIN_INIT:
return "INIT";
case POWER_DOMAIN_MODESET:
@@ -1800,6 +1802,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
BIT_ULL(POWER_DOMAIN_GT_IRQ) | \
BIT_ULL(POWER_DOMAIN_MODESET) | \
BIT_ULL(POWER_DOMAIN_AUX_A) | \
+ BIT_ULL(POWER_DOMAIN_PIPE_A_CRC) | \
BIT_ULL(POWER_DOMAIN_INIT))
#define BXT_DISPLAY_POWERWELL_2_POWER_DOMAINS ( \
@@ -1822,6 +1825,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
BIT_ULL(POWER_DOMAIN_GT_IRQ) | \
BIT_ULL(POWER_DOMAIN_MODESET) | \
BIT_ULL(POWER_DOMAIN_AUX_A) | \
+ BIT_ULL(POWER_DOMAIN_PIPE_A_CRC) | \
BIT_ULL(POWER_DOMAIN_GMBUS) | \
BIT_ULL(POWER_DOMAIN_INIT))
#define BXT_DPIO_CMN_A_POWER_DOMAINS ( \
@@ -1883,6 +1887,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
BIT_ULL(POWER_DOMAIN_GT_IRQ) | \
BIT_ULL(POWER_DOMAIN_MODESET) | \
BIT_ULL(POWER_DOMAIN_AUX_A) | \
+ BIT_ULL(POWER_DOMAIN_PIPE_A_CRC) | \
BIT_ULL(POWER_DOMAIN_GMBUS) | \
BIT_ULL(POWER_DOMAIN_INIT))
@@ -1941,6 +1946,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
BIT_ULL(POWER_DOMAIN_GT_IRQ) | \
BIT_ULL(POWER_DOMAIN_MODESET) | \
BIT_ULL(POWER_DOMAIN_AUX_A) | \
+ BIT_ULL(POWER_DOMAIN_PIPE_A_CRC) | \
BIT_ULL(POWER_DOMAIN_INIT))
/*
@@ -2006,6 +2012,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
ICL_PW_2_POWER_DOMAINS | \
BIT_ULL(POWER_DOMAIN_MODESET) | \
BIT_ULL(POWER_DOMAIN_AUX_A) | \
+ BIT_ULL(POWER_DOMAIN_PIPE_A_CRC) | \
BIT_ULL(POWER_DOMAIN_INIT))
#define ICL_DDI_IO_A_POWER_DOMAINS ( \
--
2.14.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 3+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/psr: Prevent DC5/6 entry when reading pipe CRCs
2018-07-01 21:46 [PATCH] drm/i915/psr: Prevent DC5/6 entry when reading pipe CRCs Dhinakaran Pandiyan
@ 2018-07-01 22:08 ` Patchwork
2018-07-02 8:21 ` ✗ Fi.CI.IGT: failure " Patchwork
1 sibling, 0 replies; 3+ messages in thread
From: Patchwork @ 2018-07-01 22:08 UTC (permalink / raw)
To: Dhinakaran Pandiyan; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/psr: Prevent DC5/6 entry when reading pipe CRCs
URL : https://patchwork.freedesktop.org/series/45748/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4410 -> Patchwork_9492 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/45748/revisions/1/mbox/
== Known issues ==
Here are the changes found in Patchwork_9492 that come from known issues:
=== IGT changes ===
==== Possible fixes ====
igt@prime_vgem@basic-fence-flip:
fi-ilk-650: FAIL (fdo#104008) -> PASS
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
== Participating hosts (38 -> 37) ==
Additional (3): fi-kbl-7560u fi-glk-j4005 fi-snb-2600
Missing (4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4410 -> Patchwork_9492
CI_DRM_4410: 2eaf040dbd0cc45edc4101b8ebe51bcabe1b4e88 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4532: 840d12e2f050b784552197403d6575a57b6e896d @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9492: 4befd24e649008e5db5dc99e734e918563151c58 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
4befd24e6490 drm/i915/psr: Prevent DC5/6 entry when reading pipe CRCs
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9492/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 3+ messages in thread
* ✗ Fi.CI.IGT: failure for drm/i915/psr: Prevent DC5/6 entry when reading pipe CRCs
2018-07-01 21:46 [PATCH] drm/i915/psr: Prevent DC5/6 entry when reading pipe CRCs Dhinakaran Pandiyan
2018-07-01 22:08 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2018-07-02 8:21 ` Patchwork
1 sibling, 0 replies; 3+ messages in thread
From: Patchwork @ 2018-07-02 8:21 UTC (permalink / raw)
To: Dhinakaran Pandiyan; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/psr: Prevent DC5/6 entry when reading pipe CRCs
URL : https://patchwork.freedesktop.org/series/45748/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4410_full -> Patchwork_9492_full =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_9492_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9492_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9492_full:
=== IGT changes ===
==== Possible regressions ====
igt@kms_universal_plane@cursor-fb-leak-pipe-b:
shard-apl: PASS -> FAIL
==== Warnings ====
igt@gem_exec_schedule@deep-bsd2:
shard-kbl: PASS -> SKIP
== Known issues ==
Here are the changes found in Patchwork_9492_full that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drv_selftest@mock_scatterlist:
shard-kbl: NOTRUN -> DMESG-WARN (fdo#103667)
igt@gem_exec_big:
shard-hsw: PASS -> INCOMPLETE (fdo#103540)
igt@gem_exec_schedule@pi-ringfull-blt:
shard-kbl: NOTRUN -> FAIL (fdo#103158)
igt@kms_setmode@basic:
shard-apl: PASS -> FAIL (fdo#99912)
igt@perf_pmu@busy-accuracy-50-rcs0:
shard-glk: PASS -> FAIL (fdo#105157)
igt@perf_pmu@busy-idle-no-semaphores-vecs0:
shard-snb: SKIP -> INCOMPLETE (fdo#105411)
==== Possible fixes ====
igt@kms_atomic_transition@1x-modeset-transitions-nonblocking:
shard-glk: FAIL (fdo#105703) -> PASS
igt@kms_flip@plain-flip-fb-recreate-interruptible:
shard-glk: FAIL (fdo#100368) -> PASS +2
igt@kms_flip_tiling@flip-to-x-tiled:
shard-glk: FAIL (fdo#104724) -> PASS
==== Warnings ====
igt@drv_selftest@live_gtt:
shard-glk: FAIL (fdo#105347) -> INCOMPLETE (k.org#198133, fdo#103359)
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158
fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540
fdo#103667 https://bugs.freedesktop.org/show_bug.cgi?id=103667
fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724
fdo#105157 https://bugs.freedesktop.org/show_bug.cgi?id=105157
fdo#105347 https://bugs.freedesktop.org/show_bug.cgi?id=105347
fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411
fdo#105703 https://bugs.freedesktop.org/show_bug.cgi?id=105703
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133
== Participating hosts (5 -> 5) ==
No changes in participating hosts
== Build changes ==
* Linux: CI_DRM_4410 -> Patchwork_9492
CI_DRM_4410: 2eaf040dbd0cc45edc4101b8ebe51bcabe1b4e88 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4532: 840d12e2f050b784552197403d6575a57b6e896d @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9492: 4befd24e649008e5db5dc99e734e918563151c58 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9492/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 3+ messages in thread
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2018-07-01 21:46 [PATCH] drm/i915/psr: Prevent DC5/6 entry when reading pipe CRCs Dhinakaran Pandiyan
2018-07-01 22:08 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-07-02 8:21 ` ✗ Fi.CI.IGT: failure " Patchwork
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