[Qemu-devel] [PATCH v2 0/3] [PATCH 0/2] arm: Add nRF51 SoC and micro:bit machine

[Qemu-devel] [PATCH v2 0/3] [PATCH 0/2] arm: Add nRF51 SoC and micro:bit machine

[Joel Stanley]

This short series implements a minimal definition of the Nordic
Semiconductor nRF51, a Cortex-M0 ARM SoC, and the BBC micro:bit, a
machine that will use this SoC.

This work will serve as the base for our Google Summer of Code and
Outreachy interns who will work on implementing a number of features on
top of this base.

I've tested this with a microbit micropython firmware, and checked that
it starts running by looking at it with gdb.

I chose to keep the nrf51 and the microbit seperate, to not confuse the
peripherals that are on the microbit but are not part of the nrf51, and
vice versa.

v2: Addresses review from Peter and Stefan

Joel Stanley (3):
  arm: Add Nordic Semiconductor nRF51 SoC
  arm: Add BBC micro:bit machine
  MAINTAINERS: Add NRF51 entry

 MAINTAINERS                     |   8 +++
 default-configs/arm-softmmu.mak |   1 +
 hw/arm/Makefile.objs            |   1 +
 hw/arm/microbit.c               |  56 +++++++++++++++
 hw/arm/nrf51_soc.c              | 116 ++++++++++++++++++++++++++++++++
 include/hw/arm/nrf51_soc.h      |  41 +++++++++++
 6 files changed, 223 insertions(+)
 create mode 100644 hw/arm/microbit.c
 create mode 100644 hw/arm/nrf51_soc.c
 create mode 100644 include/hw/arm/nrf51_soc.h

-- 
2.17.1

[Qemu-devel] [PATCH v2 1/3] arm: Add Nordic Semiconductor nRF51 SoC

[Joel Stanley]

The nRF51 is a Cortex-M0 microcontroller with an on-board radio module,
plus other common ARM SoC peripherals.

 http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.pdf

This defines a basic model of the CPU and memory, with no peripherals
implemented at this stage.

Signed-off-by: Joel Stanley <joel@jms.id.au>
---
v2:
  put memory as struct fileds in state structure
  pass OBJECT(s) as owner, not NULL
  Add missing addresses for ficr
  Fix flash and sram sizes for microbit
  Embed cpu object in state object an initalise it without use of armv7m_init
  Link to datasheet
---
 default-configs/arm-softmmu.mak |   1 +
 hw/arm/Makefile.objs            |   1 +
 hw/arm/nrf51_soc.c              | 116 ++++++++++++++++++++++++++++++++
 include/hw/arm/nrf51_soc.h      |  41 +++++++++++
 4 files changed, 159 insertions(+)
 create mode 100644 hw/arm/nrf51_soc.c
 create mode 100644 include/hw/arm/nrf51_soc.h

diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 834d45cfaf95..ea63dd2885ed 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -101,6 +101,7 @@ CONFIG_STM32F2XX_SYSCFG=y
 CONFIG_STM32F2XX_ADC=y
 CONFIG_STM32F2XX_SPI=y
 CONFIG_STM32F205_SOC=y
+CONFIG_NRF51_SOC=y
 
 CONFIG_CMSDK_APB_TIMER=y
 CONFIG_CMSDK_APB_UART=y
diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
index d51fcecaf242..68be73f1c3ff 100644
--- a/hw/arm/Makefile.objs
+++ b/hw/arm/Makefile.objs
@@ -36,3 +36,4 @@ obj-$(CONFIG_MSF2) += msf2-soc.o msf2-som.o
 obj-$(CONFIG_IOTKIT) += iotkit.o
 obj-$(CONFIG_FSL_IMX7) += fsl-imx7.o mcimx7d-sabre.o
 obj-$(CONFIG_ARM_SMMUV3) += smmu-common.o smmuv3.o
+obj-$(CONFIG_NRF51_SOC) += nrf51_soc.o
diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
new file mode 100644
index 000000000000..f4b04642d656
--- /dev/null
+++ b/hw/arm/nrf51_soc.c
@@ -0,0 +1,116 @@
+/*
+ * Nordic Semiconductor nRF51 SoC
+ * http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.1.pdf
+ *
+ * Copyright 2018 Joel Stanley <joel@jms.id.au>
+ *
+ * This code is licensed under the GPL version 2 or later.  See
+ * the COPYING file in the top-level directory.
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qemu-common.h"
+#include "hw/arm/arm.h"
+#include "hw/sysbus.h"
+#include "hw/boards.h"
+#include "hw/devices.h"
+#include "hw/misc/unimp.h"
+#include "exec/address-spaces.h"
+#include "sysemu/sysemu.h"
+#include "qemu/log.h"
+#include "cpu.h"
+
+#include "hw/arm/nrf51_soc.h"
+
+#define IOMEM_BASE      0x40000000
+#define IOMEM_SIZE      0x20000000
+
+#define FICR_BASE       0x10000000
+#define FICR_SIZE       0x000000fc
+
+/* TODO: Flash size should be defined by the board. Microbit uses 256KB */
+#define FLASH_BASE      0x00000000
+#define FLASH_SIZE      (256 * 1024)
+
+/* TODO: Flash size should be defined by the board. Microbit uses 16KB */
+#define SRAM_BASE       0x20000000
+#define SRAM_SIZE       (16 * 1024)
+
+static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp)
+{
+    NRF51State *s = NRF51_SOC(dev_soc);
+    Error *err = NULL;
+
+    if (!s->board_memory) {
+        error_setg(errp, "memory property was not set");
+        return;
+    }
+
+    object_property_set_link(OBJECT(&s->cpu), OBJECT(&s->container), "memory",
+            &err);
+    object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
+
+    memory_region_add_subregion_overlap(&s->container, 0, s->board_memory, -1);
+
+    memory_region_init_ram(&s->flash, OBJECT(s), "nrf51.flash", FLASH_SIZE, &err);
+    if (err) {
+        error_propagate(errp, err);
+        return;
+    }
+    memory_region_set_readonly(&s->flash, true);
+    memory_region_add_subregion(&s->container, FLASH_BASE, &s->flash);
+
+    memory_region_init_ram(&s->sram, NULL, "nrf51.sram", SRAM_SIZE, &err);
+    if (err) {
+        error_propagate(errp, err);
+        return;
+    }
+    memory_region_add_subregion(&s->container, SRAM_BASE, &s->sram);
+
+    create_unimplemented_device("nrf51_soc.io", IOMEM_BASE, IOMEM_SIZE);
+    create_unimplemented_device("nrf51_soc.ficr", FICR_BASE, FICR_SIZE);
+    create_unimplemented_device("nrf51_soc.private", 0xF0000000, 0x10000000);
+}
+
+static void nrf51_soc_init(Object *obj)
+{
+    NRF51State *s = NRF51_SOC(obj);
+
+    memory_region_init(&s->container, obj, "nrf51-container", UINT64_MAX);
+
+    /* TODO: implement a cortex m0 and update this */
+    object_initialize(&s->cpu, sizeof(s->cpu), TYPE_ARMV7M);
+    object_property_add_child(OBJECT(s), "armv7m", OBJECT(&s->cpu), &error_abort);
+    qdev_set_parent_bus(DEVICE(&s->cpu), sysbus_get_default());
+    qdev_prop_set_string(DEVICE(&s->cpu), "cpu-type", ARM_CPU_TYPE_NAME("cortex-m3"));
+    qdev_prop_set_uint32(DEVICE(&s->cpu), "num-irq", 96);
+}
+
+static Property nrf51_soc_properties[] = {
+    DEFINE_PROP_LINK("memory", NRF51State, board_memory, TYPE_MEMORY_REGION,
+                     MemoryRegion *),
+    DEFINE_PROP_END_OF_LIST(),
+};
+
+static void nrf51_soc_class_init(ObjectClass *klass, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(klass);
+
+    dc->realize = nrf51_soc_realize;
+    dc->props = nrf51_soc_properties;
+}
+
+static const TypeInfo nrf51_soc_info = {
+    .name          = TYPE_NRF51_SOC,
+    .parent        = TYPE_SYS_BUS_DEVICE,
+    .instance_size = sizeof(NRF51State),
+    .instance_init = nrf51_soc_init,
+    .class_init    = nrf51_soc_class_init,
+};
+
+static void nrf51_soc_types(void)
+{
+    type_register_static(&nrf51_soc_info);
+}
+type_init(nrf51_soc_types)
diff --git a/include/hw/arm/nrf51_soc.h b/include/hw/arm/nrf51_soc.h
new file mode 100644
index 000000000000..7166b8ea7fbe
--- /dev/null
+++ b/include/hw/arm/nrf51_soc.h
@@ -0,0 +1,41 @@
+/*
+ * Nordic Semiconductor nRF51  SoC
+ *
+ * Copyright 2018 Joel Stanley <joel@jms.id.au>
+ *
+ * This code is licensed under the GPL version 2 or later.  See
+ * the COPYING file in the top-level directory.
+ */
+
+#ifndef NRF51_SOC_H
+#define NRF51_SOC_H
+
+#include "qemu/osdep.h"
+#include "hw/sysbus.h"
+#include "hw/arm/armv7m.h"
+
+#define TYPE_NRF51_SOC "nrf51-soc"
+#define NRF51_SOC(obj) \
+    OBJECT_CHECK(NRF51State, (obj), TYPE_NRF51_SOC)
+
+typedef struct NRF51State {
+    /*< private >*/
+    SysBusDevice parent_obj;
+
+    /*< public >*/
+    char *kernel_filename;
+
+    ARMv7MState cpu;
+
+    MemoryRegion iomem;
+    MemoryRegion sram;
+    MemoryRegion flash;
+
+    MemoryRegion *board_memory;
+
+    MemoryRegion container;
+
+} NRF51State;
+
+#endif
+
-- 
2.17.1

[Qemu-devel] [PATCH v2 2/3] arm: Add BBC micro:bit machine

[Joel Stanley]

This adds the base for a machine model of the BBC micro:bit:

  https://en.wikipedia.org/wiki/Micro_Bit

This is a system with a nRF51 SoC containing the main processor, with
various peripherals on board.

Signed-off-by: Joel Stanley <joel@jms.id.au>
---
v2:
 - Instead of setting kernel filename property, load the image directly
 - Add link to hardware overview website
---
 hw/arm/Makefile.objs |  2 +-
 hw/arm/microbit.c    | 56 ++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 57 insertions(+), 1 deletion(-)
 create mode 100644 hw/arm/microbit.c

diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
index 68be73f1c3ff..cecbe41086a8 100644
--- a/hw/arm/Makefile.objs
+++ b/hw/arm/Makefile.objs
@@ -36,4 +36,4 @@ obj-$(CONFIG_MSF2) += msf2-soc.o msf2-som.o
 obj-$(CONFIG_IOTKIT) += iotkit.o
 obj-$(CONFIG_FSL_IMX7) += fsl-imx7.o mcimx7d-sabre.o
 obj-$(CONFIG_ARM_SMMUV3) += smmu-common.o smmuv3.o
-obj-$(CONFIG_NRF51_SOC) += nrf51_soc.o
+obj-$(CONFIG_NRF51_SOC) += nrf51_soc.o microbit.o
diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c
new file mode 100644
index 000000000000..e9e0d35ca79c
--- /dev/null
+++ b/hw/arm/microbit.c
@@ -0,0 +1,56 @@
+/*
+ * BBC micro:bit machine
+ * http://tech.microbit.org/hardware/
+ *
+ * Copyright 2018 Joel Stanley <joel@jms.id.au>
+ *
+ * This code is licensed under the GPL version 2 or later.  See
+ * the COPYING file in the top-level directory.
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/boards.h"
+#include "hw/arm/arm.h"
+#include "exec/address-spaces.h"
+
+#include "hw/arm/nrf51_soc.h"
+
+#define FLASH_BASE      0x00000000
+#define FLASH_SIZE      (256 * 1024)
+
+typedef struct {
+    MachineState parent;
+
+    NRF51State nrf51;
+} MICROBITMachineState;
+
+#define TYPE_MICROBIT_MACHINE "microbit"
+
+#define MICROBIT_MACHINE(obj) \
+    OBJECT_CHECK(MICROBITMachineState, obj, TYPE_MICROBIT_MACHINE)
+
+static void microbit_init(MachineState *machine)
+{
+    MICROBITMachineState *s = g_new(MICROBITMachineState, 1);
+    MemoryRegion *system_memory = get_system_memory();
+    Object *soc;
+
+    object_initialize(&s->nrf51, sizeof(s->nrf51), TYPE_NRF51_SOC);
+    soc = OBJECT(&s->nrf51);
+    object_property_add_child(OBJECT(machine), "nrf51", soc, &error_fatal);
+    object_property_set_link(soc, OBJECT(system_memory),
+                             "memory", &error_abort);
+
+    object_property_set_bool(soc, true, "realized", &error_abort);
+
+    armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, FLASH_SIZE);
+}
+
+static void microbit_machine_init(MachineClass *mc)
+{
+    mc->desc = "BBC micro:bit";
+    mc->init = microbit_init;
+    mc->max_cpus = 1;
+}
+DEFINE_MACHINE("microbit", microbit_machine_init);
-- 
2.17.1

[Qemu-devel] [PATCH v2 3/3] MAINTAINERS: Add NRF51 entry

[Joel Stanley]

This contains the NRF51, and the machine that uses it, the BBC
micro:bit.

Signed-off-by: Joel Stanley <joel@jms.id.au>
---
 MAINTAINERS | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 8c626f6a079e..fef3d71dbef7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -656,6 +656,14 @@ F: include/hw/*/*aspeed*
 F: hw/net/ftgmac100.c
 F: include/hw/net/ftgmac100.h
 
+NRF51
+M: Joel Stanley <joel@jms.id.au>
+L: qemu-arm@nognu.org
+S: Maintained
+F: hw/arm/nrf51_soc.c
+F: hw/arm/microbit.c
+F: include/hw/arm/nrf51_soc.h
+
 CRIS Machines
 -------------
 Axis Dev88
-- 
2.17.1

Re: [Qemu-devel] [PATCH v2 1/3] arm: Add Nordic Semiconductor nRF51 SoC

[Stefan Hajnoczi]

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On Thu, Jun 28, 2018 at 12:08:13AM +0930, Joel Stanley wrote:
> +/* TODO: Flash size should be defined by the board. Microbit uses 256KB */
> +#define FLASH_BASE      0x00000000
> +#define FLASH_SIZE      (256 * 1024)
> +
> +/* TODO: Flash size should be defined by the board. Microbit uses 16KB */
> +#define SRAM_BASE       0x20000000
> +#define SRAM_SIZE       (16 * 1024)

Making FLASH_SIZE and SRAM_SIZE properties of the NRF51State object.
Then microbit.c can set them.

> +static void nrf51_soc_init(Object *obj)
> +{
> +    NRF51State *s = NRF51_SOC(obj);
> +
> +    memory_region_init(&s->container, obj, "nrf51-container", UINT64_MAX);
> +
> +    /* TODO: implement a cortex m0 and update this */

Please see "[PATCH v2 0/3] arm: add skeleton Cortex M0 CPU model".  It
should work with TYPE_ARMV7M -> TYPE_ARMV6M and "cortex-m3" ->
"cortex-m0".

Julia is currently completing the Cortex M0 emulation but at this point
guest software may already run successfully.  If not, then the patches
she sends over the next week or two ought to do the trick.

> +typedef struct NRF51State {
> +    /*< private >*/
> +    SysBusDevice parent_obj;
> +
> +    /*< public >*/
> +    char *kernel_filename;

Is this used by anything?

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Re: [Qemu-devel] [PATCH v2 2/3] arm: Add BBC micro:bit machine

[Stefan Hajnoczi]

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On Thu, Jun 28, 2018 at 12:08:14AM +0930, Joel Stanley wrote:
> diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c
> new file mode 100644
> index 000000000000..e9e0d35ca79c
> --- /dev/null
> +++ b/hw/arm/microbit.c
> @@ -0,0 +1,56 @@
> +/*
> + * BBC micro:bit machine
> + * http://tech.microbit.org/hardware/
> + *
> + * Copyright 2018 Joel Stanley <joel@jms.id.au>
> + *
> + * This code is licensed under the GPL version 2 or later.  See
> + * the COPYING file in the top-level directory.
> + */
> +
> +#include "qemu/osdep.h"
> +#include "qapi/error.h"
> +#include "hw/boards.h"
> +#include "hw/arm/arm.h"
> +#include "exec/address-spaces.h"
> +
> +#include "hw/arm/nrf51_soc.h"
> +
> +#define FLASH_BASE      0x00000000

Unused, please remove.

Aside from that:
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>

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Re: [Qemu-devel] [PATCH v2 3/3] MAINTAINERS: Add NRF51 entry

[Stefan Hajnoczi]

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On Thu, Jun 28, 2018 at 12:08:15AM +0930, Joel Stanley wrote:
> This contains the NRF51, and the machine that uses it, the BBC
> micro:bit.
> 
> Signed-off-by: Joel Stanley <joel@jms.id.au>
> ---
>  MAINTAINERS | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 8c626f6a079e..fef3d71dbef7 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -656,6 +656,14 @@ F: include/hw/*/*aspeed*
>  F: hw/net/ftgmac100.c
>  F: include/hw/net/ftgmac100.h
>  
> +NRF51
> +M: Joel Stanley <joel@jms.id.au>
> +L: qemu-arm@nognu.org

s/nognu/nongnu/

Aside from that:
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>

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Re: [Qemu-devel] [PATCH v2 1/3] arm: Add Nordic Semiconductor nRF51 SoC

[Joel Stanley]

On 2 July 2018 at 21:55, Stefan Hajnoczi <stefanha@gmail.com> wrote:
> On Thu, Jun 28, 2018 at 12:08:13AM +0930, Joel Stanley wrote:
>> +/* TODO: Flash size should be defined by the board. Microbit uses 256KB */
>> +#define FLASH_BASE      0x00000000
>> +#define FLASH_SIZE      (256 * 1024)
>> +
>> +/* TODO: Flash size should be defined by the board. Microbit uses 16KB */
>> +#define SRAM_BASE       0x20000000
>> +#define SRAM_SIZE       (16 * 1024)
>
> Making FLASH_SIZE and SRAM_SIZE properties of the NRF51State object.
> Then microbit.c can set them.

I chose not to do this, as they are properties of the SoC, not of the
microbit machine.

If in the future someone wanted to support more than the NRF51822,
they could make them properties and set them in a sub-class the NRF51.

I don't think this complexity is warranted while the only implemented
machine is the NRF51822.

>
>> +typedef struct NRF51State {
>> +    /*< private >*/
>> +    SysBusDevice parent_obj;
>> +
>> +    /*< public >*/
>> +    char *kernel_filename;
>
> Is this used by anything?

I removed it in v3.