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From: Marc Zyngier <marc.zyngier@arm.com>
To: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Cc: Catalin Marinas <catalin.marinas@arm.com>
Subject: [PATCH v4 2/6] arm64: KVM: Handle Set/Way CMOs as NOPs if FWB is present
Date: Mon,  2 Jul 2018 16:02:46 +0100	[thread overview]
Message-ID: <20180702150250.16550-3-marc.zyngier@arm.com> (raw)
In-Reply-To: <20180702150250.16550-1-marc.zyngier@arm.com>

Set/Way handling is one of the ugliest corners of KVM. We shouldn't
have to handle that, but better safe than sorry.

Thankfully, FWB fixes this for us by not requiering any maintenance
(the guest is forced to use cacheable memory, no matter what it says,
and the whole system is garanteed to be cache coherent), which means
we don't have to emulate S/W CMOs, and don't have to track VM ops either.

We still have to trap S/W though, if only to prevent the guest from
doing something bad.

Reviewed-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
 arch/arm64/kvm/sys_regs.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index a4363735d3f8..774d72155904 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -194,7 +194,16 @@ static bool access_dcsw(struct kvm_vcpu *vcpu,
 	if (!p->is_write)
 		return read_from_write_only(vcpu, p, r);
 
-	kvm_set_way_flush(vcpu);
+	/*
+	 * Only track S/W ops if we don't have FWB. It still indicates
+	 * that the guest is a bit broken (S/W operations should only
+	 * be done by firmware, knowing that there is only a single
+	 * CPU left in the system, and certainly not from non-secure
+	 * software).
+	 */
+	if (!cpus_have_const_cap(ARM64_HAS_STAGE2_FWB))
+		kvm_set_way_flush(vcpu);
+
 	return true;
 }
 
-- 
2.17.1

WARNING: multiple messages have this Message-ID (diff)
From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 2/6] arm64: KVM: Handle Set/Way CMOs as NOPs if FWB is present
Date: Mon,  2 Jul 2018 16:02:46 +0100	[thread overview]
Message-ID: <20180702150250.16550-3-marc.zyngier@arm.com> (raw)
In-Reply-To: <20180702150250.16550-1-marc.zyngier@arm.com>

Set/Way handling is one of the ugliest corners of KVM. We shouldn't
have to handle that, but better safe than sorry.

Thankfully, FWB fixes this for us by not requiering any maintenance
(the guest is forced to use cacheable memory, no matter what it says,
and the whole system is garanteed to be cache coherent), which means
we don't have to emulate S/W CMOs, and don't have to track VM ops either.

We still have to trap S/W though, if only to prevent the guest from
doing something bad.

Reviewed-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
 arch/arm64/kvm/sys_regs.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index a4363735d3f8..774d72155904 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -194,7 +194,16 @@ static bool access_dcsw(struct kvm_vcpu *vcpu,
 	if (!p->is_write)
 		return read_from_write_only(vcpu, p, r);
 
-	kvm_set_way_flush(vcpu);
+	/*
+	 * Only track S/W ops if we don't have FWB. It still indicates
+	 * that the guest is a bit broken (S/W operations should only
+	 * be done by firmware, knowing that there is only a single
+	 * CPU left in the system, and certainly not from non-secure
+	 * software).
+	 */
+	if (!cpus_have_const_cap(ARM64_HAS_STAGE2_FWB))
+		kvm_set_way_flush(vcpu);
+
 	return true;
 }
 
-- 
2.17.1

  parent reply	other threads:[~2018-07-02 15:02 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-02 15:02 [PATCH v4 0/6] KVM/arm64: Cache maintenance relaxations Marc Zyngier
2018-07-02 15:02 ` Marc Zyngier
2018-07-02 15:02 ` [PATCH v4 1/6] arm64: KVM: Add support for Stage-2 control of memory types and cacheability Marc Zyngier
2018-07-02 15:02   ` Marc Zyngier
2018-07-02 15:02 ` Marc Zyngier [this message]
2018-07-02 15:02   ` [PATCH v4 2/6] arm64: KVM: Handle Set/Way CMOs as NOPs if FWB is present Marc Zyngier
2018-07-02 15:02 ` [PATCH v4 3/6] arm64: KVM: Avoid marking pages as XN in Stage-2 if CTR_EL0.DIC is set Marc Zyngier
2018-07-02 15:02   ` Marc Zyngier
2018-07-02 15:02 ` [PATCH v4 4/6] KVM: arm/arm64: Consolidate page-table accessors Marc Zyngier
2018-07-02 15:02   ` Marc Zyngier
2018-07-02 15:02 ` [PATCH v4 5/6] KVM: arm/arm64: Stop using the kernel's {pmd, pud, pgd}_populate helpers Marc Zyngier
2018-07-02 15:02   ` Marc Zyngier
2018-07-02 15:02 ` [PATCH v4 6/6] KVM: arm/arm64: Remove unnecessary CMOs when creating HYP page tables Marc Zyngier
2018-07-02 15:02   ` Marc Zyngier
2018-07-09 10:52 ` [PATCH v4 0/6] KVM/arm64: Cache maintenance relaxations Marc Zyngier

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