* [PATCH] drm/amd/pp: revert "Implement get_performance_level for legacy dgpu"
@ 2018-07-09 13:24 Christian König
[not found] ` <20180709132450.1591-1-christian.koenig-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 3+ messages in thread
From: Christian König @ 2018-07-09 13:24 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
This reverts commit 3fdadbfe1edf4168b2515083af5651c95aeb299d.
It causes crashes on Tonga so revert it for now. Somebody with better knowledge
of the code needs to take a closer look.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
.../gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c | 2 +-
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 24 ----------------------
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 24 ----------------------
3 files changed, 1 insertion(+), 49 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
index b05b153101c5..53207e76b0f3 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
@@ -357,7 +357,7 @@ int phm_get_clock_info(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *s
PHM_PerformanceLevelDesignation designation)
{
int result;
- PHM_PerformanceLevel performance_level = {0};
+ PHM_PerformanceLevel performance_level;
PHM_FUNC_CHECK(hwmgr);
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index 8eaaa6b7973e..077b79938528 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -5006,29 +5006,6 @@ static int smu7_set_power_profile_mode(struct pp_hwmgr *hwmgr, long *input, uint
return 0;
}
-static int smu7_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state,
- PHM_PerformanceLevelDesignation designation, uint32_t index,
- PHM_PerformanceLevel *level)
-{
- const struct smu7_power_state *ps;
- struct smu7_hwmgr *data;
- uint32_t i;
-
- if (level == NULL || hwmgr == NULL || state == NULL)
- return -EINVAL;
-
- data = hwmgr->backend;
- ps = cast_const_phw_smu7_power_state(state);
-
- i = index > ps->performance_level_count - 1 ?
- ps->performance_level_count - 1 : index;
-
- level->coreClock = ps->performance_levels[i].engine_clock;
- level->memory_clock = ps->performance_levels[i].memory_clock;
-
- return 0;
-}
-
static const struct pp_hwmgr_func smu7_hwmgr_funcs = {
.backend_init = &smu7_hwmgr_backend_init,
.backend_fini = &smu7_hwmgr_backend_fini,
@@ -5085,7 +5062,6 @@ static const struct pp_hwmgr_func smu7_hwmgr_funcs = {
.set_power_limit = smu7_set_power_limit,
.get_power_profile_mode = smu7_get_power_profile_mode,
.set_power_profile_mode = smu7_set_power_profile_mode,
- .get_performance_level = smu7_get_performance_level,
};
uint8_t smu7_get_sleep_divider_id_from_clock(uint32_t clock,
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
index 5c03df49c076..eb37316cfbf7 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
@@ -4837,29 +4837,6 @@ static int vega10_odn_edit_dpm_table(struct pp_hwmgr *hwmgr,
return 0;
}
-static int vega10_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state,
- PHM_PerformanceLevelDesignation designation, uint32_t index,
- PHM_PerformanceLevel *level)
-{
- const struct vega10_power_state *ps;
- struct vega10_hwmgr *data;
- uint32_t i;
-
- if (level == NULL || hwmgr == NULL || state == NULL)
- return -EINVAL;
-
- data = hwmgr->backend;
- ps = cast_const_phw_vega10_power_state(state);
-
- i = index > ps->performance_level_count - 1 ?
- ps->performance_level_count - 1 : index;
-
- level->coreClock = ps->performance_levels[i].gfx_clock;
- level->memory_clock = ps->performance_levels[i].mem_clock;
-
- return 0;
-}
-
static const struct pp_hwmgr_func vega10_hwmgr_funcs = {
.backend_init = vega10_hwmgr_backend_init,
.backend_fini = vega10_hwmgr_backend_fini,
@@ -4919,7 +4896,6 @@ static const struct pp_hwmgr_func vega10_hwmgr_funcs = {
.set_power_profile_mode = vega10_set_power_profile_mode,
.set_power_limit = vega10_set_power_limit,
.odn_edit_dpm_table = vega10_odn_edit_dpm_table,
- .get_performance_level = vega10_get_performance_level,
};
int vega10_enable_smc_features(struct pp_hwmgr *hwmgr,
--
2.14.1
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] drm/amd/pp: revert "Implement get_performance_level for legacy dgpu"
[not found] ` <20180709132450.1591-1-christian.koenig-5C7GfCeVMHo@public.gmane.org>
@ 2018-07-09 16:56 ` Alex Deucher
2018-07-09 18:08 ` Harry Wentland
1 sibling, 0 replies; 3+ messages in thread
From: Alex Deucher @ 2018-07-09 16:56 UTC (permalink / raw)
To: Christian König; +Cc: amd-gfx list
On Mon, Jul 9, 2018 at 9:24 AM, Christian König
<ckoenig.leichtzumerken@gmail.com> wrote:
> This reverts commit 3fdadbfe1edf4168b2515083af5651c95aeb299d.
>
> It causes crashes on Tonga so revert it for now. Somebody with better knowledge
> of the code needs to take a closer look.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> .../gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c | 2 +-
> drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 24 ----------------------
> drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 24 ----------------------
> 3 files changed, 1 insertion(+), 49 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
> index b05b153101c5..53207e76b0f3 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
> @@ -357,7 +357,7 @@ int phm_get_clock_info(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *s
> PHM_PerformanceLevelDesignation designation)
> {
> int result;
> - PHM_PerformanceLevel performance_level = {0};
> + PHM_PerformanceLevel performance_level;
>
> PHM_FUNC_CHECK(hwmgr);
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> index 8eaaa6b7973e..077b79938528 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> @@ -5006,29 +5006,6 @@ static int smu7_set_power_profile_mode(struct pp_hwmgr *hwmgr, long *input, uint
> return 0;
> }
>
> -static int smu7_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state,
> - PHM_PerformanceLevelDesignation designation, uint32_t index,
> - PHM_PerformanceLevel *level)
> -{
> - const struct smu7_power_state *ps;
> - struct smu7_hwmgr *data;
> - uint32_t i;
> -
> - if (level == NULL || hwmgr == NULL || state == NULL)
> - return -EINVAL;
> -
> - data = hwmgr->backend;
> - ps = cast_const_phw_smu7_power_state(state);
> -
> - i = index > ps->performance_level_count - 1 ?
> - ps->performance_level_count - 1 : index;
> -
> - level->coreClock = ps->performance_levels[i].engine_clock;
> - level->memory_clock = ps->performance_levels[i].memory_clock;
> -
> - return 0;
> -}
> -
> static const struct pp_hwmgr_func smu7_hwmgr_funcs = {
> .backend_init = &smu7_hwmgr_backend_init,
> .backend_fini = &smu7_hwmgr_backend_fini,
> @@ -5085,7 +5062,6 @@ static const struct pp_hwmgr_func smu7_hwmgr_funcs = {
> .set_power_limit = smu7_set_power_limit,
> .get_power_profile_mode = smu7_get_power_profile_mode,
> .set_power_profile_mode = smu7_set_power_profile_mode,
> - .get_performance_level = smu7_get_performance_level,
> };
>
> uint8_t smu7_get_sleep_divider_id_from_clock(uint32_t clock,
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> index 5c03df49c076..eb37316cfbf7 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> @@ -4837,29 +4837,6 @@ static int vega10_odn_edit_dpm_table(struct pp_hwmgr *hwmgr,
> return 0;
> }
>
> -static int vega10_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state,
> - PHM_PerformanceLevelDesignation designation, uint32_t index,
> - PHM_PerformanceLevel *level)
> -{
> - const struct vega10_power_state *ps;
> - struct vega10_hwmgr *data;
> - uint32_t i;
> -
> - if (level == NULL || hwmgr == NULL || state == NULL)
> - return -EINVAL;
> -
> - data = hwmgr->backend;
> - ps = cast_const_phw_vega10_power_state(state);
> -
> - i = index > ps->performance_level_count - 1 ?
> - ps->performance_level_count - 1 : index;
> -
> - level->coreClock = ps->performance_levels[i].gfx_clock;
> - level->memory_clock = ps->performance_levels[i].mem_clock;
> -
> - return 0;
> -}
> -
> static const struct pp_hwmgr_func vega10_hwmgr_funcs = {
> .backend_init = vega10_hwmgr_backend_init,
> .backend_fini = vega10_hwmgr_backend_fini,
> @@ -4919,7 +4896,6 @@ static const struct pp_hwmgr_func vega10_hwmgr_funcs = {
> .set_power_profile_mode = vega10_set_power_profile_mode,
> .set_power_limit = vega10_set_power_limit,
> .odn_edit_dpm_table = vega10_odn_edit_dpm_table,
> - .get_performance_level = vega10_get_performance_level,
> };
>
> int vega10_enable_smc_features(struct pp_hwmgr *hwmgr,
> --
> 2.14.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] drm/amd/pp: revert "Implement get_performance_level for legacy dgpu"
[not found] ` <20180709132450.1591-1-christian.koenig-5C7GfCeVMHo@public.gmane.org>
2018-07-09 16:56 ` Alex Deucher
@ 2018-07-09 18:08 ` Harry Wentland
1 sibling, 0 replies; 3+ messages in thread
From: Harry Wentland @ 2018-07-09 18:08 UTC (permalink / raw)
To: Christian König, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
On 2018-07-09 09:24 AM, Christian König wrote:
> This reverts commit 3fdadbfe1edf4168b2515083af5651c95aeb299d.
>
> It causes crashes on Tonga so revert it for now. Somebody with better knowledge
> of the code needs to take a closer look.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Harry
> ---
> .../gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c | 2 +-
> drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 24 ----------------------
> drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 24 ----------------------
> 3 files changed, 1 insertion(+), 49 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
> index b05b153101c5..53207e76b0f3 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
> @@ -357,7 +357,7 @@ int phm_get_clock_info(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *s
> PHM_PerformanceLevelDesignation designation)
> {
> int result;
> - PHM_PerformanceLevel performance_level = {0};
> + PHM_PerformanceLevel performance_level;
>
> PHM_FUNC_CHECK(hwmgr);
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> index 8eaaa6b7973e..077b79938528 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> @@ -5006,29 +5006,6 @@ static int smu7_set_power_profile_mode(struct pp_hwmgr *hwmgr, long *input, uint
> return 0;
> }
>
> -static int smu7_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state,
> - PHM_PerformanceLevelDesignation designation, uint32_t index,
> - PHM_PerformanceLevel *level)
> -{
> - const struct smu7_power_state *ps;
> - struct smu7_hwmgr *data;
> - uint32_t i;
> -
> - if (level == NULL || hwmgr == NULL || state == NULL)
> - return -EINVAL;
> -
> - data = hwmgr->backend;
> - ps = cast_const_phw_smu7_power_state(state);
> -
> - i = index > ps->performance_level_count - 1 ?
> - ps->performance_level_count - 1 : index;
> -
> - level->coreClock = ps->performance_levels[i].engine_clock;
> - level->memory_clock = ps->performance_levels[i].memory_clock;
> -
> - return 0;
> -}
> -
> static const struct pp_hwmgr_func smu7_hwmgr_funcs = {
> .backend_init = &smu7_hwmgr_backend_init,
> .backend_fini = &smu7_hwmgr_backend_fini,
> @@ -5085,7 +5062,6 @@ static const struct pp_hwmgr_func smu7_hwmgr_funcs = {
> .set_power_limit = smu7_set_power_limit,
> .get_power_profile_mode = smu7_get_power_profile_mode,
> .set_power_profile_mode = smu7_set_power_profile_mode,
> - .get_performance_level = smu7_get_performance_level,
> };
>
> uint8_t smu7_get_sleep_divider_id_from_clock(uint32_t clock,
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> index 5c03df49c076..eb37316cfbf7 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> @@ -4837,29 +4837,6 @@ static int vega10_odn_edit_dpm_table(struct pp_hwmgr *hwmgr,
> return 0;
> }
>
> -static int vega10_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state,
> - PHM_PerformanceLevelDesignation designation, uint32_t index,
> - PHM_PerformanceLevel *level)
> -{
> - const struct vega10_power_state *ps;
> - struct vega10_hwmgr *data;
> - uint32_t i;
> -
> - if (level == NULL || hwmgr == NULL || state == NULL)
> - return -EINVAL;
> -
> - data = hwmgr->backend;
> - ps = cast_const_phw_vega10_power_state(state);
> -
> - i = index > ps->performance_level_count - 1 ?
> - ps->performance_level_count - 1 : index;
> -
> - level->coreClock = ps->performance_levels[i].gfx_clock;
> - level->memory_clock = ps->performance_levels[i].mem_clock;
> -
> - return 0;
> -}
> -
> static const struct pp_hwmgr_func vega10_hwmgr_funcs = {
> .backend_init = vega10_hwmgr_backend_init,
> .backend_fini = vega10_hwmgr_backend_fini,
> @@ -4919,7 +4896,6 @@ static const struct pp_hwmgr_func vega10_hwmgr_funcs = {
> .set_power_profile_mode = vega10_set_power_profile_mode,
> .set_power_limit = vega10_set_power_limit,
> .odn_edit_dpm_table = vega10_odn_edit_dpm_table,
> - .get_performance_level = vega10_get_performance_level,
> };
>
> int vega10_enable_smc_features(struct pp_hwmgr *hwmgr,
>
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^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2018-07-09 18:08 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2018-07-09 13:24 [PATCH] drm/amd/pp: revert "Implement get_performance_level for legacy dgpu" Christian König
[not found] ` <20180709132450.1591-1-christian.koenig-5C7GfCeVMHo@public.gmane.org>
2018-07-09 16:56 ` Alex Deucher
2018-07-09 18:08 ` Harry Wentland
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