* [PATCH v3 1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES
@ 2018-07-19 17:05 Lucas De Marchi
2018-07-19 17:05 ` [PATCH v3 2/2] drm/i915: kill resource streamer Lucas De Marchi
` (7 more replies)
0 siblings, 8 replies; 16+ messages in thread
From: Lucas De Marchi @ 2018-07-19 17:05 UTC (permalink / raw)
To: intel-gfx; +Cc: daniel.vetter, Rodrigo Vivi
Resource streamer has been removed on GEN11 so move it to the FEATURES
macro.
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 +-
drivers/gpu/drm/i915/i915_pci.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 3f0c612d42e7..1932bc227942 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -2223,7 +2223,7 @@ i915_gem_do_execbuffer(struct drm_device *dev,
if (args->flags & I915_EXEC_RESOURCE_STREAMER) {
if (!HAS_RESOURCE_STREAMER(eb.i915)) {
- DRM_DEBUG("RS is only allowed for Haswell, Gen8 and above\n");
+ DRM_DEBUG("RS is only allowed for Haswell and Gen8 - Gen10\n");
return -EINVAL;
}
if (eb.engine->id != RCS) {
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 6a4d1388ad2d..3a4bb017d676 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -593,13 +593,13 @@ static const struct intel_device_info intel_cannonlake_info = {
GEN(11), \
.ddb_size = 2048, \
.has_csr = 0, \
+ .has_resource_streamer = 0, \
.has_logical_ring_elsq = 1
static const struct intel_device_info intel_icelake_11_info = {
GEN11_FEATURES,
PLATFORM(INTEL_ICELAKE),
.is_alpha_support = 1,
- .has_resource_streamer = 0,
.ring_mask = RENDER_RING | BLT_RING | VEBOX_RING | BSD_RING | BSD3_RING,
};
--
2.17.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v3 2/2] drm/i915: kill resource streamer
2018-07-19 17:05 [PATCH v3 1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES Lucas De Marchi
@ 2018-07-19 17:05 ` Lucas De Marchi
2018-07-19 17:16 ` Rodrigo Vivi
2018-08-03 8:41 ` Tvrtko Ursulin
2018-07-19 18:01 ` ✗ Fi.CI.SPARSE: warning for series starting with [v3,1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES Patchwork
` (6 subsequent siblings)
7 siblings, 2 replies; 16+ messages in thread
From: Lucas De Marchi @ 2018-07-19 17:05 UTC (permalink / raw)
To: intel-gfx; +Cc: daniel.vetter, Rodrigo Vivi
After disabling resource streamer on ICL (due to it actually not
existing there), I got feedback that there have been some experimental
patches for mesa to use RS years ago, but nothing ever landed or shipped
because there was no performance improvement.
This removes it from kernel keeping the uapi defines around for
compatibility.
v2: - re-add the inadvertent removal of CTX_CTRL_INHIBIT_SYN_CTX_SWITCH
- don't bother trying to document removed params on uapi header:
applications should know that from the query.
(from Chris)
v3: - disable CTX_CTRL_RS_CTX_ENABLE istead of removing it
- reword commit message after Daniele confirmed no performance
regression on his machine
- reword commit message to make clear RS is being removed due to
never been used
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 2 --
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 ++-------------
drivers/gpu/drm/i915/i915_pci.c | 4 ----
drivers/gpu/drm/i915/intel_device_info.h | 1 -
drivers/gpu/drm/i915/intel_lrc.c | 10 ++++------
drivers/gpu/drm/i915/intel_ringbuffer.c | 4 +---
drivers/gpu/drm/i915/intel_ringbuffer.h | 1 -
8 files changed, 8 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 3834bd758a2e..b4b43402cc0c 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -373,7 +373,7 @@ static int i915_getparam_ioctl(struct drm_device *dev, void *data,
value = 2;
break;
case I915_PARAM_HAS_RESOURCE_STREAMER:
- value = HAS_RESOURCE_STREAMER(dev_priv);
+ value = 0;
break;
case I915_PARAM_HAS_POOLED_EU:
value = HAS_POOLED_EU(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4fb937399440..0b22ca0b24a8 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2612,8 +2612,6 @@ intel_info(const struct drm_i915_private *dev_priv)
#define USES_GUC_SUBMISSION(dev_priv) intel_uc_is_using_guc_submission()
#define USES_HUC(dev_priv) intel_uc_is_using_huc()
-#define HAS_RESOURCE_STREAMER(dev_priv) ((dev_priv)->info.has_resource_streamer)
-
#define HAS_POOLED_EU(dev_priv) ((dev_priv)->info.has_pooled_eu)
#define INTEL_PCH_DEVICE_ID_MASK 0xff80
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 1932bc227942..ca21a08b2be9 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -2221,19 +2221,8 @@ i915_gem_do_execbuffer(struct drm_device *dev,
if (!eb.engine)
return -EINVAL;
- if (args->flags & I915_EXEC_RESOURCE_STREAMER) {
- if (!HAS_RESOURCE_STREAMER(eb.i915)) {
- DRM_DEBUG("RS is only allowed for Haswell and Gen8 - Gen10\n");
- return -EINVAL;
- }
- if (eb.engine->id != RCS) {
- DRM_DEBUG("RS is not available on %s\n",
- eb.engine->name);
- return -EINVAL;
- }
-
- eb.batch_flags |= I915_DISPATCH_RS;
- }
+ if (args->flags & I915_EXEC_RESOURCE_STREAMER)
+ return -EINVAL;
if (args->flags & I915_EXEC_FENCE_IN) {
in_fence = sync_file_get_fence(lower_32_bits(args->rsvd2));
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 3a4bb017d676..7b570ba90d9f 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -360,7 +360,6 @@ static const struct intel_device_info intel_valleyview_info = {
.has_ddi = 1, \
.has_fpga_dbg = 1, \
.has_psr = 1, \
- .has_resource_streamer = 1, \
.has_dp_mst = 1, \
.has_rc6p = 0 /* RC6p removed-by HSW */, \
.has_runtime_pm = 1
@@ -433,7 +432,6 @@ static const struct intel_device_info intel_cherryview_info = {
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
.has_64bit_reloc = 1,
.has_runtime_pm = 1,
- .has_resource_streamer = 1,
.has_rc6 = 1,
.has_logical_ring_contexts = 1,
.has_gmch_display = 1,
@@ -506,7 +504,6 @@ static const struct intel_device_info intel_skylake_gt4_info = {
.has_runtime_pm = 1, \
.has_pooled_eu = 0, \
.has_csr = 1, \
- .has_resource_streamer = 1, \
.has_rc6 = 1, \
.has_dp_mst = 1, \
.has_logical_ring_contexts = 1, \
@@ -593,7 +590,6 @@ static const struct intel_device_info intel_cannonlake_info = {
GEN(11), \
.ddb_size = 2048, \
.has_csr = 0, \
- .has_resource_streamer = 0, \
.has_logical_ring_elsq = 1
static const struct intel_device_info intel_icelake_11_info = {
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 633f9fbf72ea..6814cc7dfcd3 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -103,7 +103,6 @@ enum intel_platform {
func(has_psr); \
func(has_rc6); \
func(has_rc6p); \
- func(has_resource_streamer); \
func(has_runtime_pm); \
func(has_snoop); \
func(unfenced_needs_alignment); \
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 174479232e94..3726709b8df3 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -2066,8 +2066,7 @@ static int gen8_emit_bb_start(struct i915_request *rq,
/* FIXME(BDW): Address space and security selectors. */
*cs++ = MI_BATCH_BUFFER_START_GEN8 |
- (flags & I915_DISPATCH_SECURE ? 0 : BIT(8)) |
- (flags & I915_DISPATCH_RS ? MI_BATCH_RESOURCE_STREAMER : 0);
+ (flags & I915_DISPATCH_SECURE ? 0 : BIT(8));
*cs++ = lower_32_bits(offset);
*cs++ = upper_32_bits(offset);
@@ -2585,10 +2584,9 @@ static void execlists_init_reg_state(u32 *regs,
CTX_REG(regs, CTX_CONTEXT_CONTROL, RING_CONTEXT_CONTROL(engine),
_MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT |
- CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT) |
- _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH |
- (HAS_RESOURCE_STREAMER(dev_priv) ?
- CTX_CTRL_RS_CTX_ENABLE : 0)));
+ CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT |
+ CTX_CTRL_RS_CTX_ENABLE) |
+ _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH));
CTX_REG(regs, CTX_RING_HEAD, RING_HEAD(base), 0);
CTX_REG(regs, CTX_RING_TAIL, RING_TAIL(base), 0);
CTX_REG(regs, CTX_RING_BUFFER_START, RING_START(base), 0);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 33faad3197fe..763f56072308 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1982,9 +1982,7 @@ hsw_emit_bb_start(struct i915_request *rq,
return PTR_ERR(cs);
*cs++ = MI_BATCH_BUFFER_START | (dispatch_flags & I915_DISPATCH_SECURE ?
- 0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW) |
- (dispatch_flags & I915_DISPATCH_RS ?
- MI_BATCH_RESOURCE_STREAMER : 0);
+ 0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW);
/* bit0-7 is the length on GEN6+ */
*cs++ = offset;
intel_ring_advance(rq, cs);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index f5ffa6d31e82..8c174e87686b 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -474,7 +474,6 @@ struct intel_engine_cs {
unsigned int dispatch_flags);
#define I915_DISPATCH_SECURE BIT(0)
#define I915_DISPATCH_PINNED BIT(1)
-#define I915_DISPATCH_RS BIT(2)
void (*emit_breadcrumb)(struct i915_request *rq, u32 *cs);
int emit_breadcrumb_sz;
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH v3 2/2] drm/i915: kill resource streamer
2018-07-19 17:05 ` [PATCH v3 2/2] drm/i915: kill resource streamer Lucas De Marchi
@ 2018-07-19 17:16 ` Rodrigo Vivi
2018-07-19 19:12 ` Lucas De Marchi
2018-08-03 8:41 ` Tvrtko Ursulin
1 sibling, 1 reply; 16+ messages in thread
From: Rodrigo Vivi @ 2018-07-19 17:16 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: daniel.vetter, intel-gfx
On Thu, Jul 19, 2018 at 10:05:57AM -0700, Lucas De Marchi wrote:
> After disabling resource streamer on ICL (due to it actually not
> existing there), I got feedback that there have been some experimental
> patches for mesa to use RS years ago, but nothing ever landed or shipped
> because there was no performance improvement.
>
> This removes it from kernel keeping the uapi defines around for
> compatibility.
>
> v2: - re-add the inadvertent removal of CTX_CTRL_INHIBIT_SYN_CTX_SWITCH
> - don't bother trying to document removed params on uapi header:
> applications should know that from the query.
> (from Chris)
>
> v3: - disable CTX_CTRL_RS_CTX_ENABLE istead of removing it
> - reword commit message after Daniele confirmed no performance
> regression on his machine
> - reword commit message to make clear RS is being removed due to
> never been used
thanks
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> Acked-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
(I will wait CI and then I will push)
> ---
> drivers/gpu/drm/i915/i915_drv.c | 2 +-
> drivers/gpu/drm/i915/i915_drv.h | 2 --
> drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 ++-------------
> drivers/gpu/drm/i915/i915_pci.c | 4 ----
> drivers/gpu/drm/i915/intel_device_info.h | 1 -
> drivers/gpu/drm/i915/intel_lrc.c | 10 ++++------
> drivers/gpu/drm/i915/intel_ringbuffer.c | 4 +---
> drivers/gpu/drm/i915/intel_ringbuffer.h | 1 -
> 8 files changed, 8 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 3834bd758a2e..b4b43402cc0c 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -373,7 +373,7 @@ static int i915_getparam_ioctl(struct drm_device *dev, void *data,
> value = 2;
> break;
> case I915_PARAM_HAS_RESOURCE_STREAMER:
> - value = HAS_RESOURCE_STREAMER(dev_priv);
> + value = 0;
> break;
> case I915_PARAM_HAS_POOLED_EU:
> value = HAS_POOLED_EU(dev_priv);
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 4fb937399440..0b22ca0b24a8 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2612,8 +2612,6 @@ intel_info(const struct drm_i915_private *dev_priv)
> #define USES_GUC_SUBMISSION(dev_priv) intel_uc_is_using_guc_submission()
> #define USES_HUC(dev_priv) intel_uc_is_using_huc()
>
> -#define HAS_RESOURCE_STREAMER(dev_priv) ((dev_priv)->info.has_resource_streamer)
> -
> #define HAS_POOLED_EU(dev_priv) ((dev_priv)->info.has_pooled_eu)
>
> #define INTEL_PCH_DEVICE_ID_MASK 0xff80
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 1932bc227942..ca21a08b2be9 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -2221,19 +2221,8 @@ i915_gem_do_execbuffer(struct drm_device *dev,
> if (!eb.engine)
> return -EINVAL;
>
> - if (args->flags & I915_EXEC_RESOURCE_STREAMER) {
> - if (!HAS_RESOURCE_STREAMER(eb.i915)) {
> - DRM_DEBUG("RS is only allowed for Haswell and Gen8 - Gen10\n");
> - return -EINVAL;
> - }
> - if (eb.engine->id != RCS) {
> - DRM_DEBUG("RS is not available on %s\n",
> - eb.engine->name);
> - return -EINVAL;
> - }
> -
> - eb.batch_flags |= I915_DISPATCH_RS;
> - }
> + if (args->flags & I915_EXEC_RESOURCE_STREAMER)
> + return -EINVAL;
>
> if (args->flags & I915_EXEC_FENCE_IN) {
> in_fence = sync_file_get_fence(lower_32_bits(args->rsvd2));
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 3a4bb017d676..7b570ba90d9f 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -360,7 +360,6 @@ static const struct intel_device_info intel_valleyview_info = {
> .has_ddi = 1, \
> .has_fpga_dbg = 1, \
> .has_psr = 1, \
> - .has_resource_streamer = 1, \
> .has_dp_mst = 1, \
> .has_rc6p = 0 /* RC6p removed-by HSW */, \
> .has_runtime_pm = 1
> @@ -433,7 +432,6 @@ static const struct intel_device_info intel_cherryview_info = {
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> .has_64bit_reloc = 1,
> .has_runtime_pm = 1,
> - .has_resource_streamer = 1,
> .has_rc6 = 1,
> .has_logical_ring_contexts = 1,
> .has_gmch_display = 1,
> @@ -506,7 +504,6 @@ static const struct intel_device_info intel_skylake_gt4_info = {
> .has_runtime_pm = 1, \
> .has_pooled_eu = 0, \
> .has_csr = 1, \
> - .has_resource_streamer = 1, \
> .has_rc6 = 1, \
> .has_dp_mst = 1, \
> .has_logical_ring_contexts = 1, \
> @@ -593,7 +590,6 @@ static const struct intel_device_info intel_cannonlake_info = {
> GEN(11), \
> .ddb_size = 2048, \
> .has_csr = 0, \
> - .has_resource_streamer = 0, \
> .has_logical_ring_elsq = 1
>
> static const struct intel_device_info intel_icelake_11_info = {
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index 633f9fbf72ea..6814cc7dfcd3 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -103,7 +103,6 @@ enum intel_platform {
> func(has_psr); \
> func(has_rc6); \
> func(has_rc6p); \
> - func(has_resource_streamer); \
> func(has_runtime_pm); \
> func(has_snoop); \
> func(unfenced_needs_alignment); \
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 174479232e94..3726709b8df3 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -2066,8 +2066,7 @@ static int gen8_emit_bb_start(struct i915_request *rq,
>
> /* FIXME(BDW): Address space and security selectors. */
> *cs++ = MI_BATCH_BUFFER_START_GEN8 |
> - (flags & I915_DISPATCH_SECURE ? 0 : BIT(8)) |
> - (flags & I915_DISPATCH_RS ? MI_BATCH_RESOURCE_STREAMER : 0);
> + (flags & I915_DISPATCH_SECURE ? 0 : BIT(8));
> *cs++ = lower_32_bits(offset);
> *cs++ = upper_32_bits(offset);
>
> @@ -2585,10 +2584,9 @@ static void execlists_init_reg_state(u32 *regs,
>
> CTX_REG(regs, CTX_CONTEXT_CONTROL, RING_CONTEXT_CONTROL(engine),
> _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT |
> - CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT) |
> - _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH |
> - (HAS_RESOURCE_STREAMER(dev_priv) ?
> - CTX_CTRL_RS_CTX_ENABLE : 0)));
> + CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT |
> + CTX_CTRL_RS_CTX_ENABLE) |
> + _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH));
> CTX_REG(regs, CTX_RING_HEAD, RING_HEAD(base), 0);
> CTX_REG(regs, CTX_RING_TAIL, RING_TAIL(base), 0);
> CTX_REG(regs, CTX_RING_BUFFER_START, RING_START(base), 0);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 33faad3197fe..763f56072308 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1982,9 +1982,7 @@ hsw_emit_bb_start(struct i915_request *rq,
> return PTR_ERR(cs);
>
> *cs++ = MI_BATCH_BUFFER_START | (dispatch_flags & I915_DISPATCH_SECURE ?
> - 0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW) |
> - (dispatch_flags & I915_DISPATCH_RS ?
> - MI_BATCH_RESOURCE_STREAMER : 0);
> + 0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW);
> /* bit0-7 is the length on GEN6+ */
> *cs++ = offset;
> intel_ring_advance(rq, cs);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index f5ffa6d31e82..8c174e87686b 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -474,7 +474,6 @@ struct intel_engine_cs {
> unsigned int dispatch_flags);
> #define I915_DISPATCH_SECURE BIT(0)
> #define I915_DISPATCH_PINNED BIT(1)
> -#define I915_DISPATCH_RS BIT(2)
> void (*emit_breadcrumb)(struct i915_request *rq, u32 *cs);
> int emit_breadcrumb_sz;
>
> --
> 2.17.1
>
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* ✗ Fi.CI.SPARSE: warning for series starting with [v3,1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES
2018-07-19 17:05 [PATCH v3 1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES Lucas De Marchi
2018-07-19 17:05 ` [PATCH v3 2/2] drm/i915: kill resource streamer Lucas De Marchi
@ 2018-07-19 18:01 ` Patchwork
2018-07-19 18:23 ` ✓ Fi.CI.BAT: success " Patchwork
` (5 subsequent siblings)
7 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2018-07-19 18:01 UTC (permalink / raw)
To: De Marchi, Lucas; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v3,1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES
URL : https://patchwork.freedesktop.org/series/46884/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915/icl: move has_resource_streamer to GEN11_FEATURES
Okay!
Commit: drm/i915: kill resource streamer
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3645:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3643:16: warning: expression using sizeof(void)
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [v3,1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES
2018-07-19 17:05 [PATCH v3 1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES Lucas De Marchi
2018-07-19 17:05 ` [PATCH v3 2/2] drm/i915: kill resource streamer Lucas De Marchi
2018-07-19 18:01 ` ✗ Fi.CI.SPARSE: warning for series starting with [v3,1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES Patchwork
@ 2018-07-19 18:23 ` Patchwork
2018-07-19 22:38 ` ✓ Fi.CI.IGT: " Patchwork
` (4 subsequent siblings)
7 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2018-07-19 18:23 UTC (permalink / raw)
To: De Marchi, Lucas; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v3,1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES
URL : https://patchwork.freedesktop.org/series/46884/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4514 -> Patchwork_9719 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/46884/revisions/1/mbox/
== Known issues ==
Here are the changes found in Patchwork_9719 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@debugfs_test@read_all_entries:
fi-snb-2520m: PASS -> INCOMPLETE (fdo#103713)
igt@drv_selftest@live_hangcheck:
fi-kbl-7567u: PASS -> DMESG-FAIL (fdo#106560, fdo#106947)
igt@drv_selftest@live_workarounds:
fi-bxt-j4205: PASS -> DMESG-FAIL (fdo#107292)
igt@gem_exec_suspend@basic-s4-devices:
fi-kbl-7500u: PASS -> DMESG-WARN (fdo#107139, fdo#105128)
igt@kms_flip@basic-flip-vs-dpms:
fi-skl-6700hq: PASS -> DMESG-WARN (fdo#105998)
==== Possible fixes ====
igt@drv_selftest@live_workarounds:
{fi-cfl-8109u}: DMESG-FAIL (fdo#107292) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#105128 https://bugs.freedesktop.org/show_bug.cgi?id=105128
fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998
fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560
fdo#106947 https://bugs.freedesktop.org/show_bug.cgi?id=106947
fdo#107139 https://bugs.freedesktop.org/show_bug.cgi?id=107139
fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
== Participating hosts (47 -> 41) ==
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-byt-j1900 fi-byt-squawks fi-bsw-cyan fi-ctg-p8600
== Build changes ==
* Linux: CI_DRM_4514 -> Patchwork_9719
CI_DRM_4514: 4aa8b84189887647612154ca9eda06cfc9a587df @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4568: 86f7b724ef18986bc58d35558d22e1ed3f8df4f9 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9719: fc42f78a7aa4ea7c840510cdec07cc9c13727c10 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
fc42f78a7aa4 drm/i915: kill resource streamer
f8b519e3fed7 drm/i915/icl: move has_resource_streamer to GEN11_FEATURES
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9719/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v3 2/2] drm/i915: kill resource streamer
2018-07-19 17:16 ` Rodrigo Vivi
@ 2018-07-19 19:12 ` Lucas De Marchi
2018-07-19 19:52 ` Rodrigo Vivi
0 siblings, 1 reply; 16+ messages in thread
From: Lucas De Marchi @ 2018-07-19 19:12 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: Daniel Vetter, intel-gfx, Lucas De Marchi
On Thu, Jul 19, 2018 at 10:18 AM Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
>
> On Thu, Jul 19, 2018 at 10:05:57AM -0700, Lucas De Marchi wrote:
> > After disabling resource streamer on ICL (due to it actually not
> > existing there), I got feedback that there have been some experimental
> > patches for mesa to use RS years ago, but nothing ever landed or shipped
> > because there was no performance improvement.
> >
> > This removes it from kernel keeping the uapi defines around for
> > compatibility.
> >
> > v2: - re-add the inadvertent removal of CTX_CTRL_INHIBIT_SYN_CTX_SWITCH
> > - don't bother trying to document removed params on uapi header:
> > applications should know that from the query.
> > (from Chris)
> >
> > v3: - disable CTX_CTRL_RS_CTX_ENABLE istead of removing it
> > - reword commit message after Daniele confirmed no performance
> > regression on his machine
> > - reword commit message to make clear RS is being removed due to
> > never been used
>
> thanks
>
> >
> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> > Acked-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> (I will wait CI and then I will push)
there's also the i-g-t patch, otherwise there will be some tests failing.
Lucas De Marchi
>
> > ---
> > drivers/gpu/drm/i915/i915_drv.c | 2 +-
> > drivers/gpu/drm/i915/i915_drv.h | 2 --
> > drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 ++-------------
> > drivers/gpu/drm/i915/i915_pci.c | 4 ----
> > drivers/gpu/drm/i915/intel_device_info.h | 1 -
> > drivers/gpu/drm/i915/intel_lrc.c | 10 ++++------
> > drivers/gpu/drm/i915/intel_ringbuffer.c | 4 +---
> > drivers/gpu/drm/i915/intel_ringbuffer.h | 1 -
> > 8 files changed, 8 insertions(+), 31 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> > index 3834bd758a2e..b4b43402cc0c 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.c
> > +++ b/drivers/gpu/drm/i915/i915_drv.c
> > @@ -373,7 +373,7 @@ static int i915_getparam_ioctl(struct drm_device *dev, void *data,
> > value = 2;
> > break;
> > case I915_PARAM_HAS_RESOURCE_STREAMER:
> > - value = HAS_RESOURCE_STREAMER(dev_priv);
> > + value = 0;
> > break;
> > case I915_PARAM_HAS_POOLED_EU:
> > value = HAS_POOLED_EU(dev_priv);
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 4fb937399440..0b22ca0b24a8 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -2612,8 +2612,6 @@ intel_info(const struct drm_i915_private *dev_priv)
> > #define USES_GUC_SUBMISSION(dev_priv) intel_uc_is_using_guc_submission()
> > #define USES_HUC(dev_priv) intel_uc_is_using_huc()
> >
> > -#define HAS_RESOURCE_STREAMER(dev_priv) ((dev_priv)->info.has_resource_streamer)
> > -
> > #define HAS_POOLED_EU(dev_priv) ((dev_priv)->info.has_pooled_eu)
> >
> > #define INTEL_PCH_DEVICE_ID_MASK 0xff80
> > diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> > index 1932bc227942..ca21a08b2be9 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> > @@ -2221,19 +2221,8 @@ i915_gem_do_execbuffer(struct drm_device *dev,
> > if (!eb.engine)
> > return -EINVAL;
> >
> > - if (args->flags & I915_EXEC_RESOURCE_STREAMER) {
> > - if (!HAS_RESOURCE_STREAMER(eb.i915)) {
> > - DRM_DEBUG("RS is only allowed for Haswell and Gen8 - Gen10\n");
> > - return -EINVAL;
> > - }
> > - if (eb.engine->id != RCS) {
> > - DRM_DEBUG("RS is not available on %s\n",
> > - eb.engine->name);
> > - return -EINVAL;
> > - }
> > -
> > - eb.batch_flags |= I915_DISPATCH_RS;
> > - }
> > + if (args->flags & I915_EXEC_RESOURCE_STREAMER)
> > + return -EINVAL;
> >
> > if (args->flags & I915_EXEC_FENCE_IN) {
> > in_fence = sync_file_get_fence(lower_32_bits(args->rsvd2));
> > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> > index 3a4bb017d676..7b570ba90d9f 100644
> > --- a/drivers/gpu/drm/i915/i915_pci.c
> > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > @@ -360,7 +360,6 @@ static const struct intel_device_info intel_valleyview_info = {
> > .has_ddi = 1, \
> > .has_fpga_dbg = 1, \
> > .has_psr = 1, \
> > - .has_resource_streamer = 1, \
> > .has_dp_mst = 1, \
> > .has_rc6p = 0 /* RC6p removed-by HSW */, \
> > .has_runtime_pm = 1
> > @@ -433,7 +432,6 @@ static const struct intel_device_info intel_cherryview_info = {
> > .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> > .has_64bit_reloc = 1,
> > .has_runtime_pm = 1,
> > - .has_resource_streamer = 1,
> > .has_rc6 = 1,
> > .has_logical_ring_contexts = 1,
> > .has_gmch_display = 1,
> > @@ -506,7 +504,6 @@ static const struct intel_device_info intel_skylake_gt4_info = {
> > .has_runtime_pm = 1, \
> > .has_pooled_eu = 0, \
> > .has_csr = 1, \
> > - .has_resource_streamer = 1, \
> > .has_rc6 = 1, \
> > .has_dp_mst = 1, \
> > .has_logical_ring_contexts = 1, \
> > @@ -593,7 +590,6 @@ static const struct intel_device_info intel_cannonlake_info = {
> > GEN(11), \
> > .ddb_size = 2048, \
> > .has_csr = 0, \
> > - .has_resource_streamer = 0, \
> > .has_logical_ring_elsq = 1
> >
> > static const struct intel_device_info intel_icelake_11_info = {
> > diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> > index 633f9fbf72ea..6814cc7dfcd3 100644
> > --- a/drivers/gpu/drm/i915/intel_device_info.h
> > +++ b/drivers/gpu/drm/i915/intel_device_info.h
> > @@ -103,7 +103,6 @@ enum intel_platform {
> > func(has_psr); \
> > func(has_rc6); \
> > func(has_rc6p); \
> > - func(has_resource_streamer); \
> > func(has_runtime_pm); \
> > func(has_snoop); \
> > func(unfenced_needs_alignment); \
> > diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> > index 174479232e94..3726709b8df3 100644
> > --- a/drivers/gpu/drm/i915/intel_lrc.c
> > +++ b/drivers/gpu/drm/i915/intel_lrc.c
> > @@ -2066,8 +2066,7 @@ static int gen8_emit_bb_start(struct i915_request *rq,
> >
> > /* FIXME(BDW): Address space and security selectors. */
> > *cs++ = MI_BATCH_BUFFER_START_GEN8 |
> > - (flags & I915_DISPATCH_SECURE ? 0 : BIT(8)) |
> > - (flags & I915_DISPATCH_RS ? MI_BATCH_RESOURCE_STREAMER : 0);
> > + (flags & I915_DISPATCH_SECURE ? 0 : BIT(8));
> > *cs++ = lower_32_bits(offset);
> > *cs++ = upper_32_bits(offset);
> >
> > @@ -2585,10 +2584,9 @@ static void execlists_init_reg_state(u32 *regs,
> >
> > CTX_REG(regs, CTX_CONTEXT_CONTROL, RING_CONTEXT_CONTROL(engine),
> > _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT |
> > - CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT) |
> > - _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH |
> > - (HAS_RESOURCE_STREAMER(dev_priv) ?
> > - CTX_CTRL_RS_CTX_ENABLE : 0)));
> > + CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT |
> > + CTX_CTRL_RS_CTX_ENABLE) |
> > + _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH));
> > CTX_REG(regs, CTX_RING_HEAD, RING_HEAD(base), 0);
> > CTX_REG(regs, CTX_RING_TAIL, RING_TAIL(base), 0);
> > CTX_REG(regs, CTX_RING_BUFFER_START, RING_START(base), 0);
> > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > index 33faad3197fe..763f56072308 100644
> > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > @@ -1982,9 +1982,7 @@ hsw_emit_bb_start(struct i915_request *rq,
> > return PTR_ERR(cs);
> >
> > *cs++ = MI_BATCH_BUFFER_START | (dispatch_flags & I915_DISPATCH_SECURE ?
> > - 0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW) |
> > - (dispatch_flags & I915_DISPATCH_RS ?
> > - MI_BATCH_RESOURCE_STREAMER : 0);
> > + 0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW);
> > /* bit0-7 is the length on GEN6+ */
> > *cs++ = offset;
> > intel_ring_advance(rq, cs);
> > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> > index f5ffa6d31e82..8c174e87686b 100644
> > --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> > @@ -474,7 +474,6 @@ struct intel_engine_cs {
> > unsigned int dispatch_flags);
> > #define I915_DISPATCH_SECURE BIT(0)
> > #define I915_DISPATCH_PINNED BIT(1)
> > -#define I915_DISPATCH_RS BIT(2)
> > void (*emit_breadcrumb)(struct i915_request *rq, u32 *cs);
> > int emit_breadcrumb_sz;
> >
> > --
> > 2.17.1
> >
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Lucas De Marchi
_______________________________________________
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^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v3 2/2] drm/i915: kill resource streamer
2018-07-19 19:12 ` Lucas De Marchi
@ 2018-07-19 19:52 ` Rodrigo Vivi
0 siblings, 0 replies; 16+ messages in thread
From: Rodrigo Vivi @ 2018-07-19 19:52 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: Daniel Vetter, intel-gfx, Lucas De Marchi
On Thu, Jul 19, 2018 at 12:12:08PM -0700, Lucas De Marchi wrote:
> On Thu, Jul 19, 2018 at 10:18 AM Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> >
> > On Thu, Jul 19, 2018 at 10:05:57AM -0700, Lucas De Marchi wrote:
> > > After disabling resource streamer on ICL (due to it actually not
> > > existing there), I got feedback that there have been some experimental
> > > patches for mesa to use RS years ago, but nothing ever landed or shipped
> > > because there was no performance improvement.
> > >
> > > This removes it from kernel keeping the uapi defines around for
> > > compatibility.
> > >
> > > v2: - re-add the inadvertent removal of CTX_CTRL_INHIBIT_SYN_CTX_SWITCH
> > > - don't bother trying to document removed params on uapi header:
> > > applications should know that from the query.
> > > (from Chris)
> > >
> > > v3: - disable CTX_CTRL_RS_CTX_ENABLE istead of removing it
> > > - reword commit message after Daniele confirmed no performance
> > > regression on his machine
> > > - reword commit message to make clear RS is being removed due to
> > > never been used
> >
> > thanks
> >
> > >
> > > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> > > Acked-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> >
> > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> >
> > (I will wait CI and then I will push)
>
> there's also the i-g-t patch, otherwise there will be some tests failing.
ok, so we wait the igt to land and trigger re-test on this when that happens
and when CI is happy we push it.
>
> Lucas De Marchi
>
> >
> > > ---
> > > drivers/gpu/drm/i915/i915_drv.c | 2 +-
> > > drivers/gpu/drm/i915/i915_drv.h | 2 --
> > > drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 ++-------------
> > > drivers/gpu/drm/i915/i915_pci.c | 4 ----
> > > drivers/gpu/drm/i915/intel_device_info.h | 1 -
> > > drivers/gpu/drm/i915/intel_lrc.c | 10 ++++------
> > > drivers/gpu/drm/i915/intel_ringbuffer.c | 4 +---
> > > drivers/gpu/drm/i915/intel_ringbuffer.h | 1 -
> > > 8 files changed, 8 insertions(+), 31 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> > > index 3834bd758a2e..b4b43402cc0c 100644
> > > --- a/drivers/gpu/drm/i915/i915_drv.c
> > > +++ b/drivers/gpu/drm/i915/i915_drv.c
> > > @@ -373,7 +373,7 @@ static int i915_getparam_ioctl(struct drm_device *dev, void *data,
> > > value = 2;
> > > break;
> > > case I915_PARAM_HAS_RESOURCE_STREAMER:
> > > - value = HAS_RESOURCE_STREAMER(dev_priv);
> > > + value = 0;
> > > break;
> > > case I915_PARAM_HAS_POOLED_EU:
> > > value = HAS_POOLED_EU(dev_priv);
> > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > > index 4fb937399440..0b22ca0b24a8 100644
> > > --- a/drivers/gpu/drm/i915/i915_drv.h
> > > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > > @@ -2612,8 +2612,6 @@ intel_info(const struct drm_i915_private *dev_priv)
> > > #define USES_GUC_SUBMISSION(dev_priv) intel_uc_is_using_guc_submission()
> > > #define USES_HUC(dev_priv) intel_uc_is_using_huc()
> > >
> > > -#define HAS_RESOURCE_STREAMER(dev_priv) ((dev_priv)->info.has_resource_streamer)
> > > -
> > > #define HAS_POOLED_EU(dev_priv) ((dev_priv)->info.has_pooled_eu)
> > >
> > > #define INTEL_PCH_DEVICE_ID_MASK 0xff80
> > > diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> > > index 1932bc227942..ca21a08b2be9 100644
> > > --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> > > +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> > > @@ -2221,19 +2221,8 @@ i915_gem_do_execbuffer(struct drm_device *dev,
> > > if (!eb.engine)
> > > return -EINVAL;
> > >
> > > - if (args->flags & I915_EXEC_RESOURCE_STREAMER) {
> > > - if (!HAS_RESOURCE_STREAMER(eb.i915)) {
> > > - DRM_DEBUG("RS is only allowed for Haswell and Gen8 - Gen10\n");
> > > - return -EINVAL;
> > > - }
> > > - if (eb.engine->id != RCS) {
> > > - DRM_DEBUG("RS is not available on %s\n",
> > > - eb.engine->name);
> > > - return -EINVAL;
> > > - }
> > > -
> > > - eb.batch_flags |= I915_DISPATCH_RS;
> > > - }
> > > + if (args->flags & I915_EXEC_RESOURCE_STREAMER)
> > > + return -EINVAL;
> > >
> > > if (args->flags & I915_EXEC_FENCE_IN) {
> > > in_fence = sync_file_get_fence(lower_32_bits(args->rsvd2));
> > > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> > > index 3a4bb017d676..7b570ba90d9f 100644
> > > --- a/drivers/gpu/drm/i915/i915_pci.c
> > > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > > @@ -360,7 +360,6 @@ static const struct intel_device_info intel_valleyview_info = {
> > > .has_ddi = 1, \
> > > .has_fpga_dbg = 1, \
> > > .has_psr = 1, \
> > > - .has_resource_streamer = 1, \
> > > .has_dp_mst = 1, \
> > > .has_rc6p = 0 /* RC6p removed-by HSW */, \
> > > .has_runtime_pm = 1
> > > @@ -433,7 +432,6 @@ static const struct intel_device_info intel_cherryview_info = {
> > > .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> > > .has_64bit_reloc = 1,
> > > .has_runtime_pm = 1,
> > > - .has_resource_streamer = 1,
> > > .has_rc6 = 1,
> > > .has_logical_ring_contexts = 1,
> > > .has_gmch_display = 1,
> > > @@ -506,7 +504,6 @@ static const struct intel_device_info intel_skylake_gt4_info = {
> > > .has_runtime_pm = 1, \
> > > .has_pooled_eu = 0, \
> > > .has_csr = 1, \
> > > - .has_resource_streamer = 1, \
> > > .has_rc6 = 1, \
> > > .has_dp_mst = 1, \
> > > .has_logical_ring_contexts = 1, \
> > > @@ -593,7 +590,6 @@ static const struct intel_device_info intel_cannonlake_info = {
> > > GEN(11), \
> > > .ddb_size = 2048, \
> > > .has_csr = 0, \
> > > - .has_resource_streamer = 0, \
> > > .has_logical_ring_elsq = 1
> > >
> > > static const struct intel_device_info intel_icelake_11_info = {
> > > diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> > > index 633f9fbf72ea..6814cc7dfcd3 100644
> > > --- a/drivers/gpu/drm/i915/intel_device_info.h
> > > +++ b/drivers/gpu/drm/i915/intel_device_info.h
> > > @@ -103,7 +103,6 @@ enum intel_platform {
> > > func(has_psr); \
> > > func(has_rc6); \
> > > func(has_rc6p); \
> > > - func(has_resource_streamer); \
> > > func(has_runtime_pm); \
> > > func(has_snoop); \
> > > func(unfenced_needs_alignment); \
> > > diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> > > index 174479232e94..3726709b8df3 100644
> > > --- a/drivers/gpu/drm/i915/intel_lrc.c
> > > +++ b/drivers/gpu/drm/i915/intel_lrc.c
> > > @@ -2066,8 +2066,7 @@ static int gen8_emit_bb_start(struct i915_request *rq,
> > >
> > > /* FIXME(BDW): Address space and security selectors. */
> > > *cs++ = MI_BATCH_BUFFER_START_GEN8 |
> > > - (flags & I915_DISPATCH_SECURE ? 0 : BIT(8)) |
> > > - (flags & I915_DISPATCH_RS ? MI_BATCH_RESOURCE_STREAMER : 0);
> > > + (flags & I915_DISPATCH_SECURE ? 0 : BIT(8));
> > > *cs++ = lower_32_bits(offset);
> > > *cs++ = upper_32_bits(offset);
> > >
> > > @@ -2585,10 +2584,9 @@ static void execlists_init_reg_state(u32 *regs,
> > >
> > > CTX_REG(regs, CTX_CONTEXT_CONTROL, RING_CONTEXT_CONTROL(engine),
> > > _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT |
> > > - CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT) |
> > > - _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH |
> > > - (HAS_RESOURCE_STREAMER(dev_priv) ?
> > > - CTX_CTRL_RS_CTX_ENABLE : 0)));
> > > + CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT |
> > > + CTX_CTRL_RS_CTX_ENABLE) |
> > > + _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH));
> > > CTX_REG(regs, CTX_RING_HEAD, RING_HEAD(base), 0);
> > > CTX_REG(regs, CTX_RING_TAIL, RING_TAIL(base), 0);
> > > CTX_REG(regs, CTX_RING_BUFFER_START, RING_START(base), 0);
> > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > > index 33faad3197fe..763f56072308 100644
> > > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> > > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > > @@ -1982,9 +1982,7 @@ hsw_emit_bb_start(struct i915_request *rq,
> > > return PTR_ERR(cs);
> > >
> > > *cs++ = MI_BATCH_BUFFER_START | (dispatch_flags & I915_DISPATCH_SECURE ?
> > > - 0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW) |
> > > - (dispatch_flags & I915_DISPATCH_RS ?
> > > - MI_BATCH_RESOURCE_STREAMER : 0);
> > > + 0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW);
> > > /* bit0-7 is the length on GEN6+ */
> > > *cs++ = offset;
> > > intel_ring_advance(rq, cs);
> > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> > > index f5ffa6d31e82..8c174e87686b 100644
> > > --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> > > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> > > @@ -474,7 +474,6 @@ struct intel_engine_cs {
> > > unsigned int dispatch_flags);
> > > #define I915_DISPATCH_SECURE BIT(0)
> > > #define I915_DISPATCH_PINNED BIT(1)
> > > -#define I915_DISPATCH_RS BIT(2)
> > > void (*emit_breadcrumb)(struct i915_request *rq, u32 *cs);
> > > int emit_breadcrumb_sz;
> > >
> > > --
> > > 2.17.1
> > >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
>
> --
> Lucas De Marchi
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [v3,1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES
2018-07-19 17:05 [PATCH v3 1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES Lucas De Marchi
` (2 preceding siblings ...)
2018-07-19 18:23 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2018-07-19 22:38 ` Patchwork
2018-08-02 22:38 ` ✗ Fi.CI.BAT: failure " Patchwork
` (3 subsequent siblings)
7 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2018-07-19 22:38 UTC (permalink / raw)
To: De Marchi, Lucas; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v3,1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES
URL : https://patchwork.freedesktop.org/series/46884/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4514_full -> Patchwork_9719_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_9719_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9719_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9719_full:
=== IGT changes ===
==== Warnings ====
igt@kms_chv_cursor_fail@pipe-b-128x128-top-edge:
shard-snb: SKIP -> PASS +1
== Known issues ==
Here are the changes found in Patchwork_9719_full that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@kms_flip@2x-modeset-vs-vblank-race-interruptible:
shard-glk: PASS -> FAIL (fdo#103060)
==== Possible fixes ====
igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
shard-hsw: FAIL (fdo#105767) -> PASS
igt@kms_setmode@basic:
shard-apl: FAIL (fdo#99912) -> PASS
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#105767 https://bugs.freedesktop.org/show_bug.cgi?id=105767
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
== Participating hosts (5 -> 5) ==
No changes in participating hosts
== Build changes ==
* Linux: CI_DRM_4514 -> Patchwork_9719
CI_DRM_4514: 4aa8b84189887647612154ca9eda06cfc9a587df @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4568: 86f7b724ef18986bc58d35558d22e1ed3f8df4f9 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9719: fc42f78a7aa4ea7c840510cdec07cc9c13727c10 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9719/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* ✗ Fi.CI.BAT: failure for series starting with [v3,1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES
2018-07-19 17:05 [PATCH v3 1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES Lucas De Marchi
` (3 preceding siblings ...)
2018-07-19 22:38 ` ✓ Fi.CI.IGT: " Patchwork
@ 2018-08-02 22:38 ` Patchwork
2018-08-03 23:44 ` ✗ Fi.CI.SPARSE: warning for series starting with [v3,1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES (rev2) Patchwork
` (2 subsequent siblings)
7 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2018-08-02 22:38 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v3,1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES
URL : https://patchwork.freedesktop.org/series/46884/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4608 -> Patchwork_9844 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_9844 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9844, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/46884/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9844:
=== IGT changes ===
==== Possible regressions ====
igt@drv_module_reload@basic-reload-inject:
fi-bxt-j4205: PASS -> DMESG-WARN
== Known issues ==
Here are the changes found in Patchwork_9844 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drv_selftest@live_hangcheck:
fi-skl-guc: PASS -> DMESG-FAIL (fdo#107174)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
fi-bxt-dsi: PASS -> INCOMPLETE (fdo#103927)
==== Possible fixes ====
igt@drv_selftest@live_hangcheck:
fi-bdw-5557u: DMESG-FAIL (fdo#106560) -> PASS
igt@drv_selftest@live_workarounds:
{fi-cfl-8109u}: DMESG-FAIL (fdo#107292) -> PASS
{igt@kms_psr@primary_mmap_gtt}:
fi-cnl-psr: DMESG-WARN (fdo#107372) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560
fdo#107174 https://bugs.freedesktop.org/show_bug.cgi?id=107174
fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372
== Participating hosts (52 -> 46) ==
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-icl-u
== Build changes ==
* Linux: CI_DRM_4608 -> Patchwork_9844
CI_DRM_4608: 9d129b43738d0b604a787e54e041973ac7a7c922 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4586: 57caaf440520e397403d898e1d3f1d65ef7b79e2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9844: 07debe9ce5e89b7446cc2c5ef66c9f34154fbca5 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
07debe9ce5e8 drm/i915: kill resource streamer
47aa5c7d064f drm/i915/icl: move has_resource_streamer to GEN11_FEATURES
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9844/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v3 2/2] drm/i915: kill resource streamer
2018-07-19 17:05 ` [PATCH v3 2/2] drm/i915: kill resource streamer Lucas De Marchi
2018-07-19 17:16 ` Rodrigo Vivi
@ 2018-08-03 8:41 ` Tvrtko Ursulin
2018-08-03 23:24 ` [PATCH v4 " Lucas De Marchi
1 sibling, 1 reply; 16+ messages in thread
From: Tvrtko Ursulin @ 2018-08-03 8:41 UTC (permalink / raw)
To: Lucas De Marchi, intel-gfx; +Cc: daniel.vetter, Rodrigo Vivi
On 19/07/2018 18:05, Lucas De Marchi wrote:
> After disabling resource streamer on ICL (due to it actually not
> existing there), I got feedback that there have been some experimental
> patches for mesa to use RS years ago, but nothing ever landed or shipped
> because there was no performance improvement.
>
> This removes it from kernel keeping the uapi defines around for
> compatibility.
>
> v2: - re-add the inadvertent removal of CTX_CTRL_INHIBIT_SYN_CTX_SWITCH
> - don't bother trying to document removed params on uapi header:
> applications should know that from the query.
> (from Chris)
>
> v3: - disable CTX_CTRL_RS_CTX_ENABLE istead of removing it
> - reword commit message after Daniele confirmed no performance
> regression on his machine
> - reword commit message to make clear RS is being removed due to
> never been used
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> Acked-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 2 +-
> drivers/gpu/drm/i915/i915_drv.h | 2 --
> drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 ++-------------
> drivers/gpu/drm/i915/i915_pci.c | 4 ----
> drivers/gpu/drm/i915/intel_device_info.h | 1 -
> drivers/gpu/drm/i915/intel_lrc.c | 10 ++++------
> drivers/gpu/drm/i915/intel_ringbuffer.c | 4 +---
> drivers/gpu/drm/i915/intel_ringbuffer.h | 1 -
> 8 files changed, 8 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 3834bd758a2e..b4b43402cc0c 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -373,7 +373,7 @@ static int i915_getparam_ioctl(struct drm_device *dev, void *data,
> value = 2;
> break;
> case I915_PARAM_HAS_RESOURCE_STREAMER:
> - value = HAS_RESOURCE_STREAMER(dev_priv);
> + value = 0;
> break;
> case I915_PARAM_HAS_POOLED_EU:
> value = HAS_POOLED_EU(dev_priv);
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 4fb937399440..0b22ca0b24a8 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2612,8 +2612,6 @@ intel_info(const struct drm_i915_private *dev_priv)
> #define USES_GUC_SUBMISSION(dev_priv) intel_uc_is_using_guc_submission()
> #define USES_HUC(dev_priv) intel_uc_is_using_huc()
>
> -#define HAS_RESOURCE_STREAMER(dev_priv) ((dev_priv)->info.has_resource_streamer)
> -
> #define HAS_POOLED_EU(dev_priv) ((dev_priv)->info.has_pooled_eu)
>
> #define INTEL_PCH_DEVICE_ID_MASK 0xff80
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 1932bc227942..ca21a08b2be9 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -2221,19 +2221,8 @@ i915_gem_do_execbuffer(struct drm_device *dev,
> if (!eb.engine)
> return -EINVAL;
>
> - if (args->flags & I915_EXEC_RESOURCE_STREAMER) {
> - if (!HAS_RESOURCE_STREAMER(eb.i915)) {
> - DRM_DEBUG("RS is only allowed for Haswell and Gen8 - Gen10\n");
> - return -EINVAL;
> - }
> - if (eb.engine->id != RCS) {
> - DRM_DEBUG("RS is not available on %s\n",
> - eb.engine->name);
> - return -EINVAL;
> - }
> -
> - eb.batch_flags |= I915_DISPATCH_RS;
> - }
> + if (args->flags & I915_EXEC_RESOURCE_STREAMER)
> + return -EINVAL;
I think slightly nicer than leaving it here as the only trivial flag
rejection test, would be to add the flag to __I915_EXEC_ILLEGAL_FLAGS.
Makes the rejection nice and early before any allocation and do_execbuf
looks tidier.
Regards,
Tvrtko
>
> if (args->flags & I915_EXEC_FENCE_IN) {
> in_fence = sync_file_get_fence(lower_32_bits(args->rsvd2));
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 3a4bb017d676..7b570ba90d9f 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -360,7 +360,6 @@ static const struct intel_device_info intel_valleyview_info = {
> .has_ddi = 1, \
> .has_fpga_dbg = 1, \
> .has_psr = 1, \
> - .has_resource_streamer = 1, \
> .has_dp_mst = 1, \
> .has_rc6p = 0 /* RC6p removed-by HSW */, \
> .has_runtime_pm = 1
> @@ -433,7 +432,6 @@ static const struct intel_device_info intel_cherryview_info = {
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> .has_64bit_reloc = 1,
> .has_runtime_pm = 1,
> - .has_resource_streamer = 1,
> .has_rc6 = 1,
> .has_logical_ring_contexts = 1,
> .has_gmch_display = 1,
> @@ -506,7 +504,6 @@ static const struct intel_device_info intel_skylake_gt4_info = {
> .has_runtime_pm = 1, \
> .has_pooled_eu = 0, \
> .has_csr = 1, \
> - .has_resource_streamer = 1, \
> .has_rc6 = 1, \
> .has_dp_mst = 1, \
> .has_logical_ring_contexts = 1, \
> @@ -593,7 +590,6 @@ static const struct intel_device_info intel_cannonlake_info = {
> GEN(11), \
> .ddb_size = 2048, \
> .has_csr = 0, \
> - .has_resource_streamer = 0, \
> .has_logical_ring_elsq = 1
>
> static const struct intel_device_info intel_icelake_11_info = {
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index 633f9fbf72ea..6814cc7dfcd3 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -103,7 +103,6 @@ enum intel_platform {
> func(has_psr); \
> func(has_rc6); \
> func(has_rc6p); \
> - func(has_resource_streamer); \
> func(has_runtime_pm); \
> func(has_snoop); \
> func(unfenced_needs_alignment); \
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 174479232e94..3726709b8df3 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -2066,8 +2066,7 @@ static int gen8_emit_bb_start(struct i915_request *rq,
>
> /* FIXME(BDW): Address space and security selectors. */
> *cs++ = MI_BATCH_BUFFER_START_GEN8 |
> - (flags & I915_DISPATCH_SECURE ? 0 : BIT(8)) |
> - (flags & I915_DISPATCH_RS ? MI_BATCH_RESOURCE_STREAMER : 0);
> + (flags & I915_DISPATCH_SECURE ? 0 : BIT(8));
> *cs++ = lower_32_bits(offset);
> *cs++ = upper_32_bits(offset);
>
> @@ -2585,10 +2584,9 @@ static void execlists_init_reg_state(u32 *regs,
>
> CTX_REG(regs, CTX_CONTEXT_CONTROL, RING_CONTEXT_CONTROL(engine),
> _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT |
> - CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT) |
> - _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH |
> - (HAS_RESOURCE_STREAMER(dev_priv) ?
> - CTX_CTRL_RS_CTX_ENABLE : 0)));
> + CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT |
> + CTX_CTRL_RS_CTX_ENABLE) |
> + _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH));
> CTX_REG(regs, CTX_RING_HEAD, RING_HEAD(base), 0);
> CTX_REG(regs, CTX_RING_TAIL, RING_TAIL(base), 0);
> CTX_REG(regs, CTX_RING_BUFFER_START, RING_START(base), 0);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 33faad3197fe..763f56072308 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1982,9 +1982,7 @@ hsw_emit_bb_start(struct i915_request *rq,
> return PTR_ERR(cs);
>
> *cs++ = MI_BATCH_BUFFER_START | (dispatch_flags & I915_DISPATCH_SECURE ?
> - 0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW) |
> - (dispatch_flags & I915_DISPATCH_RS ?
> - MI_BATCH_RESOURCE_STREAMER : 0);
> + 0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW);
> /* bit0-7 is the length on GEN6+ */
> *cs++ = offset;
> intel_ring_advance(rq, cs);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index f5ffa6d31e82..8c174e87686b 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -474,7 +474,6 @@ struct intel_engine_cs {
> unsigned int dispatch_flags);
> #define I915_DISPATCH_SECURE BIT(0)
> #define I915_DISPATCH_PINNED BIT(1)
> -#define I915_DISPATCH_RS BIT(2)
> void (*emit_breadcrumb)(struct i915_request *rq, u32 *cs);
> int emit_breadcrumb_sz;
>
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v4 2/2] drm/i915: kill resource streamer
2018-08-03 8:41 ` Tvrtko Ursulin
@ 2018-08-03 23:24 ` Lucas De Marchi
2018-08-06 15:31 ` Tvrtko Ursulin
0 siblings, 1 reply; 16+ messages in thread
From: Lucas De Marchi @ 2018-08-03 23:24 UTC (permalink / raw)
To: intel-gfx; +Cc: daniel.vetter, Rodrigo Vivi
After disabling resource streamer on ICL (due to it actually not
existing there), I got feedback that there have been some experimental
patches for mesa to use RS years ago, but nothing ever landed or shipped
because there was no performance improvement.
This removes it from kernel keeping the uapi defines around for
compatibility.
v2: - re-add the inadvertent removal of CTX_CTRL_INHIBIT_SYN_CTX_SWITCH
- don't bother trying to document removed params on uapi header:
applications should know that from the query.
(from Chris)
v3: - disable CTX_CTRL_RS_CTX_ENABLE istead of removing it
- reword commit message after Daniele confirmed no performance
regression on his machine
- reword commit message to make clear RS is being removed due to
never been used
v4: - move I915_EXEC_RESOURCE_STREAMER to __I915_EXEC_ILLEGAL_FLAGS so
the check on ioctl() is made much earlier by
i915_gem_check_execbuffer() (suggested by Tvrtko)
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 2 --
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 17 ++---------------
drivers/gpu/drm/i915/i915_pci.c | 4 ----
drivers/gpu/drm/i915/intel_device_info.h | 1 -
drivers/gpu/drm/i915/intel_lrc.c | 10 ++++------
drivers/gpu/drm/i915/intel_ringbuffer.c | 4 +---
drivers/gpu/drm/i915/intel_ringbuffer.h | 1 -
8 files changed, 8 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 64e0ea4bef67..3857e7963fc5 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -373,7 +373,7 @@ static int i915_getparam_ioctl(struct drm_device *dev, void *data,
value = 2;
break;
case I915_PARAM_HAS_RESOURCE_STREAMER:
- value = HAS_RESOURCE_STREAMER(dev_priv);
+ value = 0;
break;
case I915_PARAM_HAS_POOLED_EU:
value = HAS_POOLED_EU(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4aca5344863d..657f46e0cae9 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2610,8 +2610,6 @@ intel_info(const struct drm_i915_private *dev_priv)
#define USES_GUC_SUBMISSION(dev_priv) intel_uc_is_using_guc_submission()
#define USES_HUC(dev_priv) intel_uc_is_using_huc()
-#define HAS_RESOURCE_STREAMER(dev_priv) ((dev_priv)->info.has_resource_streamer)
-
#define HAS_POOLED_EU(dev_priv) ((dev_priv)->info.has_pooled_eu)
#define INTEL_PCH_DEVICE_ID_MASK 0xff80
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 1932bc227942..06bb434644e5 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -64,7 +64,8 @@ enum {
#define BATCH_OFFSET_BIAS (256*1024)
#define __I915_EXEC_ILLEGAL_FLAGS \
- (__I915_EXEC_UNKNOWN_FLAGS | I915_EXEC_CONSTANTS_MASK)
+ (__I915_EXEC_UNKNOWN_FLAGS | I915_EXEC_CONSTANTS_MASK | \
+ I915_EXEC_RESOURCE_STREAMER)
/* Catch emission of unexpected errors for CI! */
#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)
@@ -2221,20 +2222,6 @@ i915_gem_do_execbuffer(struct drm_device *dev,
if (!eb.engine)
return -EINVAL;
- if (args->flags & I915_EXEC_RESOURCE_STREAMER) {
- if (!HAS_RESOURCE_STREAMER(eb.i915)) {
- DRM_DEBUG("RS is only allowed for Haswell and Gen8 - Gen10\n");
- return -EINVAL;
- }
- if (eb.engine->id != RCS) {
- DRM_DEBUG("RS is not available on %s\n",
- eb.engine->name);
- return -EINVAL;
- }
-
- eb.batch_flags |= I915_DISPATCH_RS;
- }
-
if (args->flags & I915_EXEC_FENCE_IN) {
in_fence = sync_file_get_fence(lower_32_bits(args->rsvd2));
if (!in_fence)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 8a9a9009db62..e931b48369dd 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -368,7 +368,6 @@ static const struct intel_device_info intel_valleyview_info = {
.has_ddi = 1, \
.has_fpga_dbg = 1, \
.has_psr = 1, \
- .has_resource_streamer = 1, \
.has_dp_mst = 1, \
.has_rc6p = 0 /* RC6p removed-by HSW */, \
.has_runtime_pm = 1
@@ -441,7 +440,6 @@ static const struct intel_device_info intel_cherryview_info = {
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
.has_64bit_reloc = 1,
.has_runtime_pm = 1,
- .has_resource_streamer = 1,
.has_rc6 = 1,
.has_logical_ring_contexts = 1,
.has_gmch_display = 1,
@@ -515,7 +513,6 @@ static const struct intel_device_info intel_skylake_gt4_info = {
.has_runtime_pm = 1, \
.has_pooled_eu = 0, \
.has_csr = 1, \
- .has_resource_streamer = 1, \
.has_rc6 = 1, \
.has_dp_mst = 1, \
.has_logical_ring_contexts = 1, \
@@ -604,7 +601,6 @@ static const struct intel_device_info intel_cannonlake_info = {
GEN(11), \
.ddb_size = 2048, \
.has_csr = 0, \
- .has_resource_streamer = 0, \
.has_logical_ring_elsq = 1
static const struct intel_device_info intel_icelake_11_info = {
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 07e8364d1a8c..6eecd64734d5 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -103,7 +103,6 @@ enum intel_platform {
func(has_psr); \
func(has_rc6); \
func(has_rc6p); \
- func(has_resource_streamer); \
func(has_runtime_pm); \
func(has_snoop); \
func(has_coherent_ggtt); \
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index b0be180c6294..e5385dbfcdda 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -2065,8 +2065,7 @@ static int gen8_emit_bb_start(struct i915_request *rq,
/* FIXME(BDW): Address space and security selectors. */
*cs++ = MI_BATCH_BUFFER_START_GEN8 |
- (flags & I915_DISPATCH_SECURE ? 0 : BIT(8)) |
- (flags & I915_DISPATCH_RS ? MI_BATCH_RESOURCE_STREAMER : 0);
+ (flags & I915_DISPATCH_SECURE ? 0 : BIT(8));
*cs++ = lower_32_bits(offset);
*cs++ = upper_32_bits(offset);
@@ -2584,10 +2583,9 @@ static void execlists_init_reg_state(u32 *regs,
CTX_REG(regs, CTX_CONTEXT_CONTROL, RING_CONTEXT_CONTROL(engine),
_MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT |
- CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT) |
- _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH |
- (HAS_RESOURCE_STREAMER(dev_priv) ?
- CTX_CTRL_RS_CTX_ENABLE : 0)));
+ CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT |
+ CTX_CTRL_RS_CTX_ENABLE) |
+ _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH));
CTX_REG(regs, CTX_RING_HEAD, RING_HEAD(base), 0);
CTX_REG(regs, CTX_RING_TAIL, RING_TAIL(base), 0);
CTX_REG(regs, CTX_RING_BUFFER_START, RING_START(base), 0);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 80a8b6e57374..8003cef767ba 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1980,9 +1980,7 @@ hsw_emit_bb_start(struct i915_request *rq,
return PTR_ERR(cs);
*cs++ = MI_BATCH_BUFFER_START | (dispatch_flags & I915_DISPATCH_SECURE ?
- 0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW) |
- (dispatch_flags & I915_DISPATCH_RS ?
- MI_BATCH_RESOURCE_STREAMER : 0);
+ 0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW);
/* bit0-7 is the length on GEN6+ */
*cs++ = offset;
intel_ring_advance(rq, cs);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 57f3787ed6ec..8837079cb8b3 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -474,7 +474,6 @@ struct intel_engine_cs {
unsigned int dispatch_flags);
#define I915_DISPATCH_SECURE BIT(0)
#define I915_DISPATCH_PINNED BIT(1)
-#define I915_DISPATCH_RS BIT(2)
void (*emit_breadcrumb)(struct i915_request *rq, u32 *cs);
int emit_breadcrumb_sz;
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
* ✗ Fi.CI.SPARSE: warning for series starting with [v3,1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES (rev2)
2018-07-19 17:05 [PATCH v3 1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES Lucas De Marchi
` (4 preceding siblings ...)
2018-08-02 22:38 ` ✗ Fi.CI.BAT: failure " Patchwork
@ 2018-08-03 23:44 ` Patchwork
2018-08-04 0:00 ` ✓ Fi.CI.BAT: success " Patchwork
2018-08-04 0:48 ` ✓ Fi.CI.IGT: " Patchwork
7 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2018-08-03 23:44 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v3,1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES (rev2)
URL : https://patchwork.freedesktop.org/series/46884/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915/icl: move has_resource_streamer to GEN11_FEATURES
Okay!
Commit: drm/i915: kill resource streamer
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3653:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3651:16: warning: expression using sizeof(void)
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [v3,1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES (rev2)
2018-07-19 17:05 [PATCH v3 1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES Lucas De Marchi
` (5 preceding siblings ...)
2018-08-03 23:44 ` ✗ Fi.CI.SPARSE: warning for series starting with [v3,1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES (rev2) Patchwork
@ 2018-08-04 0:00 ` Patchwork
2018-08-04 0:48 ` ✓ Fi.CI.IGT: " Patchwork
7 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2018-08-04 0:00 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v3,1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES (rev2)
URL : https://patchwork.freedesktop.org/series/46884/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4616 -> Patchwork_9851 =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_9851 need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9851, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/46884/revisions/2/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9851:
=== IGT changes ===
==== Warnings ====
igt@drv_selftest@live_evict:
fi-cnl-psr: SKIP -> PASS +10
== Known issues ==
Here are the changes found in Patchwork_9851 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drv_selftest@live_hangcheck:
{fi-kbl-8809g}: PASS -> DMESG-FAIL (fdo#106947, fdo#106560)
fi-skl-guc: PASS -> DMESG-FAIL (fdo#107174)
fi-skl-6600u: PASS -> DMESG-FAIL (fdo#107174, fdo#106560)
igt@drv_selftest@live_workarounds:
fi-kbl-7560u: PASS -> DMESG-FAIL (fdo#107292)
igt@prime_vgem@basic-fence-flip:
fi-ilk-650: PASS -> FAIL (fdo#104008)
==== Possible fixes ====
igt@drv_selftest@live_coherency:
fi-gdg-551: DMESG-FAIL (fdo#107164) -> PASS
igt@drv_selftest@live_workarounds:
fi-cnl-psr: DMESG-FAIL (fdo#107292) -> PASS
igt@kms_frontbuffer_tracking@basic:
fi-hsw-peppy: DMESG-FAIL (fdo#102614, fdo#106103) -> PASS
==== Warnings ====
{igt@kms_psr@primary_page_flip}:
fi-cnl-psr: DMESG-FAIL (fdo#107372) -> DMESG-WARN (fdo#107372)
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
fdo#106103 https://bugs.freedesktop.org/show_bug.cgi?id=106103
fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560
fdo#106947 https://bugs.freedesktop.org/show_bug.cgi?id=106947
fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164
fdo#107174 https://bugs.freedesktop.org/show_bug.cgi?id=107174
fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372
== Participating hosts (53 -> 47) ==
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-icl-u
== Build changes ==
* Linux: CI_DRM_4616 -> Patchwork_9851
CI_DRM_4616: 3936d7b7d09ba9b4108931ca516f8a47e66dbeb0 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4587: 5d78c73d871525ec9caecd88ad7d9abe36637314 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9851: 92849ccbca9b5f7606039b91035a808299c83f44 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
92849ccbca9b drm/i915: kill resource streamer
239a0d912af3 drm/i915/icl: move has_resource_streamer to GEN11_FEATURES
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9851/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [v3,1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES (rev2)
2018-07-19 17:05 [PATCH v3 1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES Lucas De Marchi
` (6 preceding siblings ...)
2018-08-04 0:00 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2018-08-04 0:48 ` Patchwork
7 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2018-08-04 0:48 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v3,1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES (rev2)
URL : https://patchwork.freedesktop.org/series/46884/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4616_full -> Patchwork_9851_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_9851_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9851_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9851_full:
=== IGT changes ===
==== Warnings ====
igt@kms_cursor_legacy@short-flip-after-cursor-atomic-transitions:
shard-snb: SKIP -> PASS
== Known issues ==
Here are the changes found in Patchwork_9851_full that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@gem_ppgtt@blt-vs-render-ctx0:
shard-kbl: PASS -> INCOMPLETE (fdo#106023, fdo#103665)
igt@kms_rotation_crc@primary-rotation-270:
shard-apl: PASS -> FAIL (fdo#103925)
==== Possible fixes ====
igt@gem_eio@reset-stress:
shard-hsw: FAIL -> PASS
igt@prime_vgem@basic-fence-flip:
shard-glk: FAIL (fdo#104008) -> PASS
fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023
== Participating hosts (5 -> 5) ==
No changes in participating hosts
== Build changes ==
* Linux: CI_DRM_4616 -> Patchwork_9851
CI_DRM_4616: 3936d7b7d09ba9b4108931ca516f8a47e66dbeb0 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4587: 5d78c73d871525ec9caecd88ad7d9abe36637314 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9851: 92849ccbca9b5f7606039b91035a808299c83f44 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9851/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v4 2/2] drm/i915: kill resource streamer
2018-08-03 23:24 ` [PATCH v4 " Lucas De Marchi
@ 2018-08-06 15:31 ` Tvrtko Ursulin
2018-08-06 16:22 ` Chris Wilson
0 siblings, 1 reply; 16+ messages in thread
From: Tvrtko Ursulin @ 2018-08-06 15:31 UTC (permalink / raw)
To: Lucas De Marchi, intel-gfx; +Cc: daniel.vetter, Rodrigo Vivi
On 04/08/2018 00:24, Lucas De Marchi wrote:
> After disabling resource streamer on ICL (due to it actually not
> existing there), I got feedback that there have been some experimental
> patches for mesa to use RS years ago, but nothing ever landed or shipped
> because there was no performance improvement.
>
> This removes it from kernel keeping the uapi defines around for
> compatibility.
>
> v2: - re-add the inadvertent removal of CTX_CTRL_INHIBIT_SYN_CTX_SWITCH
> - don't bother trying to document removed params on uapi header:
> applications should know that from the query.
> (from Chris)
>
> v3: - disable CTX_CTRL_RS_CTX_ENABLE istead of removing it
> - reword commit message after Daniele confirmed no performance
> regression on his machine
> - reword commit message to make clear RS is being removed due to
> never been used
> v4: - move I915_EXEC_RESOURCE_STREAMER to __I915_EXEC_ILLEGAL_FLAGS so
> the check on ioctl() is made much earlier by
> i915_gem_check_execbuffer() (suggested by Tvrtko)
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> Acked-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 2 +-
> drivers/gpu/drm/i915/i915_drv.h | 2 --
> drivers/gpu/drm/i915/i915_gem_execbuffer.c | 17 ++---------------
> drivers/gpu/drm/i915/i915_pci.c | 4 ----
> drivers/gpu/drm/i915/intel_device_info.h | 1 -
> drivers/gpu/drm/i915/intel_lrc.c | 10 ++++------
> drivers/gpu/drm/i915/intel_ringbuffer.c | 4 +---
> drivers/gpu/drm/i915/intel_ringbuffer.h | 1 -
> 8 files changed, 8 insertions(+), 33 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 64e0ea4bef67..3857e7963fc5 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -373,7 +373,7 @@ static int i915_getparam_ioctl(struct drm_device *dev, void *data,
> value = 2;
> break;
> case I915_PARAM_HAS_RESOURCE_STREAMER:
> - value = HAS_RESOURCE_STREAMER(dev_priv);
> + value = 0;
> break;
> case I915_PARAM_HAS_POOLED_EU:
> value = HAS_POOLED_EU(dev_priv);
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 4aca5344863d..657f46e0cae9 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2610,8 +2610,6 @@ intel_info(const struct drm_i915_private *dev_priv)
> #define USES_GUC_SUBMISSION(dev_priv) intel_uc_is_using_guc_submission()
> #define USES_HUC(dev_priv) intel_uc_is_using_huc()
>
> -#define HAS_RESOURCE_STREAMER(dev_priv) ((dev_priv)->info.has_resource_streamer)
> -
> #define HAS_POOLED_EU(dev_priv) ((dev_priv)->info.has_pooled_eu)
>
> #define INTEL_PCH_DEVICE_ID_MASK 0xff80
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 1932bc227942..06bb434644e5 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -64,7 +64,8 @@ enum {
> #define BATCH_OFFSET_BIAS (256*1024)
>
> #define __I915_EXEC_ILLEGAL_FLAGS \
> - (__I915_EXEC_UNKNOWN_FLAGS | I915_EXEC_CONSTANTS_MASK)
> + (__I915_EXEC_UNKNOWN_FLAGS | I915_EXEC_CONSTANTS_MASK | \
> + I915_EXEC_RESOURCE_STREAMER)
>
> /* Catch emission of unexpected errors for CI! */
> #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)
> @@ -2221,20 +2222,6 @@ i915_gem_do_execbuffer(struct drm_device *dev,
> if (!eb.engine)
> return -EINVAL;
>
> - if (args->flags & I915_EXEC_RESOURCE_STREAMER) {
> - if (!HAS_RESOURCE_STREAMER(eb.i915)) {
> - DRM_DEBUG("RS is only allowed for Haswell and Gen8 - Gen10\n");
> - return -EINVAL;
> - }
> - if (eb.engine->id != RCS) {
> - DRM_DEBUG("RS is not available on %s\n",
> - eb.engine->name);
> - return -EINVAL;
> - }
> -
> - eb.batch_flags |= I915_DISPATCH_RS;
> - }
> -
> if (args->flags & I915_EXEC_FENCE_IN) {
> in_fence = sync_file_get_fence(lower_32_bits(args->rsvd2));
> if (!in_fence)
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 8a9a9009db62..e931b48369dd 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -368,7 +368,6 @@ static const struct intel_device_info intel_valleyview_info = {
> .has_ddi = 1, \
> .has_fpga_dbg = 1, \
> .has_psr = 1, \
> - .has_resource_streamer = 1, \
> .has_dp_mst = 1, \
> .has_rc6p = 0 /* RC6p removed-by HSW */, \
> .has_runtime_pm = 1
> @@ -441,7 +440,6 @@ static const struct intel_device_info intel_cherryview_info = {
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> .has_64bit_reloc = 1,
> .has_runtime_pm = 1,
> - .has_resource_streamer = 1,
> .has_rc6 = 1,
> .has_logical_ring_contexts = 1,
> .has_gmch_display = 1,
> @@ -515,7 +513,6 @@ static const struct intel_device_info intel_skylake_gt4_info = {
> .has_runtime_pm = 1, \
> .has_pooled_eu = 0, \
> .has_csr = 1, \
> - .has_resource_streamer = 1, \
> .has_rc6 = 1, \
> .has_dp_mst = 1, \
> .has_logical_ring_contexts = 1, \
> @@ -604,7 +601,6 @@ static const struct intel_device_info intel_cannonlake_info = {
> GEN(11), \
> .ddb_size = 2048, \
> .has_csr = 0, \
> - .has_resource_streamer = 0, \
> .has_logical_ring_elsq = 1
>
> static const struct intel_device_info intel_icelake_11_info = {
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index 07e8364d1a8c..6eecd64734d5 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -103,7 +103,6 @@ enum intel_platform {
> func(has_psr); \
> func(has_rc6); \
> func(has_rc6p); \
> - func(has_resource_streamer); \
> func(has_runtime_pm); \
> func(has_snoop); \
> func(has_coherent_ggtt); \
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index b0be180c6294..e5385dbfcdda 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -2065,8 +2065,7 @@ static int gen8_emit_bb_start(struct i915_request *rq,
>
> /* FIXME(BDW): Address space and security selectors. */
> *cs++ = MI_BATCH_BUFFER_START_GEN8 |
> - (flags & I915_DISPATCH_SECURE ? 0 : BIT(8)) |
> - (flags & I915_DISPATCH_RS ? MI_BATCH_RESOURCE_STREAMER : 0);
> + (flags & I915_DISPATCH_SECURE ? 0 : BIT(8));
> *cs++ = lower_32_bits(offset);
> *cs++ = upper_32_bits(offset);
>
> @@ -2584,10 +2583,9 @@ static void execlists_init_reg_state(u32 *regs,
>
> CTX_REG(regs, CTX_CONTEXT_CONTROL, RING_CONTEXT_CONTROL(engine),
> _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT |
> - CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT) |
> - _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH |
> - (HAS_RESOURCE_STREAMER(dev_priv) ?
> - CTX_CTRL_RS_CTX_ENABLE : 0)));
> + CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT |
> + CTX_CTRL_RS_CTX_ENABLE) |
> + _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH));
> CTX_REG(regs, CTX_RING_HEAD, RING_HEAD(base), 0);
> CTX_REG(regs, CTX_RING_TAIL, RING_TAIL(base), 0);
> CTX_REG(regs, CTX_RING_BUFFER_START, RING_START(base), 0);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 80a8b6e57374..8003cef767ba 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1980,9 +1980,7 @@ hsw_emit_bb_start(struct i915_request *rq,
> return PTR_ERR(cs);
>
> *cs++ = MI_BATCH_BUFFER_START | (dispatch_flags & I915_DISPATCH_SECURE ?
> - 0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW) |
> - (dispatch_flags & I915_DISPATCH_RS ?
> - MI_BATCH_RESOURCE_STREAMER : 0);
> + 0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW);
> /* bit0-7 is the length on GEN6+ */
> *cs++ = offset;
> intel_ring_advance(rq, cs);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 57f3787ed6ec..8837079cb8b3 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -474,7 +474,6 @@ struct intel_engine_cs {
> unsigned int dispatch_flags);
> #define I915_DISPATCH_SECURE BIT(0)
> #define I915_DISPATCH_PINNED BIT(1)
> -#define I915_DISPATCH_RS BIT(2)
> void (*emit_breadcrumb)(struct i915_request *rq, u32 *cs);
> int emit_breadcrumb_sz;
>
>
I don't know if it is true no one uses the feature - Google search
suggest no open source users at least. But removal looks correct so:
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v4 2/2] drm/i915: kill resource streamer
2018-08-06 15:31 ` Tvrtko Ursulin
@ 2018-08-06 16:22 ` Chris Wilson
0 siblings, 0 replies; 16+ messages in thread
From: Chris Wilson @ 2018-08-06 16:22 UTC (permalink / raw)
To: Lucas De Marchi, Tvrtko Ursulin, intel-gfx; +Cc: daniel.vetter, Rodrigo Vivi
Quoting Tvrtko Ursulin (2018-08-06 16:31:48)
>
> On 04/08/2018 00:24, Lucas De Marchi wrote:
> > After disabling resource streamer on ICL (due to it actually not
> > existing there), I got feedback that there have been some experimental
> > patches for mesa to use RS years ago, but nothing ever landed or shipped
> > because there was no performance improvement.
> >
> > This removes it from kernel keeping the uapi defines around for
> > compatibility.
> >
> > v2: - re-add the inadvertent removal of CTX_CTRL_INHIBIT_SYN_CTX_SWITCH
> > - don't bother trying to document removed params on uapi header:
> > applications should know that from the query.
> > (from Chris)
> >
> > v3: - disable CTX_CTRL_RS_CTX_ENABLE istead of removing it
> > - reword commit message after Daniele confirmed no performance
> > regression on his machine
> > - reword commit message to make clear RS is being removed due to
> > never been used
> > v4: - move I915_EXEC_RESOURCE_STREAMER to __I915_EXEC_ILLEGAL_FLAGS so
> > the check on ioctl() is made much earlier by
> > i915_gem_check_execbuffer() (suggested by Tvrtko)
> >
> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> > Acked-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_drv.c | 2 +-
> > drivers/gpu/drm/i915/i915_drv.h | 2 --
> > drivers/gpu/drm/i915/i915_gem_execbuffer.c | 17 ++---------------
> > drivers/gpu/drm/i915/i915_pci.c | 4 ----
> > drivers/gpu/drm/i915/intel_device_info.h | 1 -
> > drivers/gpu/drm/i915/intel_lrc.c | 10 ++++------
> > drivers/gpu/drm/i915/intel_ringbuffer.c | 4 +---
> > drivers/gpu/drm/i915/intel_ringbuffer.h | 1 -
> > 8 files changed, 8 insertions(+), 33 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> > index 64e0ea4bef67..3857e7963fc5 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.c
> > +++ b/drivers/gpu/drm/i915/i915_drv.c
> > @@ -373,7 +373,7 @@ static int i915_getparam_ioctl(struct drm_device *dev, void *data,
> > value = 2;
> > break;
> > case I915_PARAM_HAS_RESOURCE_STREAMER:
> > - value = HAS_RESOURCE_STREAMER(dev_priv);
> > + value = 0;
> > break;
> > case I915_PARAM_HAS_POOLED_EU:
> > value = HAS_POOLED_EU(dev_priv);
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 4aca5344863d..657f46e0cae9 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -2610,8 +2610,6 @@ intel_info(const struct drm_i915_private *dev_priv)
> > #define USES_GUC_SUBMISSION(dev_priv) intel_uc_is_using_guc_submission()
> > #define USES_HUC(dev_priv) intel_uc_is_using_huc()
> >
> > -#define HAS_RESOURCE_STREAMER(dev_priv) ((dev_priv)->info.has_resource_streamer)
> > -
> > #define HAS_POOLED_EU(dev_priv) ((dev_priv)->info.has_pooled_eu)
> >
> > #define INTEL_PCH_DEVICE_ID_MASK 0xff80
> > diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> > index 1932bc227942..06bb434644e5 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> > @@ -64,7 +64,8 @@ enum {
> > #define BATCH_OFFSET_BIAS (256*1024)
> >
> > #define __I915_EXEC_ILLEGAL_FLAGS \
> > - (__I915_EXEC_UNKNOWN_FLAGS | I915_EXEC_CONSTANTS_MASK)
> > + (__I915_EXEC_UNKNOWN_FLAGS | I915_EXEC_CONSTANTS_MASK | \
> > + I915_EXEC_RESOURCE_STREAMER)
> >
> > /* Catch emission of unexpected errors for CI! */
> > #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)
> > @@ -2221,20 +2222,6 @@ i915_gem_do_execbuffer(struct drm_device *dev,
> > if (!eb.engine)
> > return -EINVAL;
> >
> > - if (args->flags & I915_EXEC_RESOURCE_STREAMER) {
> > - if (!HAS_RESOURCE_STREAMER(eb.i915)) {
> > - DRM_DEBUG("RS is only allowed for Haswell and Gen8 - Gen10\n");
> > - return -EINVAL;
> > - }
> > - if (eb.engine->id != RCS) {
> > - DRM_DEBUG("RS is not available on %s\n",
> > - eb.engine->name);
> > - return -EINVAL;
> > - }
> > -
> > - eb.batch_flags |= I915_DISPATCH_RS;
> > - }
> > -
> > if (args->flags & I915_EXEC_FENCE_IN) {
> > in_fence = sync_file_get_fence(lower_32_bits(args->rsvd2));
> > if (!in_fence)
> > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> > index 8a9a9009db62..e931b48369dd 100644
> > --- a/drivers/gpu/drm/i915/i915_pci.c
> > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > @@ -368,7 +368,6 @@ static const struct intel_device_info intel_valleyview_info = {
> > .has_ddi = 1, \
> > .has_fpga_dbg = 1, \
> > .has_psr = 1, \
> > - .has_resource_streamer = 1, \
> > .has_dp_mst = 1, \
> > .has_rc6p = 0 /* RC6p removed-by HSW */, \
> > .has_runtime_pm = 1
> > @@ -441,7 +440,6 @@ static const struct intel_device_info intel_cherryview_info = {
> > .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
> > .has_64bit_reloc = 1,
> > .has_runtime_pm = 1,
> > - .has_resource_streamer = 1,
> > .has_rc6 = 1,
> > .has_logical_ring_contexts = 1,
> > .has_gmch_display = 1,
> > @@ -515,7 +513,6 @@ static const struct intel_device_info intel_skylake_gt4_info = {
> > .has_runtime_pm = 1, \
> > .has_pooled_eu = 0, \
> > .has_csr = 1, \
> > - .has_resource_streamer = 1, \
> > .has_rc6 = 1, \
> > .has_dp_mst = 1, \
> > .has_logical_ring_contexts = 1, \
> > @@ -604,7 +601,6 @@ static const struct intel_device_info intel_cannonlake_info = {
> > GEN(11), \
> > .ddb_size = 2048, \
> > .has_csr = 0, \
> > - .has_resource_streamer = 0, \
> > .has_logical_ring_elsq = 1
> >
> > static const struct intel_device_info intel_icelake_11_info = {
> > diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> > index 07e8364d1a8c..6eecd64734d5 100644
> > --- a/drivers/gpu/drm/i915/intel_device_info.h
> > +++ b/drivers/gpu/drm/i915/intel_device_info.h
> > @@ -103,7 +103,6 @@ enum intel_platform {
> > func(has_psr); \
> > func(has_rc6); \
> > func(has_rc6p); \
> > - func(has_resource_streamer); \
> > func(has_runtime_pm); \
> > func(has_snoop); \
> > func(has_coherent_ggtt); \
> > diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> > index b0be180c6294..e5385dbfcdda 100644
> > --- a/drivers/gpu/drm/i915/intel_lrc.c
> > +++ b/drivers/gpu/drm/i915/intel_lrc.c
> > @@ -2065,8 +2065,7 @@ static int gen8_emit_bb_start(struct i915_request *rq,
> >
> > /* FIXME(BDW): Address space and security selectors. */
> > *cs++ = MI_BATCH_BUFFER_START_GEN8 |
> > - (flags & I915_DISPATCH_SECURE ? 0 : BIT(8)) |
> > - (flags & I915_DISPATCH_RS ? MI_BATCH_RESOURCE_STREAMER : 0);
> > + (flags & I915_DISPATCH_SECURE ? 0 : BIT(8));
> > *cs++ = lower_32_bits(offset);
> > *cs++ = upper_32_bits(offset);
> >
> > @@ -2584,10 +2583,9 @@ static void execlists_init_reg_state(u32 *regs,
> >
> > CTX_REG(regs, CTX_CONTEXT_CONTROL, RING_CONTEXT_CONTROL(engine),
> > _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT |
> > - CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT) |
> > - _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH |
> > - (HAS_RESOURCE_STREAMER(dev_priv) ?
> > - CTX_CTRL_RS_CTX_ENABLE : 0)));
> > + CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT |
> > + CTX_CTRL_RS_CTX_ENABLE) |
> > + _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH));
> > CTX_REG(regs, CTX_RING_HEAD, RING_HEAD(base), 0);
> > CTX_REG(regs, CTX_RING_TAIL, RING_TAIL(base), 0);
> > CTX_REG(regs, CTX_RING_BUFFER_START, RING_START(base), 0);
> > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > index 80a8b6e57374..8003cef767ba 100644
> > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > @@ -1980,9 +1980,7 @@ hsw_emit_bb_start(struct i915_request *rq,
> > return PTR_ERR(cs);
> >
> > *cs++ = MI_BATCH_BUFFER_START | (dispatch_flags & I915_DISPATCH_SECURE ?
> > - 0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW) |
> > - (dispatch_flags & I915_DISPATCH_RS ?
> > - MI_BATCH_RESOURCE_STREAMER : 0);
> > + 0 : MI_BATCH_PPGTT_HSW | MI_BATCH_NON_SECURE_HSW);
> > /* bit0-7 is the length on GEN6+ */
> > *cs++ = offset;
> > intel_ring_advance(rq, cs);
> > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> > index 57f3787ed6ec..8837079cb8b3 100644
> > --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> > @@ -474,7 +474,6 @@ struct intel_engine_cs {
> > unsigned int dispatch_flags);
> > #define I915_DISPATCH_SECURE BIT(0)
> > #define I915_DISPATCH_PINNED BIT(1)
> > -#define I915_DISPATCH_RS BIT(2)
> > void (*emit_breadcrumb)(struct i915_request *rq, u32 *cs);
> > int emit_breadcrumb_sz;
> >
> >
>
> I don't know if it is true no one uses the feature - Google search
> suggest no open source users at least. But removal looks correct so:
>
> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
And pushed. The only residual bit is the selection of extended state for
Haswell. I think that should be set unconditionally and claiming the
extended state is only needed for RS is a red herring...
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2018-08-06 16:22 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-07-19 17:05 [PATCH v3 1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES Lucas De Marchi
2018-07-19 17:05 ` [PATCH v3 2/2] drm/i915: kill resource streamer Lucas De Marchi
2018-07-19 17:16 ` Rodrigo Vivi
2018-07-19 19:12 ` Lucas De Marchi
2018-07-19 19:52 ` Rodrigo Vivi
2018-08-03 8:41 ` Tvrtko Ursulin
2018-08-03 23:24 ` [PATCH v4 " Lucas De Marchi
2018-08-06 15:31 ` Tvrtko Ursulin
2018-08-06 16:22 ` Chris Wilson
2018-07-19 18:01 ` ✗ Fi.CI.SPARSE: warning for series starting with [v3,1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES Patchwork
2018-07-19 18:23 ` ✓ Fi.CI.BAT: success " Patchwork
2018-07-19 22:38 ` ✓ Fi.CI.IGT: " Patchwork
2018-08-02 22:38 ` ✗ Fi.CI.BAT: failure " Patchwork
2018-08-03 23:44 ` ✗ Fi.CI.SPARSE: warning for series starting with [v3,1/2] drm/i915/icl: move has_resource_streamer to GEN11_FEATURES (rev2) Patchwork
2018-08-04 0:00 ` ✓ Fi.CI.BAT: success " Patchwork
2018-08-04 0:48 ` ✓ Fi.CI.IGT: " Patchwork
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