* [PATCH 0/5] drm/ttm: move non-x86 definitions to the common header
@ 2018-07-26 9:14 Huang Rui
[not found] ` <1532596448-17831-1-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 11+ messages in thread
From: Huang Rui @ 2018-07-26 9:14 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: Bas Nieuwenhuizen, Huang Rui, Christian König
Hi,
As suggested by Christian, we should move non-x86 definitions into one common
header, and it will make the codes readable. They are based on the improvement
fix of Bas (already rebase Bas's patch to drm-next).
Thanks,
Ray
Bas Nieuwenhuizen (1):
drm/ttm: Merge hugepage attr changes in ttm_dma_page_put.
Huang Rui (4):
drm/ttm: add ttm_set_memory header
drm/ttm: clean up non-x86 definitions on ttm_page_alloc_dma
drm/ttm: clean up non-x86 definitions on ttm_page_alloc
drm/ttm: use set_pages_wb instead of set_memory_wb
drivers/gpu/drm/ttm/ttm_page_alloc.c | 54 +------------
drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 53 ++-----------
include/drm/ttm/ttm_set_memory.h | 127 +++++++++++++++++++++++++++++++
3 files changed, 133 insertions(+), 101 deletions(-)
create mode 100644 include/drm/ttm/ttm_set_memory.h
--
2.7.4
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^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 1/5] drm/ttm: Merge hugepage attr changes in ttm_dma_page_put.
[not found] ` <1532596448-17831-1-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
@ 2018-07-26 9:14 ` Huang Rui
[not found] ` <1532596448-17831-2-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
2018-07-26 9:14 ` [PATCH 2/5] drm/ttm: add ttm_set_memory header Huang Rui
2018-07-26 9:18 ` [PATCH 0/5] drm/ttm: move non-x86 definitions to the common header Michel Dänzer
2 siblings, 1 reply; 11+ messages in thread
From: Huang Rui @ 2018-07-26 9:14 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: Bas Nieuwenhuizen, Huang Rui, Christian König
From: Bas Nieuwenhuizen <basni@chromium.org>
Every set_pages_array_wb call resulted in cross-core
interrupts and TLB flushes. Merge more of them for
less overhead.
This reduces the time needed to free a 1.6 GiB GTT WC
buffer as part of Vulkan CTS from ~2 sec to < 0.25 sec.
(Allocation still takes more than 2 sec though)
Signed-off-by: Bas Nieuwenhuizen <basni@chromium.org>
Signed-off-by: Huang Rui <ray.huang@amd.com>
---
drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 30 +++++++++++++++++++++++-------
1 file changed, 23 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
index 3f14c1c..27fb543 100644
--- a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
+++ b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
@@ -301,6 +301,25 @@ static int set_pages_array_uc(struct page **pages, int addrinarray)
#endif
return 0;
}
+
+static int ttm_set_page_range_wb(struct page *p, unsigned long numpages)
+{
+#if IS_ENABLED(CONFIG_AGP)
+ unsigned long i;
+
+ for (i = 0; i < numpages; i++)
+ unmap_page_from_agp(p + i);
+#endif
+ return 0;
+}
+
+#else /* for !CONFIG_X86 */
+
+static int ttm_set_page_range_wb(struct page *p, unsigned long numpages)
+{
+ return set_memory_wb((unsigned long)page_address(p), numpages);
+}
+
#endif /* for !CONFIG_X86 */
static int ttm_set_pages_caching(struct dma_pool *pool,
@@ -389,17 +408,14 @@ static void ttm_pool_update_free_locked(struct dma_pool *pool,
static void ttm_dma_page_put(struct dma_pool *pool, struct dma_page *d_page)
{
struct page *page = d_page->p;
- unsigned i, num_pages;
+ unsigned num_pages;
/* Don't set WB on WB page pool. */
if (!(pool->type & IS_CACHED)) {
num_pages = pool->size / PAGE_SIZE;
- for (i = 0; i < num_pages; ++i, ++page) {
- if (set_pages_array_wb(&page, 1)) {
- pr_err("%s: Failed to set %d pages to wb!\n",
- pool->dev_name, 1);
- }
- }
+ if (ttm_set_page_range_wb(page, num_pages))
+ pr_err("%s: Failed to set %d pages to wb!\n",
+ pool->dev_name, num_pages);
}
list_del(&d_page->page_list);
--
2.7.4
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^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 2/5] drm/ttm: add ttm_set_memory header
[not found] ` <1532596448-17831-1-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
2018-07-26 9:14 ` [PATCH 1/5] drm/ttm: Merge hugepage attr changes in ttm_dma_page_put Huang Rui
@ 2018-07-26 9:14 ` Huang Rui
[not found] ` <1532596448-17831-3-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
2018-07-26 9:18 ` [PATCH 0/5] drm/ttm: move non-x86 definitions to the common header Michel Dänzer
2 siblings, 1 reply; 11+ messages in thread
From: Huang Rui @ 2018-07-26 9:14 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: Bas Nieuwenhuizen, Huang Rui, Christian König
This patch moves all non-x86 abstraction to the ttm_set_memory header.
It is to make function calling more clearly.
Suggested-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
---
include/drm/ttm/ttm_set_memory.h | 127 +++++++++++++++++++++++++++++++++++++++
1 file changed, 127 insertions(+)
create mode 100644 include/drm/ttm/ttm_set_memory.h
diff --git a/include/drm/ttm/ttm_set_memory.h b/include/drm/ttm/ttm_set_memory.h
new file mode 100644
index 0000000..ceef413
--- /dev/null
+++ b/include/drm/ttm/ttm_set_memory.h
@@ -0,0 +1,127 @@
+/**************************************************************************
+ *
+ * Copyright (c) 2018 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+/*
+ * Authors: Huang Rui <ray.huang@amd.com>
+ */
+
+#ifndef TTM_SET_MEMORY
+#define TTM_SET_MEMORY
+
+#include <linux/mm.h>
+
+#ifdef CONFIG_X86
+
+#include <asm/set_memory.h>
+
+static inline int ttm_set_page_range_wb(struct page *p, unsigned long numpages)
+{
+ return set_memory_wb((unsigned long)page_address(p), numpages);
+}
+
+#else /* for CONFIG_X86 */
+
+#if IS_ENABLED(CONFIG_AGP)
+
+#include <asm/agp.h>
+
+static inline int set_pages_array_wb(struct page **pages, int addrinarray)
+{
+ int i;
+
+ for (i = 0; i < addrinarray; i++)
+ unmap_page_from_agp(pages[i]);
+ return 0;
+}
+
+static inline int set_pages_array_wc(struct page **pages, int addrinarray)
+{
+ int i;
+
+ for (i = 0; i < addrinarray; i++)
+ map_page_into_agp(pages[i]);
+ return 0;
+}
+
+static inline int set_pages_array_uc(struct page **pages, int addrinarray)
+{
+ int i;
+
+ for (i = 0; i < addrinarray; i++)
+ map_page_into_agp(pages[i]);
+ return 0;
+}
+
+static inline int ttm_set_page_range_wb(struct page *p, unsigned long numpages)
+{
+ unsigned long i;
+
+ for (i = 0; i < numpages; i++)
+ unmap_page_from_agp(p + i);
+ return 0;
+}
+
+static inline int set_pages_wb(struct page *page, int numpages)
+{
+ int i;
+
+ for (i = 0; i < numpages; i++)
+ unmap_page_from_agp(page++);
+ return 0;
+}
+
+#else /* for CONFIG_AGP */
+
+static inline int set_pages_array_wb(struct page **pages, int addrinarray)
+{
+ return 0;
+}
+
+static inline int set_pages_array_wc(struct page **pages, int addrinarray)
+{
+ return 0;
+}
+
+static inline int set_pages_array_uc(struct page **pages, int addrinarray)
+{
+ return 0;
+}
+
+static inline int ttm_set_page_range_wb(struct page *p, unsigned long numpages)
+{
+ return 0;
+}
+
+static inline int set_pages_wb(struct page *page, int numpages)
+{
+ return 0;
+}
+
+#endif /* for CONFIG_AGP */
+
+#endif /* for CONFIG_X86 */
+
+#endif
--
2.7.4
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 0/5] drm/ttm: move non-x86 definitions to the common header
[not found] ` <1532596448-17831-1-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
2018-07-26 9:14 ` [PATCH 1/5] drm/ttm: Merge hugepage attr changes in ttm_dma_page_put Huang Rui
2018-07-26 9:14 ` [PATCH 2/5] drm/ttm: add ttm_set_memory header Huang Rui
@ 2018-07-26 9:18 ` Michel Dänzer
[not found] ` <7f08ebdb-f42d-287f-81ec-c375ba852dc6-otUistvHUpPR7s880joybQ@public.gmane.org>
2 siblings, 1 reply; 11+ messages in thread
From: Michel Dänzer @ 2018-07-26 9:18 UTC (permalink / raw)
To: Huang Rui; +Cc: Bas Nieuwenhuizen, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Hi Ray,
On 2018-07-26 11:14 AM, Huang Rui wrote:
> Hi,
>
> As suggested by Christian, we should move non-x86 definitions into one common
> header, and it will make the codes readable. They are based on the improvement
> fix of Bas (already rebase Bas's patch to drm-next).
TTM patches need to be sent to the dri-devel list as well for review.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
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^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/5] drm/ttm: Merge hugepage attr changes in ttm_dma_page_put.
[not found] ` <1532596448-17831-2-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
@ 2018-07-26 9:28 ` Christian König
[not found] ` <297c3298-d1a0-743c-5de9-8e009677305a-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
0 siblings, 1 reply; 11+ messages in thread
From: Christian König @ 2018-07-26 9:28 UTC (permalink / raw)
To: Huang Rui, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: Bas Nieuwenhuizen, Christian König
Am 26.07.2018 um 11:14 schrieb Huang Rui:
> From: Bas Nieuwenhuizen <basni@chromium.org>
>
> Every set_pages_array_wb call resulted in cross-core
> interrupts and TLB flushes. Merge more of them for
> less overhead.
>
> This reduces the time needed to free a 1.6 GiB GTT WC
> buffer as part of Vulkan CTS from ~2 sec to < 0.25 sec.
> (Allocation still takes more than 2 sec though)
>
> Signed-off-by: Bas Nieuwenhuizen <basni@chromium.org>
> Signed-off-by: Huang Rui <ray.huang@amd.com>
> ---
> drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 30 +++++++++++++++++++++++-------
> 1 file changed, 23 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
> index 3f14c1c..27fb543 100644
> --- a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
> +++ b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
> @@ -301,6 +301,25 @@ static int set_pages_array_uc(struct page **pages, int addrinarray)
> #endif
> return 0;
> }
> +
> +static int ttm_set_page_range_wb(struct page *p, unsigned long numpages)
> +{
> +#if IS_ENABLED(CONFIG_AGP)
> + unsigned long i;
> +
> + for (i = 0; i < numpages; i++)
> + unmap_page_from_agp(p + i);
> +#endif
> + return 0;
> +}
> +
> +#else /* for !CONFIG_X86 */
> +
> +static int ttm_set_page_range_wb(struct page *p, unsigned long numpages)
> +{
> + return set_memory_wb((unsigned long)page_address(p), numpages);
> +}
Please use set_pages_wb() here instead of set_memory_wb(), this way it
should also work on 32bit systems.
Christian.
> +
> #endif /* for !CONFIG_X86 */
>
> static int ttm_set_pages_caching(struct dma_pool *pool,
> @@ -389,17 +408,14 @@ static void ttm_pool_update_free_locked(struct dma_pool *pool,
> static void ttm_dma_page_put(struct dma_pool *pool, struct dma_page *d_page)
> {
> struct page *page = d_page->p;
> - unsigned i, num_pages;
> + unsigned num_pages;
>
> /* Don't set WB on WB page pool. */
> if (!(pool->type & IS_CACHED)) {
> num_pages = pool->size / PAGE_SIZE;
> - for (i = 0; i < num_pages; ++i, ++page) {
> - if (set_pages_array_wb(&page, 1)) {
> - pr_err("%s: Failed to set %d pages to wb!\n",
> - pool->dev_name, 1);
> - }
> - }
> + if (ttm_set_page_range_wb(page, num_pages))
> + pr_err("%s: Failed to set %d pages to wb!\n",
> + pool->dev_name, num_pages);
> }
>
> list_del(&d_page->page_list);
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^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 2/5] drm/ttm: add ttm_set_memory header
[not found] ` <1532596448-17831-3-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
@ 2018-07-26 9:30 ` Christian König
0 siblings, 0 replies; 11+ messages in thread
From: Christian König @ 2018-07-26 9:30 UTC (permalink / raw)
To: Huang Rui, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: Bas Nieuwenhuizen, Christian König
Am 26.07.2018 um 11:14 schrieb Huang Rui:
> This patch moves all non-x86 abstraction to the ttm_set_memory header.
> It is to make function calling more clearly.
>
> Suggested-by: Christian König <christian.koenig@amd.com>
> Signed-off-by: Huang Rui <ray.huang@amd.com>
> ---
> include/drm/ttm/ttm_set_memory.h | 127 +++++++++++++++++++++++++++++++++++++++
> 1 file changed, 127 insertions(+)
> create mode 100644 include/drm/ttm/ttm_set_memory.h
>
> diff --git a/include/drm/ttm/ttm_set_memory.h b/include/drm/ttm/ttm_set_memory.h
> new file mode 100644
> index 0000000..ceef413
> --- /dev/null
> +++ b/include/drm/ttm/ttm_set_memory.h
> @@ -0,0 +1,127 @@
> +/**************************************************************************
> + *
> + * Copyright (c) 2018 Advanced Micro Devices, Inc.
> + * All Rights Reserved.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the
> + * "Software"), to deal in the Software without restriction, including
> + * without limitation the rights to use, copy, modify, merge, publish,
> + * distribute, sub license, and/or sell copies of the Software, and to
> + * permit persons to whom the Software is furnished to do so, subject to
> + * the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the
> + * next paragraph) shall be included in all copies or substantial portions
> + * of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
> + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
> + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
> + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
> + * USE OR OTHER DEALINGS IN THE SOFTWARE.
> + *
> + **************************************************************************/
> +/*
> + * Authors: Huang Rui <ray.huang@amd.com>
> + */
> +
> +#ifndef TTM_SET_MEMORY
> +#define TTM_SET_MEMORY
> +
> +#include <linux/mm.h>
> +
> +#ifdef CONFIG_X86
> +
> +#include <asm/set_memory.h>
> +
> +static inline int ttm_set_page_range_wb(struct page *p, unsigned long numpages)
> +{
> + return set_memory_wb((unsigned long)page_address(p), numpages);
> +}
> +
> +#else /* for CONFIG_X86 */
> +
> +#if IS_ENABLED(CONFIG_AGP)
> +
> +#include <asm/agp.h>
> +
> +static inline int set_pages_array_wb(struct page **pages, int addrinarray)
While at it please add a ttm_ prefix to all those functions.
Additional to that you need to send TTM changes to dri-devel as well and
for some reason patch #3-#5 didn't made it to the mailing list.
Christian.
> +{
> + int i;
> +
> + for (i = 0; i < addrinarray; i++)
> + unmap_page_from_agp(pages[i]);
> + return 0;
> +}
> +
> +static inline int set_pages_array_wc(struct page **pages, int addrinarray)
> +{
> + int i;
> +
> + for (i = 0; i < addrinarray; i++)
> + map_page_into_agp(pages[i]);
> + return 0;
> +}
> +
> +static inline int set_pages_array_uc(struct page **pages, int addrinarray)
> +{
> + int i;
> +
> + for (i = 0; i < addrinarray; i++)
> + map_page_into_agp(pages[i]);
> + return 0;
> +}
> +
> +static inline int ttm_set_page_range_wb(struct page *p, unsigned long numpages)
> +{
> + unsigned long i;
> +
> + for (i = 0; i < numpages; i++)
> + unmap_page_from_agp(p + i);
> + return 0;
> +}
> +
> +static inline int set_pages_wb(struct page *page, int numpages)
> +{
> + int i;
> +
> + for (i = 0; i < numpages; i++)
> + unmap_page_from_agp(page++);
> + return 0;
> +}
> +
> +#else /* for CONFIG_AGP */
> +
> +static inline int set_pages_array_wb(struct page **pages, int addrinarray)
> +{
> + return 0;
> +}
> +
> +static inline int set_pages_array_wc(struct page **pages, int addrinarray)
> +{
> + return 0;
> +}
> +
> +static inline int set_pages_array_uc(struct page **pages, int addrinarray)
> +{
> + return 0;
> +}
> +
> +static inline int ttm_set_page_range_wb(struct page *p, unsigned long numpages)
> +{
> + return 0;
> +}
> +
> +static inline int set_pages_wb(struct page *page, int numpages)
> +{
> + return 0;
> +}
> +
> +#endif /* for CONFIG_AGP */
> +
> +#endif /* for CONFIG_X86 */
> +
> +#endif
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^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 0/5] drm/ttm: move non-x86 definitions to the common header
[not found] ` <7f08ebdb-f42d-287f-81ec-c375ba852dc6-otUistvHUpPR7s880joybQ@public.gmane.org>
@ 2018-07-26 9:39 ` Huang Rui
0 siblings, 0 replies; 11+ messages in thread
From: Huang Rui @ 2018-07-26 9:39 UTC (permalink / raw)
To: Michel D�nzer
Cc: Bas Nieuwenhuizen, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
On Thu, Jul 26, 2018 at 05:18:46PM +0800, Michel Dänzer wrote:
>
> Hi Ray,
>
>
> On 2018-07-26 11:14 AM, Huang Rui wrote:
> > Hi,
> >
> > As suggested by Christian, we should move non-x86 definitions into one common
> > header, and it will make the codes readable. They are based on the improvement
> > fix of Bas (already rebase Bas's patch to drm-next).
>
> TTM patches need to be sent to the dri-devel list as well for review.
>
Oh, right! Michel, thanks to reminder. I will re-send them.
Thanks,
Ray
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^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/5] drm/ttm: Merge hugepage attr changes in ttm_dma_page_put.
2018-07-26 9:50 ` Huang Rui
@ 2018-07-26 9:43 ` Bas Nieuwenhuizen
[not found] ` <CAJXbfOCxrt40XqVCNYS01BBk4=rZrv5OoojrZ8AQPG+TBXfh5g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
0 siblings, 1 reply; 11+ messages in thread
From: Bas Nieuwenhuizen @ 2018-07-26 9:43 UTC (permalink / raw)
To: ray.huang-5C7GfCeVMHo
Cc: basni-F7+t8E8rja9g9hUCZPvPmw, Christian.Koenig-5C7GfCeVMHo,
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
On Thu, Jul 26, 2018 at 11:39 AM Huang Rui <ray.huang@amd.com> wrote:
>
> On Thu, Jul 26, 2018 at 05:28:53PM +0800, Christian König wrote:
> > Am 26.07.2018 um 11:14 schrieb Huang Rui:
> > > From: Bas Nieuwenhuizen <basni@chromium.org>
> > >
> > > Every set_pages_array_wb call resulted in cross-core
> > > interrupts and TLB flushes. Merge more of them for
> > > less overhead.
> > >
> > > This reduces the time needed to free a 1.6 GiB GTT WC
> > > buffer as part of Vulkan CTS from ~2 sec to < 0.25 sec.
> > > (Allocation still takes more than 2 sec though)
> > >
> > > Signed-off-by: Bas Nieuwenhuizen <basni@chromium.org>
> > > Signed-off-by: Huang Rui <ray.huang@amd.com>
> > > ---
> > > drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 30 +++++++++++++++++++++++-------
> > > 1 file changed, 23 insertions(+), 7 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
> > > index 3f14c1c..27fb543 100644
> > > --- a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
> > > +++ b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
> > > @@ -301,6 +301,25 @@ static int set_pages_array_uc(struct page **pages, int addrinarray)
> > > #endif
> > > return 0;
> > > }
> > > +
> > > +static int ttm_set_page_range_wb(struct page *p, unsigned long numpages)
> > > +{
> > > +#if IS_ENABLED(CONFIG_AGP)
> > > + unsigned long i;
> > > +
> > > + for (i = 0; i < numpages; i++)
> > > + unmap_page_from_agp(p + i);
> > > +#endif
> > > + return 0;
> > > +}
> > > +
> > > +#else /* for !CONFIG_X86 */
> > > +
> > > +static int ttm_set_page_range_wb(struct page *p, unsigned long numpages)
> > > +{
> > > + return set_memory_wb((unsigned long)page_address(p), numpages);
> > > +}
> >
> > Please use set_pages_wb() here instead of set_memory_wb(), this way it
> > should also work on 32bit systems.
> >
>
> Actually, I fix it in patch 5 ("drm/ttm: use set_pages_wb instead of
> set_memory_wb"). So should I sequeeze it int this patch? There is SMTP
> network issue in SRDC, other patches are timeout...
I'd say fix it up in this patch (You can avoid introducing
ttm_set_page_range_wb that way as it is equal to set_pages_wb) and
then put this patch at the end of your series. Since ttm_page_alloc.c
already has a set_pages_wb fallback implementation that means we do
not introduce code just to deduplicate it later in the series anymore.
>
> [Net::SMTP] Timeout at /usr/lib/git-core/git-send-email line 1393.
>
> Let me resend them into dri-devel as well.
>
> Thanks,
> Ray
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/5] drm/ttm: Merge hugepage attr changes in ttm_dma_page_put.
[not found] ` <297c3298-d1a0-743c-5de9-8e009677305a-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
@ 2018-07-26 9:50 ` Huang Rui
2018-07-26 9:43 ` Bas Nieuwenhuizen
0 siblings, 1 reply; 11+ messages in thread
From: Huang Rui @ 2018-07-26 9:50 UTC (permalink / raw)
To: Koenig, Christian
Cc: Bas Nieuwenhuizen, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
On Thu, Jul 26, 2018 at 05:28:53PM +0800, Christian König wrote:
> Am 26.07.2018 um 11:14 schrieb Huang Rui:
> > From: Bas Nieuwenhuizen <basni@chromium.org>
> >
> > Every set_pages_array_wb call resulted in cross-core
> > interrupts and TLB flushes. Merge more of them for
> > less overhead.
> >
> > This reduces the time needed to free a 1.6 GiB GTT WC
> > buffer as part of Vulkan CTS from ~2 sec to < 0.25 sec.
> > (Allocation still takes more than 2 sec though)
> >
> > Signed-off-by: Bas Nieuwenhuizen <basni@chromium.org>
> > Signed-off-by: Huang Rui <ray.huang@amd.com>
> > ---
> > drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 30 +++++++++++++++++++++++-------
> > 1 file changed, 23 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
> > index 3f14c1c..27fb543 100644
> > --- a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
> > +++ b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
> > @@ -301,6 +301,25 @@ static int set_pages_array_uc(struct page **pages, int addrinarray)
> > #endif
> > return 0;
> > }
> > +
> > +static int ttm_set_page_range_wb(struct page *p, unsigned long numpages)
> > +{
> > +#if IS_ENABLED(CONFIG_AGP)
> > + unsigned long i;
> > +
> > + for (i = 0; i < numpages; i++)
> > + unmap_page_from_agp(p + i);
> > +#endif
> > + return 0;
> > +}
> > +
> > +#else /* for !CONFIG_X86 */
> > +
> > +static int ttm_set_page_range_wb(struct page *p, unsigned long numpages)
> > +{
> > + return set_memory_wb((unsigned long)page_address(p), numpages);
> > +}
>
> Please use set_pages_wb() here instead of set_memory_wb(), this way it
> should also work on 32bit systems.
>
Actually, I fix it in patch 5 ("drm/ttm: use set_pages_wb instead of
set_memory_wb"). So should I sequeeze it int this patch? There is SMTP
network issue in SRDC, other patches are timeout...
[Net::SMTP] Timeout at /usr/lib/git-core/git-send-email line 1393.
Let me resend them into dri-devel as well.
Thanks,
Ray
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/5] drm/ttm: Merge hugepage attr changes in ttm_dma_page_put.
[not found] ` <CAJXbfOCxrt40XqVCNYS01BBk4=rZrv5OoojrZ8AQPG+TBXfh5g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2018-07-26 10:57 ` Huang Rui
0 siblings, 0 replies; 11+ messages in thread
From: Huang Rui @ 2018-07-26 10:57 UTC (permalink / raw)
To: Bas Nieuwenhuizen
Cc: basni-F7+t8E8rja9g9hUCZPvPmw, Koenig, Christian,
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
On Thu, Jul 26, 2018 at 05:43:10PM +0800, Bas Nieuwenhuizen wrote:
> On Thu, Jul 26, 2018 at 11:39 AM Huang Rui <ray.huang@amd.com> wrote:
> >
> > On Thu, Jul 26, 2018 at 05:28:53PM +0800, Christian König wrote:
> > > Am 26.07.2018 um 11:14 schrieb Huang Rui:
> > > > From: Bas Nieuwenhuizen <basni@chromium.org>
> > > >
> > > > Every set_pages_array_wb call resulted in cross-core
> > > > interrupts and TLB flushes. Merge more of them for
> > > > less overhead.
> > > >
> > > > This reduces the time needed to free a 1.6 GiB GTT WC
> > > > buffer as part of Vulkan CTS from ~2 sec to < 0.25 sec.
> > > > (Allocation still takes more than 2 sec though)
> > > >
> > > > Signed-off-by: Bas Nieuwenhuizen <basni@chromium.org>
> > > > Signed-off-by: Huang Rui <ray.huang@amd.com>
> > > > ---
> > > > drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 30 +++++++++++++++++++++++-------
> > > > 1 file changed, 23 insertions(+), 7 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
> > > > index 3f14c1c..27fb543 100644
> > > > --- a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
> > > > +++ b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
> > > > @@ -301,6 +301,25 @@ static int set_pages_array_uc(struct page **pages, int addrinarray)
> > > > #endif
> > > > return 0;
> > > > }
> > > > +
> > > > +static int ttm_set_page_range_wb(struct page *p, unsigned long numpages)
> > > > +{
> > > > +#if IS_ENABLED(CONFIG_AGP)
> > > > + unsigned long i;
> > > > +
> > > > + for (i = 0; i < numpages; i++)
> > > > + unmap_page_from_agp(p + i);
> > > > +#endif
> > > > + return 0;
> > > > +}
> > > > +
> > > > +#else /* for !CONFIG_X86 */
> > > > +
> > > > +static int ttm_set_page_range_wb(struct page *p, unsigned long numpages)
> > > > +{
> > > > + return set_memory_wb((unsigned long)page_address(p), numpages);
> > > > +}
> > >
> > > Please use set_pages_wb() here instead of set_memory_wb(), this way it
> > > should also work on 32bit systems.
> > >
> >
> > Actually, I fix it in patch 5 ("drm/ttm: use set_pages_wb instead of
> > set_memory_wb"). So should I sequeeze it int this patch? There is SMTP
> > network issue in SRDC, other patches are timeout...
>
> I'd say fix it up in this patch (You can avoid introducing
> ttm_set_page_range_wb that way as it is equal to set_pages_wb) and
> then put this patch at the end of your series. Since ttm_page_alloc.c
> already has a set_pages_wb fallback implementation that means we do
> not introduce code just to deduplicate it later in the series anymore.
>
That makes sense. :-)
Will update it in V2.
Thanks,
Ray
> >
> > [Net::SMTP] Timeout at /usr/lib/git-core/git-send-email line 1393.
> >
> > Let me resend them into dri-devel as well.
> >
> > Thanks,
> > Ray
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 0/5] drm/ttm: move non-x86 definitions to the common header
@ 2018-07-26 9:29 Huang Rui
0 siblings, 0 replies; 11+ messages in thread
From: Huang Rui @ 2018-07-26 9:29 UTC (permalink / raw)
To: amd-gfx, dri-devel; +Cc: Bas Nieuwenhuizen, Huang Rui, Christian König
Hi,
As suggested by Christian, we should move non-x86 definitions into one common
header, and it will make the codes readable. They are based on the improvement
fix of Bas (already rebase Bas's patch to drm-next).
Thanks,
Ray
Bas Nieuwenhuizen (1):
drm/ttm: Merge hugepage attr changes in ttm_dma_page_put.
Huang Rui (4):
drm/ttm: add ttm_set_memory header
drm/ttm: clean up non-x86 definitions on ttm_page_alloc_dma
drm/ttm: clean up non-x86 definitions on ttm_page_alloc
drm/ttm: use set_pages_wb instead of set_memory_wb
drivers/gpu/drm/ttm/ttm_page_alloc.c | 54 +------------
drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 53 ++-----------
include/drm/ttm/ttm_set_memory.h | 127 +++++++++++++++++++++++++++++++
3 files changed, 133 insertions(+), 101 deletions(-)
create mode 100644 include/drm/ttm/ttm_set_memory.h
--
2.7.4
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2018-07-26 10:57 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-07-26 9:14 [PATCH 0/5] drm/ttm: move non-x86 definitions to the common header Huang Rui
[not found] ` <1532596448-17831-1-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
2018-07-26 9:14 ` [PATCH 1/5] drm/ttm: Merge hugepage attr changes in ttm_dma_page_put Huang Rui
[not found] ` <1532596448-17831-2-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
2018-07-26 9:28 ` Christian König
[not found] ` <297c3298-d1a0-743c-5de9-8e009677305a-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2018-07-26 9:50 ` Huang Rui
2018-07-26 9:43 ` Bas Nieuwenhuizen
[not found] ` <CAJXbfOCxrt40XqVCNYS01BBk4=rZrv5OoojrZ8AQPG+TBXfh5g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-07-26 10:57 ` Huang Rui
2018-07-26 9:14 ` [PATCH 2/5] drm/ttm: add ttm_set_memory header Huang Rui
[not found] ` <1532596448-17831-3-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
2018-07-26 9:30 ` Christian König
2018-07-26 9:18 ` [PATCH 0/5] drm/ttm: move non-x86 definitions to the common header Michel Dänzer
[not found] ` <7f08ebdb-f42d-287f-81ec-c375ba852dc6-otUistvHUpPR7s880joybQ@public.gmane.org>
2018-07-26 9:39 ` Huang Rui
2018-07-26 9:29 Huang Rui
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