[PATCH mmc-next v2 0/3] solve SDHCI DWC MSHC 128MB DMA boundary limitation

[PATCH mmc-next v2 0/3] solve SDHCI DWC MSHC 128MB DMA boundary limitation

[Jisheng Zhang]

When using DMA, if the DMA addr spans 128MB boundary, we have to split
the DMA transfer into two so that each one doesn't exceed the boundary.

patch1 adds adma_table_num to struct sdhci_host so that driver can
control the ADMA table number.
patch2 introduces adma_write_desc() hook to struct sdhci_ops so that
driver can override it.
patch3 finally solves the 128MB boundary limitation.

since v1:
  - fix BOUNDARY_OK macro if addr+len is aligned to 128MB
  - use DIV_ROUND_UP to cal extra desc num
  - fix !len for dwcmshc_adma_write_desc()

Jisheng Zhang (3):
  mmc: sdhci: add adma_table_num member to struct sdhci_host
  mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops
  mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation

 drivers/mmc/host/sdhci-of-dwcmshc.c | 42 +++++++++++++++++++++++++
 drivers/mmc/host/sdhci.c            | 48 +++++++++++++++++++----------
 drivers/mmc/host/sdhci.h            |  8 +++++
 3 files changed, 82 insertions(+), 16 deletions(-)

-- 
2.18.0

[PATCH mmc-next v2 0/3] solve SDHCI DWC MSHC 128MB DMA boundary limitation

[Jisheng Zhang]

When using DMA, if the DMA addr spans 128MB boundary, we have to split
the DMA transfer into two so that each one doesn't exceed the boundary.

patch1 adds adma_table_num to struct sdhci_host so that driver can
control the ADMA table number.
patch2 introduces adma_write_desc() hook to struct sdhci_ops so that
driver can override it.
patch3 finally solves the 128MB boundary limitation.

since v1:
  - fix BOUNDARY_OK macro if addr+len is aligned to 128MB
  - use DIV_ROUND_UP to cal extra desc num
  - fix !len for dwcmshc_adma_write_desc()

Jisheng Zhang (3):
  mmc: sdhci: add adma_table_num member to struct sdhci_host
  mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops
  mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation

 drivers/mmc/host/sdhci-of-dwcmshc.c | 42 +++++++++++++++++++++++++
 drivers/mmc/host/sdhci.c            | 48 +++++++++++++++++++----------
 drivers/mmc/host/sdhci.h            |  8 +++++
 3 files changed, 82 insertions(+), 16 deletions(-)

-- 
2.18.0

[PATCH mmc-next v2 1/3] mmc: sdhci: add adma_table_num member to struct sdhci_host

[Jisheng Zhang]

This patch adds adma_table_num member to struct sdhci_host to give more
flexibility to drivers to control the ADMA table number.

Default value of adma_table_num is set to (SDHCI_MAX_SEGS * 2 + 1).

Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
---
 drivers/mmc/host/sdhci.c | 17 +++++++++--------
 drivers/mmc/host/sdhci.h |  2 ++
 2 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index a7b5602ef6f7..14dd4a49e03b 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -3316,6 +3316,13 @@ struct sdhci_host *sdhci_alloc_host(struct device *dev,
 
 	host->sdma_boundary = SDHCI_DEFAULT_BOUNDARY_ARG;
 
+	/*
+	 * The DMA descriptor table number is calculated as the maximum
+	 * number of segments times 2, to allow for an alignment
+	 * descriptor for each segment, plus 1 for a nop end descriptor.
+	 */
+	host->adma_table_num = SDHCI_MAX_SEGS * 2 + 1;
+
 	return host;
 }
 
@@ -3561,18 +3568,12 @@ int sdhci_setup_host(struct sdhci_host *host)
 		dma_addr_t dma;
 		void *buf;
 
-		/*
-		 * The DMA descriptor table size is calculated as the maximum
-		 * number of segments times 2, to allow for an alignment
-		 * descriptor for each segment, plus 1 for a nop end descriptor,
-		 * all multipled by the descriptor size.
-		 */
 		if (host->flags & SDHCI_USE_64_BIT_DMA) {
-			host->adma_table_sz = (SDHCI_MAX_SEGS * 2 + 1) *
+			host->adma_table_sz = host->adma_table_num *
 					      SDHCI_ADMA2_64_DESC_SZ;
 			host->desc_sz = SDHCI_ADMA2_64_DESC_SZ;
 		} else {
-			host->adma_table_sz = (SDHCI_MAX_SEGS * 2 + 1) *
+			host->adma_table_sz = host->adma_table_num *
 					      SDHCI_ADMA2_32_DESC_SZ;
 			host->desc_sz = SDHCI_ADMA2_32_DESC_SZ;
 		}
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 23966f887da6..d55fd7033e93 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -563,6 +563,8 @@ struct sdhci_host {
 	/* Host SDMA buffer boundary. */
 	u32			sdma_boundary;
 
+	u32			adma_table_num;
+
 	u64			data_timeout;
 
 	unsigned long private[0] ____cacheline_aligned;
-- 
2.18.0

[PATCH mmc-next v2 1/3] mmc: sdhci: add adma_table_num member to struct sdhci_host

[Jisheng Zhang]

This patch adds adma_table_num member to struct sdhci_host to give more
flexibility to drivers to control the ADMA table number.

Default value of adma_table_num is set to (SDHCI_MAX_SEGS * 2 + 1).

Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
---
 drivers/mmc/host/sdhci.c | 17 +++++++++--------
 drivers/mmc/host/sdhci.h |  2 ++
 2 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index a7b5602ef6f7..14dd4a49e03b 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -3316,6 +3316,13 @@ struct sdhci_host *sdhci_alloc_host(struct device *dev,
 
 	host->sdma_boundary = SDHCI_DEFAULT_BOUNDARY_ARG;
 
+	/*
+	 * The DMA descriptor table number is calculated as the maximum
+	 * number of segments times 2, to allow for an alignment
+	 * descriptor for each segment, plus 1 for a nop end descriptor.
+	 */
+	host->adma_table_num = SDHCI_MAX_SEGS * 2 + 1;
+
 	return host;
 }
 
@@ -3561,18 +3568,12 @@ int sdhci_setup_host(struct sdhci_host *host)
 		dma_addr_t dma;
 		void *buf;
 
-		/*
-		 * The DMA descriptor table size is calculated as the maximum
-		 * number of segments times 2, to allow for an alignment
-		 * descriptor for each segment, plus 1 for a nop end descriptor,
-		 * all multipled by the descriptor size.
-		 */
 		if (host->flags & SDHCI_USE_64_BIT_DMA) {
-			host->adma_table_sz = (SDHCI_MAX_SEGS * 2 + 1) *
+			host->adma_table_sz = host->adma_table_num *
 					      SDHCI_ADMA2_64_DESC_SZ;
 			host->desc_sz = SDHCI_ADMA2_64_DESC_SZ;
 		} else {
-			host->adma_table_sz = (SDHCI_MAX_SEGS * 2 + 1) *
+			host->adma_table_sz = host->adma_table_num *
 					      SDHCI_ADMA2_32_DESC_SZ;
 			host->desc_sz = SDHCI_ADMA2_32_DESC_SZ;
 		}
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 23966f887da6..d55fd7033e93 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -563,6 +563,8 @@ struct sdhci_host {
 	/* Host SDMA buffer boundary. */
 	u32			sdma_boundary;
 
+	u32			adma_table_num;
+
 	u64			data_timeout;
 
 	unsigned long private[0] ____cacheline_aligned;
-- 
2.18.0

[PATCH mmc-next v2 2/3] mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops

[Jisheng Zhang]

Add this hook so that it can be overridden with driver specific
implementations. We also rename the original sdhci_adma_write_desc()
to _sdhci_adma_write_desc() and export it, so that it could be reused
by driver's specific implementations.

Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
---
 drivers/mmc/host/sdhci.c | 31 +++++++++++++++++++++++--------
 drivers/mmc/host/sdhci.h |  6 ++++++
 2 files changed, 29 insertions(+), 8 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 14dd4a49e03b..50c846d99182 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -554,8 +554,8 @@ static void sdhci_kunmap_atomic(void *buffer, unsigned long *flags)
 	local_irq_restore(*flags);
 }
 
-static void sdhci_adma_write_desc(struct sdhci_host *host, void *desc,
-				  dma_addr_t addr, int len, unsigned cmd)
+unsigned int _sdhci_adma_write_desc(struct sdhci_host *host, void *desc,
+				    dma_addr_t addr, int len, unsigned int cmd)
 {
 	struct sdhci_adma2_64_desc *dma_desc = desc;
 
@@ -566,6 +566,19 @@ static void sdhci_adma_write_desc(struct sdhci_host *host, void *desc,
 
 	if (host->flags & SDHCI_USE_64_BIT_DMA)
 		dma_desc->addr_hi = cpu_to_le32((u64)addr >> 32);
+
+	return host->desc_sz;
+}
+EXPORT_SYMBOL_GPL(_sdhci_adma_write_desc);
+
+static unsigned int sdhci_adma_write_desc(struct sdhci_host *host, void *desc,
+					  dma_addr_t addr, int len,
+					  unsigned int cmd)
+{
+	if (host->ops->adma_write_desc)
+		return host->ops->adma_write_desc(host, desc, addr, len, cmd);
+
+	return _sdhci_adma_write_desc(host, desc, addr, len, cmd);
 }
 
 static void sdhci_adma_mark_end(void *desc)
@@ -585,6 +598,7 @@ static void sdhci_adma_table_pre(struct sdhci_host *host,
 	void *desc, *align;
 	char *buffer;
 	int len, offset, i;
+	unsigned int desc_sz;
 
 	/*
 	 * The spec does not specify endianness of descriptor table.
@@ -618,15 +632,16 @@ static void sdhci_adma_table_pre(struct sdhci_host *host,
 			}
 
 			/* tran, valid */
-			sdhci_adma_write_desc(host, desc, align_addr, offset,
-					      ADMA2_TRAN_VALID);
+			desc_sz = sdhci_adma_write_desc(host, desc,
+							align_addr, offset,
+							ADMA2_TRAN_VALID);
 
 			BUG_ON(offset > 65536);
 
 			align += SDHCI_ADMA2_ALIGN;
 			align_addr += SDHCI_ADMA2_ALIGN;
 
-			desc += host->desc_sz;
+			desc += desc_sz;
 
 			addr += offset;
 			len -= offset;
@@ -636,9 +651,9 @@ static void sdhci_adma_table_pre(struct sdhci_host *host,
 
 		if (len) {
 			/* tran, valid */
-			sdhci_adma_write_desc(host, desc, addr, len,
-					      ADMA2_TRAN_VALID);
-			desc += host->desc_sz;
+			desc_sz = sdhci_adma_write_desc(host, desc, addr, len,
+							ADMA2_TRAN_VALID);
+			desc += desc_sz;
 		}
 
 		/*
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index d55fd7033e93..0aad0ee8f63b 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -605,6 +605,9 @@ struct sdhci_ops {
 	void    (*adma_workaround)(struct sdhci_host *host, u32 intmask);
 	void    (*card_event)(struct sdhci_host *host);
 	void	(*voltage_switch)(struct sdhci_host *host);
+	unsigned int	(*adma_write_desc)(struct sdhci_host *host, void *desc,
+					   dma_addr_t addr, int len,
+					   unsigned int cmd);
 };
 
 #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
@@ -735,6 +738,9 @@ void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios);
 int sdhci_start_signal_voltage_switch(struct mmc_host *mmc,
 				      struct mmc_ios *ios);
 void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable);
+unsigned int _sdhci_adma_write_desc(struct sdhci_host *host, void *desc,
+				    dma_addr_t addr, int len,
+				    unsigned int cmd);
 
 #ifdef CONFIG_PM
 int sdhci_suspend_host(struct sdhci_host *host);
-- 
2.18.0

[PATCH mmc-next v2 2/3] mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops

[Jisheng Zhang]

Add this hook so that it can be overridden with driver specific
implementations. We also rename the original sdhci_adma_write_desc()
to _sdhci_adma_write_desc() and export it, so that it could be reused
by driver's specific implementations.

Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
---
 drivers/mmc/host/sdhci.c | 31 +++++++++++++++++++++++--------
 drivers/mmc/host/sdhci.h |  6 ++++++
 2 files changed, 29 insertions(+), 8 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 14dd4a49e03b..50c846d99182 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -554,8 +554,8 @@ static void sdhci_kunmap_atomic(void *buffer, unsigned long *flags)
 	local_irq_restore(*flags);
 }
 
-static void sdhci_adma_write_desc(struct sdhci_host *host, void *desc,
-				  dma_addr_t addr, int len, unsigned cmd)
+unsigned int _sdhci_adma_write_desc(struct sdhci_host *host, void *desc,
+				    dma_addr_t addr, int len, unsigned int cmd)
 {
 	struct sdhci_adma2_64_desc *dma_desc = desc;
 
@@ -566,6 +566,19 @@ static void sdhci_adma_write_desc(struct sdhci_host *host, void *desc,
 
 	if (host->flags & SDHCI_USE_64_BIT_DMA)
 		dma_desc->addr_hi = cpu_to_le32((u64)addr >> 32);
+
+	return host->desc_sz;
+}
+EXPORT_SYMBOL_GPL(_sdhci_adma_write_desc);
+
+static unsigned int sdhci_adma_write_desc(struct sdhci_host *host, void *desc,
+					  dma_addr_t addr, int len,
+					  unsigned int cmd)
+{
+	if (host->ops->adma_write_desc)
+		return host->ops->adma_write_desc(host, desc, addr, len, cmd);
+
+	return _sdhci_adma_write_desc(host, desc, addr, len, cmd);
 }
 
 static void sdhci_adma_mark_end(void *desc)
@@ -585,6 +598,7 @@ static void sdhci_adma_table_pre(struct sdhci_host *host,
 	void *desc, *align;
 	char *buffer;
 	int len, offset, i;
+	unsigned int desc_sz;
 
 	/*
 	 * The spec does not specify endianness of descriptor table.
@@ -618,15 +632,16 @@ static void sdhci_adma_table_pre(struct sdhci_host *host,
 			}
 
 			/* tran, valid */
-			sdhci_adma_write_desc(host, desc, align_addr, offset,
-					      ADMA2_TRAN_VALID);
+			desc_sz = sdhci_adma_write_desc(host, desc,
+							align_addr, offset,
+							ADMA2_TRAN_VALID);
 
 			BUG_ON(offset > 65536);
 
 			align += SDHCI_ADMA2_ALIGN;
 			align_addr += SDHCI_ADMA2_ALIGN;
 
-			desc += host->desc_sz;
+			desc += desc_sz;
 
 			addr += offset;
 			len -= offset;
@@ -636,9 +651,9 @@ static void sdhci_adma_table_pre(struct sdhci_host *host,
 
 		if (len) {
 			/* tran, valid */
-			sdhci_adma_write_desc(host, desc, addr, len,
-					      ADMA2_TRAN_VALID);
-			desc += host->desc_sz;
+			desc_sz = sdhci_adma_write_desc(host, desc, addr, len,
+							ADMA2_TRAN_VALID);
+			desc += desc_sz;
 		}
 
 		/*
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index d55fd7033e93..0aad0ee8f63b 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -605,6 +605,9 @@ struct sdhci_ops {
 	void    (*adma_workaround)(struct sdhci_host *host, u32 intmask);
 	void    (*card_event)(struct sdhci_host *host);
 	void	(*voltage_switch)(struct sdhci_host *host);
+	unsigned int	(*adma_write_desc)(struct sdhci_host *host, void *desc,
+					   dma_addr_t addr, int len,
+					   unsigned int cmd);
 };
 
 #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
@@ -735,6 +738,9 @@ void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios);
 int sdhci_start_signal_voltage_switch(struct mmc_host *mmc,
 				      struct mmc_ios *ios);
 void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable);
+unsigned int _sdhci_adma_write_desc(struct sdhci_host *host, void *desc,
+				    dma_addr_t addr, int len,
+				    unsigned int cmd);
 
 #ifdef CONFIG_PM
 int sdhci_suspend_host(struct sdhci_host *host);
-- 
2.18.0

[PATCH mmc-next v2 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation

[Jisheng Zhang]

When using DMA, if the DMA addr spans 128MB boundary, we have to split
the DMA transfer into two so that each one doesn't exceed the boundary.

Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
---
 drivers/mmc/host/sdhci-of-dwcmshc.c | 42 +++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
index 1b7cd144fb01..7e189514bc83 100644
--- a/drivers/mmc/host/sdhci-of-dwcmshc.c
+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
@@ -8,21 +8,51 @@
  */
 
 #include <linux/clk.h>
+#include <linux/mm.h>
 #include <linux/module.h>
 #include <linux/of.h>
 
 #include "sdhci-pltfm.h"
 
+#define BOUNDARY_OK(addr, len) \
+	((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
+
 struct dwcmshc_priv {
 	struct clk	*bus_clk;
 };
 
+/*
+ * if DMA addr spans 128MB boundary, we split the DMA transfer into two
+ * so that the DMA transfer doesn't exceed the boundary.
+ */
+static unsigned int dwcmshc_adma_write_desc(struct sdhci_host *host,
+					    void *desc, dma_addr_t addr,
+					    int len, unsigned int cmd)
+{
+	int tmplen, offset;
+
+	if (BOUNDARY_OK(addr, len) || !len)
+		return _sdhci_adma_write_desc(host, desc, addr, len, cmd);
+
+	offset = addr & (SZ_128M - 1);
+	tmplen = SZ_128M - offset;
+	_sdhci_adma_write_desc(host, desc, addr, tmplen, cmd);
+
+	addr += tmplen;
+	len -= tmplen;
+	desc += host->desc_sz;
+	_sdhci_adma_write_desc(host, desc, addr, len, cmd);
+
+	return host->desc_sz * 2;
+}
+
 static const struct sdhci_ops sdhci_dwcmshc_ops = {
 	.set_clock		= sdhci_set_clock,
 	.set_bus_width		= sdhci_set_bus_width,
 	.set_uhs_signaling	= sdhci_set_uhs_signaling,
 	.get_max_clock		= sdhci_pltfm_clk_get_max_clock,
 	.reset			= sdhci_reset,
+	.adma_write_desc	= dwcmshc_adma_write_desc,
 };
 
 static const struct sdhci_pltfm_data sdhci_dwcmshc_pdata = {
@@ -36,12 +66,24 @@ static int dwcmshc_probe(struct platform_device *pdev)
 	struct sdhci_host *host;
 	struct dwcmshc_priv *priv;
 	int err;
+	u32 extra;
 
 	host = sdhci_pltfm_init(pdev, &sdhci_dwcmshc_pdata,
 				sizeof(struct dwcmshc_priv));
 	if (IS_ERR(host))
 		return PTR_ERR(host);
 
+	/*
+	 * The DMA descriptor table number is calculated as the maximum
+	 * number of segments times 2, to allow for an alignment
+	 * descriptor for each segment, plus 1 for a nop end descriptor,
+	 * plus extra number for cross 128M boundary handling.
+	 */
+	extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
+	if (extra > SDHCI_MAX_SEGS)
+		extra = SDHCI_MAX_SEGS;
+	host->adma_table_num = SDHCI_MAX_SEGS * 2 + 1 + extra;
+
 	pltfm_host = sdhci_priv(host);
 	priv = sdhci_pltfm_priv(pltfm_host);
 
-- 
2.18.0

[PATCH mmc-next v2 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation

[Jisheng Zhang]

When using DMA, if the DMA addr spans 128MB boundary, we have to split
the DMA transfer into two so that each one doesn't exceed the boundary.

Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
---
 drivers/mmc/host/sdhci-of-dwcmshc.c | 42 +++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
index 1b7cd144fb01..7e189514bc83 100644
--- a/drivers/mmc/host/sdhci-of-dwcmshc.c
+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
@@ -8,21 +8,51 @@
  */
 
 #include <linux/clk.h>
+#include <linux/mm.h>
 #include <linux/module.h>
 #include <linux/of.h>
 
 #include "sdhci-pltfm.h"
 
+#define BOUNDARY_OK(addr, len) \
+	((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
+
 struct dwcmshc_priv {
 	struct clk	*bus_clk;
 };
 
+/*
+ * if DMA addr spans 128MB boundary, we split the DMA transfer into two
+ * so that the DMA transfer doesn't exceed the boundary.
+ */
+static unsigned int dwcmshc_adma_write_desc(struct sdhci_host *host,
+					    void *desc, dma_addr_t addr,
+					    int len, unsigned int cmd)
+{
+	int tmplen, offset;
+
+	if (BOUNDARY_OK(addr, len) || !len)
+		return _sdhci_adma_write_desc(host, desc, addr, len, cmd);
+
+	offset = addr & (SZ_128M - 1);
+	tmplen = SZ_128M - offset;
+	_sdhci_adma_write_desc(host, desc, addr, tmplen, cmd);
+
+	addr += tmplen;
+	len -= tmplen;
+	desc += host->desc_sz;
+	_sdhci_adma_write_desc(host, desc, addr, len, cmd);
+
+	return host->desc_sz * 2;
+}
+
 static const struct sdhci_ops sdhci_dwcmshc_ops = {
 	.set_clock		= sdhci_set_clock,
 	.set_bus_width		= sdhci_set_bus_width,
 	.set_uhs_signaling	= sdhci_set_uhs_signaling,
 	.get_max_clock		= sdhci_pltfm_clk_get_max_clock,
 	.reset			= sdhci_reset,
+	.adma_write_desc	= dwcmshc_adma_write_desc,
 };
 
 static const struct sdhci_pltfm_data sdhci_dwcmshc_pdata = {
@@ -36,12 +66,24 @@ static int dwcmshc_probe(struct platform_device *pdev)
 	struct sdhci_host *host;
 	struct dwcmshc_priv *priv;
 	int err;
+	u32 extra;
 
 	host = sdhci_pltfm_init(pdev, &sdhci_dwcmshc_pdata,
 				sizeof(struct dwcmshc_priv));
 	if (IS_ERR(host))
 		return PTR_ERR(host);
 
+	/*
+	 * The DMA descriptor table number is calculated as the maximum
+	 * number of segments times 2, to allow for an alignment
+	 * descriptor for each segment, plus 1 for a nop end descriptor,
+	 * plus extra number for cross 128M boundary handling.
+	 */
+	extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
+	if (extra > SDHCI_MAX_SEGS)
+		extra = SDHCI_MAX_SEGS;
+	host->adma_table_num = SDHCI_MAX_SEGS * 2 + 1 + extra;
+
 	pltfm_host = sdhci_priv(host);
 	priv = sdhci_pltfm_priv(pltfm_host);
 
-- 
2.18.0

Re: [PATCH mmc-next v2 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation

[kbuild test robot]

[-- Attachment #1: Type: text/plain, Size: 6293 bytes --]

Hi Jisheng,

I love your patch! Yet something to improve:

[auto build test ERROR on ulf.hansson-mmc/next]
[also build test ERROR on next-20180727]
[cannot apply to v4.18-rc6]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Jisheng-Zhang/solve-SDHCI-DWC-MSHC-128MB-DMA-boundary-limitation/20180728-234650
base:   git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc.git next
config: x86_64-allmodconfig (attached as .config)
compiler: gcc-7 (Debian 7.3.0-16) 7.3.0
reproduce:
        # save the attached .config to linux build tree
        make ARCH=x86_64 

All error/warnings (new ones prefixed by >>):

   drivers/mmc/host/sdhci-of-dwcmshc.c: In function 'dwcmshc_adma_write_desc':
>> drivers/mmc/host/sdhci-of-dwcmshc.c:18:12: error: 'SZ_128M' undeclared (first use in this function)
     ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
               ^
>> drivers/mmc/host/sdhci-of-dwcmshc.c:34:6: note: in expansion of macro 'BOUNDARY_OK'
     if (BOUNDARY_OK(addr, len) || !len)
         ^~~~~~~~~~~
   drivers/mmc/host/sdhci-of-dwcmshc.c:18:12: note: each undeclared identifier is reported only once for each function it appears in
     ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
               ^
>> drivers/mmc/host/sdhci-of-dwcmshc.c:34:6: note: in expansion of macro 'BOUNDARY_OK'
     if (BOUNDARY_OK(addr, len) || !len)
         ^~~~~~~~~~~
   In file included from include/linux/cache.h:5:0,
                    from include/linux/printk.h:9,
                    from include/linux/kernel.h:14,
                    from include/linux/clk.h:16,
                    from drivers/mmc/host/sdhci-of-dwcmshc.c:10:
   drivers/mmc/host/sdhci-of-dwcmshc.c: In function 'dwcmshc_probe':
   drivers/mmc/host/sdhci-of-dwcmshc.c:82:39: error: 'SZ_128M' undeclared (first use in this function)
     extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
                                          ^
   include/uapi/linux/kernel.h:13:46: note: in definition of macro '__KERNEL_DIV_ROUND_UP'
    #define __KERNEL_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
                                                 ^
>> drivers/mmc/host/sdhci-of-dwcmshc.c:82:10: note: in expansion of macro 'DIV_ROUND_UP'
     extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
             ^~~~~~~~~~~~

vim +/SZ_128M +18 drivers/mmc/host/sdhci-of-dwcmshc.c

  > 10	#include <linux/clk.h>
    11	#include <linux/mm.h>
    12	#include <linux/module.h>
    13	#include <linux/of.h>
    14	
    15	#include "sdhci-pltfm.h"
    16	
    17	#define BOUNDARY_OK(addr, len) \
  > 18		((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
    19	
    20	struct dwcmshc_priv {
    21		struct clk	*bus_clk;
    22	};
    23	
    24	/*
    25	 * if DMA addr spans 128MB boundary, we split the DMA transfer into two
    26	 * so that the DMA transfer doesn't exceed the boundary.
    27	 */
    28	static unsigned int dwcmshc_adma_write_desc(struct sdhci_host *host,
    29						    void *desc, dma_addr_t addr,
    30						    int len, unsigned int cmd)
    31	{
    32		int tmplen, offset;
    33	
  > 34		if (BOUNDARY_OK(addr, len) || !len)
    35			return _sdhci_adma_write_desc(host, desc, addr, len, cmd);
    36	
    37		offset = addr & (SZ_128M - 1);
    38		tmplen = SZ_128M - offset;
    39		_sdhci_adma_write_desc(host, desc, addr, tmplen, cmd);
    40	
    41		addr += tmplen;
    42		len -= tmplen;
    43		desc += host->desc_sz;
    44		_sdhci_adma_write_desc(host, desc, addr, len, cmd);
    45	
    46		return host->desc_sz * 2;
    47	}
    48	
    49	static const struct sdhci_ops sdhci_dwcmshc_ops = {
    50		.set_clock		= sdhci_set_clock,
    51		.set_bus_width		= sdhci_set_bus_width,
    52		.set_uhs_signaling	= sdhci_set_uhs_signaling,
    53		.get_max_clock		= sdhci_pltfm_clk_get_max_clock,
    54		.reset			= sdhci_reset,
    55		.adma_write_desc	= dwcmshc_adma_write_desc,
    56	};
    57	
    58	static const struct sdhci_pltfm_data sdhci_dwcmshc_pdata = {
    59		.ops = &sdhci_dwcmshc_ops,
    60		.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
    61	};
    62	
    63	static int dwcmshc_probe(struct platform_device *pdev)
    64	{
    65		struct sdhci_pltfm_host *pltfm_host;
    66		struct sdhci_host *host;
    67		struct dwcmshc_priv *priv;
    68		int err;
    69		u32 extra;
    70	
    71		host = sdhci_pltfm_init(pdev, &sdhci_dwcmshc_pdata,
    72					sizeof(struct dwcmshc_priv));
    73		if (IS_ERR(host))
    74			return PTR_ERR(host);
    75	
    76		/*
    77		 * The DMA descriptor table number is calculated as the maximum
    78		 * number of segments times 2, to allow for an alignment
    79		 * descriptor for each segment, plus 1 for a nop end descriptor,
    80		 * plus extra number for cross 128M boundary handling.
    81		 */
  > 82		extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
    83		if (extra > SDHCI_MAX_SEGS)
    84			extra = SDHCI_MAX_SEGS;
    85		host->adma_table_num = SDHCI_MAX_SEGS * 2 + 1 + extra;
    86	
    87		pltfm_host = sdhci_priv(host);
    88		priv = sdhci_pltfm_priv(pltfm_host);
    89	
    90		pltfm_host->clk = devm_clk_get(&pdev->dev, "core");
    91		if (IS_ERR(pltfm_host->clk)) {
    92			err = PTR_ERR(pltfm_host->clk);
    93			dev_err(&pdev->dev, "failed to get core clk: %d\n", err);
    94			goto free_pltfm;
    95		}
    96		err = clk_prepare_enable(pltfm_host->clk);
    97		if (err)
    98			goto free_pltfm;
    99	
   100		priv->bus_clk = devm_clk_get(&pdev->dev, "bus");
   101		if (!IS_ERR(priv->bus_clk))
   102			clk_prepare_enable(priv->bus_clk);
   103	
   104		err = mmc_of_parse(host->mmc);
   105		if (err)
   106			goto err_clk;
   107	
   108		sdhci_get_of_property(pdev);
   109	
   110		err = sdhci_add_host(host);
   111		if (err)
   112			goto err_clk;
   113	
   114		return 0;
   115	
   116	err_clk:
   117		clk_disable_unprepare(pltfm_host->clk);
   118		clk_disable_unprepare(priv->bus_clk);
   119	free_pltfm:
   120		sdhci_pltfm_free(pdev);
   121		return err;
   122	}
   123	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 64628 bytes --]

[PATCH mmc-next v2 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation

[kbuild test robot]

Hi Jisheng,

I love your patch! Yet something to improve:

[auto build test ERROR on ulf.hansson-mmc/next]
[also build test ERROR on next-20180727]
[cannot apply to v4.18-rc6]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Jisheng-Zhang/solve-SDHCI-DWC-MSHC-128MB-DMA-boundary-limitation/20180728-234650
base:   git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc.git next
config: x86_64-allmodconfig (attached as .config)
compiler: gcc-7 (Debian 7.3.0-16) 7.3.0
reproduce:
        # save the attached .config to linux build tree
        make ARCH=x86_64 

All error/warnings (new ones prefixed by >>):

   drivers/mmc/host/sdhci-of-dwcmshc.c: In function 'dwcmshc_adma_write_desc':
>> drivers/mmc/host/sdhci-of-dwcmshc.c:18:12: error: 'SZ_128M' undeclared (first use in this function)
     ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
               ^
>> drivers/mmc/host/sdhci-of-dwcmshc.c:34:6: note: in expansion of macro 'BOUNDARY_OK'
     if (BOUNDARY_OK(addr, len) || !len)
         ^~~~~~~~~~~
   drivers/mmc/host/sdhci-of-dwcmshc.c:18:12: note: each undeclared identifier is reported only once for each function it appears in
     ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
               ^
>> drivers/mmc/host/sdhci-of-dwcmshc.c:34:6: note: in expansion of macro 'BOUNDARY_OK'
     if (BOUNDARY_OK(addr, len) || !len)
         ^~~~~~~~~~~
   In file included from include/linux/cache.h:5:0,
                    from include/linux/printk.h:9,
                    from include/linux/kernel.h:14,
                    from include/linux/clk.h:16,
                    from drivers/mmc/host/sdhci-of-dwcmshc.c:10:
   drivers/mmc/host/sdhci-of-dwcmshc.c: In function 'dwcmshc_probe':
   drivers/mmc/host/sdhci-of-dwcmshc.c:82:39: error: 'SZ_128M' undeclared (first use in this function)
     extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
                                          ^
   include/uapi/linux/kernel.h:13:46: note: in definition of macro '__KERNEL_DIV_ROUND_UP'
    #define __KERNEL_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
                                                 ^
>> drivers/mmc/host/sdhci-of-dwcmshc.c:82:10: note: in expansion of macro 'DIV_ROUND_UP'
     extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
             ^~~~~~~~~~~~

vim +/SZ_128M +18 drivers/mmc/host/sdhci-of-dwcmshc.c

  > 10	#include <linux/clk.h>
    11	#include <linux/mm.h>
    12	#include <linux/module.h>
    13	#include <linux/of.h>
    14	
    15	#include "sdhci-pltfm.h"
    16	
    17	#define BOUNDARY_OK(addr, len) \
  > 18		((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
    19	
    20	struct dwcmshc_priv {
    21		struct clk	*bus_clk;
    22	};
    23	
    24	/*
    25	 * if DMA addr spans 128MB boundary, we split the DMA transfer into two
    26	 * so that the DMA transfer doesn't exceed the boundary.
    27	 */
    28	static unsigned int dwcmshc_adma_write_desc(struct sdhci_host *host,
    29						    void *desc, dma_addr_t addr,
    30						    int len, unsigned int cmd)
    31	{
    32		int tmplen, offset;
    33	
  > 34		if (BOUNDARY_OK(addr, len) || !len)
    35			return _sdhci_adma_write_desc(host, desc, addr, len, cmd);
    36	
    37		offset = addr & (SZ_128M - 1);
    38		tmplen = SZ_128M - offset;
    39		_sdhci_adma_write_desc(host, desc, addr, tmplen, cmd);
    40	
    41		addr += tmplen;
    42		len -= tmplen;
    43		desc += host->desc_sz;
    44		_sdhci_adma_write_desc(host, desc, addr, len, cmd);
    45	
    46		return host->desc_sz * 2;
    47	}
    48	
    49	static const struct sdhci_ops sdhci_dwcmshc_ops = {
    50		.set_clock		= sdhci_set_clock,
    51		.set_bus_width		= sdhci_set_bus_width,
    52		.set_uhs_signaling	= sdhci_set_uhs_signaling,
    53		.get_max_clock		= sdhci_pltfm_clk_get_max_clock,
    54		.reset			= sdhci_reset,
    55		.adma_write_desc	= dwcmshc_adma_write_desc,
    56	};
    57	
    58	static const struct sdhci_pltfm_data sdhci_dwcmshc_pdata = {
    59		.ops = &sdhci_dwcmshc_ops,
    60		.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
    61	};
    62	
    63	static int dwcmshc_probe(struct platform_device *pdev)
    64	{
    65		struct sdhci_pltfm_host *pltfm_host;
    66		struct sdhci_host *host;
    67		struct dwcmshc_priv *priv;
    68		int err;
    69		u32 extra;
    70	
    71		host = sdhci_pltfm_init(pdev, &sdhci_dwcmshc_pdata,
    72					sizeof(struct dwcmshc_priv));
    73		if (IS_ERR(host))
    74			return PTR_ERR(host);
    75	
    76		/*
    77		 * The DMA descriptor table number is calculated as the maximum
    78		 * number of segments times 2, to allow for an alignment
    79		 * descriptor for each segment, plus 1 for a nop end descriptor,
    80		 * plus extra number for cross 128M boundary handling.
    81		 */
  > 82		extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
    83		if (extra > SDHCI_MAX_SEGS)
    84			extra = SDHCI_MAX_SEGS;
    85		host->adma_table_num = SDHCI_MAX_SEGS * 2 + 1 + extra;
    86	
    87		pltfm_host = sdhci_priv(host);
    88		priv = sdhci_pltfm_priv(pltfm_host);
    89	
    90		pltfm_host->clk = devm_clk_get(&pdev->dev, "core");
    91		if (IS_ERR(pltfm_host->clk)) {
    92			err = PTR_ERR(pltfm_host->clk);
    93			dev_err(&pdev->dev, "failed to get core clk: %d\n", err);
    94			goto free_pltfm;
    95		}
    96		err = clk_prepare_enable(pltfm_host->clk);
    97		if (err)
    98			goto free_pltfm;
    99	
   100		priv->bus_clk = devm_clk_get(&pdev->dev, "bus");
   101		if (!IS_ERR(priv->bus_clk))
   102			clk_prepare_enable(priv->bus_clk);
   103	
   104		err = mmc_of_parse(host->mmc);
   105		if (err)
   106			goto err_clk;
   107	
   108		sdhci_get_of_property(pdev);
   109	
   110		err = sdhci_add_host(host);
   111		if (err)
   112			goto err_clk;
   113	
   114		return 0;
   115	
   116	err_clk:
   117		clk_disable_unprepare(pltfm_host->clk);
   118		clk_disable_unprepare(priv->bus_clk);
   119	free_pltfm:
   120		sdhci_pltfm_free(pdev);
   121		return err;
   122	}
   123	

---
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https://lists.01.org/pipermail/kbuild-all                   Intel Corporation
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Re: [PATCH mmc-next v2 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation

[kbuild test robot]

[-- Attachment #1: Type: text/plain, Size: 3164 bytes --]

Hi Jisheng,

I love your patch! Yet something to improve:

[auto build test ERROR on ulf.hansson-mmc/next]
[also build test ERROR on next-20180727]
[cannot apply to v4.18-rc6]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Jisheng-Zhang/solve-SDHCI-DWC-MSHC-128MB-DMA-boundary-limitation/20180728-234650
base:   git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc.git next
config: mips-allmodconfig (attached as .config)
compiler: mips-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        GCC_VERSION=7.2.0 make.cross ARCH=mips 

All errors (new ones prefixed by >>):

   drivers/mmc/host/sdhci-of-dwcmshc.c: In function 'dwcmshc_adma_write_desc':
>> drivers/mmc/host/sdhci-of-dwcmshc.c:18:12: error: 'SZ_128M' undeclared (first use in this function); did you mean 'PM_128K'?
     ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
               ^
   drivers/mmc/host/sdhci-of-dwcmshc.c:34:6: note: in expansion of macro 'BOUNDARY_OK'
     if (BOUNDARY_OK(addr, len) || !len)
         ^~~~~~~~~~~
   drivers/mmc/host/sdhci-of-dwcmshc.c:18:12: note: each undeclared identifier is reported only once for each function it appears in
     ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
               ^
   drivers/mmc/host/sdhci-of-dwcmshc.c:34:6: note: in expansion of macro 'BOUNDARY_OK'
     if (BOUNDARY_OK(addr, len) || !len)
         ^~~~~~~~~~~
   In file included from include/linux/cache.h:5:0,
                    from arch/mips/include/asm/cpu-info.h:15,
                    from arch/mips/include/asm/cpu-features.h:13,
                    from arch/mips/include/asm/bitops.h:21,
                    from include/linux/bitops.h:38,
                    from include/linux/kernel.h:11,
                    from include/linux/clk.h:16,
                    from drivers/mmc/host/sdhci-of-dwcmshc.c:10:
   drivers/mmc/host/sdhci-of-dwcmshc.c: In function 'dwcmshc_probe':
   drivers/mmc/host/sdhci-of-dwcmshc.c:82:39: error: 'SZ_128M' undeclared (first use in this function); did you mean 'PM_128K'?
     extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
                                          ^
   include/uapi/linux/kernel.h:13:46: note: in definition of macro '__KERNEL_DIV_ROUND_UP'
    #define __KERNEL_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
                                                 ^
   drivers/mmc/host/sdhci-of-dwcmshc.c:82:10: note: in expansion of macro 'DIV_ROUND_UP'
     extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
             ^~~~~~~~~~~~

vim +18 drivers/mmc/host/sdhci-of-dwcmshc.c

    16	
    17	#define BOUNDARY_OK(addr, len) \
  > 18		((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
    19	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 56337 bytes --]

[PATCH mmc-next v2 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation

[kbuild test robot]

Hi Jisheng,

I love your patch! Yet something to improve:

[auto build test ERROR on ulf.hansson-mmc/next]
[also build test ERROR on next-20180727]
[cannot apply to v4.18-rc6]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Jisheng-Zhang/solve-SDHCI-DWC-MSHC-128MB-DMA-boundary-limitation/20180728-234650
base:   git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc.git next
config: mips-allmodconfig (attached as .config)
compiler: mips-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        GCC_VERSION=7.2.0 make.cross ARCH=mips 

All errors (new ones prefixed by >>):

   drivers/mmc/host/sdhci-of-dwcmshc.c: In function 'dwcmshc_adma_write_desc':
>> drivers/mmc/host/sdhci-of-dwcmshc.c:18:12: error: 'SZ_128M' undeclared (first use in this function); did you mean 'PM_128K'?
     ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
               ^
   drivers/mmc/host/sdhci-of-dwcmshc.c:34:6: note: in expansion of macro 'BOUNDARY_OK'
     if (BOUNDARY_OK(addr, len) || !len)
         ^~~~~~~~~~~
   drivers/mmc/host/sdhci-of-dwcmshc.c:18:12: note: each undeclared identifier is reported only once for each function it appears in
     ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
               ^
   drivers/mmc/host/sdhci-of-dwcmshc.c:34:6: note: in expansion of macro 'BOUNDARY_OK'
     if (BOUNDARY_OK(addr, len) || !len)
         ^~~~~~~~~~~
   In file included from include/linux/cache.h:5:0,
                    from arch/mips/include/asm/cpu-info.h:15,
                    from arch/mips/include/asm/cpu-features.h:13,
                    from arch/mips/include/asm/bitops.h:21,
                    from include/linux/bitops.h:38,
                    from include/linux/kernel.h:11,
                    from include/linux/clk.h:16,
                    from drivers/mmc/host/sdhci-of-dwcmshc.c:10:
   drivers/mmc/host/sdhci-of-dwcmshc.c: In function 'dwcmshc_probe':
   drivers/mmc/host/sdhci-of-dwcmshc.c:82:39: error: 'SZ_128M' undeclared (first use in this function); did you mean 'PM_128K'?
     extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
                                          ^
   include/uapi/linux/kernel.h:13:46: note: in definition of macro '__KERNEL_DIV_ROUND_UP'
    #define __KERNEL_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
                                                 ^
   drivers/mmc/host/sdhci-of-dwcmshc.c:82:10: note: in expansion of macro 'DIV_ROUND_UP'
     extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
             ^~~~~~~~~~~~

vim +18 drivers/mmc/host/sdhci-of-dwcmshc.c

    16	
    17	#define BOUNDARY_OK(addr, len) \
  > 18		((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
    19	

---
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Re: [PATCH mmc-next v2 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation

[Robin Murphy]

Hi Jisheng,

On 26/07/18 08:14, Jisheng Zhang wrote:
> When using DMA, if the DMA addr spans 128MB boundary, we have to split
> the DMA transfer into two so that each one doesn't exceed the boundary.

Out of interest, is the driver already setting its segment boundary mask 
appropriately? This sounds like the exact kind of hardware restriction 
that dma_parms is intended to describe, which scatterlist-generating 
code is *supposed* to already respect.

Robin.

> Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
> ---
>   drivers/mmc/host/sdhci-of-dwcmshc.c | 42 +++++++++++++++++++++++++++++
>   1 file changed, 42 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
> index 1b7cd144fb01..7e189514bc83 100644
> --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> @@ -8,21 +8,51 @@
>    */
>   
>   #include <linux/clk.h>
> +#include <linux/mm.h>
>   #include <linux/module.h>
>   #include <linux/of.h>
>   
>   #include "sdhci-pltfm.h"
>   
> +#define BOUNDARY_OK(addr, len) \
> +	((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
> +
>   struct dwcmshc_priv {
>   	struct clk	*bus_clk;
>   };
>   
> +/*
> + * if DMA addr spans 128MB boundary, we split the DMA transfer into two
> + * so that the DMA transfer doesn't exceed the boundary.
> + */
> +static unsigned int dwcmshc_adma_write_desc(struct sdhci_host *host,
> +					    void *desc, dma_addr_t addr,
> +					    int len, unsigned int cmd)
> +{
> +	int tmplen, offset;
> +
> +	if (BOUNDARY_OK(addr, len) || !len)
> +		return _sdhci_adma_write_desc(host, desc, addr, len, cmd);
> +
> +	offset = addr & (SZ_128M - 1);
> +	tmplen = SZ_128M - offset;
> +	_sdhci_adma_write_desc(host, desc, addr, tmplen, cmd);
> +
> +	addr += tmplen;
> +	len -= tmplen;
> +	desc += host->desc_sz;
> +	_sdhci_adma_write_desc(host, desc, addr, len, cmd);
> +
> +	return host->desc_sz * 2;
> +}
> +
>   static const struct sdhci_ops sdhci_dwcmshc_ops = {
>   	.set_clock		= sdhci_set_clock,
>   	.set_bus_width		= sdhci_set_bus_width,
>   	.set_uhs_signaling	= sdhci_set_uhs_signaling,
>   	.get_max_clock		= sdhci_pltfm_clk_get_max_clock,
>   	.reset			= sdhci_reset,
> +	.adma_write_desc	= dwcmshc_adma_write_desc,
>   };
>   
>   static const struct sdhci_pltfm_data sdhci_dwcmshc_pdata = {
> @@ -36,12 +66,24 @@ static int dwcmshc_probe(struct platform_device *pdev)
>   	struct sdhci_host *host;
>   	struct dwcmshc_priv *priv;
>   	int err;
> +	u32 extra;
>   
>   	host = sdhci_pltfm_init(pdev, &sdhci_dwcmshc_pdata,
>   				sizeof(struct dwcmshc_priv));
>   	if (IS_ERR(host))
>   		return PTR_ERR(host);
>   
> +	/*
> +	 * The DMA descriptor table number is calculated as the maximum
> +	 * number of segments times 2, to allow for an alignment
> +	 * descriptor for each segment, plus 1 for a nop end descriptor,
> +	 * plus extra number for cross 128M boundary handling.
> +	 */
> +	extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
> +	if (extra > SDHCI_MAX_SEGS)
> +		extra = SDHCI_MAX_SEGS;
> +	host->adma_table_num = SDHCI_MAX_SEGS * 2 + 1 + extra;
> +
>   	pltfm_host = sdhci_priv(host);
>   	priv = sdhci_pltfm_priv(pltfm_host);
>   
> 

[PATCH mmc-next v2 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation

[Robin Murphy]

Hi Jisheng,

On 26/07/18 08:14, Jisheng Zhang wrote:
> When using DMA, if the DMA addr spans 128MB boundary, we have to split
> the DMA transfer into two so that each one doesn't exceed the boundary.

Out of interest, is the driver already setting its segment boundary mask 
appropriately? This sounds like the exact kind of hardware restriction 
that dma_parms is intended to describe, which scatterlist-generating 
code is *supposed* to already respect.

Robin.

> Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
> ---
>   drivers/mmc/host/sdhci-of-dwcmshc.c | 42 +++++++++++++++++++++++++++++
>   1 file changed, 42 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
> index 1b7cd144fb01..7e189514bc83 100644
> --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> @@ -8,21 +8,51 @@
>    */
>   
>   #include <linux/clk.h>
> +#include <linux/mm.h>
>   #include <linux/module.h>
>   #include <linux/of.h>
>   
>   #include "sdhci-pltfm.h"
>   
> +#define BOUNDARY_OK(addr, len) \
> +	((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
> +
>   struct dwcmshc_priv {
>   	struct clk	*bus_clk;
>   };
>   
> +/*
> + * if DMA addr spans 128MB boundary, we split the DMA transfer into two
> + * so that the DMA transfer doesn't exceed the boundary.
> + */
> +static unsigned int dwcmshc_adma_write_desc(struct sdhci_host *host,
> +					    void *desc, dma_addr_t addr,
> +					    int len, unsigned int cmd)
> +{
> +	int tmplen, offset;
> +
> +	if (BOUNDARY_OK(addr, len) || !len)
> +		return _sdhci_adma_write_desc(host, desc, addr, len, cmd);
> +
> +	offset = addr & (SZ_128M - 1);
> +	tmplen = SZ_128M - offset;
> +	_sdhci_adma_write_desc(host, desc, addr, tmplen, cmd);
> +
> +	addr += tmplen;
> +	len -= tmplen;
> +	desc += host->desc_sz;
> +	_sdhci_adma_write_desc(host, desc, addr, len, cmd);
> +
> +	return host->desc_sz * 2;
> +}
> +
>   static const struct sdhci_ops sdhci_dwcmshc_ops = {
>   	.set_clock		= sdhci_set_clock,
>   	.set_bus_width		= sdhci_set_bus_width,
>   	.set_uhs_signaling	= sdhci_set_uhs_signaling,
>   	.get_max_clock		= sdhci_pltfm_clk_get_max_clock,
>   	.reset			= sdhci_reset,
> +	.adma_write_desc	= dwcmshc_adma_write_desc,
>   };
>   
>   static const struct sdhci_pltfm_data sdhci_dwcmshc_pdata = {
> @@ -36,12 +66,24 @@ static int dwcmshc_probe(struct platform_device *pdev)
>   	struct sdhci_host *host;
>   	struct dwcmshc_priv *priv;
>   	int err;
> +	u32 extra;
>   
>   	host = sdhci_pltfm_init(pdev, &sdhci_dwcmshc_pdata,
>   				sizeof(struct dwcmshc_priv));
>   	if (IS_ERR(host))
>   		return PTR_ERR(host);
>   
> +	/*
> +	 * The DMA descriptor table number is calculated as the maximum
> +	 * number of segments times 2, to allow for an alignment
> +	 * descriptor for each segment, plus 1 for a nop end descriptor,
> +	 * plus extra number for cross 128M boundary handling.
> +	 */
> +	extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
> +	if (extra > SDHCI_MAX_SEGS)
> +		extra = SDHCI_MAX_SEGS;
> +	host->adma_table_num = SDHCI_MAX_SEGS * 2 + 1 + extra;
> +
>   	pltfm_host = sdhci_priv(host);
>   	priv = sdhci_pltfm_priv(pltfm_host);
>   
> 

Re: [PATCH mmc-next v2 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation

[Jisheng Zhang]

Hi Robin,

On Mon, 30 Jul 2018 12:06:08 +0100 Robin Murphy wrote:

> Hi Jisheng,
> 
> On 26/07/18 08:14, Jisheng Zhang wrote:
> > When using DMA, if the DMA addr spans 128MB boundary, we have to split
> > the DMA transfer into two so that each one doesn't exceed the boundary.  
> 
> Out of interest, is the driver already setting its segment boundary mask 
> appropriately? This sounds like the exact kind of hardware restriction 
> that dma_parms is intended to describe, which scatterlist-generating 
> code is *supposed* to already respect.

Thanks for the nice input. It may provide an elegant solution for this
limitation. 

To simplify the situation, let's assume no iommu, only swiotlb. And
the DDR is less than 4GB so swiotlb on arm64 doesn't init.

There's no dma range limitation with the HW, the only limitation
is boundary, while dma_capable() doesn't check the boundary mask, so if
we taking this solution, we need to teach dma_capable() about the boundary
mask, I'm not sure whether this is acceptable.

Another problem is swiotlb initialization. When to init swiotlb, we dunno
there's such boundary limitation HW. Is there any elegant solution for
this problem?

Thanks

> 
> Robin.
> 
> > Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
> > ---
> >   drivers/mmc/host/sdhci-of-dwcmshc.c | 42 +++++++++++++++++++++++++++++
> >   1 file changed, 42 insertions(+)
> > 
> > diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
> > index 1b7cd144fb01..7e189514bc83 100644
> > --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> > +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> > @@ -8,21 +8,51 @@
> >    */
> >   
> >   #include <linux/clk.h>
> > +#include <linux/mm.h>
> >   #include <linux/module.h>
> >   #include <linux/of.h>
> >   
> >   #include "sdhci-pltfm.h"
> >   
> > +#define BOUNDARY_OK(addr, len) \
> > +	((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
> > +
> >   struct dwcmshc_priv {
> >   	struct clk	*bus_clk;
> >   };
> >   
> > +/*
> > + * if DMA addr spans 128MB boundary, we split the DMA transfer into two
> > + * so that the DMA transfer doesn't exceed the boundary.
> > + */
> > +static unsigned int dwcmshc_adma_write_desc(struct sdhci_host *host,
> > +					    void *desc, dma_addr_t addr,
> > +					    int len, unsigned int cmd)
> > +{
> > +	int tmplen, offset;
> > +
> > +	if (BOUNDARY_OK(addr, len) || !len)
> > +		return _sdhci_adma_write_desc(host, desc, addr, len, cmd);
> > +
> > +	offset = addr & (SZ_128M - 1);
> > +	tmplen = SZ_128M - offset;
> > +	_sdhci_adma_write_desc(host, desc, addr, tmplen, cmd);
> > +
> > +	addr += tmplen;
> > +	len -= tmplen;
> > +	desc += host->desc_sz;
> > +	_sdhci_adma_write_desc(host, desc, addr, len, cmd);
> > +
> > +	return host->desc_sz * 2;
> > +}
> > +
> >   static const struct sdhci_ops sdhci_dwcmshc_ops = {
> >   	.set_clock		= sdhci_set_clock,
> >   	.set_bus_width		= sdhci_set_bus_width,
> >   	.set_uhs_signaling	= sdhci_set_uhs_signaling,
> >   	.get_max_clock		= sdhci_pltfm_clk_get_max_clock,
> >   	.reset			= sdhci_reset,
> > +	.adma_write_desc	= dwcmshc_adma_write_desc,
> >   };
> >   
> >   static const struct sdhci_pltfm_data sdhci_dwcmshc_pdata = {
> > @@ -36,12 +66,24 @@ static int dwcmshc_probe(struct platform_device *pdev)
> >   	struct sdhci_host *host;
> >   	struct dwcmshc_priv *priv;
> >   	int err;
> > +	u32 extra;
> >   
> >   	host = sdhci_pltfm_init(pdev, &sdhci_dwcmshc_pdata,
> >   				sizeof(struct dwcmshc_priv));
> >   	if (IS_ERR(host))
> >   		return PTR_ERR(host);
> >   
> > +	/*
> > +	 * The DMA descriptor table number is calculated as the maximum
> > +	 * number of segments times 2, to allow for an alignment
> > +	 * descriptor for each segment, plus 1 for a nop end descriptor,
> > +	 * plus extra number for cross 128M boundary handling.
> > +	 */
> > +	extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
> > +	if (extra > SDHCI_MAX_SEGS)
> > +		extra = SDHCI_MAX_SEGS;
> > +	host->adma_table_num = SDHCI_MAX_SEGS * 2 + 1 + extra;
> > +
> >   	pltfm_host = sdhci_priv(host);
> >   	priv = sdhci_pltfm_priv(pltfm_host);
> >   
> >   

Re: [PATCH mmc-next v2 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation

[Jisheng Zhang]

Hi Robin,

On Mon, 30 Jul 2018 12:06:08 +0100 Robin Murphy wrote:

> Hi Jisheng,
> 
> On 26/07/18 08:14, Jisheng Zhang wrote:
> > When using DMA, if the DMA addr spans 128MB boundary, we have to split
> > the DMA transfer into two so that each one doesn't exceed the boundary.  
> 
> Out of interest, is the driver already setting its segment boundary mask 
> appropriately? This sounds like the exact kind of hardware restriction 
> that dma_parms is intended to describe, which scatterlist-generating 
> code is *supposed* to already respect.

Thanks for the nice input. It may provide an elegant solution for this
limitation. 

To simplify the situation, let's assume no iommu, only swiotlb. And
the DDR is less than 4GB so swiotlb on arm64 doesn't init.

There's no dma range limitation with the HW, the only limitation
is boundary, while dma_capable() doesn't check the boundary mask, so if
we taking this solution, we need to teach dma_capable() about the boundary
mask, I'm not sure whether this is acceptable.

Another problem is swiotlb initialization. When to init swiotlb, we dunno
there's such boundary limitation HW. Is there any elegant solution for
this problem?

Thanks

> 
> Robin.
> 
> > Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
> > ---
> >   drivers/mmc/host/sdhci-of-dwcmshc.c | 42 +++++++++++++++++++++++++++++
> >   1 file changed, 42 insertions(+)
> > 
> > diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
> > index 1b7cd144fb01..7e189514bc83 100644
> > --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> > +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> > @@ -8,21 +8,51 @@
> >    */
> >   
> >   #include <linux/clk.h>
> > +#include <linux/mm.h>
> >   #include <linux/module.h>
> >   #include <linux/of.h>
> >   
> >   #include "sdhci-pltfm.h"
> >   
> > +#define BOUNDARY_OK(addr, len) \
> > +	((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
> > +
> >   struct dwcmshc_priv {
> >   	struct clk	*bus_clk;
> >   };
> >   
> > +/*
> > + * if DMA addr spans 128MB boundary, we split the DMA transfer into two
> > + * so that the DMA transfer doesn't exceed the boundary.
> > + */
> > +static unsigned int dwcmshc_adma_write_desc(struct sdhci_host *host,
> > +					    void *desc, dma_addr_t addr,
> > +					    int len, unsigned int cmd)
> > +{
> > +	int tmplen, offset;
> > +
> > +	if (BOUNDARY_OK(addr, len) || !len)
> > +		return _sdhci_adma_write_desc(host, desc, addr, len, cmd);
> > +
> > +	offset = addr & (SZ_128M - 1);
> > +	tmplen = SZ_128M - offset;
> > +	_sdhci_adma_write_desc(host, desc, addr, tmplen, cmd);
> > +
> > +	addr += tmplen;
> > +	len -= tmplen;
> > +	desc += host->desc_sz;
> > +	_sdhci_adma_write_desc(host, desc, addr, len, cmd);
> > +
> > +	return host->desc_sz * 2;
> > +}
> > +
> >   static const struct sdhci_ops sdhci_dwcmshc_ops = {
> >   	.set_clock		= sdhci_set_clock,
> >   	.set_bus_width		= sdhci_set_bus_width,
> >   	.set_uhs_signaling	= sdhci_set_uhs_signaling,
> >   	.get_max_clock		= sdhci_pltfm_clk_get_max_clock,
> >   	.reset			= sdhci_reset,
> > +	.adma_write_desc	= dwcmshc_adma_write_desc,
> >   };
> >   
> >   static const struct sdhci_pltfm_data sdhci_dwcmshc_pdata = {
> > @@ -36,12 +66,24 @@ static int dwcmshc_probe(struct platform_device *pdev)
> >   	struct sdhci_host *host;
> >   	struct dwcmshc_priv *priv;
> >   	int err;
> > +	u32 extra;
> >   
> >   	host = sdhci_pltfm_init(pdev, &sdhci_dwcmshc_pdata,
> >   				sizeof(struct dwcmshc_priv));
> >   	if (IS_ERR(host))
> >   		return PTR_ERR(host);
> >   
> > +	/*
> > +	 * The DMA descriptor table number is calculated as the maximum
> > +	 * number of segments times 2, to allow for an alignment
> > +	 * descriptor for each segment, plus 1 for a nop end descriptor,
> > +	 * plus extra number for cross 128M boundary handling.
> > +	 */
> > +	extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
> > +	if (extra > SDHCI_MAX_SEGS)
> > +		extra = SDHCI_MAX_SEGS;
> > +	host->adma_table_num = SDHCI_MAX_SEGS * 2 + 1 + extra;
> > +
> >   	pltfm_host = sdhci_priv(host);
> >   	priv = sdhci_pltfm_priv(pltfm_host);
> >   
> >   

[PATCH mmc-next v2 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation

[Jisheng Zhang]

Hi Robin,

On Mon, 30 Jul 2018 12:06:08 +0100 Robin Murphy wrote:

> Hi Jisheng,
> 
> On 26/07/18 08:14, Jisheng Zhang wrote:
> > When using DMA, if the DMA addr spans 128MB boundary, we have to split
> > the DMA transfer into two so that each one doesn't exceed the boundary.  
> 
> Out of interest, is the driver already setting its segment boundary mask 
> appropriately? This sounds like the exact kind of hardware restriction 
> that dma_parms is intended to describe, which scatterlist-generating 
> code is *supposed* to already respect.

Thanks for the nice input. It may provide an elegant solution for this
limitation. 

To simplify the situation, let's assume no iommu, only swiotlb. And
the DDR is less than 4GB so swiotlb on arm64 doesn't init.

There's no dma range limitation with the HW, the only limitation
is boundary, while dma_capable() doesn't check the boundary mask, so if
we taking this solution, we need to teach dma_capable() about the boundary
mask, I'm not sure whether this is acceptable.

Another problem is swiotlb initialization. When to init swiotlb, we dunno
there's such boundary limitation HW. Is there any elegant solution for
this problem?

Thanks

> 
> Robin.
> 
> > Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
> > ---
> >   drivers/mmc/host/sdhci-of-dwcmshc.c | 42 +++++++++++++++++++++++++++++
> >   1 file changed, 42 insertions(+)
> > 
> > diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
> > index 1b7cd144fb01..7e189514bc83 100644
> > --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> > +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> > @@ -8,21 +8,51 @@
> >    */
> >   
> >   #include <linux/clk.h>
> > +#include <linux/mm.h>
> >   #include <linux/module.h>
> >   #include <linux/of.h>
> >   
> >   #include "sdhci-pltfm.h"
> >   
> > +#define BOUNDARY_OK(addr, len) \
> > +	((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
> > +
> >   struct dwcmshc_priv {
> >   	struct clk	*bus_clk;
> >   };
> >   
> > +/*
> > + * if DMA addr spans 128MB boundary, we split the DMA transfer into two
> > + * so that the DMA transfer doesn't exceed the boundary.
> > + */
> > +static unsigned int dwcmshc_adma_write_desc(struct sdhci_host *host,
> > +					    void *desc, dma_addr_t addr,
> > +					    int len, unsigned int cmd)
> > +{
> > +	int tmplen, offset;
> > +
> > +	if (BOUNDARY_OK(addr, len) || !len)
> > +		return _sdhci_adma_write_desc(host, desc, addr, len, cmd);
> > +
> > +	offset = addr & (SZ_128M - 1);
> > +	tmplen = SZ_128M - offset;
> > +	_sdhci_adma_write_desc(host, desc, addr, tmplen, cmd);
> > +
> > +	addr += tmplen;
> > +	len -= tmplen;
> > +	desc += host->desc_sz;
> > +	_sdhci_adma_write_desc(host, desc, addr, len, cmd);
> > +
> > +	return host->desc_sz * 2;
> > +}
> > +
> >   static const struct sdhci_ops sdhci_dwcmshc_ops = {
> >   	.set_clock		= sdhci_set_clock,
> >   	.set_bus_width		= sdhci_set_bus_width,
> >   	.set_uhs_signaling	= sdhci_set_uhs_signaling,
> >   	.get_max_clock		= sdhci_pltfm_clk_get_max_clock,
> >   	.reset			= sdhci_reset,
> > +	.adma_write_desc	= dwcmshc_adma_write_desc,
> >   };
> >   
> >   static const struct sdhci_pltfm_data sdhci_dwcmshc_pdata = {
> > @@ -36,12 +66,24 @@ static int dwcmshc_probe(struct platform_device *pdev)
> >   	struct sdhci_host *host;
> >   	struct dwcmshc_priv *priv;
> >   	int err;
> > +	u32 extra;
> >   
> >   	host = sdhci_pltfm_init(pdev, &sdhci_dwcmshc_pdata,
> >   				sizeof(struct dwcmshc_priv));
> >   	if (IS_ERR(host))
> >   		return PTR_ERR(host);
> >   
> > +	/*
> > +	 * The DMA descriptor table number is calculated as the maximum
> > +	 * number of segments times 2, to allow for an alignment
> > +	 * descriptor for each segment, plus 1 for a nop end descriptor,
> > +	 * plus extra number for cross 128M boundary handling.
> > +	 */
> > +	extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
> > +	if (extra > SDHCI_MAX_SEGS)
> > +		extra = SDHCI_MAX_SEGS;
> > +	host->adma_table_num = SDHCI_MAX_SEGS * 2 + 1 + extra;
> > +
> >   	pltfm_host = sdhci_priv(host);
> >   	priv = sdhci_pltfm_priv(pltfm_host);
> >   
> >   

Re: [PATCH mmc-next v2 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation

[Jisheng Zhang]

On Tue, 31 Jul 2018 11:29:24 +0800
Jisheng Zhang <Jisheng.Zhang@synaptics.com> wrote:

> Hi Robin,
> 
> On Mon, 30 Jul 2018 12:06:08 +0100 Robin Murphy wrote:
> 
> > Hi Jisheng,
> > 
> > On 26/07/18 08:14, Jisheng Zhang wrote:  
> > > When using DMA, if the DMA addr spans 128MB boundary, we have to split
> > > the DMA transfer into two so that each one doesn't exceed the boundary.    
> > 
> > Out of interest, is the driver already setting its segment boundary mask 
> > appropriately? This sounds like the exact kind of hardware restriction 
> > that dma_parms is intended to describe, which scatterlist-generating 
> > code is *supposed* to already respect.  
> 
> Thanks for the nice input. It may provide an elegant solution for this
> limitation. 
> 
> To simplify the situation, let's assume no iommu, only swiotlb. And
> the DDR is less than 4GB so swiotlb on arm64 doesn't init.
> 
> There's no dma range limitation with the HW, the only limitation
> is boundary, while dma_capable() doesn't check the boundary mask, so if
> we taking this solution, we need to teach dma_capable() about the boundary
> mask, I'm not sure whether this is acceptable.
> 
> Another problem is swiotlb initialization. When to init swiotlb, we dunno
> there's such boundary limitation HW. Is there any elegant solution for
> this problem?
> 

One more problem is: swiotlb isn't available on all platforms, e.g arm?
How to solve this SDHCI HW's limitation on arm soc w/o iommu?

Thanks

Re: [PATCH mmc-next v2 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation

[Jisheng Zhang]

On Tue, 31 Jul 2018 11:29:24 +0800
Jisheng Zhang <Jisheng.Zhang@synaptics.com> wrote:

> Hi Robin,
> 
> On Mon, 30 Jul 2018 12:06:08 +0100 Robin Murphy wrote:
> 
> > Hi Jisheng,
> > 
> > On 26/07/18 08:14, Jisheng Zhang wrote:  
> > > When using DMA, if the DMA addr spans 128MB boundary, we have to split
> > > the DMA transfer into two so that each one doesn't exceed the boundary.    
> > 
> > Out of interest, is the driver already setting its segment boundary mask 
> > appropriately? This sounds like the exact kind of hardware restriction 
> > that dma_parms is intended to describe, which scatterlist-generating 
> > code is *supposed* to already respect.  
> 
> Thanks for the nice input. It may provide an elegant solution for this
> limitation. 
> 
> To simplify the situation, let's assume no iommu, only swiotlb. And
> the DDR is less than 4GB so swiotlb on arm64 doesn't init.
> 
> There's no dma range limitation with the HW, the only limitation
> is boundary, while dma_capable() doesn't check the boundary mask, so if
> we taking this solution, we need to teach dma_capable() about the boundary
> mask, I'm not sure whether this is acceptable.
> 
> Another problem is swiotlb initialization. When to init swiotlb, we dunno
> there's such boundary limitation HW. Is there any elegant solution for
> this problem?
> 

One more problem is: swiotlb isn't available on all platforms, e.g arm?
How to solve this SDHCI HW's limitation on arm soc w/o iommu?

Thanks

[PATCH mmc-next v2 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation

[Jisheng Zhang]

On Tue, 31 Jul 2018 11:29:24 +0800
Jisheng Zhang <Jisheng.Zhang@synaptics.com> wrote:

> Hi Robin,
> 
> On Mon, 30 Jul 2018 12:06:08 +0100 Robin Murphy wrote:
> 
> > Hi Jisheng,
> > 
> > On 26/07/18 08:14, Jisheng Zhang wrote:  
> > > When using DMA, if the DMA addr spans 128MB boundary, we have to split
> > > the DMA transfer into two so that each one doesn't exceed the boundary.    
> > 
> > Out of interest, is the driver already setting its segment boundary mask 
> > appropriately? This sounds like the exact kind of hardware restriction 
> > that dma_parms is intended to describe, which scatterlist-generating 
> > code is *supposed* to already respect.  
> 
> Thanks for the nice input. It may provide an elegant solution for this
> limitation. 
> 
> To simplify the situation, let's assume no iommu, only swiotlb. And
> the DDR is less than 4GB so swiotlb on arm64 doesn't init.
> 
> There's no dma range limitation with the HW, the only limitation
> is boundary, while dma_capable() doesn't check the boundary mask, so if
> we taking this solution, we need to teach dma_capable() about the boundary
> mask, I'm not sure whether this is acceptable.
> 
> Another problem is swiotlb initialization. When to init swiotlb, we dunno
> there's such boundary limitation HW. Is there any elegant solution for
> this problem?
> 

One more problem is: swiotlb isn't available on all platforms, e.g arm?
How to solve this SDHCI HW's limitation on arm soc w/o iommu?

Thanks