* [PATCH] drm/i915/psr: Limit psr2 to skl+
@ 2018-07-26 6:02 vathsala nagaraju
2018-07-26 6:32 ` ✗ Fi.CI.BAT: failure for " Patchwork
2018-07-26 6:47 ` [PATCH] " Dhinakaran Pandiyan
0 siblings, 2 replies; 4+ messages in thread
From: vathsala nagaraju @ 2018-07-26 6:02 UTC (permalink / raw)
To: dhinakaran.pandiyan; +Cc: intel-gfx
From: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
PSR2 is supported from skl+.
So Limiting it to skl+.
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
---
drivers/gpu/drm/i915/intel_psr.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 4bd5768..cbbdfd2 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -387,7 +387,7 @@ static void hsw_activate_psr1(struct intel_dp *intel_dp)
I915_WRITE(EDP_PSR_CTL, val);
}
-static void hsw_activate_psr2(struct intel_dp *intel_dp)
+static void skl_activate_psr2(struct intel_dp *intel_dp)
{
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
struct drm_device *dev = dig_port->base.base.dev;
@@ -516,7 +516,9 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
}
crtc_state->has_psr = true;
- crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp, crtc_state);
+ if (INTEL_GEN(dev_priv) >= 9)
+ crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp,
+ crtc_state);
DRM_DEBUG_KMS("Enabling PSR%s\n", crtc_state->has_psr2 ? "2" : "");
}
@@ -534,7 +536,7 @@ static void intel_psr_activate(struct intel_dp *intel_dp)
/* psr1 and psr2 are mutually exclusive.*/
if (dev_priv->psr.psr2_enabled)
- hsw_activate_psr2(intel_dp);
+ skl_activate_psr2(intel_dp);
else
hsw_activate_psr1(intel_dp);
--
1.9.1
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915/psr: Limit psr2 to skl+
2018-07-26 6:02 [PATCH] drm/i915/psr: Limit psr2 to skl+ vathsala nagaraju
@ 2018-07-26 6:32 ` Patchwork
2018-07-26 6:47 ` [PATCH] " Dhinakaran Pandiyan
1 sibling, 0 replies; 4+ messages in thread
From: Patchwork @ 2018-07-26 6:32 UTC (permalink / raw)
To: vathsala nagaraju; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/psr: Limit psr2 to skl+
URL : https://patchwork.freedesktop.org/series/47263/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4547 -> Patchwork_9774 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_9774 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9774, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/47263/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9774:
=== IGT changes ===
==== Possible regressions ====
igt@drv_module_reload@basic-reload-inject:
fi-hsw-4770r: PASS -> DMESG-WARN
igt@drv_selftest@live_objects:
fi-cnl-psr: NOTRUN -> DMESG-FAIL
== Known issues ==
Here are the changes found in Patchwork_9774 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drv_module_reload@basic-no-display:
fi-cnl-psr: NOTRUN -> DMESG-WARN (fdo#105395) +5
igt@drv_selftest@live_workarounds:
{fi-cfl-8109u}: PASS -> DMESG-FAIL (fdo#107292)
fi-cnl-psr: NOTRUN -> DMESG-FAIL (fdo#107292)
igt@gem_exec_nop@basic-series:
fi-glk-j4005: PASS -> DMESG-WARN (fdo#105719)
igt@gem_exec_suspend@basic-s3:
{fi-skl-caroline}: NOTRUN -> INCOMPLETE (fdo#104108)
igt@kms_flip@basic-flip-vs-dpms:
fi-glk-j4005: PASS -> DMESG-WARN (fdo#106000) +1
igt@kms_frontbuffer_tracking@basic:
fi-hsw-peppy: PASS -> DMESG-FAIL (fdo#102614, fdo#106103)
{igt@kms_psr@cursor_plane_move}:
fi-cnl-psr: NOTRUN -> DMESG-FAIL (fdo#107372) +1
{igt@kms_psr@primary_mmap_gtt}:
fi-cnl-psr: NOTRUN -> DMESG-WARN (fdo#107372)
==== Possible fixes ====
igt@drv_selftest@live_hangcheck:
fi-bxt-dsi: DMESG-FAIL (fdo#106560) -> PASS
igt@gem_exec_create@basic:
fi-glk-j4005: DMESG-WARN (fdo#106745) -> PASS
igt@kms_flip@basic-flip-vs-modeset:
fi-glk-j4005: DMESG-WARN (fdo#106000) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
fdo#105395 https://bugs.freedesktop.org/show_bug.cgi?id=105395
fdo#105719 https://bugs.freedesktop.org/show_bug.cgi?id=105719
fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000
fdo#106103 https://bugs.freedesktop.org/show_bug.cgi?id=106103
fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560
fdo#106745 https://bugs.freedesktop.org/show_bug.cgi?id=106745
fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372
== Participating hosts (48 -> 44) ==
Additional (3): fi-byt-j1900 fi-skl-caroline fi-cnl-psr
Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-kbl-8809g fi-byt-clapper
== Build changes ==
* Linux: CI_DRM_4547 -> Patchwork_9774
CI_DRM_4547: 0a7ab192a697e951b2404f3c1ce42c5fa74f9ed1 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4575: fe908a01012c9daafafb3410b9407725ca9d4f21 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9774: c91aef1b49bc639b95c2e0a1212fd2d0844c1e66 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
c91aef1b49bc drm/i915/psr: Limit psr2 to skl+
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9774/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915/psr: Limit psr2 to skl+
2018-07-26 6:02 [PATCH] drm/i915/psr: Limit psr2 to skl+ vathsala nagaraju
2018-07-26 6:32 ` ✗ Fi.CI.BAT: failure for " Patchwork
@ 2018-07-26 6:47 ` Dhinakaran Pandiyan
2018-07-26 23:56 ` Rodrigo Vivi
1 sibling, 1 reply; 4+ messages in thread
From: Dhinakaran Pandiyan @ 2018-07-26 6:47 UTC (permalink / raw)
To: vathsala nagaraju; +Cc: intel-gfx, Rodrigo Vivi
On Thu, 2018-07-26 at 11:32 +0530, vathsala nagaraju wrote:
> From: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
>
> PSR2 is supported from skl+.
> So Limiting it to skl+.
We restrict PSR2 to gen9+ in intel_psr_init_dpcd(), avoids a few extra
dpcd reads by checking early.
>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Signed-off-by: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
> ---
> drivers/gpu/drm/i915/intel_psr.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_psr.c
> b/drivers/gpu/drm/i915/intel_psr.c
> index 4bd5768..cbbdfd2 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -387,7 +387,7 @@ static void hsw_activate_psr1(struct intel_dp
> *intel_dp)
> I915_WRITE(EDP_PSR_CTL, val);
> }
>
> -static void hsw_activate_psr2(struct intel_dp *intel_dp)
> +static void skl_activate_psr2(struct intel_dp *intel_dp)
Yeah, skl_ is appropriate here.
We should also change the function names to hsw_psr1_activate() and
skl_psr2_activate(), it has been annoying me that the activate
functions aren't named in the same fashion as psr_{enable, invalidate,
flush, disable}
> {
> struct intel_digital_port *dig_port =
> dp_to_dig_port(intel_dp);
> struct drm_device *dev = dig_port->base.base.dev;
> @@ -516,7 +516,9 @@ void intel_psr_compute_config(struct intel_dp
> *intel_dp,
> }
>
> crtc_state->has_psr = true;
> - crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp,
> crtc_state);
> + if (INTEL_GEN(dev_priv) >= 9)
> + crtc_state->has_psr2 =
> intel_psr2_config_valid(intel_dp,
> + crtc_
> state);
> DRM_DEBUG_KMS("Enabling PSR%s\n", crtc_state->has_psr2 ? "2"
> : "");
> }
>
> @@ -534,7 +536,7 @@ static void intel_psr_activate(struct intel_dp
> *intel_dp)
>
> /* psr1 and psr2 are mutually exclusive.*/
> if (dev_priv->psr.psr2_enabled)
> - hsw_activate_psr2(intel_dp);
> + skl_activate_psr2(intel_dp);
> else
> hsw_activate_psr1(intel_dp);
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915/psr: Limit psr2 to skl+
2018-07-26 6:47 ` [PATCH] " Dhinakaran Pandiyan
@ 2018-07-26 23:56 ` Rodrigo Vivi
0 siblings, 0 replies; 4+ messages in thread
From: Rodrigo Vivi @ 2018-07-26 23:56 UTC (permalink / raw)
To: Dhinakaran Pandiyan; +Cc: intel-gfx
1;5202;0cOn Wed, Jul 25, 2018 at 11:47:21PM -0700, Dhinakaran Pandiyan wrote:
> On Thu, 2018-07-26 at 11:32 +0530, vathsala nagaraju wrote:
> > From: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
> >
> > PSR2 is supported from skl+.
> > So Limiting it to skl+.
>
> We restrict PSR2 to gen9+ in intel_psr_init_dpcd(), avoids a few extra
> dpcd reads by checking early.
>
>
> >
> > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > Signed-off-by: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_psr.c | 8 +++++---
> > 1 file changed, 5 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > b/drivers/gpu/drm/i915/intel_psr.c
> > index 4bd5768..cbbdfd2 100644
> > --- a/drivers/gpu/drm/i915/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > @@ -387,7 +387,7 @@ static void hsw_activate_psr1(struct intel_dp
> > *intel_dp)
> > I915_WRITE(EDP_PSR_CTL, val);
> > }
> >
> > -static void hsw_activate_psr2(struct intel_dp *intel_dp)
> > +static void skl_activate_psr2(struct intel_dp *intel_dp)
>
> Yeah, skl_ is appropriate here.
>
> We should also change the function names to hsw_psr1_activate() and
> skl_psr2_activate(), it has been annoying me that the activate
> functions aren't named in the same fashion as psr_{enable, invalidate,
> flush, disable}
maybe simply intel_psr1_activate intel_psr2_activate?!
>
>
> > {
> > struct intel_digital_port *dig_port =
> > dp_to_dig_port(intel_dp);
> > struct drm_device *dev = dig_port->base.base.dev;
> > @@ -516,7 +516,9 @@ void intel_psr_compute_config(struct intel_dp
> > *intel_dp,
> > }
> >
> > crtc_state->has_psr = true;
> > - crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp,
> > crtc_state);
> > + if (INTEL_GEN(dev_priv) >= 9)
> > + crtc_state->has_psr2 =
> > intel_psr2_config_valid(intel_dp,
> > + crtc_
> > state);
> > DRM_DEBUG_KMS("Enabling PSR%s\n", crtc_state->has_psr2 ? "2"
> > : "");
> > }
> >
> > @@ -534,7 +536,7 @@ static void intel_psr_activate(struct intel_dp
> > *intel_dp)
> >
> > /* psr1 and psr2 are mutually exclusive.*/
> > if (dev_priv->psr.psr2_enabled)
> > - hsw_activate_psr2(intel_dp);
> > + skl_activate_psr2(intel_dp);
> > else
> > hsw_activate_psr1(intel_dp);
> >
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2018-07-26 23:56 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-07-26 6:02 [PATCH] drm/i915/psr: Limit psr2 to skl+ vathsala nagaraju
2018-07-26 6:32 ` ✗ Fi.CI.BAT: failure for " Patchwork
2018-07-26 6:47 ` [PATCH] " Dhinakaran Pandiyan
2018-07-26 23:56 ` Rodrigo Vivi
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