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* [PATCH v3 1/4] arm64: dts: allwinner: a64: Add SID node
@ 2018-07-27 11:52 ` Emmanuel Vadot
  0 siblings, 0 replies; 12+ messages in thread
From: Emmanuel Vadot @ 2018-07-27 11:52 UTC (permalink / raw)
  To: srinivas.kandagatla, robh+dt, mark.rutland, maxime.ripard, wens,
	catalin.marinas, will.deacon
  Cc: devicetree, linux-arm-kernel, linux-kernel, Emmanuel Vadot

The A64 have a SID controller which consist of EFUSE (starting at 0x200)
and three registers to read/write some of the protected efuses.

Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 1b2ef28c42bd..69c0d9362553 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -227,6 +227,11 @@
 			#size-cells = <0>;
 		};
 
+		sid: eeprom@1c14000 {
+			compatible = "allwinner,sun50i-a64-sid";
+			reg = <0x1c14000 0x400>;
+		};
+
 		usb_otg: usb@1c19000 {
 			compatible = "allwinner,sun8i-a33-musb";
 			reg = <0x01c19000 0x0400>;
-- 
2.18.0


^ permalink raw reply	[flat|nested] 12+ messages in thread

* [PATCH v3 1/4] arm64: dts: allwinner: a64: Add SID node
@ 2018-07-27 11:52 ` Emmanuel Vadot
  0 siblings, 0 replies; 12+ messages in thread
From: Emmanuel Vadot @ 2018-07-27 11:52 UTC (permalink / raw)
  To: linux-arm-kernel

The A64 have a SID controller which consist of EFUSE (starting at 0x200)
and three registers to read/write some of the protected efuses.

Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 1b2ef28c42bd..69c0d9362553 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -227,6 +227,11 @@
 			#size-cells = <0>;
 		};
 
+		sid: eeprom at 1c14000 {
+			compatible = "allwinner,sun50i-a64-sid";
+			reg = <0x1c14000 0x400>;
+		};
+
 		usb_otg: usb at 1c19000 {
 			compatible = "allwinner,sun8i-a33-musb";
 			reg = <0x01c19000 0x0400>;
-- 
2.18.0

^ permalink raw reply	[flat|nested] 12+ messages in thread

* [PATCH v3 2/4] ARM: dts: sun8i: h3: Add SID compatible string
  2018-07-27 11:52 ` Emmanuel Vadot
@ 2018-07-27 11:52   ` Emmanuel Vadot
  -1 siblings, 0 replies; 12+ messages in thread
From: Emmanuel Vadot @ 2018-07-27 11:52 UTC (permalink / raw)
  To: srinivas.kandagatla, robh+dt, mark.rutland, maxime.ripard, wens,
	catalin.marinas, will.deacon
  Cc: devicetree, linux-arm-kernel, linux-kernel, Emmanuel Vadot

The SID controller on H3 already have a binding but isn't present in the
dtsi file.
Add a node for it.

Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 41d57c76f290..614e2c2154c8 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -111,6 +111,11 @@
 	};
 
 	soc {
+		sid: eeprom@1c14000 {
+			compatible = "allwinner,sun8i-h3-sid";
+			reg = <0x1c14000 0x400>;
+		};
+
 		mali: gpu@1c40000 {
 			compatible = "allwinner,sun8i-h3-mali", "arm,mali-400";
 			reg = <0x01c40000 0x10000>;
-- 
2.18.0


^ permalink raw reply	[flat|nested] 12+ messages in thread

* [PATCH v3 2/4] ARM: dts: sun8i: h3: Add SID compatible string
@ 2018-07-27 11:52   ` Emmanuel Vadot
  0 siblings, 0 replies; 12+ messages in thread
From: Emmanuel Vadot @ 2018-07-27 11:52 UTC (permalink / raw)
  To: linux-arm-kernel

The SID controller on H3 already have a binding but isn't present in the
dtsi file.
Add a node for it.

Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 41d57c76f290..614e2c2154c8 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -111,6 +111,11 @@
 	};
 
 	soc {
+		sid: eeprom at 1c14000 {
+			compatible = "allwinner,sun8i-h3-sid";
+			reg = <0x1c14000 0x400>;
+		};
+
 		mali: gpu at 1c40000 {
 			compatible = "allwinner,sun8i-h3-mali", "arm,mali-400";
 			reg = <0x01c40000 0x10000>;
-- 
2.18.0

^ permalink raw reply	[flat|nested] 12+ messages in thread

* [PATCH v3 3/4] nvmem: sunxi-sid: add support for H5's SID controller
  2018-07-27 11:52 ` Emmanuel Vadot
@ 2018-07-27 11:52   ` Emmanuel Vadot
  -1 siblings, 0 replies; 12+ messages in thread
From: Emmanuel Vadot @ 2018-07-27 11:52 UTC (permalink / raw)
  To: srinivas.kandagatla, robh+dt, mark.rutland, maxime.ripard, wens,
	catalin.marinas, will.deacon
  Cc: devicetree, linux-arm-kernel, linux-kernel, Emmanuel Vadot

The H5 SoC have a SID controller that looks like the one in A64, the
cells are in the same offset but doesn't contain the same data (thermal
sensor calibration for example).
Add a binding for it.

Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
---
 Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt b/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt
index e319fe5e205a..99c4ba6a3f61 100644
--- a/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt
+++ b/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt
@@ -7,6 +7,7 @@ Required properties:
   "allwinner,sun8i-a83t-sid"
   "allwinner,sun8i-h3-sid"
   "allwinner,sun50i-a64-sid"
+  "allwinner,sun50i-h5-sid"
 
 - reg: Should contain registers location and length
 
-- 
2.18.0


^ permalink raw reply	[flat|nested] 12+ messages in thread

* [PATCH v3 3/4] nvmem: sunxi-sid: add support for H5's SID controller
@ 2018-07-27 11:52   ` Emmanuel Vadot
  0 siblings, 0 replies; 12+ messages in thread
From: Emmanuel Vadot @ 2018-07-27 11:52 UTC (permalink / raw)
  To: linux-arm-kernel

The H5 SoC have a SID controller that looks like the one in A64, the
cells are in the same offset but doesn't contain the same data (thermal
sensor calibration for example).
Add a binding for it.

Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
---
 Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt b/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt
index e319fe5e205a..99c4ba6a3f61 100644
--- a/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt
+++ b/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt
@@ -7,6 +7,7 @@ Required properties:
   "allwinner,sun8i-a83t-sid"
   "allwinner,sun8i-h3-sid"
   "allwinner,sun50i-a64-sid"
+  "allwinner,sun50i-h5-sid"
 
 - reg: Should contain registers location and length
 
-- 
2.18.0

^ permalink raw reply	[flat|nested] 12+ messages in thread

* [PATCH v3 4/4] arm64: dts: allwinner: h5: Add SID for H5
  2018-07-27 11:52 ` Emmanuel Vadot
@ 2018-07-27 11:52   ` Emmanuel Vadot
  -1 siblings, 0 replies; 12+ messages in thread
From: Emmanuel Vadot @ 2018-07-27 11:52 UTC (permalink / raw)
  To: srinivas.kandagatla, robh+dt, mark.rutland, maxime.ripard, wens,
	catalin.marinas, will.deacon
  Cc: devicetree, linux-arm-kernel, linux-kernel, Emmanuel Vadot

The H5 SoC have a SID controller like the others Allwinner SoC.
Add a node for it.

Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
---
 arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
index 62d646baac3c..9838acaeea58 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
@@ -92,6 +92,13 @@
 			     <GIC_PPI 10
 				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 	};
+
+	soc {
+		sid: eeprom@1c14000 {
+			compatible = "allwinner,sun50i-h5-sid";
+			reg = <0x1c14000 0x400>;
+		};
+	};
 };
 
 &ccu {
-- 
2.18.0


^ permalink raw reply	[flat|nested] 12+ messages in thread

* [PATCH v3 4/4] arm64: dts: allwinner: h5: Add SID for H5
@ 2018-07-27 11:52   ` Emmanuel Vadot
  0 siblings, 0 replies; 12+ messages in thread
From: Emmanuel Vadot @ 2018-07-27 11:52 UTC (permalink / raw)
  To: linux-arm-kernel

The H5 SoC have a SID controller like the others Allwinner SoC.
Add a node for it.

Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
---
 arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
index 62d646baac3c..9838acaeea58 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
@@ -92,6 +92,13 @@
 			     <GIC_PPI 10
 				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 	};
+
+	soc {
+		sid: eeprom at 1c14000 {
+			compatible = "allwinner,sun50i-h5-sid";
+			reg = <0x1c14000 0x400>;
+		};
+	};
 };
 
 &ccu {
-- 
2.18.0

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v3 1/4] arm64: dts: allwinner: a64: Add SID node
  2018-07-27 11:52 ` Emmanuel Vadot
@ 2018-07-30  8:26   ` Maxime Ripard
  -1 siblings, 0 replies; 12+ messages in thread
From: Maxime Ripard @ 2018-07-30  8:26 UTC (permalink / raw)
  To: Emmanuel Vadot
  Cc: srinivas.kandagatla, robh+dt, mark.rutland, wens,
	catalin.marinas, will.deacon, devicetree, linux-arm-kernel,
	linux-kernel

[-- Attachment #1: Type: text/plain, Size: 423 bytes --]

On Fri, Jul 27, 2018 at 01:52:02PM +0200, Emmanuel Vadot wrote:
> The A64 have a SID controller which consist of EFUSE (starting at 0x200)
> and three registers to read/write some of the protected efuses.
> 
> Signed-off-by: Emmanuel Vadot <manu@freebsd.org>

Queued all 4 for 4.20, thanks!
Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

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^ permalink raw reply	[flat|nested] 12+ messages in thread

* [PATCH v3 1/4] arm64: dts: allwinner: a64: Add SID node
@ 2018-07-30  8:26   ` Maxime Ripard
  0 siblings, 0 replies; 12+ messages in thread
From: Maxime Ripard @ 2018-07-30  8:26 UTC (permalink / raw)
  To: linux-arm-kernel

On Fri, Jul 27, 2018 at 01:52:02PM +0200, Emmanuel Vadot wrote:
> The A64 have a SID controller which consist of EFUSE (starting at 0x200)
> and three registers to read/write some of the protected efuses.
> 
> Signed-off-by: Emmanuel Vadot <manu@freebsd.org>

Queued all 4 for 4.20, thanks!
Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v3 3/4] nvmem: sunxi-sid: add support for H5's SID controller
  2018-07-27 11:52   ` Emmanuel Vadot
@ 2018-07-30 23:15     ` Rob Herring
  -1 siblings, 0 replies; 12+ messages in thread
From: Rob Herring @ 2018-07-30 23:15 UTC (permalink / raw)
  To: Emmanuel Vadot
  Cc: srinivas.kandagatla, mark.rutland, maxime.ripard, wens,
	catalin.marinas, will.deacon, devicetree, linux-arm-kernel,
	linux-kernel

On Fri, Jul 27, 2018 at 01:52:04PM +0200, Emmanuel Vadot wrote:
> The H5 SoC have a SID controller that looks like the one in A64, the
> cells are in the same offset but doesn't contain the same data (thermal
> sensor calibration for example).
> Add a binding for it.
> 
> Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
> ---
>  Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt | 1 +
>  1 file changed, 1 insertion(+)

Acked-by: Rob Herring <robh@kernel.org>

^ permalink raw reply	[flat|nested] 12+ messages in thread

* [PATCH v3 3/4] nvmem: sunxi-sid: add support for H5's SID controller
@ 2018-07-30 23:15     ` Rob Herring
  0 siblings, 0 replies; 12+ messages in thread
From: Rob Herring @ 2018-07-30 23:15 UTC (permalink / raw)
  To: linux-arm-kernel

On Fri, Jul 27, 2018 at 01:52:04PM +0200, Emmanuel Vadot wrote:
> The H5 SoC have a SID controller that looks like the one in A64, the
> cells are in the same offset but doesn't contain the same data (thermal
> sensor calibration for example).
> Add a binding for it.
> 
> Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
> ---
>  Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt | 1 +
>  1 file changed, 1 insertion(+)

Acked-by: Rob Herring <robh@kernel.org>

^ permalink raw reply	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2018-07-30 23:15 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-07-27 11:52 [PATCH v3 1/4] arm64: dts: allwinner: a64: Add SID node Emmanuel Vadot
2018-07-27 11:52 ` Emmanuel Vadot
2018-07-27 11:52 ` [PATCH v3 2/4] ARM: dts: sun8i: h3: Add SID compatible string Emmanuel Vadot
2018-07-27 11:52   ` Emmanuel Vadot
2018-07-27 11:52 ` [PATCH v3 3/4] nvmem: sunxi-sid: add support for H5's SID controller Emmanuel Vadot
2018-07-27 11:52   ` Emmanuel Vadot
2018-07-30 23:15   ` Rob Herring
2018-07-30 23:15     ` Rob Herring
2018-07-27 11:52 ` [PATCH v3 4/4] arm64: dts: allwinner: h5: Add SID for H5 Emmanuel Vadot
2018-07-27 11:52   ` Emmanuel Vadot
2018-07-30  8:26 ` [PATCH v3 1/4] arm64: dts: allwinner: a64: Add SID node Maxime Ripard
2018-07-30  8:26   ` Maxime Ripard

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