[PATCH/RFC 0/4] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore

[PATCH/RFC 0/4] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore

[Geert Uytterhoeven]

	Hi all,

SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which
includes an ARM global timer.

Enable use of the global timer on these SoCs for scheduling and delay
loops, with the following impact:
  - Scheduler accuracy is increased from 10 ms to a few ns,
  - Calls to shmobile_init_delay() to preset loops-per-jiffies can be
    removed.
    Note that when using an old DTB lacking the global timer, the kernel
    will still work, but the delay loop will need to be calibrated
    during boot.
  - This also seems to get rid of lockdep warnings related to the sh_cmt
    driver.

We still need shmobile_init_delay() to setup loops-per-jiffies for other
SoCs lacking an architectured or global timer:
  - emev2: Cortex-A9 (MPCore version and global timer not documented),
  - r7s72100: single-core Cortex-A9 MPCore r3p0 (global timer not
    documented),
  - r7s9210: single-core Cortex-A9 MPCore r4p1 (global timer not
    documented),
  - r8a7740: single-core Cortex-A9 r2p4,
  - r8a7778: single-core Cortex-A9 r2p2-00rel0.

This has been tested on KZM-A9-GT (SH-Mobile AG5) and Marzen (R-Car H1).

Thanks for your comments!

Geert Uytterhoeven (4):
  ARM: dts: sh73a0: Rename twd clock to periph clock
  ARM: dts: sh73a0: Add device node for ARM global timer
  ARM: dts: r8a7779: Add device node for ARM global timer
  [WIP] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs

 arch/arm/boot/dts/r8a7779.dtsi         |  8 ++++++++
 arch/arm/boot/dts/sh73a0.dtsi          | 11 +++++++++--
 arch/arm/mach-shmobile/Kconfig         |  2 ++
 arch/arm/mach-shmobile/setup-r8a7779.c |  1 -
 arch/arm/mach-shmobile/setup-sh73a0.c  |  1 -
 5 files changed, 19 insertions(+), 4 deletions(-)

-- 
2.17.1

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

[PATCH/RFC 0/4] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore

[Geert Uytterhoeven]

	Hi all,

SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which
includes an ARM global timer.

Enable use of the global timer on these SoCs for scheduling and delay
loops, with the following impact:
  - Scheduler accuracy is increased from 10 ms to a few ns,
  - Calls to shmobile_init_delay() to preset loops-per-jiffies can be
    removed.
    Note that when using an old DTB lacking the global timer, the kernel
    will still work, but the delay loop will need to be calibrated
    during boot.
  - This also seems to get rid of lockdep warnings related to the sh_cmt
    driver.

We still need shmobile_init_delay() to setup loops-per-jiffies for other
SoCs lacking an architectured or global timer:
  - emev2: Cortex-A9 (MPCore version and global timer not documented),
  - r7s72100: single-core Cortex-A9 MPCore r3p0 (global timer not
    documented),
  - r7s9210: single-core Cortex-A9 MPCore r4p1 (global timer not
    documented),
  - r8a7740: single-core Cortex-A9 r2p4,
  - r8a7778: single-core Cortex-A9 r2p2-00rel0.

This has been tested on KZM-A9-GT (SH-Mobile AG5) and Marzen (R-Car H1).

Thanks for your comments!

Geert Uytterhoeven (4):
  ARM: dts: sh73a0: Rename twd clock to periph clock
  ARM: dts: sh73a0: Add device node for ARM global timer
  ARM: dts: r8a7779: Add device node for ARM global timer
  [WIP] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs

 arch/arm/boot/dts/r8a7779.dtsi         |  8 ++++++++
 arch/arm/boot/dts/sh73a0.dtsi          | 11 +++++++++--
 arch/arm/mach-shmobile/Kconfig         |  2 ++
 arch/arm/mach-shmobile/setup-r8a7779.c |  1 -
 arch/arm/mach-shmobile/setup-sh73a0.c  |  1 -
 5 files changed, 19 insertions(+), 4 deletions(-)

-- 
2.17.1

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

[PATCH/RFC 0/4] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore

[Geert Uytterhoeven]

	Hi all,

SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which
includes an ARM global timer.

Enable use of the global timer on these SoCs for scheduling and delay
loops, with the following impact:
  - Scheduler accuracy is increased from 10 ms to a few ns,
  - Calls to shmobile_init_delay() to preset loops-per-jiffies can be
    removed.
    Note that when using an old DTB lacking the global timer, the kernel
    will still work, but the delay loop will need to be calibrated
    during boot.
  - This also seems to get rid of lockdep warnings related to the sh_cmt
    driver.

We still need shmobile_init_delay() to setup loops-per-jiffies for other
SoCs lacking an architectured or global timer:
  - emev2: Cortex-A9 (MPCore version and global timer not documented),
  - r7s72100: single-core Cortex-A9 MPCore r3p0 (global timer not
    documented),
  - r7s9210: single-core Cortex-A9 MPCore r4p1 (global timer not
    documented),
  - r8a7740: single-core Cortex-A9 r2p4,
  - r8a7778: single-core Cortex-A9 r2p2-00rel0.

This has been tested on KZM-A9-GT (SH-Mobile AG5) and Marzen (R-Car H1).

Thanks for your comments!

Geert Uytterhoeven (4):
  ARM: dts: sh73a0: Rename twd clock to periph clock
  ARM: dts: sh73a0: Add device node for ARM global timer
  ARM: dts: r8a7779: Add device node for ARM global timer
  [WIP] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs

 arch/arm/boot/dts/r8a7779.dtsi         |  8 ++++++++
 arch/arm/boot/dts/sh73a0.dtsi          | 11 +++++++++--
 arch/arm/mach-shmobile/Kconfig         |  2 ++
 arch/arm/mach-shmobile/setup-r8a7779.c |  1 -
 arch/arm/mach-shmobile/setup-sh73a0.c  |  1 -
 5 files changed, 19 insertions(+), 4 deletions(-)

-- 
2.17.1

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

[PATCH/RFC 1/4] ARM: dts: sh73a0: Rename twd clock to periph clock

[Geert Uytterhoeven]

The "TWD" clock is actually the Cortex-A9 MPCore "PERIPHCLK" clock,
which not only clocks the private timers and watchdogs (TWD), but also
the interrupt controller and global timer.

Hence rename it from "twd" to "periph".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/boot/dts/sh73a0.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index e8f0a07c45645737..b495a9d2f1118006 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -43,7 +43,7 @@
 		compatible = "arm,cortex-a9-twd-timer";
 		reg = <0xf0000600 0x20>;
 		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>;
-		clocks = <&twd_clk>;
+		clocks = <&periph_clk>;
 	};
 
 	gic: interrupt-controller@f0001000 {
@@ -812,7 +812,7 @@
 			clock-div = <13>;
 			clock-mult = <1>;
 		};
-		twd_clk: twd {
+		periph_clk: periph {
 			compatible = "fixed-factor-clock";
 			clocks = <&cpg_clocks SH73A0_CLK_Z>;
 			#clock-cells = <0>;
-- 
2.17.1

[PATCH/RFC 1/4] ARM: dts: sh73a0: Rename twd clock to periph clock

[Geert Uytterhoeven]

The "TWD" clock is actually the Cortex-A9 MPCore "PERIPHCLK" clock,
which not only clocks the private timers and watchdogs (TWD), but also
the interrupt controller and global timer.

Hence rename it from "twd" to "periph".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/boot/dts/sh73a0.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index e8f0a07c45645737..b495a9d2f1118006 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -43,7 +43,7 @@
 		compatible = "arm,cortex-a9-twd-timer";
 		reg = <0xf0000600 0x20>;
 		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>;
-		clocks = <&twd_clk>;
+		clocks = <&periph_clk>;
 	};
 
 	gic: interrupt-controller@f0001000 {
@@ -812,7 +812,7 @@
 			clock-div = <13>;
 			clock-mult = <1>;
 		};
-		twd_clk: twd {
+		periph_clk: periph {
 			compatible = "fixed-factor-clock";
 			clocks = <&cpg_clocks SH73A0_CLK_Z>;
 			#clock-cells = <0>;
-- 
2.17.1

[PATCH/RFC 1/4] ARM: dts: sh73a0: Rename twd clock to periph clock

[Geert Uytterhoeven]

The "TWD" clock is actually the Cortex-A9 MPCore "PERIPHCLK" clock,
which not only clocks the private timers and watchdogs (TWD), but also
the interrupt controller and global timer.

Hence rename it from "twd" to "periph".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/boot/dts/sh73a0.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index e8f0a07c45645737..b495a9d2f1118006 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -43,7 +43,7 @@
 		compatible = "arm,cortex-a9-twd-timer";
 		reg = <0xf0000600 0x20>;
 		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>;
-		clocks = <&twd_clk>;
+		clocks = <&periph_clk>;
 	};
 
 	gic: interrupt-controller at f0001000 {
@@ -812,7 +812,7 @@
 			clock-div = <13>;
 			clock-mult = <1>;
 		};
-		twd_clk: twd {
+		periph_clk: periph {
 			compatible = "fixed-factor-clock";
 			clocks = <&cpg_clocks SH73A0_CLK_Z>;
 			#clock-cells = <0>;
-- 
2.17.1

[PATCH/RFC 2/4] ARM: dts: sh73a0: Add device node for ARM global timer

[Geert Uytterhoeven]

Add a device node for the global timer, which is part of the Cortex-A9
MPCore.

The global timer can serve as an accurate (3 ns) clock source for
scheduling and delay loops.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/boot/dts/sh73a0.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index b495a9d2f1118006..29461d9282ea7e99 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -39,6 +39,13 @@
 		};
 	};
 
+	timer@f0000200 {
+		compatible = "arm,cortex-a9-global-timer";
+		reg = <0xf0000200 0x100>;
+		interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>;
+		clocks = <&periph_clk>;
+	};
+
 	timer@f0000600 {
 		compatible = "arm,cortex-a9-twd-timer";
 		reg = <0xf0000600 0x20>;
-- 
2.17.1

[PATCH/RFC 2/4] ARM: dts: sh73a0: Add device node for ARM global timer

[Geert Uytterhoeven]

Add a device node for the global timer, which is part of the Cortex-A9
MPCore.

The global timer can serve as an accurate (3 ns) clock source for
scheduling and delay loops.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/boot/dts/sh73a0.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index b495a9d2f1118006..29461d9282ea7e99 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -39,6 +39,13 @@
 		};
 	};
 
+	timer@f0000200 {
+		compatible = "arm,cortex-a9-global-timer";
+		reg = <0xf0000200 0x100>;
+		interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>;
+		clocks = <&periph_clk>;
+	};
+
 	timer@f0000600 {
 		compatible = "arm,cortex-a9-twd-timer";
 		reg = <0xf0000600 0x20>;
-- 
2.17.1

[PATCH/RFC 2/4] ARM: dts: sh73a0: Add device node for ARM global timer

[Geert Uytterhoeven]

Add a device node for the global timer, which is part of the Cortex-A9
MPCore.

The global timer can serve as an accurate (3 ns) clock source for
scheduling and delay loops.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/boot/dts/sh73a0.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index b495a9d2f1118006..29461d9282ea7e99 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -39,6 +39,13 @@
 		};
 	};
 
+	timer at f0000200 {
+		compatible = "arm,cortex-a9-global-timer";
+		reg = <0xf0000200 0x100>;
+		interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>;
+		clocks = <&periph_clk>;
+	};
+
 	timer at f0000600 {
 		compatible = "arm,cortex-a9-twd-timer";
 		reg = <0xf0000600 0x20>;
-- 
2.17.1

[PATCH/RFC 3/4] ARM: dts: r8a7779: Add device node for ARM global timer

[Geert Uytterhoeven]

Add a device node for the global timer, which is part of the Cortex-A9
MPCore.

The global timer can serve as an accurate (4 ns) clock source for
scheduling and delay loops.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/boot/dts/r8a7779.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index 03919714645ae56d..f1c9b2bc542c5be9 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -68,6 +68,14 @@
 		      <0xf0000100 0x100>;
 	};
 
+	timer@f0000200 {
+		compatible = "arm,cortex-a9-global-timer";
+		reg = <0xf0000200 0x100>;
+		interrupts = <GIC_PPI 11
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
+		clocks = <&cpg_clocks R8A7779_CLK_ZS>;
+	};
+
 	timer@f0000600 {
 		compatible = "arm,cortex-a9-twd-timer";
 		reg = <0xf0000600 0x20>;
-- 
2.17.1

[PATCH/RFC 3/4] ARM: dts: r8a7779: Add device node for ARM global timer

[Geert Uytterhoeven]

Add a device node for the global timer, which is part of the Cortex-A9
MPCore.

The global timer can serve as an accurate (4 ns) clock source for
scheduling and delay loops.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/boot/dts/r8a7779.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index 03919714645ae56d..f1c9b2bc542c5be9 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -68,6 +68,14 @@
 		      <0xf0000100 0x100>;
 	};
 
+	timer@f0000200 {
+		compatible = "arm,cortex-a9-global-timer";
+		reg = <0xf0000200 0x100>;
+		interrupts = <GIC_PPI 11
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
+		clocks = <&cpg_clocks R8A7779_CLK_ZS>;
+	};
+
 	timer@f0000600 {
 		compatible = "arm,cortex-a9-twd-timer";
 		reg = <0xf0000600 0x20>;
-- 
2.17.1

[PATCH/RFC 3/4] ARM: dts: r8a7779: Add device node for ARM global timer

[Geert Uytterhoeven]

Add a device node for the global timer, which is part of the Cortex-A9
MPCore.

The global timer can serve as an accurate (4 ns) clock source for
scheduling and delay loops.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/boot/dts/r8a7779.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index 03919714645ae56d..f1c9b2bc542c5be9 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -68,6 +68,14 @@
 		      <0xf0000100 0x100>;
 	};
 
+	timer at f0000200 {
+		compatible = "arm,cortex-a9-global-timer";
+		reg = <0xf0000200 0x100>;
+		interrupts = <GIC_PPI 11
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
+		clocks = <&cpg_clocks R8A7779_CLK_ZS>;
+	};
+
 	timer at f0000600 {
 		compatible = "arm,cortex-a9-twd-timer";
 		reg = <0xf0000600 0x20>;
-- 
2.17.1

[PATCH/RFC 4/4] [WIP] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs

[Geert Uytterhoeven]

SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which
includes a global timer.

Enable the ARM global timer on these SoCs, which will be used for:
  - the scheduler clock, improving scheduler accuracy from 10 ms to 3 or
    4 ns,
  - delay loops, allowing removal of calls to shmobile_init_delay() from
    the corresponding machine vectors.

Note that when using an old DTB lacking the global timer, the kernel
will still work.  However, loops-per-jiffies will no longer be preset,
and the delay loop will need to be calibrated during boot.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/mach-shmobile/Kconfig         | 2 ++
 arch/arm/mach-shmobile/setup-r8a7779.c | 1 -
 arch/arm/mach-shmobile/setup-sh73a0.c  | 1 -
 3 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 94e9431d92b87405..d39ab39bba92b124 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -92,6 +92,7 @@ config ARCH_R8A7778
 
 config ARCH_R8A7779
 	bool "R-Car H1 (R8A77790)"
+	select ARM_GLOBAL_TIMER
 	select ARCH_RCAR_GEN1
 
 config ARCH_R8A7790
@@ -133,5 +134,6 @@ config ARCH_RZN1
 config ARCH_SH73A0
 	bool "SH-Mobile AG5 (R8A73A00)"
 	select ARCH_RMOBILE
+	select ARM_GLOBAL_TIMER
 	select RENESAS_INTC_IRQPIN
 endif
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index b13ec9088ce5354c..86406e3f9b22e31f 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -72,7 +72,6 @@ static const char *const r8a7779_compat_dt[] __initconst = {
 DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)")
 	.smp		= smp_ops(r8a7779_smp_ops),
 	.map_io		= r8a7779_map_io,
-	.init_early	= shmobile_init_delay,
 	.init_irq	= r8a7779_init_irq_dt,
 	.init_late	= shmobile_init_late,
 	.dt_compat	= r8a7779_compat_dt,
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index cc08aa752244764a..eb4a62fa42895ebe 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -56,7 +56,6 @@ static const char *const sh73a0_boards_compat_dt[] __initconst = {
 DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)")
 	.smp		= smp_ops(sh73a0_smp_ops),
 	.map_io		= sh73a0_map_io,
-	.init_early	= shmobile_init_delay,
 	.init_machine	= sh73a0_generic_init,
 	.init_late	= shmobile_init_late,
 	.dt_compat	= sh73a0_boards_compat_dt,
-- 
2.17.1

[PATCH/RFC 4/4] [WIP] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs

[Geert Uytterhoeven]

SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which
includes a global timer.

Enable the ARM global timer on these SoCs, which will be used for:
  - the scheduler clock, improving scheduler accuracy from 10 ms to 3 or
    4 ns,
  - delay loops, allowing removal of calls to shmobile_init_delay() from
    the corresponding machine vectors.

Note that when using an old DTB lacking the global timer, the kernel
will still work.  However, loops-per-jiffies will no longer be preset,
and the delay loop will need to be calibrated during boot.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/mach-shmobile/Kconfig         | 2 ++
 arch/arm/mach-shmobile/setup-r8a7779.c | 1 -
 arch/arm/mach-shmobile/setup-sh73a0.c  | 1 -
 3 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 94e9431d92b87405..d39ab39bba92b124 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -92,6 +92,7 @@ config ARCH_R8A7778
 
 config ARCH_R8A7779
 	bool "R-Car H1 (R8A77790)"
+	select ARM_GLOBAL_TIMER
 	select ARCH_RCAR_GEN1
 
 config ARCH_R8A7790
@@ -133,5 +134,6 @@ config ARCH_RZN1
 config ARCH_SH73A0
 	bool "SH-Mobile AG5 (R8A73A00)"
 	select ARCH_RMOBILE
+	select ARM_GLOBAL_TIMER
 	select RENESAS_INTC_IRQPIN
 endif
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index b13ec9088ce5354c..86406e3f9b22e31f 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -72,7 +72,6 @@ static const char *const r8a7779_compat_dt[] __initconst = {
 DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)")
 	.smp		= smp_ops(r8a7779_smp_ops),
 	.map_io		= r8a7779_map_io,
-	.init_early	= shmobile_init_delay,
 	.init_irq	= r8a7779_init_irq_dt,
 	.init_late	= shmobile_init_late,
 	.dt_compat	= r8a7779_compat_dt,
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index cc08aa752244764a..eb4a62fa42895ebe 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -56,7 +56,6 @@ static const char *const sh73a0_boards_compat_dt[] __initconst = {
 DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)")
 	.smp		= smp_ops(sh73a0_smp_ops),
 	.map_io		= sh73a0_map_io,
-	.init_early	= shmobile_init_delay,
 	.init_machine	= sh73a0_generic_init,
 	.init_late	= shmobile_init_late,
 	.dt_compat	= sh73a0_boards_compat_dt,
-- 
2.17.1

[PATCH/RFC 4/4] [WIP] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs

[Geert Uytterhoeven]

SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which
includes a global timer.

Enable the ARM global timer on these SoCs, which will be used for:
  - the scheduler clock, improving scheduler accuracy from 10 ms to 3 or
    4 ns,
  - delay loops, allowing removal of calls to shmobile_init_delay() from
    the corresponding machine vectors.

Note that when using an old DTB lacking the global timer, the kernel
will still work.  However, loops-per-jiffies will no longer be preset,
and the delay loop will need to be calibrated during boot.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/mach-shmobile/Kconfig         | 2 ++
 arch/arm/mach-shmobile/setup-r8a7779.c | 1 -
 arch/arm/mach-shmobile/setup-sh73a0.c  | 1 -
 3 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 94e9431d92b87405..d39ab39bba92b124 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -92,6 +92,7 @@ config ARCH_R8A7778
 
 config ARCH_R8A7779
 	bool "R-Car H1 (R8A77790)"
+	select ARM_GLOBAL_TIMER
 	select ARCH_RCAR_GEN1
 
 config ARCH_R8A7790
@@ -133,5 +134,6 @@ config ARCH_RZN1
 config ARCH_SH73A0
 	bool "SH-Mobile AG5 (R8A73A00)"
 	select ARCH_RMOBILE
+	select ARM_GLOBAL_TIMER
 	select RENESAS_INTC_IRQPIN
 endif
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index b13ec9088ce5354c..86406e3f9b22e31f 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -72,7 +72,6 @@ static const char *const r8a7779_compat_dt[] __initconst = {
 DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)")
 	.smp		= smp_ops(r8a7779_smp_ops),
 	.map_io		= r8a7779_map_io,
-	.init_early	= shmobile_init_delay,
 	.init_irq	= r8a7779_init_irq_dt,
 	.init_late	= shmobile_init_late,
 	.dt_compat	= r8a7779_compat_dt,
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index cc08aa752244764a..eb4a62fa42895ebe 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -56,7 +56,6 @@ static const char *const sh73a0_boards_compat_dt[] __initconst = {
 DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)")
 	.smp		= smp_ops(sh73a0_smp_ops),
 	.map_io		= sh73a0_map_io,
-	.init_early	= shmobile_init_delay,
 	.init_machine	= sh73a0_generic_init,
 	.init_late	= shmobile_init_late,
 	.dt_compat	= sh73a0_boards_compat_dt,
-- 
2.17.1

Re: [PATCH/RFC 4/4] [WIP] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs

[Geert Uytterhoeven]

On Tue, Jul 31, 2018 at 6:08 PM Geert Uytterhoeven
<geert+renesas@glider.be> wrote:
> SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which
> includes a global timer.
>
> Enable the ARM global timer on these SoCs, which will be used for:
>   - the scheduler clock, improving scheduler accuracy from 10 ms to 3 or
>     4 ns,
>   - delay loops, allowing removal of calls to shmobile_init_delay() from
>     the corresponding machine vectors.
>
> Note that when using an old DTB lacking the global timer, the kernel
> will still work.  However, loops-per-jiffies will no longer be preset,
> and the delay loop will need to be calibrated during boot.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This seems to cause random system resume issues on the venerable SH-Mobile
AG5, ranging from plain lockups to RCU warnings:

WARNING: suspicious RCU usage
4.18.0-kzm9g-00218-gaf4425056bd09e9e #38 Not tainted
-----------------------------
kernel/sched/fair.c:6231 suspicious rcu_dereference_check() usage!

other info that might help us debug this:


RCU used illegally from offline CPU!
rcu_scheduler_active = 2, debug_locks = 1
3 locks held by swapper/1/0:
 #0: 6d7f5781 ((cpu_died).wait.lock){....}, at: complete+0x14/0x48
 #1: 84ce6f8e (&p->pi_lock){-.-.}, at: try_to_wake_up+0x30/0x3cc
 #2: 93591133 (rcu_read_lock){....}, at: select_task_rq_fair+0x5c/0xe8c

stack backtrace:
CPU: 1 PID: 0 Comm: swapper/1 Not tainted
4.18.0-kzm9g-00218-gaf4425056bd09e9e #38
Hardware name: Generic SH73A0 (Flattened Device Tree)
[<c010f22c>] (unwind_backtrace) from [<c010bab0>] (show_stack+0x10/0x14)
[<c010bab0>] (show_stack) from [<c0599750>] (dump_stack+0x9c/0xd4)
[<c0599750>] (dump_stack) from [<c01542c8>] (select_task_rq_fair+0x140/0xe8c)
[<c01542c8>] (select_task_rq_fair) from [<c0149494>]
(try_to_wake_up+0x210/0x3cc)
[<c0149494>] (try_to_wake_up) from [<c016355c>] (__wake_up_common+0xcc/0x140)
[<c016355c>] (__wake_up_common) from [<c01636a8>] (__wake_up_locked+0x14/0x1c)
[<c01636a8>] (__wake_up_locked) from [<c016450c>] (complete+0x38/0x48)
[<c016450c>] (complete) from [<c010d66c>] (arch_cpu_idle_dead+0x2c/0x8c)
[<c010d66c>] (arch_cpu_idle_dead) from [<c014edec>] (do_idle+0x98/0x148)
[<c014edec>] (do_idle) from [<c014f1fc>] (cpu_startup_entry+0x18/0x1c)
[<c014f1fc>] (cpu_startup_entry) from [<4010246c>] (0x4010246c)

Given secondary CPU startup is already quite flaky on this SoC, perhaps
it's best to leave it alone?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC 4/4] [WIP] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs

[Geert Uytterhoeven]

On Tue, Jul 31, 2018 at 6:08 PM Geert Uytterhoeven
<geert+renesas@glider.be> wrote:
> SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which
> includes a global timer.
>
> Enable the ARM global timer on these SoCs, which will be used for:
>   - the scheduler clock, improving scheduler accuracy from 10 ms to 3 or
>     4 ns,
>   - delay loops, allowing removal of calls to shmobile_init_delay() from
>     the corresponding machine vectors.
>
> Note that when using an old DTB lacking the global timer, the kernel
> will still work.  However, loops-per-jiffies will no longer be preset,
> and the delay loop will need to be calibrated during boot.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This seems to cause random system resume issues on the venerable SH-Mobile
AG5, ranging from plain lockups to RCU warnings:

WARNING: suspicious RCU usage
4.18.0-kzm9g-00218-gaf4425056bd09e9e #38 Not tainted
-----------------------------
kernel/sched/fair.c:6231 suspicious rcu_dereference_check() usage!

other info that might help us debug this:


RCU used illegally from offline CPU!
rcu_scheduler_active = 2, debug_locks = 1
3 locks held by swapper/1/0:
 #0: 6d7f5781 ((cpu_died).wait.lock){....}, at: complete+0x14/0x48
 #1: 84ce6f8e (&p->pi_lock){-.-.}, at: try_to_wake_up+0x30/0x3cc
 #2: 93591133 (rcu_read_lock){....}, at: select_task_rq_fair+0x5c/0xe8c

stack backtrace:
CPU: 1 PID: 0 Comm: swapper/1 Not tainted
4.18.0-kzm9g-00218-gaf4425056bd09e9e #38
Hardware name: Generic SH73A0 (Flattened Device Tree)
[<c010f22c>] (unwind_backtrace) from [<c010bab0>] (show_stack+0x10/0x14)
[<c010bab0>] (show_stack) from [<c0599750>] (dump_stack+0x9c/0xd4)
[<c0599750>] (dump_stack) from [<c01542c8>] (select_task_rq_fair+0x140/0xe8c)
[<c01542c8>] (select_task_rq_fair) from [<c0149494>]
(try_to_wake_up+0x210/0x3cc)
[<c0149494>] (try_to_wake_up) from [<c016355c>] (__wake_up_common+0xcc/0x140)
[<c016355c>] (__wake_up_common) from [<c01636a8>] (__wake_up_locked+0x14/0x1c)
[<c01636a8>] (__wake_up_locked) from [<c016450c>] (complete+0x38/0x48)
[<c016450c>] (complete) from [<c010d66c>] (arch_cpu_idle_dead+0x2c/0x8c)
[<c010d66c>] (arch_cpu_idle_dead) from [<c014edec>] (do_idle+0x98/0x148)
[<c014edec>] (do_idle) from [<c014f1fc>] (cpu_startup_entry+0x18/0x1c)
[<c014f1fc>] (cpu_startup_entry) from [<4010246c>] (0x4010246c)

Given secondary CPU startup is already quite flaky on this SoC, perhaps
it's best to leave it alone?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH/RFC 4/4] [WIP] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs

[Geert Uytterhoeven]

On Tue, Jul 31, 2018 at 6:08 PM Geert Uytterhoeven
<geert+renesas@glider.be> wrote:
> SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which
> includes a global timer.
>
> Enable the ARM global timer on these SoCs, which will be used for:
>   - the scheduler clock, improving scheduler accuracy from 10 ms to 3 or
>     4 ns,
>   - delay loops, allowing removal of calls to shmobile_init_delay() from
>     the corresponding machine vectors.
>
> Note that when using an old DTB lacking the global timer, the kernel
> will still work.  However, loops-per-jiffies will no longer be preset,
> and the delay loop will need to be calibrated during boot.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This seems to cause random system resume issues on the venerable SH-Mobile
AG5, ranging from plain lockups to RCU warnings:

WARNING: suspicious RCU usage
4.18.0-kzm9g-00218-gaf4425056bd09e9e #38 Not tainted
-----------------------------
kernel/sched/fair.c:6231 suspicious rcu_dereference_check() usage!

other info that might help us debug this:


RCU used illegally from offline CPU!
rcu_scheduler_active = 2, debug_locks = 1
3 locks held by swapper/1/0:
 #0: 6d7f5781 ((cpu_died).wait.lock){....}, at: complete+0x14/0x48
 #1: 84ce6f8e (&p->pi_lock){-.-.}, at: try_to_wake_up+0x30/0x3cc
 #2: 93591133 (rcu_read_lock){....}, at: select_task_rq_fair+0x5c/0xe8c

stack backtrace:
CPU: 1 PID: 0 Comm: swapper/1 Not tainted
4.18.0-kzm9g-00218-gaf4425056bd09e9e #38
Hardware name: Generic SH73A0 (Flattened Device Tree)
[<c010f22c>] (unwind_backtrace) from [<c010bab0>] (show_stack+0x10/0x14)
[<c010bab0>] (show_stack) from [<c0599750>] (dump_stack+0x9c/0xd4)
[<c0599750>] (dump_stack) from [<c01542c8>] (select_task_rq_fair+0x140/0xe8c)
[<c01542c8>] (select_task_rq_fair) from [<c0149494>]
(try_to_wake_up+0x210/0x3cc)
[<c0149494>] (try_to_wake_up) from [<c016355c>] (__wake_up_common+0xcc/0x140)
[<c016355c>] (__wake_up_common) from [<c01636a8>] (__wake_up_locked+0x14/0x1c)
[<c01636a8>] (__wake_up_locked) from [<c016450c>] (complete+0x38/0x48)
[<c016450c>] (complete) from [<c010d66c>] (arch_cpu_idle_dead+0x2c/0x8c)
[<c010d66c>] (arch_cpu_idle_dead) from [<c014edec>] (do_idle+0x98/0x148)
[<c014edec>] (do_idle) from [<c014f1fc>] (cpu_startup_entry+0x18/0x1c)
[<c014f1fc>] (cpu_startup_entry) from [<4010246c>] (0x4010246c)

Given secondary CPU startup is already quite flaky on this SoC, perhaps
it's best to leave it alone?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC 4/4] [WIP] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs

[Geert Uytterhoeven]

On Tue, Aug 21, 2018 at 9:37 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> On Tue, Jul 31, 2018 at 6:08 PM Geert Uytterhoeven
> <geert+renesas@glider.be> wrote:
> > SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which
> > includes a global timer.
> >
> > Enable the ARM global timer on these SoCs, which will be used for:
> >   - the scheduler clock, improving scheduler accuracy from 10 ms to 3 or
> >     4 ns,
> >   - delay loops, allowing removal of calls to shmobile_init_delay() from
> >     the corresponding machine vectors.
> >
> > Note that when using an old DTB lacking the global timer, the kernel
> > will still work.  However, loops-per-jiffies will no longer be preset,
> > and the delay loop will need to be calibrated during boot.
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> This seems to cause random system resume issues on the venerable SH-Mobile
> AG5, ranging from plain lockups to RCU warnings:
>
> WARNING: suspicious RCU usage
> 4.18.0-kzm9g-00218-gaf4425056bd09e9e #38 Not tainted
> -----------------------------
> kernel/sched/fair.c:6231 suspicious rcu_dereference_check() usage!
>
> other info that might help us debug this:
>
>
> RCU used illegally from offline CPU!
> rcu_scheduler_active = 2, debug_locks = 1
> 3 locks held by swapper/1/0:
>  #0: 6d7f5781 ((cpu_died).wait.lock){....}, at: complete+0x14/0x48
>  #1: 84ce6f8e (&p->pi_lock){-.-.}, at: try_to_wake_up+0x30/0x3cc
>  #2: 93591133 (rcu_read_lock){....}, at: select_task_rq_fair+0x5c/0xe8c
>
> stack backtrace:
> CPU: 1 PID: 0 Comm: swapper/1 Not tainted
> 4.18.0-kzm9g-00218-gaf4425056bd09e9e #38
> Hardware name: Generic SH73A0 (Flattened Device Tree)
> [<c010f22c>] (unwind_backtrace) from [<c010bab0>] (show_stack+0x10/0x14)
> [<c010bab0>] (show_stack) from [<c0599750>] (dump_stack+0x9c/0xd4)
> [<c0599750>] (dump_stack) from [<c01542c8>] (select_task_rq_fair+0x140/0xe8c)
> [<c01542c8>] (select_task_rq_fair) from [<c0149494>]
> (try_to_wake_up+0x210/0x3cc)
> [<c0149494>] (try_to_wake_up) from [<c016355c>] (__wake_up_common+0xcc/0x140)
> [<c016355c>] (__wake_up_common) from [<c01636a8>] (__wake_up_locked+0x14/0x1c)
> [<c01636a8>] (__wake_up_locked) from [<c016450c>] (complete+0x38/0x48)
> [<c016450c>] (complete) from [<c010d66c>] (arch_cpu_idle_dead+0x2c/0x8c)
> [<c010d66c>] (arch_cpu_idle_dead) from [<c014edec>] (do_idle+0x98/0x148)
> [<c014edec>] (do_idle) from [<c014f1fc>] (cpu_startup_entry+0x18/0x1c)
> [<c014f1fc>] (cpu_startup_entry) from [<4010246c>] (0x4010246c)
>
> Given secondary CPU startup is already quite flaky on this SoC, perhaps
> it's best to leave it alone?

Last time I saw that was on v4.19-rc7 in October.
Presumably that was fixed in the big RCU update in v4.20-rc1, so I think
it's safe to use the Global Timer on SH Mobile AG5 now.

Thoughts?
Thanks!

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC 4/4] [WIP] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs

[Geert Uytterhoeven]

On Tue, Aug 21, 2018 at 9:37 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> On Tue, Jul 31, 2018 at 6:08 PM Geert Uytterhoeven
> <geert+renesas@glider.be> wrote:
> > SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which
> > includes a global timer.
> >
> > Enable the ARM global timer on these SoCs, which will be used for:
> >   - the scheduler clock, improving scheduler accuracy from 10 ms to 3 or
> >     4 ns,
> >   - delay loops, allowing removal of calls to shmobile_init_delay() from
> >     the corresponding machine vectors.
> >
> > Note that when using an old DTB lacking the global timer, the kernel
> > will still work.  However, loops-per-jiffies will no longer be preset,
> > and the delay loop will need to be calibrated during boot.
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> This seems to cause random system resume issues on the venerable SH-Mobile
> AG5, ranging from plain lockups to RCU warnings:
>
> WARNING: suspicious RCU usage
> 4.18.0-kzm9g-00218-gaf4425056bd09e9e #38 Not tainted
> -----------------------------
> kernel/sched/fair.c:6231 suspicious rcu_dereference_check() usage!
>
> other info that might help us debug this:
>
>
> RCU used illegally from offline CPU!
> rcu_scheduler_active = 2, debug_locks = 1
> 3 locks held by swapper/1/0:
>  #0: 6d7f5781 ((cpu_died).wait.lock){....}, at: complete+0x14/0x48
>  #1: 84ce6f8e (&p->pi_lock){-.-.}, at: try_to_wake_up+0x30/0x3cc
>  #2: 93591133 (rcu_read_lock){....}, at: select_task_rq_fair+0x5c/0xe8c
>
> stack backtrace:
> CPU: 1 PID: 0 Comm: swapper/1 Not tainted
> 4.18.0-kzm9g-00218-gaf4425056bd09e9e #38
> Hardware name: Generic SH73A0 (Flattened Device Tree)
> [<c010f22c>] (unwind_backtrace) from [<c010bab0>] (show_stack+0x10/0x14)
> [<c010bab0>] (show_stack) from [<c0599750>] (dump_stack+0x9c/0xd4)
> [<c0599750>] (dump_stack) from [<c01542c8>] (select_task_rq_fair+0x140/0xe8c)
> [<c01542c8>] (select_task_rq_fair) from [<c0149494>]
> (try_to_wake_up+0x210/0x3cc)
> [<c0149494>] (try_to_wake_up) from [<c016355c>] (__wake_up_common+0xcc/0x140)
> [<c016355c>] (__wake_up_common) from [<c01636a8>] (__wake_up_locked+0x14/0x1c)
> [<c01636a8>] (__wake_up_locked) from [<c016450c>] (complete+0x38/0x48)
> [<c016450c>] (complete) from [<c010d66c>] (arch_cpu_idle_dead+0x2c/0x8c)
> [<c010d66c>] (arch_cpu_idle_dead) from [<c014edec>] (do_idle+0x98/0x148)
> [<c014edec>] (do_idle) from [<c014f1fc>] (cpu_startup_entry+0x18/0x1c)
> [<c014f1fc>] (cpu_startup_entry) from [<4010246c>] (0x4010246c)
>
> Given secondary CPU startup is already quite flaky on this SoC, perhaps
> it's best to leave it alone?

Last time I saw that was on v4.19-rc7 in October.
Presumably that was fixed in the big RCU update in v4.20-rc1, so I think
it's safe to use the Global Timer on SH Mobile AG5 now.

Thoughts?
Thanks!

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH/RFC 4/4] [WIP] ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs

[Geert Uytterhoeven]

On Tue, Aug 21, 2018 at 9:37 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> On Tue, Jul 31, 2018 at 6:08 PM Geert Uytterhoeven
> <geert+renesas@glider.be> wrote:
> > SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which
> > includes a global timer.
> >
> > Enable the ARM global timer on these SoCs, which will be used for:
> >   - the scheduler clock, improving scheduler accuracy from 10 ms to 3 or
> >     4 ns,
> >   - delay loops, allowing removal of calls to shmobile_init_delay() from
> >     the corresponding machine vectors.
> >
> > Note that when using an old DTB lacking the global timer, the kernel
> > will still work.  However, loops-per-jiffies will no longer be preset,
> > and the delay loop will need to be calibrated during boot.
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> This seems to cause random system resume issues on the venerable SH-Mobile
> AG5, ranging from plain lockups to RCU warnings:
>
> WARNING: suspicious RCU usage
> 4.18.0-kzm9g-00218-gaf4425056bd09e9e #38 Not tainted
> -----------------------------
> kernel/sched/fair.c:6231 suspicious rcu_dereference_check() usage!
>
> other info that might help us debug this:
>
>
> RCU used illegally from offline CPU!
> rcu_scheduler_active = 2, debug_locks = 1
> 3 locks held by swapper/1/0:
>  #0: 6d7f5781 ((cpu_died).wait.lock){....}, at: complete+0x14/0x48
>  #1: 84ce6f8e (&p->pi_lock){-.-.}, at: try_to_wake_up+0x30/0x3cc
>  #2: 93591133 (rcu_read_lock){....}, at: select_task_rq_fair+0x5c/0xe8c
>
> stack backtrace:
> CPU: 1 PID: 0 Comm: swapper/1 Not tainted
> 4.18.0-kzm9g-00218-gaf4425056bd09e9e #38
> Hardware name: Generic SH73A0 (Flattened Device Tree)
> [<c010f22c>] (unwind_backtrace) from [<c010bab0>] (show_stack+0x10/0x14)
> [<c010bab0>] (show_stack) from [<c0599750>] (dump_stack+0x9c/0xd4)
> [<c0599750>] (dump_stack) from [<c01542c8>] (select_task_rq_fair+0x140/0xe8c)
> [<c01542c8>] (select_task_rq_fair) from [<c0149494>]
> (try_to_wake_up+0x210/0x3cc)
> [<c0149494>] (try_to_wake_up) from [<c016355c>] (__wake_up_common+0xcc/0x140)
> [<c016355c>] (__wake_up_common) from [<c01636a8>] (__wake_up_locked+0x14/0x1c)
> [<c01636a8>] (__wake_up_locked) from [<c016450c>] (complete+0x38/0x48)
> [<c016450c>] (complete) from [<c010d66c>] (arch_cpu_idle_dead+0x2c/0x8c)
> [<c010d66c>] (arch_cpu_idle_dead) from [<c014edec>] (do_idle+0x98/0x148)
> [<c014edec>] (do_idle) from [<c014f1fc>] (cpu_startup_entry+0x18/0x1c)
> [<c014f1fc>] (cpu_startup_entry) from [<4010246c>] (0x4010246c)
>
> Given secondary CPU startup is already quite flaky on this SoC, perhaps
> it's best to leave it alone?

Last time I saw that was on v4.19-rc7 in October.
Presumably that was fixed in the big RCU update in v4.20-rc1, so I think
it's safe to use the Global Timer on SH Mobile AG5 now.

Thoughts?
Thanks!

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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